Inter-core communication method, apparatus and device of multi-core processor and medium

Abstract

This application provides a method, apparatus, device, and medium for inter-core communication in a multi-core processor. The method includes receiving communication data sent by a second core of an in-vehicle operating system. The communication data is obtained by the second core encrypting core data using a first checksum within the second core. The communication data is then verified using a second checksum in the first core to obtain a verification result. If the verification result indicates that the communication data has passed verification, the communication data is decrypted to obtain decrypted data. Therefore, in a multi-core communication scenario, the first core first verifies the received communication data using a second checksum, and only decrypts the communication data after the verification is passed, thus extracting the core data sent by the sender, i.e., the second core, to the first core. This ensures the integrity and security of the communication data and improves the communication security of inter-core communication in the in-vehicle operating system.

Description

Technical Field

[0001] This application relates to the field of communication technology, and in particular to a method, apparatus, device and medium for inter-core communication of a multi-core processor. Background Technology

[0002] Inter-processor communication (IPC) refers to the mechanism for data transfer and synchronization between different processor cores or central processing unit (CPU) cores in an operating system. Its purpose is to achieve efficient cooperation and resource sharing in a multi-core architecture, enabling each core to work collaboratively to complete complex tasks. For example, in automotive operating systems, IPC enables the collaborative work of various cores to jointly complete complex vehicle control and management tasks. Therefore, ensuring the security of inter-processor communication in automotive operating systems is a key concern. Summary of the Invention

[0003] In view of the above problems, this application provides a method, apparatus, device and medium for inter-core communication of multi-core processors, which can solve the technical problem of communication security in inter-core communication in vehicle operating systems.

[0004] In a first aspect, embodiments of this application provide an inter-core communication method for a multi-core processor, applied to the first core of an in-vehicle operating system, the method comprising:

[0005] It receives communication data sent by the second core of the vehicle operating system. The communication data is obtained by the second core through the encryption of core data using the first check code in the second core.

[0006] The communication data is verified using the second verification code in the first core, and the verification result is obtained.

[0007] If the verification result indicates that the communication data has passed the verification, the communication data is decrypted to obtain the decrypted data.

[0008] In the above scheme, in a multi-core communication scenario, the first core can first verify the communication data it receives using a second checksum. After the verification passes, the communication data is decrypted to extract the core data sent by the sender, i.e., the second core, to the first core. In this way, verifying the communication data with a checksum ensures data integrity and prevents the first core from processing incorrect or incomplete data due to tampering with the communication data transmitted between cores. This would reduce the accuracy of the overall vehicle operating system's decisions or actions, avoid the propagation of erroneous or incomplete data between multiple cores, ensure data consistency between multiple cores, and enable multiple cores of the vehicle operating system to work collaboratively based on accurate and complete data, thereby improving the communication security of inter-core communication in the vehicle operating system.

[0009] In some embodiments, the inter-core communication method for multi-core processors described above may further include:

[0010] If the verification result indicates that the communication data has failed the verification, the communication data is deleted, and a first instruction is sent to the second core, which instructs the second core to resend the communication data.

[0011] Therefore, if the communication data fails the verification, it indicates that the communication data between cores may have been tampered with or damaged, and there are problems with the integrity and security of the communication data. In this case, a remedy is given, that is, the first core can delete the communication data to prevent the spread of insecure data between multiple cores and avoid the situation where the accuracy of the overall vehicle operating system's decisions or behaviors is reduced due to the first core processing incomplete or insecure data.

[0012] In some embodiments, the inter-core communication method for multi-core processors described above may further include:

[0013] If the verification result indicates that the communication data has failed the verification, an error log corresponding to the received communication data is generated based on the verification result.

[0014] Adjust the data receiving parameters of the first core according to the error logs corresponding to the received communication data;

[0015] Send a second instruction to the second core. The second instruction is used to instruct the second core to adjust the data transmission parameters and resend the communication data according to the adjusted data transmission parameters.

[0016] According to the adjusted data receiving parameters, receive the communication data retransmitted by the second core.

[0017] Therefore, if communication data fails verification, it indicates two things: firstly, the communication data between cores may have been tampered with or corrupted, jeopardizing its integrity and security; secondly, it suggests potential issues with the data receiving parameters of the first core and / or the data sending parameters of the second core. The first core can then self-verify its data receiving parameters based on the error log. If a problem is found, it can adjust these parameters to resend the communication data retransmitted by the second core according to the adjusted parameters. Similarly, the second core can self-verify its data sending parameters based on the second instruction sent by the first core. If a problem is found, it can adjust these parameters to resend the communication data to the first core according to the adjusted parameters. This ensures that the first core receives complete and secure communication data while reducing the resource consumption associated with frequent retransmissions due to errors in data sending or receiving parameters.

[0018] In some embodiments, the step of "adjusting the data receiving parameters of the first core according to the error log corresponding to the received communication data" mentioned above may specifically include:

[0019] If the error log includes information to characterize an abnormal communication buffer size, the communication buffer size is readjusted based on the amount of communication data and the frequency of receiving data from the first core, wherein the amount of data and the frequency of receiving data are positively correlated with the communication buffer size.

[0020] If the error log includes information indicating an anomaly in the communication protocol with the second core, the communication protocol with the second core is redefined based on the first application corresponding to the first core and the second application corresponding to the second core. If the first application and the second application are the same, the redefined communication protocol with the second core includes at least one of the following: transmission control protocol and network protocol. If the first application and the second application are different, the redefined communication protocol with the second core includes a cross-application communication protocol.

[0021] Therefore, the process of the first core self-verifying the receiving parameters can be referred to the error log. At this time, the problem with the data receiving parameters can be quickly found based on the information in the error log, and targeted adjustments can be made according to the problems pointed out in the error log. In this way, the speed and accuracy of the first core self-verifying the receiving parameters can be improved, thereby ensuring that the first core can receive complete and secure communication data, while also reducing the amount of resources required for frequent retransmission commands due to errors in data sending or receiving parameters.

[0022] In some embodiments, the step of "verifying the communication data using the second verification code in the first core and obtaining the verification result" mentioned above may specifically include:

[0023] Based on the first attribute parameter of the communication data and the second attribute parameter of the second check code, determine the result of dividing the first attribute parameter and the second attribute parameter;

[0024] If the division result includes the division remainder and the value of the division remainder is a reference threshold, the result representing the communication data passing the verification is determined as the verification result.

[0025] If the division result includes the remainder and the value of the remainder is not equal to the reference threshold, the result indicating that the communication data failed the verification will be determined as the verification result.

[0026] Therefore, the division result of the attribute parameters of the communication data and the attribute parameters of the second check code can be used to check whether there are errors in the communication data between the cores. This helps to ensure the accuracy and integrity of the data. In addition, this method can be completed in a short time, ensuring the real-time nature of the verification process. Furthermore, since the implementation process of this method is simple and clear, easy to understand and implement, it can be quickly deployed and integrated.

[0027] In some embodiments, the second core mentioned above includes multiple second cores, and the second verification code includes multiple second verification codes. One second core corresponds to one second verification code, and different second cores correspond to different second verification codes.

[0028] Therefore, different second check codes can be set for different second cores, making it difficult for criminals to copy or forge their second check codes, thereby protecting the data security of inter-core communication. In addition, when it is determined that the communication data has failed the verification, the specific second core can be quickly located through the set second check code, which facilitates the vehicle operating system to manage the operation of each core and thus improves the communication security of inter-core communication in the vehicle operating system.

[0029] In some embodiments, prior to the above-mentioned step of "decrypting the communication data to obtain decrypted data", the inter-core communication method of the multi-core processor may further include:

[0030] Based on the association information between the core identifier and the preset decryption data, obtain the decryption data corresponding to the core identifier of the second core. The decryption data includes the decryption algorithm and the first key.

[0031] Based on this, the aforementioned steps of "decrypting communication data to obtain decrypted data" may specifically include:

[0032] Input the first key into the decryption engine corresponding to the decryption algorithm to activate the decryption engine;

[0033] The communication data is decrypted using the activated decryption engine and the first key in the decryption engine to obtain candidate decryption data.

[0034] The candidate decryption data is verified using a reference verification algorithm to obtain the verification result.

[0035] If the verification results indicate that the candidate decryption data has passed the verification, the candidate decryption data will be determined as the decryption data.

[0036] Therefore, a secure hardware decryption engine can be used to decrypt its communication data, ensuring the security of the communication data decryption environment, preventing attackers from directly accessing, stealing or tampering with the communication data, improving the communication security of inter-core communication in the vehicle operating system, and since the hardware decryption engine is specifically designed to perform decryption tasks, it has higher processing speed and lower latency, and can handle a large amount of communication data without affecting the normal operation of the vehicle operating system.

[0037] Secondly, embodiments of this application provide an inter-core communication method for a multi-core processor, applied to the second core of an in-vehicle operating system, the method comprising:

[0038] Obtain the core data, the first checksum, and the encrypted data corresponding to the core data. The encrypted data includes the encryption algorithm and the second key.

[0039] Input the second key into the encryption engine corresponding to the encryption algorithm to activate the encryption engine;

[0040] The core data and the first checksum are encrypted using the activated encryption engine and the second key in the encryption engine to obtain the communication data.

[0041] Send communication data to the first core of the vehicle's operating system.

[0042] Therefore, by using the first verification to obfuscate the core data, the integrity of the communication data can be ensured, preventing the communication data transmitted between cores from being tampered with. This avoids the first core processing incorrect or incomplete data, which could reduce the accuracy of the overall vehicle operating system's decisions or actions. It also prevents the propagation of incorrect or incomplete data between multiple cores, ensures the consistency of data between multiple cores, and enables multiple cores of the vehicle operating system to work collaboratively based on accurate and complete data, thereby improving the communication security of inter-core communication in the vehicle operating system.

[0043] In some embodiments, prior to the step of "sending communication data to the first core of the vehicle operating system" mentioned above, the inter-core communication method of the multi-core processor may further include:

[0044] The transmission method corresponding to the communication data is determined based on the amount of communication data.

[0045] The aforementioned step of "sending communication data to the first core" may specifically include:

[0046] According to the transmission method, communication data is sent to the first core.

[0047] Therefore, different transmission methods can be selected according to the different amounts of communication data, thereby improving the transmission efficiency of inter-core communication.

[0048] In some embodiments, the step of "sending communication data to the first core according to the transmission method" mentioned above may specifically include:

[0049] When the amount of communication data is greater than or equal to a preset threshold and the transmission method includes segmented transmission, the communication data is segmented according to the segmented transmission method to obtain multiple communication data blocks.

[0050] Multiple communication data blocks are sent to the first core in sequence according to their order.

[0051] Therefore, by dividing large amounts of communication data into multiple smaller communication data blocks, each communication data block can be transmitted independently. This helps reduce latency and waiting time during transmission, improves the transmission efficiency of inter-core communication, and ensures the security of communication data during inter-core transmission because each communication data block is encrypted.

[0052] In some embodiments, after the step of "sending communication data to the first core of the vehicle operating system" mentioned above, the inter-core communication may further include:

[0053] Upon receiving the first instruction from the first core, resend the communication data to the first core;

[0054] or,

[0055] Upon receiving the second instruction from the first core, adjust the data transmission parameters for sending data to the first core;

[0056] According to the data transmission parameters, resend the communication data to the first core.

[0057] Therefore, if the communication data fails verification, it indicates that the inter-core communication data may have been tampered with or corrupted, raising concerns about its integrity and security. In this case, the second core can resend the communication data based on the first instruction sent by the first core. This prevents the first core from processing incomplete or insecure data, which could reduce the accuracy of decisions or actions made by the overall vehicle operating system. Furthermore, the second core can self-verify its data transmission parameters based on the second instruction sent by the first core. If there are problems with the data transmission parameters, it can adjust them to resend the communication data to the first core according to those parameters. This ensures that the first core receives complete and secure communication data while reducing the resource consumption associated with frequent retransmissions due to errors in data transmission or reception parameters.

[0058] Thirdly, embodiments of this application provide an inter-core communication device for a multi-core processor, applied to the first core of an in-vehicle operating system, comprising:

[0059] The receiving module is used to receive communication data sent by the second core of the vehicle operating system. The communication data is obtained by the second core encrypting the core data through the first check code in the second core.

[0060] The verification module is used to verify the communication data using the second verification code in the first core and obtain the verification result.

[0061] The processing module is used to decrypt the communication data when the verification result indicates that the communication data has passed the verification, and obtain the decrypted data.

[0062] Fourthly, embodiments of this application provide an inter-core communication device for a multi-core processor, applied to the second core of an in-vehicle operating system, comprising:

[0063] The acquisition module is used to acquire core data, a first checksum, and encrypted data corresponding to the core data. The encrypted data includes an encryption algorithm and a second key.

[0064] The activation module is used to input the second key into the encryption engine corresponding to the encryption algorithm and activate the encryption engine.

[0065] The processing module is used to encrypt the core data and the first checksum using the activated encryption engine and the second key in the encryption engine to obtain communication data.

[0066] The sending module is used to send communication data to the first core of the vehicle operating system.

[0067] Fifthly, this application provides a computer device, including a processor and a memory storing computer program instructions, wherein the processor, when executing the computer program instructions, implements the inter-core communication method of the multi-core processor as described in the first aspect, or implements the inter-core communication method of the multi-core processor as described in the second aspect.

[0068] Sixthly, this application provides a readable storage medium storing computer program instructions, which, when executed by a processor, implement the inter-core communication method of a multi-core processor as described in the first aspect, or implement the inter-core communication method of a multi-core processor as described in the second aspect.

[0069] In a seventh aspect, this application provides a computer program product in which the instructions, when executed by a processor of an electronic device, cause the electronic device to perform the inter-core communication method of a multi-core processor as described in the first aspect, or to implement the inter-core communication method of a multi-core processor as described in the second aspect when executing computer program instructions.

[0070] The above description is only an overview of the technical solution of this application. In order to better understand the technical means of this application and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this application more obvious and understandable, specific embodiments of this application are given below. Attached Figure Description

[0071] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments of this application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0072] Figure 1 This is a flowchart of an inter-core communication method for a multi-core processor according to an embodiment of this application;

[0073] Figure 2 This is a flowchart of an inter-core communication method for a multi-core processor according to an embodiment of this application;

[0074] Figure 3 Schematic diagram of the structure of an inter-core communication device for a multi-core processor provided for some embodiments of this application;

[0075] Figure 4 Schematic diagram of the structure of an inter-core communication device for a multi-core processor provided for some embodiments of this application;

[0076] Figure 5 A schematic diagram of the hardware structure of a computer device provided for some embodiments of this application. Detailed Implementation

[0077] The embodiments of the technical solution of this application will now be described in detail with reference to the accompanying drawings. These embodiments are only used to more clearly illustrate the technical solution of this application and are therefore merely examples, and should not be used to limit the scope of protection of this application.

[0078] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains; the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the application; the terms “comprising” and “having”, and any variations thereof, in the specification, claims, and foregoing description of the drawings are intended to cover non-exclusive inclusion.

[0079] In the description of the embodiments of this application, technical terms such as "first" and "second" are used only to distinguish different objects and should not be construed as indicating or implying relative importance or implicitly specifying the number, specific order, or primary and secondary relationship of the indicated technical features. In the description of the embodiments of this application, "multiple" means two or more, unless otherwise explicitly defined.

[0080] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0081] Unless otherwise specified, all embodiments and optional embodiments of this application can be combined to form new technical solutions.

[0082] Unless otherwise specified, all technical features and optional technical features of this application may be combined to form new technical solutions.

[0083] Unless otherwise specified, all steps of this application may be performed sequentially or randomly, preferably sequentially. For example, if the method includes steps (a) and (b), it means that the method may include steps (a) and (b) performed sequentially, or it may include steps (b) and (a) performed sequentially. For example, if the method may also include step (c), it means that step (c) may be added to the method in any order. For example, the method may include steps (a), (b), and (c), or it may include steps (a), (c), and (b), or it may include steps (c), (a), and (b), etc.

[0084] In the description of the embodiments in this application, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this document generally indicates that the preceding and following related objects have an "or" relationship.

[0085] In the description of the embodiments of this application, the term "multiple" refers to two or more (including two), similarly, "multiple sets" refers to two or more (including two sets), and "multiple pieces" refers to two or more (including two pieces).

[0086] In the description of the embodiments of this application, the technical terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing the embodiments of this application and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the embodiments of this application.

[0087] In the description of the embodiments of this application, unless otherwise expressly specified and limited, technical terms such as "installation," "connection," "joining," and "fixing" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. For those skilled in the art, the specific meaning of the above terms in the embodiments of this application can be understood according to the specific circumstances.

[0088] As intelligent driving and entertainment systems become increasingly complex, traditional single-core processors struggle to meet real-time requirements, such as the parallel computing power demands of autonomous driving algorithms. Multi-core processor architectures can achieve computational power aggregation through task allocation, such as real-time control cores, computational cores, and resource integration and cost optimization. Real-time control cores can handle low-latency tasks like vehicle power and chassis control, while computational cores can run high-load algorithms such as image recognition and path planning.

[0089] Multi-core processor architectures can integrate the functions of multiple traditional electronic control units (ECUs) onto a single chip, reducing hardware quantity, simplifying wiring harness design, and lowering manufacturing costs. For example, powertrain domain controllers integrate engine control, battery management, and other functions through multi-core processors to achieve resource integration and cost optimization. Domain controllers can integrate ECUs with similar functions into functional domains, such as powertrain and cockpit domains, achieving modular management through unified scheduling. For instance, the cockpit domain can integrate functions such as the instrument panel, central control screen, and voice interaction, with resource allocation coordinated by a multi-core processor. The autonomous driving domain can centrally process data from sensors such as cameras and radar, reducing communication latency across ECUs, thereby achieving functional domain centralization.

[0090] Traditional distributed architectures rely on low-speed buses, which are prone to congestion as the number of electronic control units increases. Domain controllers, on the other hand, achieve efficient inter-domain communication through high-speed channels such as Ethernet, reducing the risk of signal packet loss and thus optimizing the communication architecture.

[0091] Therefore, multi-core processor architecture can provide parallel computing capabilities for domain controllers, such as processing perception, decision-making, and control tasks on a per-core basis in the autonomous driving domain, and ensuring the priority of critical tasks through hierarchical management of inter-core and inter-domain communication.

[0092] In related technologies, to ensure the security of inter-core communication in an in-vehicle operating system, the data sending core typically encrypts the core data to be sent, resulting in encrypted core data. Next, the data sending core sends the encrypted core data to the data receiving core; then, the data receiving core decrypts the encrypted core data. However, some malicious actors may intercept the encrypted core data sent by the data sending core and insert malicious data to regenerate malicious encrypted core data. If the data receiving core rashly decrypts this malicious encrypted core data, it will affect the operational security of the data receiving core, thereby reducing the security and stability of the in-vehicle operating system.

[0093] Based on the aforementioned communication security issues in inter-core communication within vehicle operating systems, this application proposes an inter-core communication method for multi-core processors. This method ensures data integrity, prevents tampering with communication data transmitted between cores, and prevents malicious actors from leaking user confidential information by detecting the content of inter-core communication. Simultaneously, it addresses the issue of compromised data receiving core security, which in turn affects the security and stability of the vehicle operating system. This method guarantees data consistency among multiple cores, enabling collaborative work between the cores of the vehicle operating system based on accurate and complete data, thereby improving the communication security of inter-core communication within the vehicle operating system.

[0094] To better describe the inter-core communication method, apparatus, computer equipment, storage medium, and computer program product for multi-core processors provided in the embodiments of this application, the following will be described in conjunction with the accompanying drawings. Figures 1 to 5 The following detailed description is provided, and it should be noted that these embodiments are not intended to limit the scope of this application.

[0095] First, this application provides an inter-core communication architecture that can be applied to an in-vehicle operating system. The in-vehicle operating system conforms to the Automotive Open System Architecture (AUTOSAR) standard and can be equipped with a Battery Management System (BMS). The BMS in this application embodiment is used to perform at least one of the following functions for individual battery cells: state monitoring, state analysis, charge / discharge control, safety protection, information management, thermal management, and high-voltage power distribution. In addition, the BMS in this application can also implement the functions of a controller in an electrical device, such as a vehicle control unit (VCU) or a motor control unit (MCU), etc., but this application embodiment does not impose any limitations on this.

[0096] It should be noted that the battery management system in this application can be integrated as a controller into the battery device, such as into the battery pack or energy storage box; the battery management system in this application can also be integrated as a controller into the power-consuming device, such as into the vehicle or vehicle chassis; the battery management system in this application can also be integrated as a controller into the charging device, such as into the charging device or battery swapping device; the battery management system in this application can also be deployed as control software on a server. The server can be a standalone physical server, a server cluster or distributed system composed of multiple physical servers, or a cloud server that provides basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communication, middleware services, domain name services, security services, content delivery networks (CDN), and big data and artificial intelligence platforms, such as vehicle networking cloud, application (APP) backend, etc.

[0097] The inter-core communication architecture in this application embodiment may include multiple cores. Among them, cores include, but are not limited to, processor cores and central processing unit cores.

[0098] A processor core refers to the internal part of the processor corresponding to the vehicle's operating system, used to execute vehicle instructions and process vehicle-related data. Each core can execute tasks independently and supports multi-threaded processing, thereby improving the overall performance of the vehicle's operating system.

[0099] A central processing unit (CPU) core refers to a complete system-on-a-chip (SoC) that includes a processor core as well as other devices and memory. It is used to execute instructions in at least one application in the vehicle operating system, process data, and control other components of the vehicle operating system to work together.

[0100] A core is a component of various processors or microcontroller units; a processor can contain one or more cores. The number of cores affects processor performance; the more cores, the more tasks the processor can handle simultaneously, and the better the performance of the in-vehicle operating system. These processors include, but are not limited to: central processing units (CPUs), graphics processing units (GPUs), intelligent processors, and neural network processors.

[0101] The inter-core communication method for multi-core processors in this embodiment can be applied to inter-core communication scenarios within the aforementioned inter-core communication architecture. Specifically, it can be applied to data synchronization scenarios between cores used for multimedia data processing and cores used for sensor data in an autonomous driving system of an in-vehicle operating system. For example, within a central processing unit chip with four processing cores, communication between these four cores constitutes inter-core communication. The multiple cores involved in inter-core communication can be used for data exchange between different applications or for data exchange between different cross-core systems.

[0102] Secondly, based on the above inter-core communication architecture, combined with Figure 1 The inter-core communication method for multi-core processors provided in the embodiments of this application will be described in detail.

[0103] Figure 1 This is a flowchart illustrating an inter-core communication method for a multi-core processor provided in an embodiment of this application.

[0104] like Figure 1 As shown, the inter-core communication method of this multi-core processor can be applied to the cores of the aforementioned vehicle operating system used for receiving communication data. Here, the core used for receiving communication data is described as the first core. Based on this, the method may include the following steps:

[0105] Step 110: Receive communication data sent by the second core of the vehicle operating system. The communication data is obtained by the second core encrypting core data using the first verification code in the second core. Step 120: Verify the communication data using the second verification code in the first core to obtain the verification result. Step 130: If the verification result indicates that the communication data has passed the verification, decrypt the communication data to obtain decrypted data.

[0106] Therefore, before decrypting the received communication data, a checksum can be used to verify whether the received communication data has been tampered with or damaged during transmission. If the communication data passes the verification, it indicates that the received communication data is complete, secure, and has not been tampered with. Then, the communication data can be decrypted to extract the core data sent by the sender, i.e., the second core, to the first core. This avoids the first core directly decrypting the received core data, which could cause the first core to process incorrect or insecure data, reducing the accuracy of the overall vehicle operating system's decisions or actions. This enables multiple cores in the vehicle operating system to collaborate based on accurate and complete data, improving the communication security of inter-core communication in the vehicle operating system.

[0107] The steps described above are explained in detail below.

[0108] Regarding step 110, in some embodiments of this application, communication data sent by the second core of the vehicle operating system can be received through the communication protocol with the second core.

[0109] The communication protocol in this application embodiment may include at least one of the following: transmission control protocol, network protocol, and cross-application communication protocol.

[0110] Specifically, the Transmission Control Protocol (TCP) is a reliable and ordered protocol that divides data into packets for transmission, ensuring no data loss or corruption during inter-core transmission. The Internet Protocol (IP) is a network layer protocol that defines how communication data is routed from the second core to the first core. The Inter-OS Application Communication (IOC) protocol, defined by the AUTOSAR standard, is used for data exchange between different applications or across core systems. IOC is designed to improve communication efficiency while maintaining the reliability and real-time performance of data transmission.

[0111] In this way, communication data sent by the second core of the vehicle operating system can be received through the communication protocol with the second core, thereby improving the transmission efficiency of communication data.

[0112] The kernel data in this application embodiment includes, but is not limited to, at least one of the following: application data, control data, core status information, and communication metadata of each application in the vehicle operating system.

[0113] Specifically, application data can include real-time control commands, functional module interaction data, and shared computing results. Real-time control commands can include vehicle dynamic information such as engine speed and vehicle stability control parameters; functional module interaction data can include navigation commands or sensor data transmitted between the vehicle infotainment system and the autonomous driving algorithm; and shared computing results can include intermediate data generated during multi-core collaborative processing, such as the fragmented results of parallel computing.

[0114] Control data can include task scheduling instructions and resource allocation instructions. Task scheduling instructions include commands to start, stop, or switch tasks, such as a first core sending a computation request to a second core. Resource allocation instructions include memory block request requests, transmission channel configuration information, etc.

[0115] Core status information can include core status feedback and synchronization signals. Core status feedback includes core operating status such as idle or busy state, error logs, or hardware interrupt notifications.

[0116] Communication metadata may include address and index information and transmission channel configuration data. The address and index information may include location information such as the offset address of a data block in shared memory and the target location index. The transmission channel configuration data may include bidirectional channel parameters for inter-core communication, such as a first transmission channel for sending and a second channel for receiving. Regarding step 120, in some embodiments of this application, the communication data can be verified using a cyclic redundancy check (CRC). Specifically, step 120 may include steps 1201 and 1202, as detailed below.

[0117] Step 1201: Determine the division result of the first attribute parameter and the second attribute parameter based on the first attribute parameter of the communication data and the second attribute parameter of the second check code.

[0118] The first and second attribute parameters in the embodiments of this application can be represented by numerical values ​​or by polynomials.

[0119] Wherein, if the first attribute parameter and the second attribute parameter are represented by numerical values, the first attribute parameter includes, but is not limited to, at least one of the following: the amount of communication data, the size of the communication data packet, and the size of the communication data frame. The second attribute parameter includes, but is not limited to, at least one of the following: the amount of the second checksum data, the size of the second checksum data packet, and the size of the second checksum data frame.

[0120] If the first attribute parameter and the second attribute parameter are represented by polynomials, then the first attribute parameter may include a polynomial generated by the CRC algorithm based on the communication data, and the second attribute parameter may include a polynomial generated by the CRC algorithm based on the second check code.

[0121] For example, the division result can be obtained by dividing the size of the communication data frame by a pre-agreed divisor, namely the size of the second check code data frame.

[0122] Step 1202: If the division result includes the division remainder and the value of the division remainder is a reference threshold, the result representing the communication data passing the verification is determined as the verification result.

[0123] or,

[0124] If the division result includes the remainder and the value of the remainder is not equal to the reference threshold, the result indicating that the communication data failed the verification will be determined as the verification result.

[0125] For example, if the remainder of the division result is 0, which is the reference threshold, it indicates that no error occurred in the inter-core communication process, and the communication data is complete and secure. That is, the result of the verification of the communication data is determined as the verification result.

[0126] Alternatively, if the remainder of the division result is not 0, i.e. not the reference threshold, it indicates that an error occurred in the communication data during the inter-core communication process. The communication data may not be complete or secure. In other words, the result that indicates the communication data fails the verification is determined as the verification result.

[0127] Therefore, the division result of the attribute parameters of the communication data and the attribute parameters of the second check code can be used to check whether there are errors in the communication data between the cores. This helps to ensure the accuracy and integrity of the data. In addition, this method can be completed in a short time, ensuring the real-time nature of the verification process. Furthermore, since the implementation process of this method is simple and clear, easy to understand and implement, it can be quickly deployed and integrated.

[0128] It should be noted that the second core in this application embodiment may include multiple second cores. Based on this, different second verification codes can be set for different second cores in this application embodiment, making it difficult for criminals to copy or forge their second verification codes, thereby protecting the data security of inter-core communication. Thus, the second verification code includes multiple second verification codes, with one second verification code corresponding to one second core, and different second cores corresponding to different second verification codes. The second verification code can be determined based on the core identifier of the second core, or it can be determined based on the core type of the second core. The core identifier may include a preset identifier for the second core, and the core type includes, but is not limited to, at least one of the following: physical core, logical core.

[0129] For example, a second checksum can be set based on the core type. Taking the second checksum as a numerical type, for example, the second checksum set for the physical core is divisor 7, and the second checksum set for the logical core is divisor 3.

[0130] Therefore, the specific second core can be quickly located through the set second check code, which facilitates the vehicle operating system to manage the operation of each core and thus improves the communication security of inter-core communication in the vehicle operating system.

[0131] Regarding step 130, in some embodiments of this application, prior to step 130, the inter-core communication method of the multi-core processor may further include obtaining decryption data corresponding to the core identifier of the second core based on the association information between the core identifier and preset decryption data. The decryption data includes a decryption algorithm and a first key. The decryption data corresponds to the encryption algorithm of the second core's encrypted core data. The encryption algorithms in the embodiments of this application include, but are not limited to, symmetric encryption algorithms, asymmetric encryption algorithms, and hash algorithms. The decryption algorithms corresponding to the encryption algorithms include, but are not limited to, symmetric decryption algorithms, asymmetric decryption algorithms, and hash algorithms. The first key includes keys corresponding to the symmetric encryption algorithm and the symmetric decryption algorithm, a public key corresponding to the asymmetric encryption algorithm, and a private key corresponding to the asymmetric decryption algorithm.

[0132] For example, the encryption algorithm is a symmetric encryption algorithm and the decryption algorithm is a symmetric decryption algorithm, such as the AES-128 decryption algorithm and the first key corresponding to the AES-128 encryption algorithm.

[0133] Taking hash algorithms as an example of encryption and decryption algorithms, for instance, a hash algorithm converts kernel data of arbitrary length into a hash value of fixed length, thereby encrypting the data. During decryption, a hash algorithm can be used to convert communication data of arbitrary length into a hash value of fixed length, and the hash value calculated during encryption is compared with the hash value calculated during decryption to confirm that the content has not been tampered with. Based on this, step 130 can specifically include steps 1301 to 1304, as detailed below.

[0134] Step 1301: Input the first key into the decryption engine corresponding to the decryption algorithm to activate the decryption engine. In this embodiment, the decryption engine can be a hardware decryption engine, which includes an encryption / decryption chip.

[0135] For example, the first key is loaded into the decryption engine using the interface provided by the decryption library or hardware decryption module, and the decryption mode is set to correspond to the encryption mode to ensure that the decryption engine is active and ready to perform the decryption operation.

[0136] Step 1302: Decrypt the communication data using the activated decryption engine and the first key in the decryption engine to obtain candidate decryption data.

[0137] For example, the received communication data is input into the decryption engine, or multiple communication data blocks are input into the decryption engine one by one for decryption. Based on the decryption algorithm and the first key, the decryption engine uses the AES algorithm and the key to decrypt each encrypted 128-bit data block, outputting the corresponding plaintext block and generating the original plaintext data, i.e., candidate decryption data.

[0138] Step 1303: Verify the candidate decryption data using a reference verification algorithm to obtain the verification result. The reference verification algorithm may include, but is not limited to, at least one of the following: message authentication code, digital signature, and identity authentication.

[0139] For example, the decrypted plaintext data, i.e., the candidate decryption data, can be verified using digital signatures to obtain the verification result.

[0140] Step 1304: If the verification result indicates that the candidate decryption data has passed the verification, the candidate decryption data is determined as the decryption data.

[0141] For example, if the verification result indicates that the candidate decryption data has passed the verification, the candidate decryption data is determined as decryption data so that it can be passed to the upper-layer application for further processing, ensuring that no errors are introduced during the decryption process.

[0142] Conversely, if the verification result indicates that the candidate decryption data has failed verification, the candidate decryption data is deleted, and a first instruction is sent to the second core, which instructs the second core to resend the communication data.

[0143] Therefore, a secure hardware decryption engine can be used to decrypt its communication data, ensuring the security of the communication data decryption environment, preventing attackers from directly accessing, stealing or tampering with the communication data, improving the communication security of inter-core communication in the vehicle operating system, and since the hardware decryption engine is specifically designed to perform decryption tasks, it has higher processing speed and lower latency, and can handle a large amount of communication data without affecting the normal operation of the vehicle operating system.

[0144] In addition, during inter-core communication, in addition to the above-mentioned cases where the communication data passes verification, there are also cases where the communication data fails verification in this embodiment of the application. This indicates that the communication data may be tampered with or damaged during transmission. The first core can take corresponding error handling measures as follows.

[0145] Specifically, if the communication data fails the verification, it indicates that the communication data of the inter-core communication may have been tampered with or damaged, and there are problems with the integrity and security of the communication data. At least two remedial measures can be given for this problem.

[0146] In some embodiments of this application, after step 120, the inter-core communication method of the multi-core processor provided in this application may further include step 1401, in which the communication data is deleted if the verification result indicates that the communication data has failed the verification, and a first instruction is sent to the second core, the first instruction being used to instruct the second core to resend the communication data.

[0147] When it is determined that the communication data has failed the verification, the specific second core can be quickly located by setting a second verification code, so as to quickly send the first instruction to the second core and improve the communication efficiency of inter-core communication in the vehicle operating system.

[0148] Therefore, the first core can delete communication data, prevent the spread of insecure data between multiple cores, and avoid reducing the accuracy of the overall vehicle operating system's decisions or actions due to the first core processing incomplete or insecure data.

[0149] In some embodiments of this application, the reason why the communication data fails the verification may also be that there is a problem with the data receiving parameters of the first core and / or the data sending parameters of the second core. Based on this, after step 120, the inter-core communication method of the multi-core processor provided in this application embodiment may further include steps 1402 to 1405, as shown below.

[0150] Step 1402: If the verification result indicates that the communication data has failed the verification, an error log corresponding to the received communication data is generated based on the verification result.

[0151] For example, during inter-core communication, the protocol stack will detect transmission errors, such as communication data failing verification, to trigger an error interrupt. At this time, if the receiver fails to obtain communication data or fails to write communication data, it will record the error flag in the status register to obtain the error log.

[0152] Step 1403: Adjust the data receiving parameters of the first core according to the error log corresponding to the received communication data. Step 1404: Send a second instruction to the second core, instructing the second core to adjust the data sending parameters and retransmit the communication data according to the adjusted parameters.

[0153] When it is determined that the communication data has failed the verification, the specific second core can be quickly located by setting a second verification code, so as to quickly send the first instruction to the second core and improve the communication efficiency of inter-core communication in the vehicle operating system.

[0154] Step 1405: Receive the communication data retransmitted by the second core according to the adjusted data receiving parameters.

[0155] Therefore, the first core can self-check its data receiving parameters based on the error log. If there is a problem with the data receiving parameters, it can adjust them to resend the communication data retransmitted by the second core according to the adjusted parameters. Similarly, the second core can also self-check its data sending parameters based on the second instruction sent by the first core. If there is a problem with the data sending parameters, it can adjust them to resend the communication data to the first core according to the adjusted parameters. This ensures that the first core can receive complete and secure communication data while reducing the resource consumption caused by frequent retransmission instructions due to errors in data sending or receiving parameters.

[0156] It should be noted that, in the embodiments of this application, the data receiving parameters mentioned above may include at least one of the following: buffer size and communication protocol.

[0157] Based on this, the adjustment methods for the aforementioned first core data receiving parameters are further explained for different data receiving parameters.

[0158] In some embodiments, the data receiving parameters may include the buffer size; based on this, step 1402 above may specifically include:

[0159] If the error log includes information indicating an abnormal communication buffer size, the communication buffer size is readjusted based on the amount of communication data and the frequency of receiving data from the first core, where the amount of data and the frequency of receiving data are positively correlated with the communication buffer size.

[0160] Specifically, the aforementioned step of readjusting the communication buffer size based on the amount of communication data and the first core's data receiving frequency can be recalculated and set according to the communication load and data transmission requirements to avoid buffer overflow or waste. This can be achieved by analyzing the amount of communication data and the first core's data receiving frequency, ensuring that the buffer can effectively store communication data without consuming excessive memory resources.

[0161] For example, in a BMS system, when a battery malfunctions or the system undergoes an emergency switch, a large amount of diagnostic data and status update data may be generated in a short period of time. By setting up data flow monitoring points in the vehicle control system to monitor changes in communication data flow in real time, for example, if the amount of data transmitted reaches 1MB within 10 seconds, a certain margin can be reserved when calculating the buffer size based on the peak value of the communication data. This margin can be 20%-50%. If the peak data volume is 1MB, and a 50% margin is reserved, then the buffer size should be at least 1MB * (1 + 50%) = 1.5MB.

[0162] In some embodiments, the data receiving parameters may include a communication protocol; based on this, step 1402 above may specifically include:

[0163] If the error log includes information indicating an anomaly in the communication protocol with the second core, the communication protocol with the second core is redefined based on the first application corresponding to the first core and the second application corresponding to the second core. If the first application and the second application are the same, the redefined communication protocol with the second core includes at least one of the following: transmission control protocol and network protocol. If the first application and the second application are different, the redefined communication protocol with the second core includes a cross-application communication protocol.

[0164] For example, if the error log includes information indicating an anomaly in the communication protocol with the second core, it can be determined whether the first application corresponding to the first core and the second application corresponding to the second core are the same application. If they are the same application, the communication protocol with the second core can be determined to be a transmission control protocol or a network protocol; otherwise, if they are different applications, the communication protocol with the second core can be determined to be a cross-application communication protocol.

[0165] Therefore, the process of the first core self-verifying the receiving parameters can be referred to the error log. At this time, the problem with the data receiving parameters can be quickly found based on the information in the error log, and targeted adjustments can be made according to the problems pointed out in the error log. In this way, the speed and accuracy of the first core self-verifying the receiving parameters can be improved, thereby ensuring that the first core can receive complete and secure communication data, while also reducing the amount of resources required for frequent retransmission commands due to errors in data sending or receiving parameters.

[0166] Then, based on the above inter-core communication architecture, combined with Figure 2 The inter-core communication method for multi-core processors provided in the embodiments of this application will be described in detail.

[0167] Figure 2 This is a flowchart illustrating an inter-core communication method for a multi-core processor provided in an embodiment of this application.

[0168] like Figure 2 As shown, the inter-core communication method of this multi-core processor can be applied to the cores used for sending communication data in the aforementioned vehicle operating system. Here, the core used for sending communication data is described as the second core. Based on this, the method may include the following steps:

[0169] Step 210: Obtain core data, a first checksum, and encrypted data corresponding to the core data. The encrypted data includes an encryption algorithm and a second key. Step 220: Input the second key into the encryption engine corresponding to the encryption algorithm to activate the encryption engine. Step 230: Encrypt the core data and the first checksum using the activated encryption engine and the second key within it to obtain communication data. Step 240: Send the communication data to the first core of the vehicle operating system.

[0170] Therefore, by using the first verification to obfuscate the core data, the integrity of the communication data can be ensured, preventing the communication data transmitted between cores from being tampered with. This avoids the first core processing incorrect or incomplete data, which could reduce the accuracy of the overall vehicle operating system's decisions or actions. It also prevents the propagation of incorrect or incomplete data between multiple cores, ensures the consistency of data between multiple cores, and enables multiple cores of the vehicle operating system to work collaboratively based on accurate and complete data, thereby improving the communication security of inter-core communication in the vehicle operating system.

[0171] The steps described above are explained in detail below.

[0172] In step 210, in some embodiments of this application, core data to be sent to the first core is obtained, such as sensor data to be sent to the first core for multimedia data processing; an encryption algorithm for inter-core communication is selected, such as obtaining the AES-128 encryption algorithm; a 128-bit key is generated using a key generation tool, and the key can be generated and distributed through a secure key management mechanism.

[0173] In step 220, in some embodiments of this application, the encryption engine of each core is initialized on the main core of the vehicle operating system. The encryption engine is initialized, and the encryption algorithm and second key are configured. Using the interface provided by the encryption library or hardware encryption module, the second key is loaded into the encryption engine, and the encryption mode is set, preparing for encryption operations.

[0174] In step 230, in some embodiments of this application, the core data and the first checksum are input into the encryption engine for encryption. The encryption engine encrypts the core data and the first checksum according to the encryption algorithm and the second key to obtain the encrypted ciphertext data, i.e., the communication data.

[0175] In step 240, in some embodiments of this application, the encrypted ciphertext data can be transmitted through the inter-core communication channel between the first core and the first core. A secure communication protocol or hardware communication interface between the first core and the first core is used to transmit the encrypted data to ensure the security of the communication channel and prevent the data from being stolen or tampered with.

[0176] In some embodiments of this application, before step 240, the inter-core communication method of the multi-core processor in this application may further include step 250: determining the transmission mode corresponding to the communication data based on the amount of communication data.

[0177] Based on this, step 240 may specifically include step 2401:

[0178] According to the transmission method, communication data is sent to the first core.

[0179] For example, when the data volume is greater than or equal to a preset threshold, the transmission method is segmented transmission or compressed transmission;

[0180] When the data volume is less than a preset threshold, the Socket method and FTP / file sharing server method are used.

[0181] Therefore, different transmission methods can be selected according to the different amounts of communication data, thereby improving the transmission efficiency of inter-core communication.

[0182] In some embodiments of the application, the step 2401 of sending communication data to the first core according to the transmission method mentioned above may specifically include steps 2401 and 2402.

[0183] Step 2401: When the amount of communication data is greater than or equal to a preset threshold and the transmission method includes segmented transmission, the communication data is segmented according to the segmented transmission method to obtain multiple communication data blocks.

[0184] Step 2402: Send multiple communication data blocks to the first core in sequence according to their order.

[0185] Therefore, by dividing large amounts of communication data into multiple smaller communication data blocks, each communication data block can be transmitted independently. This helps reduce latency and waiting time during transmission, improves the transmission efficiency of inter-core communication, and ensures the security of communication data during inter-core transmission because each communication data block is encrypted.

[0186] In some embodiments of the application, the step 2401 of sending communication data to the first core according to the transmission method mentioned above may specifically include steps 2403 and 2404.

[0187] Step 2401: When the amount of communication data is greater than or equal to a preset threshold and the transmission method includes compressed transmission, the amount of communication data is compressed to a preset amount to obtain compressed communication data.

[0188] Step 2402: Send compressed communication data to the first core.

[0189] Therefore, for communication data with a volume greater than or equal to a preset threshold, segmented transmission or compressed transmission methods can be used to reduce the amount of data transmitted and improve transmission efficiency. Specifically, transmission protocols can be used for segmentation to ensure efficient data transmission within limited bandwidth. Simultaneously, data compression algorithms can be used to reduce the amount of data transmitted, further optimizing transmission performance.

[0190] In some embodiments of the application, after step 240 above, the inter-core communication method of the multi-core processor in this embodiment of the application may further include step 2601 or step 2602.

[0191] Step 2601: Upon receiving the first instruction sent by the first core, resend the communication data to the first core.

[0192] or,

[0193] Step 2602: Upon receiving the second instruction sent by the first core, adjust the data transmission parameters for sending data to the first core;

[0194] According to the data transmission parameters, resend the communication data to the first core.

[0195] Therefore, if the communication data fails verification, it indicates that the inter-core communication data may have been tampered with or corrupted, raising concerns about its integrity and security. In this case, the second core can resend the communication data based on the first instruction sent by the first core. This prevents the first core from processing incomplete or insecure data, which could reduce the accuracy of decisions or actions made by the overall vehicle operating system. Furthermore, the second core can self-verify its data transmission parameters based on the second instruction sent by the first core. If there are problems with the data transmission parameters, it can adjust them to resend the communication data to the first core according to those parameters. This ensures that the first core receives complete and secure communication data while reducing the resource consumption associated with frequent retransmissions due to errors in data transmission or reception parameters.

[0196] It should be noted that the first key and the second key in the embodiments of this application can be the same or different, depending on the encryption algorithm and the decryption algorithm. For example, symmetric encryption algorithms use the same key in both encryption and decryption, that is, the first key and the second key are the same. Asymmetric encryption algorithms use different keys in both encryption and decryption, that is, the first key is the private key and the second key is the public key, with the public key used to encrypt data and the private key used to decrypt data.

[0197] This application also provides an inter-core communication device for a multi-core processor, specifically combined with... Figure 3 Please provide a detailed explanation.

[0198] Figure 3 This is a schematic diagram of the structure of an inter-core communication device for a multi-core processor provided in one embodiment of this application.

[0199] In some embodiments of this application, Figure 3 The inter-core communication device of the multi-core processor shown can be located in the first core provided in the embodiments of this application.

[0200] Based on this, such as Figure 3 As shown, the inter-core communication device 30 of the multi-core processor may specifically include:

[0201] The receiving module 301 is used to receive communication data sent by the second core of the vehicle operating system. The communication data is obtained by the second core encrypting the core data through the first check code in the second core.

[0202] The verification module 302 is used to verify the communication data using the second verification code in the first core and obtain the verification result.

[0203] The processing module 303 is used to decrypt the communication data when the verification result indicates that the communication data has passed the verification, so as to obtain decrypted data.

[0204] In this way, in a multi-core communication scenario, the first core can first verify the received communication data using a second checksum. After the verification passes, the communication data is decrypted to extract the core data sent by the sender, i.e., the second core, to the first core. By verifying the communication data with a checksum, data integrity can be ensured, preventing the first core from processing incorrect or incomplete data due to tampering of the communication data transmitted between cores. This would reduce the accuracy of the overall vehicle operating system's decisions or actions, avoid the propagation of erroneous or incomplete data between multiple cores, ensure data consistency between multiple cores, and enable multiple cores of the vehicle operating system to work collaboratively based on accurate and complete data, thereby improving the communication security of inter-core communication in the vehicle operating system.

[0205] The inter-core communication device 30 of the multi-core processor in the embodiments of this application will be described in detail below.

[0206] In some embodiments of this application, the inter-core communication device 30 of the multi-core processor may further include a deletion module for deleting communication data when the verification result indicates that the communication data has failed the verification.

[0207] The inter-core communication device 30 of the multi-core processor may further include a sending module for sending a first instruction to the second core, the first instruction being used to instruct the second core to resend communication data.

[0208] In some embodiments of this application, the inter-core communication device 30 of the multi-core processor may further include an adjustment module for adjusting the data receiving parameters of the first core according to the error log corresponding to the received communication data when the verification result indicates that the communication data has failed the verification.

[0209] The inter-core communication device 30 of the multi-core processor may further include a sending module for sending a second instruction to the second core. The second instruction is used to instruct the second core to adjust the data transmission parameters and resend the communication data according to the adjusted data transmission parameters.

[0210] The receiving module 301 is used to receive the communication data retransmitted by the second core according to the adjusted data receiving parameters.

[0211] In some embodiments of this application, the inter-core communication device 30 of the multi-core processor may further include an adjustment module for readjusting the communication buffer size based on the amount of communication data and the first core receiving data frequency when the error log includes information for characterizing an abnormal communication buffer size, wherein the amount of data and the receiving data frequency are positively correlated with the communication buffer size.

[0212] If the error log includes information indicating an anomaly in the communication protocol with the second core, the communication protocol with the second core is redefined based on the first application corresponding to the first core and the second application corresponding to the second core. If the first application and the second application are the same, the redefined communication protocol with the second core includes at least one of the following: transmission control protocol and network protocol. If the first application and the second application are different, the redefined communication protocol with the second core includes a cross-application communication protocol.

[0213] In some embodiments of this application, the inter-core communication device 30 of the multi-core processor may further include a determining module, used to determine the division result of the first attribute parameter and the second attribute parameter based on the first attribute parameter of the communication data and the second attribute parameter of the second check code;

[0214] If the division result includes the division remainder and the value of the division remainder is a reference threshold, the result representing the communication data passing the verification is determined as the verification result.

[0215] If the division result includes the remainder and the value of the remainder is not equal to the reference threshold, the result indicating that the communication data failed the verification will be determined as the verification result.

[0216] In some embodiments of this application, the second core includes multiple second cores, and the second verification code includes multiple second verification codes. One second core corresponds to one second verification code, and different second cores correspond to different second verification codes.

[0217] In some embodiments of this application, the inter-core communication device 30 of the multi-core processor may further include an acquisition module, which is used to acquire decryption data corresponding to the core identifier of the second core based on the association information between the core identifier and the preset decryption data. The decryption data includes a decryption algorithm and a first key.

[0218] The inter-core communication device 30 of the multi-core processor may further include an input module for inputting the first key into the decryption engine corresponding to the decryption algorithm and activating the decryption engine;

[0219] The processing module 303 can also be used in the inter-core communication device 30 of the multi-core processor, which can also include an activation module for decrypting communication data through the activated decryption engine and the first key in the decryption engine to obtain candidate decryption data.

[0220] The inter-core communication device 30 of the multi-core processor may also include a verification module for verifying candidate decryption data using a reference verification algorithm to obtain a verification result;

[0221] The inter-core communication device 30 of the multi-core processor may further include a determination module for determining the candidate decryption data as decryption data if the verification result indicates that the candidate decryption data has passed the verification.

[0222] This application also provides an inter-core communication device for a multi-core processor, specifically combined with... Figure 4 Please provide a detailed explanation.

[0223] Figure 4 This is a schematic diagram of the structure of an inter-core communication device for a multi-core processor provided in one embodiment of this application.

[0224] In some embodiments of this application, Figure 4 The inter-core communication device of the multi-core processor shown can be located in the second core provided in the embodiments of this application.

[0225] Based on this, such as Figure 4 As shown, the inter-core communication device 40 of the multi-core processor may specifically include:

[0226] The acquisition module 401 is used to acquire core data, a first check code, and encrypted data corresponding to the core data. The encrypted data includes an encryption algorithm and a second key.

[0227] Input module 402 is used to input the second key into the encryption engine corresponding to the encryption algorithm and activate the encryption engine;

[0228] Processing module 403 is used to encrypt the core data and the first check code using the activated encryption engine and the second key in the encryption engine to obtain communication data;

[0229] The transmitting module 404 is used to send communication data to the first core of the vehicle operating system.

[0230] Therefore, by using the first verification to obfuscate the core data, the integrity of the communication data can be ensured, preventing the communication data transmitted between cores from being tampered with. This avoids the first core processing incorrect or incomplete data, which could reduce the accuracy of the overall vehicle operating system's decisions or actions. It also prevents the propagation of incorrect or incomplete data between multiple cores, ensures the consistency of data between multiple cores, and enables multiple cores of the vehicle operating system to work collaboratively based on accurate and complete data, thereby improving the communication security of inter-core communication in the vehicle operating system.

[0231] In some embodiments of this application, the inter-core communication device 40 of the multi-core processor may further include a determining module for determining the transmission mode corresponding to the communication data based on the amount of communication data.

[0232] The sending module 404 is used to send communication data to the first core according to the transmission method.

[0233] In some embodiments of this application, the inter-core communication device 40 of the multi-core processor may further include a segmentation module, which is used to segment the communication data according to the segmentation transmission method to obtain multiple communication data blocks when the amount of communication data is greater than or equal to a preset threshold and the transmission method includes a segmented transmission method.

[0234] The sending module 404 is used to send multiple communication data blocks to the first core in sequence according to the order of the multiple communication data blocks.

[0235] In some embodiments of this application, the sending module 404 is used to resend communication data to the first core upon receiving a first instruction sent by the first core;

[0236] or,

[0237] The inter-core communication device 40 of the multi-core processor may also include an adjustment module for adjusting the data transmission parameters for sending data to the first core upon receiving a second instruction sent by the first core.

[0238] The sending module 404 is used to resend communication data to the first core according to the data sending parameters.

[0239] This application also provides a computer device. (Specifically combined with...) Figure 5 Please provide a detailed explanation.

[0240] Figure 5 This is a schematic diagram of the structure of a computer device provided in one embodiment of this application.

[0241] like Figure 5As shown, the computer device may include the computer device for executing the inter-core communication method of a multi-core processor as described in the embodiments of this application. The computer device may include a processor 501 and a memory 502 storing computer program instructions.

[0242] Specifically, the processor 501 may include a central processing unit (CPU), an application-specific integrated circuit (ASTC), or one or more integrated circuits that can be configured to implement the embodiments of this application.

[0243] Memory 502 may include a large-capacity memory for data or instructions. For example, and not limitingly, memory 502 may include a hard disk drive (HDD), a floppy disk drive, flash memory, optical disk, magneto-optical disk, magnetic tape, or a Universal Serial Bus (USB) drive, or a combination of two or more of these. Where appropriate, memory 502 may include removable or non-removable (or fixed) media. Where appropriate, memory 502 may be internal or external to the integrated gateway disaster recovery device. In a particular embodiment, memory 502 is non-volatile solid-state memory. In a particular embodiment, memory 502 includes solid-state storage (ROM). Where appropriate, the ROM may be a mask-programmed ROM, a programmable ROM (PROM), an erasable PROM (EPROM), an electrically erasable PROM (EEPROM), an electrically rewritable ROM (EAROM), or flash memory, or a combination of two or more of these.

[0244] The processor 501 reads and executes computer program instructions stored in the memory 502 to implement any of the inter-core communication methods of the multi-core processor in the above embodiments.

[0245] In one example, the computer device may also include a communication interface 503 and a bus 510. Wherein, as... Figure 5 As shown, the processor 501, memory 502, and communication interface 503 are connected through bus 510 and complete communication with each other.

[0246] The communication interface 503 is mainly used to realize communication between various modules, devices, units and / or equipment in the embodiments of this application.

[0247] Bus 510 includes hardware, software, or both, that couples components of a flow control device together. For example, and not limitingly, the bus may include an Accelerated Graphics Port (AGP) or other graphics bus, an Enhanced Industry Standard System (ETSA) bus, a Front Side Bus (FSB), an HyperTransport (HT) interconnect, an Industry Standard System (TSA) bus, an Infinite Bandwidth Interconnect, a Low Pin Count (LPC) bus, a memory bus, a Microchannel System (MCA) bus, a Peripheral Component Interconnect (PCT) bus, a PCT-Express (PCT-X) bus, a Serial Advanced Technology Attachment (SATA) bus, a Video Electronics Standards Association Local (VLB) bus, or other suitable buses, or combinations of two or more of these. Where appropriate, bus 510 may include one or more buses. Although specific buses are described and illustrated in embodiments of this application, this application contemplates any suitable bus or interconnect.

[0248] The data processing device can execute the inter-core communication method of the multi-core processor in the embodiments of this application, thereby achieving a combination Figures 1 to 4 The method and apparatus for inter-core communication of a multi-core processor are described.

[0249] Furthermore, in conjunction with the inter-core communication methods of multi-core processors in the above embodiments, this application embodiment can provide a computer-readable storage medium for implementation. This computer-readable storage medium stores computer program instructions; when executed by a processor, these computer program instructions implement any of the inter-core communication methods of multi-core processors in the above embodiments.

[0250] It should be clarified that this application is not limited to the specific configurations and processes described above and shown in the figures. For the sake of brevity, detailed descriptions of known methods are omitted here. In the above embodiments, several specific steps are described and shown as examples. However, the method process of this application is not limited to the specific steps described and shown. Those skilled in the art can make various changes, modifications, and additions, or change the order of steps, after understanding the spirit of this application.

[0251] The functional blocks shown in the above block diagram can be implemented as hardware, software, firmware, or a combination thereof. When implemented in hardware, they can be, for example, electronic circuits, application-specific integrated circuits (ASTCs), appropriate firmware, plug-ins, function cards, etc. When implemented in software, the elements of this application are programs or code segments used to perform the required tasks. Programs or code segments can be stored on a machine-readable medium or transmitted over a transmission medium or communication link via data signals carried on a carrier wave. "Machine-readable medium" can include any medium capable of storing or transmitting information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROM, flash memory, erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disks, fiber optic media, radio frequency (RF) links, etc. Code segments can be downloaded via computer networks such as the Internet, intranets, etc.

[0252] It should also be noted that the exemplary embodiments mentioned in this application describe methods or systems based on a series of steps or apparatus. However, this application is not limited to the order of the above steps; that is, the steps can be performed in the order mentioned in the embodiments, or in a different order, or several steps can be performed simultaneously.

[0253] The above are merely specific embodiments of this application. Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, modules, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here. It should be understood that the protection scope of this application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this application, and these modifications or substitutions should all be covered within the protection scope of this application.

[0254] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and not to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. These modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application, and they should all be covered within the scope of the claims and specification of this application. In particular, as long as there is no structural conflict, the various technical features mentioned in the embodiments can be combined in any way. This application is not limited to the specific embodiments disclosed herein, but includes all technical solutions falling within the scope of the claims.

Claims

1. A method for inter-core communication in a multi-core processor, characterized in that, The first core used in automotive operating systems includes: The system receives communication data sent by the second core of the vehicle operating system, wherein the communication data is obtained by the second core through encryption of core data using the first checksum in the second core. The communication data is verified using the second verification code in the first core, and a verification result is obtained. If the verification result indicates that the communication data passes the verification, the communication data is decrypted to obtain decrypted data.

2. The method according to claim 1, characterized in that, The method further includes: If the verification result indicates that the communication data has failed the verification, the communication data is deleted, and a first instruction is sent to the second core, which instructs the second core to resend the communication data.

3. The method according to claim 1 or 2, characterized in that, The method further includes: If the verification result indicates that the communication data has failed the verification, an error log corresponding to the received communication data is generated based on the verification result. Based on the error log corresponding to the received communication data, adjust the data receiving parameters of the first core; send a second instruction to the second core, the second instruction being used to instruct the second core to adjust the data sending parameters and resend the communication data according to the adjusted data sending parameters; According to the adjusted data receiving parameters, the communication data retransmitted by the second core is received.

4. The method according to claim 3, characterized in that, The step of adjusting the data receiving parameters of the first core according to the error log corresponding to the received communication data includes: If the error log includes information to characterize an abnormal communication buffer size, the communication buffer size is readjusted based on the amount of communication data and the frequency of the first core receiving data, wherein the amount of data and the frequency of receiving data are positively correlated with the communication buffer size. If the error log includes information indicating an abnormality in the communication protocol with the second core, the communication protocol with the second core is re-determined based on the first application corresponding to the first core and the second application corresponding to the second core.

5. The method according to claim 4, characterized in that, When the first application and the second application are the same, the communication protocol with the second core is redefined to include at least one of the following: transmission control protocol and network protocol; when the first application and the second application are different, the communication protocol with the second core is redefined to include cross-application communication protocol.

6. The method according to any one of claims 1-5, characterized in that, The step of verifying the communication data using the second verification code in the first core to obtain the verification result includes: Based on the first attribute parameter of the communication data and the second attribute parameter of the second check code, determine the division result of the first attribute parameter and the second attribute parameter; If the division result includes a remainder and the value of the remainder is a reference threshold, the result representing that the communication data has passed the verification is determined as the verification result. If the division result includes a remainder and the value of the remainder is not equal to the reference threshold, the result indicating that the communication data failed the verification is determined as the verification result.

7. The method according to any one of claims 1-6, characterized in that, The second core includes multiple second cores, and the second verification code includes multiple second verification codes. Each second core corresponds to one second verification code, and different second cores correspond to different second verification codes.

8. The method according to any one of claims 1-7, characterized in that, Before decrypting the communication data to obtain decrypted data, the method further includes: Based on the association information between the core identifier and the preset decryption data, obtain the decryption data corresponding to the core identifier of the second core. The decryption data includes a decryption algorithm and a first key. The process of decrypting the communication data to obtain decrypted data includes: The communication data is decrypted using the first key to obtain candidate decryption data; The candidate decryption data is verified using a reference verification algorithm to obtain the verification result; If the verification result indicates that the candidate decryption data has passed the verification, the candidate decryption data is determined as the decryption data.

9. A method for inter-core communication in a multi-core processor, characterized in that, The second core used in automotive operating systems includes: Obtain core data, a first checksum, and encrypted data corresponding to the core data, wherein the encrypted data includes an encryption algorithm and a second key; The second key is input into the encryption engine corresponding to the encryption algorithm to activate the encryption engine; The core data and the first checksum are encrypted using the activated encryption engine and the second key in the encryption engine to obtain communication data. The communication data is sent to the first core of the vehicle operating system.

10. The method according to claim 9, characterized in that, Before sending the communication data to the first core of the vehicle operating system, the method further includes: Based on the amount of communication data, determine the transmission method corresponding to the communication data; Sending the communication data to the first core includes: The communication data is sent to the first core according to the transmission method described.

11. The method according to claim 10, characterized in that, The amount of communication data is greater than or equal to a preset threshold, and the transmission method includes segmented transmission. Sending the communication data to the first core according to the transmission method includes: The communication data is segmented according to the segmented transmission method to obtain multiple communication data blocks; The multiple communication data blocks are sent to the first core sequentially according to their order.

12. The method according to any one of claims 9 to 11, characterized in that, The method further includes: Upon receiving the first instruction sent by the first core, the communication data is resent to the first core; or, Upon receiving a second instruction from the first core, adjust the data transmission parameters for sending data to the first core. According to the data transmission parameters, resend the communication data to the first core.

13. An inter-core communication device for a multi-core processor, characterized in that, The first core used in automotive operating systems includes: The receiving module is used to receive communication data sent by the second core of the vehicle operating system, wherein the communication data is obtained by the second core through encryption of core data using the first check code in the second core; The verification module is used to verify the communication data using the second verification code in the first core, and obtain the verification result. The processing module is used to decrypt the communication data to obtain decrypted data when the verification result indicates that the communication data has passed the verification.

14. An inter-core communication device for a multi-core processor, characterized in that, The second core used in automotive operating systems includes: The acquisition module is used to acquire core data, a first checksum, and encrypted data corresponding to the core data, wherein the encrypted data includes an encryption algorithm and a second key. An activation module is used to input the second key into the encryption engine corresponding to the encryption algorithm and activate the encryption engine. The processing module is used to encrypt the core data and the first checksum using the activated encryption engine and the second key in the encryption engine to obtain communication data. The sending module is used to send the communication data to the first core of the vehicle operating system.

15. A computer device, characterized in that, include: The processor and the memory storing computer program instructions, wherein the processor, when executing the computer program instructions, implements the steps of the inter-core communication method of the multi-core processor as described in any one of claims 1-8, or when executing the computer program instructions, implements the steps of the inter-core communication method of the multi-core processor as described in any one of claims 9-12.

16. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the inter-core communication method of a multi-core processor as described in any one of claims 1-8, or, when the computer program instructions are executed, implements the steps of the inter-core communication method of a multi-core processor as described in any one of claims 9-12.

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