A controller power module fast thermal calculation method

Abstract

This invention discloses a rapid thermal calculation method for a controller power module, comprising the following steps: Step S1: structurally disassembling and loss statistics of the three-phase power module, calculating the total loss of the entire power module and the loss of a single-phase power module; Step S2: simplifying the three-dimensional heat transfer path of the power module to construct a one-dimensional layered thermal resistance network model; Step S3: establishing a multi-level thermal balance equation system based on the one-dimensional thermal resistance network model; Step S4: inputting basic parameters, substituting them into the analytical formulas for the thermal resistance of each layer to calculate the thermal resistance of all layers, then substituting the thermal resistance into the thermal balance equation system for numerical solution, outputting the chip temperature and the intermediate temperature of each layer, thus completing the rapid thermal calculation of the power module. This invention's rapid thermal calculation method for a controller power module not only meets the temperature prediction needs of the early design stage but also greatly improves the speed of temperature acquisition, saving a significant amount of development time.

Description

Technical Field

[0001] This invention belongs to the field of thermal simulation technology for vehicle motor controller power modules, specifically relating to a rapid thermal calculation method for controller power modules. Background Technology

[0002] In the engineering design of control systems, the heat dissipation performance of power modules is a key technical factor affecting the overall reliability, service life, and power output capability of the equipment. During normal commutation and conduction, power modules (including but not limited to semiconductor switching devices such as IGBTs and MOSFETs) inevitably generate internal heat sources, primarily Joule heat and switching losses. If this heat cannot be effectively dissipated through a proper thermal management path, it will directly lead to a continuous increase in the module junction temperature, subsequently causing a series of serious physical and electrical failures.

[0003] Currently, chip temperature is primarily verified through experiments or simulations. Both experiments and simulations can accurately reflect the temperature field of a product; however, the experimental and commercial simulation processes are time-consuming, which is not conducive to adapting to the current automotive design and development cycle and leads to a strain on design resources. Summary of the Invention

[0004] The main objective of this invention is to provide a rapid thermal calculation method for controller power modules. This method first establishes a thermal network model, and then quickly solves for the chip temperature by establishing a thermal balance equation. This invention not only meets the temperature prediction needs in the early design stage, but also greatly improves the speed of temperature acquisition, saving a significant amount of development time.

[0005] To achieve the above objectives, the present invention provides a method for rapid thermal calculation of a controller power module, comprising the following steps: Step S1: Disassemble the three-phase power module and perform loss statistics to calculate the total loss of the entire power module and the loss of a single-phase power module; Step S2: Reduce the dimensionality of the three-dimensional heat transfer path of the power module to a one-dimensional layered thermal resistance network model; Step S3: Establish a multi-level thermal balance equation system based on a one-dimensional thermal resistance network model; Step S4: Input basic parameters including power loss, material properties, geometric dimensions, and coolant. Substitute these parameters into the analytical formulas for thermal resistance of each layer to calculate the thermal resistance of all layers. Then, substitute the thermal resistance into the thermal balance equations for numerical solution. Output the chip temperature and the intermediate temperature of each layer to complete the rapid thermal calculation of the power module.

[0006] As a further preferred technical solution to the above technical solution, in step S1, the entire power module includes three phases: U, V, and W. A single-phase power module, along the heat dissipation path from top to bottom, includes a chip, a solder layer, an upper copper layer, a ceramic layer, a lower copper layer, a system solder layer, and a water-cooled heat dissipation substrate. Coolant flows through the water-cooled heat dissipation substrate to achieve forced water cooling. The loss calculation formula is: (1); (2); in, This represents the total power loss of the chip. This represents the total power loss of the diode. This represents the total power loss of the entire power module. This represents the total power loss of a single-phase power module. This is a sequence of the number of chips or diodes.

[0007] As a further preferred technical solution to the above technical solution, in step S2, the influence of natural convection heat dissipation is ignored, water cooling is used as the main heat dissipation path, and the sum of the thermal resistance of the chip and the solder layer is calculated layer by layer. The sum of the thermal resistances of the upper copper layer, ceramic layer, lower copper layer, and system solder layer The overall thermal resistance of the water-cooled heat dissipation substrate ,in: (6); (7); (8); in, , , , , , These refer to the thicknesses of the chip, solder layer, upper copper layer, ceramic layer, lower copper layer, and system solder layer, respectively. , , , , , These are the thermal conductivity values ​​of the chip, solder layer, upper copper layer, ceramic layer, lower copper layer, and system solder layer, respectively. , , , , , These are the projected areas of the chip, solder layer, upper copper layer, ceramic layer, lower copper layer, and system solder layer, respectively. The diffusion thermal resistance of the chip to the upper copper layer; The diffusion thermal resistance from the system solder layer to the water-cooled heat dissipation substrate; The convective heat transfer thermal resistance of the water-cooled heat dissipation substrate. The thermal resistance of the substrate of the water-cooled heat dissipation substrate is the base thermal resistance. For thermal resistance.

[0008] As a further preferred embodiment of the above technical solution, the diffusion thermal resistance of the chip to the upper copper layer is calculated as follows: (9); ; ; ; ; ; in, The equivalent radius of the weld layer, The effective radius of the upper copper layer. The natural convection heat transfer coefficient is... The radius ratio, For dimensionless thickness, For Biwo number, For eigenvalues, The heat flux attenuation factor for chip diffusion to the upper copper layer; The diffusion thermal resistance from the system solder layer to the water-cooled heat dissipation substrate is calculated as follows: (10); ; ; ; ; ; in, The equivalent radius of the system's weld layer. The effective radius of the water-cooled heat dissipation substrate is . For the thermal conductivity of the water-cooled heat dissipation substrate, The thickness of the water-cooled heat dissipation substrate. The heat flow attenuation factor from the system solder layer to the water-cooled heat dissipation substrate. For eigenvalues, For Biwo number, For dimensionless thickness, The radius ratio; The convective heat transfer thermal resistance of the water-cooled heat dissipation substrate is calculated as follows: (11); in, , Efficiency of a single heat dissipation pin; , , The diameter of the heat dissipation pin. For the height of the heat dissipation pin, The corrected height for the heat dissipation pins; , This refers to the Nusselt number of the heat sink pin. Fluid thermal conductivity; , This refers to the number of heat dissipation pins along the length direction. This refers to the number of heat dissipation pins in the width direction. This refers to the total number of heat dissipation pins on the water-cooled heat dissipation substrate. This refers to the heat dissipation area of ​​the heat sink. The heat transfer coefficient of the heat dissipation pin; in, , , , These are the width and length of the water-cooled heat dissipation substrate, respectively. , The number of Nusselts for water-cooled heat dissipation substrates without heat dissipation pins. The convective heat transfer coefficient of the water-cooled heat dissipation substrate without heat dissipation pins; The thermal resistance of the water-cooled heat dissipation substrate is calculated as follows: (12); The thickness of the water-cooled heat dissipation substrate. Thermal conductivity of the water-cooled heat dissipation substrate; Thermal resistance is calculated as follows: (13); For specific heat capacity, The quality of the water-cooled heat dissipation substrate.

[0009] As a further preferred technical solution to the above technical solution, in step S3, the upper temperature of the water-cooled heat dissipation substrate, the upper temperature of the upper copper layer, and the chip temperature are solved sequentially, and the thermal balance equations are: (3); (4); (5); in, This refers to the temperature of the upper layer of the water-cooled heat dissipation substrate. The temperature of the upper copper layer. For chip temperature; This refers to the coolant temperature. The overall thermal resistance of the water-cooled heat dissipation substrate, It is the sum of the thermal resistances of the upper copper layer, ceramic layer, lower copper layer, and system solder layer. It is the sum of the thermal resistances of the chip and the solder layer. This represents the chip's wear and tear.

[0010] The beneficial effects of this invention are as follows: 1. Significantly improved calculation speed: Compared with the mesh generation and multi-field coupled iterative calculation of commercial 3D thermal simulation software, this invention adopts all analytical formula numerical calculations, without 3D model preprocessing, and the calculation time for a single working condition is in the millisecond range, which greatly shortens the development iteration cycle of the vehicle controller.

[0011] 2. Reduced development costs: No need to process physical prototypes for thermal testing, saving the cost of mold making, PCB, power module prototypes, and test tooling materials; no need to configure professional simulation engineers, ordinary structural and hardware engineers can complete the calculation by inputting basic parameters, reducing manpower training and job costs.

[0012] 3. Design in advance, adapting to concept solution iteration: No three-dimensional geometric model is required. It can be calculated based only on chip size, layer thickness, material thermal conductivity, and basic parameters of heat dissipation substrate pin fins. Temperature prediction of multiple heat dissipation solutions can be completed in the concept design stage and before three-dimensional modeling, and high-risk heat dissipation solutions can be eliminated in advance.

[0013] 4. Low barrier to entry for tool implementation: All formulas are explicit analytical expressions, which can be directly packaged into lightweight calculation tools. The interface only requires input of basic parameters, there are no complicated simulation operation procedures, and no professional simulation software training is required to get started.

[0014] 5. Complete layered temperature output: It can simultaneously output the temperature results of multiple layers, including substrate temperature, intermediate copper layer temperature, and chip junction temperature, to fully reproduce the internal temperature gradient of the power module, making it easy to locate the thermal bottleneck of the packaging layer and water-cooled substrate. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of the structure of the single-phase power module of the present invention.

[0016] Figure 2 This is a schematic diagram of the one-dimensional layered thermal resistance network model of the present invention.

[0017] Figure 3 This is a flowchart illustrating the present invention.

[0018] Figure 4 This is a schematic diagram of the existing complete power module.

[0019] The reference numerals in the attached figures include: 1-chip; 2-soldering layer; 3-upper copper layer; 4-ceramic layer; 5-lower copper layer; 6-system soldering layer; 7-heat dissipation substrate. Detailed Implementation

[0020] The following description is intended to disclose the present invention and enable those skilled in the art to implement it. The preferred embodiments described below are merely examples, and other obvious variations will occur to those skilled in the art. The basic principles of the invention defined in the following description can be applied to other embodiments, modifications, improvements, equivalents, and other technical solutions that do not depart from the spirit and scope of the invention.

[0021] In the preferred embodiments of the present invention, those skilled in the art should note that the controller power module and the like involved in the present invention can be considered as prior art.

[0022] Preferred embodiment.

[0023] like Figure 1-4 As shown, this invention discloses a method for rapid thermal calculation of a controller power module, comprising the following steps: Step S1: Disassemble the three-phase power module and perform loss statistics to calculate the total loss of the entire power module and the loss of a single-phase power module; In step S1, such as Figure 4 As shown, the complete power module consists of three phases: U, V, and W. Figure 1 As shown, the single-phase power module, along the heat dissipation path from top to bottom, includes chip 1, solder layer 2, upper copper layer 3, ceramic layer 4, lower copper layer 5, system solder layer 6, and water-cooled heat dissipation substrate 7. Coolant flows through the water-cooled heat dissipation substrate to achieve forced water cooling. The loss calculation formula is: (1); (2); in, This represents the total power loss of the chip. This represents the total power loss of the diode. This represents the total power loss of the entire power module. This represents the total power loss of a single-phase power module. This is a sequence of the number of chips or diodes.

[0024] Step S2: Reduce the dimensionality of the three-dimensional heat transfer path of the power module to a one-dimensional layered thermal resistance network model; In step S2, the influence of natural convection heat dissipation is ignored, and water cooling is used as the main heat dissipation path. The sum of the thermal resistance of the chip and the solder layer is calculated layer by layer. The sum of the thermal resistances of the upper copper layer, ceramic layer, lower copper layer, and system solder layer The overall thermal resistance of the water-cooled heat dissipation substrate ,in: (6); (7); (8); in, , , , , , These refer to the thicknesses of the chip, solder layer, upper copper layer, ceramic layer, lower copper layer, and system solder layer, respectively. , , , , , These are the thermal conductivity values ​​of the chip, solder layer, upper copper layer, ceramic layer, lower copper layer, and system solder layer, respectively. , , , , , These are the projected areas of the chip, solder layer, upper copper layer, ceramic layer, lower copper layer, and system solder layer, respectively. The diffusion thermal resistance of the chip to the upper copper layer; The diffusion thermal resistance from the system solder layer to the water-cooled heat dissipation substrate; The convective heat transfer thermal resistance of the water-cooled heat dissipation substrate. The thermal resistance of the substrate of the water-cooled heat dissipation substrate is the base thermal resistance. For thermal resistance.

[0025] The diffusion thermal resistance of the chip diffuses into the upper copper layer is calculated as follows: (9); ; ; ; ; ; in, The equivalent radius of the weld layer, The effective radius of the upper copper layer. The natural convection heat transfer coefficient is... The radius ratio, For dimensionless thickness, For Biwo number, For eigenvalues, The heat flux attenuation factor for chip diffusion to the upper copper layer; The diffusion thermal resistance from the system solder layer to the water-cooled heat dissipation substrate is calculated as follows: (10); ; ; ; ; ; in, The equivalent radius of the system's weld layer. The effective radius of the water-cooled heat dissipation substrate is . For the thermal conductivity of the water-cooled heat dissipation substrate, The thickness of the water-cooled heat dissipation substrate. The heat flow attenuation factor from the system solder layer to the water-cooled heat dissipation substrate. For eigenvalues, For Biwo number, For dimensionless thickness, The radius ratio; The convective heat transfer thermal resistance of the water-cooled heat dissipation substrate is calculated as follows: (11); in, , Efficiency of a single heat dissipation pin; , , The diameter of the heat dissipation pin. For the height of the heat dissipation pin, The corrected height for the heat dissipation pins; , This refers to the Nusselt number of the heat sink pin. Fluid thermal conductivity; , This refers to the number of heat dissipation pins along the length direction. This refers to the number of heat dissipation pins in the width direction. This refers to the total number of heat dissipation pins on the water-cooled heat dissipation substrate. This refers to the heat dissipation area of ​​the heat sink. The heat transfer coefficient of the heat dissipation pin; in, , , , These are the width and length of the water-cooled heat dissipation substrate, respectively. , The number of Nusselts for water-cooled heat dissipation substrates without heat dissipation pins. The convective heat transfer coefficient of the water-cooled heat dissipation substrate without heat dissipation pins; The thermal resistance of the water-cooled heat dissipation substrate is calculated as follows: (12); The thickness of the water-cooled heat dissipation substrate (as mentioned above) (same meaning) Thermal conductivity of the water-cooled heat dissipation substrate; Thermal resistance is calculated as follows: (13); For specific heat capacity, The quality of the water-cooled heat dissipation substrate.

[0026] Step S3: Establish a multi-level thermal balance equation system based on a one-dimensional thermal resistance network model; In step S3, the upper temperature of the water-cooled heat dissipation substrate, the upper temperature of the upper copper layer, and the chip temperature are solved sequentially. The thermal balance equations are as follows: (3); (4); (5); in, This refers to the temperature of the upper layer of the water-cooled heat dissipation substrate. The temperature of the upper copper layer. For chip temperature; This refers to the coolant temperature. The overall thermal resistance of the water-cooled heat dissipation substrate, It is the sum of the thermal resistances of the upper copper layer, ceramic layer, lower copper layer, and system solder layer. It is the sum of the thermal resistances of the chip and the solder layer. This represents the chip's wear and tear.

[0027] Step S4: Input basic parameters including power loss, material properties, geometric dimensions, and coolant. Substitute these parameters into the analytical formulas for thermal resistance of each layer to calculate the thermal resistance of all layers. Then, substitute the thermal resistance into the thermal balance equations for numerical solution. Output the chip temperature and the intermediate temperature of each layer to complete the rapid thermal calculation of the power module. That is, substitute equations (9)-(13) into equations (6)-(8) to obtain the thermal resistance. Then, substitute these equations into equations (3)-(5) to obtain the temperature of the upper layer of the water-cooled heat dissipation substrate, the temperature of the upper copper layer, and the chip temperature.

[0028] It is worth mentioning that the technical features such as the controller power module involved in this patent application should be regarded as prior art. The specific structure, working principle and possible control methods and spatial arrangement of these technical features can be adopted by conventional choices in the field, and should not be regarded as the inventive point of this patent. This patent will not be further elaborated in detail.

[0029] For those skilled in the art, modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this invention should be included within the protection scope of this invention.

Claims

1. A method for rapid thermal calculation of a controller power module, characterized in that, Includes the following steps: Step S1: Disassemble the three-phase power module and perform loss statistics to calculate the total loss of the entire power module and the loss of a single-phase power module; Step S2: Reduce the dimensionality of the three-dimensional heat transfer path of the power module to a one-dimensional layered thermal resistance network model; Step S3: Establish a multi-level thermal balance equation system based on a one-dimensional thermal resistance network model; Step S4: Input basic parameters including power loss, material properties, geometric dimensions, and coolant. Substitute these parameters into the analytical formulas for thermal resistance of each layer to calculate the thermal resistance of all layers. Then, substitute the thermal resistance into the thermal balance equations for numerical solution. Output the chip temperature and the intermediate temperature of each layer to complete the rapid thermal calculation of the power module.

2. The method for rapid thermal calculation of a controller power module according to claim 1, characterized in that, In step S1, the entire power module consists of three phases: U, V, and W. A single-phase power module, along the heat dissipation path from top to bottom, includes a chip, a solder layer, an upper copper layer, a ceramic layer, a lower copper layer, a system solder layer, and a water-cooled heat dissipation substrate. Coolant flows through the water-cooled heat dissipation substrate to achieve forced water cooling. The loss calculation formula is as follows: （1）； （2）； in, This represents the total power loss of the chip. This represents the total power loss of the diode. This represents the total power loss of the entire power module. This represents the total power loss of a single-phase power module. This is a sequence of the number of chips or diodes.

3. The method for rapid thermal calculation of a controller power module according to claim 2, characterized in that, In step S2, the influence of natural convection heat dissipation is ignored, and water cooling is used as the main heat dissipation path. The sum of the thermal resistance of the chip and the solder layer is calculated layer by layer. The sum of the thermal resistances of the upper copper layer, ceramic layer, lower copper layer, and system solder layer The overall thermal resistance of the water-cooled heat dissipation substrate ,in: （6）； （7）； （8）； in, , , , , , These refer to the thicknesses of the chip, solder layer, upper copper layer, ceramic layer, lower copper layer, and system solder layer, respectively. , , , , , These are the thermal conductivity values ​​of the chip, solder layer, upper copper layer, ceramic layer, lower copper layer, and system solder layer, respectively. , , , , , These are the projected areas of the chip, solder layer, upper copper layer, ceramic layer, lower copper layer, and system solder layer, respectively. The diffusion thermal resistance of the chip to the upper copper layer; The diffusion thermal resistance from the system solder layer to the water-cooled heat dissipation substrate; The convective heat transfer thermal resistance of the water-cooled heat dissipation substrate. The thermal resistance of the substrate of the water-cooled heat dissipation substrate is the base thermal conductivity. For thermal resistance.

4. The method for rapid thermal calculation of a controller power module according to claim 3, characterized in that, The diffusion thermal resistance of the chip diffuses into the upper copper layer is calculated as follows: （9）； ； ； ； ； ； in, The equivalent radius of the weld layer, The effective radius of the upper copper layer is... The natural convection heat transfer coefficient is... The radius ratio, For dimensionless thickness, For Bishop's number, For eigenvalues, The heat flux attenuation factor for chip diffusion to the upper copper layer; The diffusion thermal resistance from the system solder layer to the water-cooled heat dissipation substrate is calculated as follows: （10）； ； ； ； ； ； in, The equivalent radius of the system's weld layer. The effective radius of the water-cooled heat dissipation substrate is... For the thermal conductivity of the water-cooled heat dissipation substrate, The thickness of the water-cooled heat dissipation substrate. The heat flow attenuation factor from the system solder layer to the water-cooled heat dissipation substrate. For eigenvalues, For Bishop's number, For dimensionless thickness, The radius ratio; The convective heat transfer thermal resistance of the water-cooled heat dissipation substrate is calculated as follows: （11）； in, , Efficiency of a single heat dissipation pin; , , The diameter of the heat dissipation pin. For heat dissipation pin height; For the corrected height of the heat dissipation pin, , This refers to the Nusselt number of the heat sink pin. Fluid thermal conductivity; , This refers to the number of heat dissipation pins along the length direction. This refers to the number of heat dissipation pins in the width direction. This refers to the total number of heat dissipation pins on the water-cooled heat dissipation substrate. This refers to the heat dissipation area of ​​the heat sink. The heat transfer coefficient of the heat dissipation pin; in, , , , These are the width and length of the water-cooled heat dissipation substrate, respectively. , The number of Nusselts for water-cooled heat dissipation substrates without heat dissipation pins. The convective heat transfer coefficient of the water-cooled heat dissipation substrate without heat dissipation pins; The thermal resistance of the water-cooled heat dissipation substrate is calculated as follows: (12); The thickness of the water-cooled heat dissipation substrate. Thermal conductivity of the water-cooled heat dissipation substrate; Thermal resistance is calculated as follows: (13); For specific heat capacity, The quality of the water-cooled heat dissipation substrate.

5. The method for rapid thermal calculation of a controller power module according to claim 4, characterized in that, In step S3, the upper temperature of the water-cooled heat dissipation substrate, the upper temperature of the upper copper layer, and the chip temperature are solved sequentially. The thermal balance equations are as follows: （3）； （4）； （5）； in, This refers to the temperature of the upper layer of the water-cooled heat dissipation substrate. The temperature of the upper layer of copper is the temperature of the upper layer. For chip temperature; This refers to the coolant temperature. The overall thermal resistance of the water-cooled heat dissipation substrate, It is the sum of the thermal resistances of the upper copper layer, ceramic layer, lower copper layer, and system solder layer. It is the sum of the thermal resistances of the chip and the solder layer. This represents the chip's wear and tear.

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