A PCell constraint-topology-rule joint coverage verification method, system and storage medium oriented to a conditional mixed parameter space

Abstract

This invention discloses a PCell constraint-topology-rule joint coverage verification method, system, and storage medium oriented towards a conditional hybrid parameter space. It forms legitimate candidates through a constraint graph and the original, specification, and actual effective values; it generates initial seeds hierarchically and establishes a running trajectory and topology-geometric signature library; it generates joint parameters, signatures or missing flags, version prediction, DRC, LVS, connectivity, and cost; it asynchronously selects points based on risk, uncertainty, rule boundaries, coverage, diversity, and cost; it generates data on demand and verifies it using an EDA state machine; the results are written into a versioned evidence ledger; and it stops and provides a fallback through an isolated audit pool, rule / topology coverage, and a one-sided upper bound for missed detections.

Description

Technical Field

[0001] This invention relates to integrated circuit electronic design automation and process design kit verification technology, specifically to a method, system, and storage medium for jointly covering parameter constraints, topology generation, design rules, and verification evidence of a parameterized cell PCell in a mixed parameter space containing continuous, integer, enumerated, Boolean, conditional, and derived parameters. Background Technology

[0002] PCell automatically generates device or layout structures based on parameters and process definitions, and is an important component of PDK that connects the design environment, manufacturing rules, and device models. PCell parameters can be continuous numerical values, integers, enumerations, or Boolean values; some parameters are only enabled under specific conditions, while others are derived from other parameters or callbacks. User input values ​​may also undergo unit conversions, process grid rounding, default value backfilling, and callback modifications before becoming the values ​​actually used by the generation program. Therefore, the Cartesian product of parameters contains a large number of non-executable combinations, and adjacent parameter points on the surface may generate completely different topologies.

[0003] Publicly available solutions such as CN103838894B, CN105095535B, CN109214023B, CN112882946B, and CN114661596B involve PDK or PCell parameter combination generation, batch testing, design rule key points, and DRC / LVS execution or test mode optimization. Randomized, Latin hypercube, active learning, and pre-trained models can also be used to reduce the number of samples. However, simply calculating distances in the parameter numerical space makes it difficult to observe the boundaries of abrupt changes in conditional branches, loop counts, contact holes, ports, or network numbers; a single pass / fail label cannot distinguish between PCell generation errors, DRC rule families of different severity, LVS / CDF / connectivity anomalies, and EDA infrastructure errors.

[0004] On the other hand, if the same batch of data is used for model training, candidate selection, and stopping decisions, premature stopping may occur due to selection bias or overconfidence outside the distribution. Simply reporting the number of validated points, 2D reduced-dimensional plots, or average number of violations cannot account for the remaining risks associated with uncovered rule families, topological event boundaries, and real-world usage contexts. Different PDKs, design rule files, EDA versions, and context fixtures can also alter validation conclusions; without versioning evidence, historical results may be incorrectly reused after environmental changes. In real-world engineering, design rule files may be encrypted or only obtainable through EDA tools, and the rule identifiers and violation coordinates may not be accessible as a prerequisite for validation methods.

[0005] Therefore, a joint coverage mechanism is needed that connects PCell's unique conditional parameter semantics, actual generated topology, rule-level verification results, asynchronous EDA resources, and independent stopping evidence, so that each candidate can be recalculated in terms of why it was selected, how it was executed, from which version the conclusion was reached, and why it stopped. Summary of the Invention

[0006] (a) Technical problems to be solved

[0007] This invention aims to solve the following interrelated problems:

[0008] 1. The condition, derivation, and callback parameters result in a large number of unsatisfactory combinations in the candidate space, and the input values ​​are inconsistent with the actual effective values;

[0009] 2. The numerical parameter space cannot reliably represent topological mutations and regular boundaries in PCell generation;

[0010] 3. There is a lack of a unified but mutually exclusive point selection mechanism to address various verification anomalies, prediction uncertainties, and EDA operating costs;

[0011] 4. Asynchronous EDA tasks, licenses, memory, tool failures, and verification source conflicts lack recoverable state and evidence chains;

[0012] 5. The model self-assessment stops due to a lack of independent audit, rule / topology boundary coverage, and calibrable upper bounds for missed detections.

[0013] (II) Technical Solution

[0014] This invention first forms a condition constraint graph from PCell parameter definitions, CDF, Callback, and available design rule information. Graph nodes and relational edges express whether a parameter is valid, when it is enabled, how it is derived, and which rule it is related to. The entire parameter processing process retains the original input value (raw value), the canonical parameter value (canonical value), and the actual effective parameter value (effective value). Continuous parameters are discretized according to the process grid, and integer, Boolean, and enumerated values ​​are expanded according to the valid domain. Combinations that do not meet the conditions or have inconsistent readbacks are not included in the finite set of valid candidates. Design rule information can come from structured rule metadata, threshold summaries, rule identifiers, and historical violation markers. When the design rule file is unparseable, it is used as a black-box verification source, and reading its internal expressions is not required.

[0015] The system does not pre-generate all legal candidates, but instead selects an initial seed set based on conditional branches and parameter ranges. PCells are generated only for the seed set and subsequently selected candidates. Simultaneously, statistics on program conditional branches, loops, and geometric objects are collected to form the running trajectory and topological-geometric signature. Ungenerated candidates are marked with an explicit signature missing flag, and their signature categories can be obtained based on adjacent generated candidates or prediction models; their true signatures are backfilled after selection and generation. The parameter graph, normalized values, signature or missing flags, PCell / PDK, and design rule file versions are jointly encoded. Multiple output heads of the shared encoder predict generation, DRC rule families, LVS, CDF / connectivity, and cost, respectively. Probabilities and ranges are calibrated using an independent calibration set, and candidates too far from the training distribution are marked as out-of-distribution candidates and subjected to forced exploration.

[0016] Candidate selection jointly considers risk, uncertainty, rule boundaries, topology and rule coverage gaps, intra-batch diversity, and operating costs. When a rule threshold is unreadable, boundary indicators are formed using rule identifiers, historical violation markers, and local pass / fail pairs. The scheduler maintains a pending set of tasks in transit, asynchronously filling gaps based on license, memory, estimated duration, and storage constraints when the execution process is released. The EDA adapter distinguishes between infrastructure retries, resource retries, deterministic PCell errors, and verification source conflicts through a deterministic state machine; all states, versions, results, and decisions are entered into a versioned evidence ledger.

[0017] Stop using a pre-defined, stratified, and isolated independent audit pool, separate from training, calibration, and point selection. For a finite set of legitimate candidates or a pre-defined candidate sampling distribution, calculate the upper bound of the one-sided missed detection probability using the number of valid samples in the audit pool, the number of blocking errors, the stratification weight, and the pre-set confidence level. Stop only when the following conditions are met simultaneously: no exemption from blocking errors, rule family coverage, known topological event boundary coverage, the aforementioned one-sided upper bound, and the recent window new coverage / counterexample rate. Prevent early probability stopping when calibration samples are insufficient, drift exceeds limits, or the proportion of out-of-distribution candidates is too high. Perform legitimate LHS or Sobol sampling on the remaining gaps according to conditional branches to avoid substituting the model's own low uncertainty for actual auditing.

[0018] The present invention also provides a verification system corresponding to the above method and a computer-readable storage medium storing a program implementing the above method.

[0019] The specific plan is as follows:

[0020] A joint coverage verification method for parameterized cell PCell constraints, topology, and rules in a conditional hybrid parameter space includes:

[0021] S1, read the PCell parameter definition, cell description format CDF, parameter callback program Callback and available design rule information from the target process design kit PDK, and construct a condition constraint diagram representing parameter enable conditions, derivation relationships, Callback call relationships and design rule constraints;

[0022] S2, based on the condition constraint diagram, the input parameter values ​​are converted to units, evaluated, aligned with the process grid, and processed with Callback to obtain the standard parameter values ​​and the actual effective parameter values. Unsatisfactory parameter combinations are eliminated to form a finite set of legal candidates and the candidate processing status is recorded.

[0023] S3, select an initial seed set from the legal candidate set according to the parameter condition branches and parameter intervals, generate a PCell from the initial seed set, record the PCell running trajectory, and extract the topological-geometric signatures from the generation results to represent the condition branches, geometric objects and connection relationships, forming a signature library of generated candidates;

[0024] S4. The parameter representations in the condition constraint diagram, the obtained topological-geometric signatures or missing flags indicating that the signatures have not yet been obtained, and the corresponding PCell version, PDK version and design rule file version are jointly encoded to obtain the candidate feature representations.

[0025] S5, perform multi-task prediction based on the candidate feature representation to obtain the PCell generation status, design rule check for DRC rule family anomalies, layout and circuitry, etc. Figure 1 Consistency checks for LVS anomalies, CDF or connectivity anomalies, and verification of predicted operating costs, outputting calibrated risk values ​​and uncertainty ranges;

[0026] S6. Based on the risk value, uncertainty range, distance to the design rule boundary or boundary indication, topological-geometric signature coverage gap, intra-batch diversity and verification operation cost, asynchronously select the next verification point from the set of legitimate candidates.

[0027] S7, the EDA adapter state machine performs PCell generation and verification on demand for the next verification point, extracts or updates the running trajectory and topological-geometric signature of the verification point, classifies the structured verification results, and writes the parameter processing process, version context, task status, verification results and adjudication information into the versioned evidence ledger;

[0028] S8. Update the signature library, coverage status, and prediction status used in steps S5 and S6 based on the newly added topological-geometric signature and structured verification results. Determine whether to stop based on the verification results of the independent audit pool isolated from model training, calibration, and candidate selection, the coverage of the design rule family, the coverage of the topological event boundary, and the upper bound of the remaining missed detection probability. If the stopping condition is not met, repeat steps S4 to S8. After the stopping condition is met, perform legalization fallback verification on the remaining uncovered areas and generate a verification report.

[0029] Further, in step S1, the nodes of the condition constraint graph at least record parameter identifier, data type, unit, legal range, default value, whether the condition is enabled, and whether it is a derived parameter; the edges of the condition constraint graph at least record one of the following: Boolean enable expression, algebraic constraint between parameters, derived function, callback relationship, or design rule related relationship.

[0030] Further, in step S2, for the same parameter, the unprocessed raw input value, the canonical value after unit conversion, expression evaluation and process mesh alignment, and the effective value of the actual effective parameter after callback processing and confirmation by PCell are recorded respectively; caching and candidate deduplication are performed at least based on the actual effective parameter value, and when constraints cannot be satisfied, the set of unsatisfiable constraints or the failed path are saved.

[0031] Further, in step S3, the PCell running trajectory includes at least a conditional branch identifier or a loop count; when generating the topology-geometric signature, process mesh quantization and translation normalization are performed on the geometric coordinates, and layer objects, graphic objects, contact holes, ports, or networks are stably sorted according to layer identifier, object type, normalized bounding box, and connection identifier, and an object count, geometric summary, and connection summary are formed; the topology-geometric signature is bound to the signature mode version, and when a change occurs in the running trajectory or the topology-geometric signature under the same mode version between adjacent parameter combinations of the process mesh, the corresponding parameter interface and its two adjacent points are marked as the topology event boundary.

[0032] Further, in step S4, the condition constraint graph, specification parameter values, and obtained topological-geometric signatures are encoded respectively. The resulting graph structure representation, numerical representation, and signature representation are then integrated with the version identifiers of the PCell source code, CDF / Callback, PDK, and design rule files. For candidates for which PCell has not yet been generated, a signature missing flag is set, and the candidate signature category obtained based on adjacent generated candidates or prediction models is used, without using a default zero value to indicate that the signature is known.

[0033] Furthermore, in step S5, a shared encoder and multiple task output heads are used. The multiple task output heads output the validity or success probability of PCell parameters, the multi-label result and severity of DRC rule family, LVS port / device / parameter differences, CDF readback or connectivity anomalies, runtime, peak memory and license category respectively; the risk of non-exempt blocking level anomalies is not offset by the average value of non-blocking tasks.

[0034] An ensemble prediction is formed by multiple predictors with different initialization, training data subsets or model structures. The classification probability or regression interval is calibrated using a calibration set that does not participate in model training and candidate selection. The calibration parameters are saved separately according to the PCell, PDK, design rule file or EDA tool version. When the number of calibration samples in the parameter condition branch is insufficient, the calibration error exceeds the threshold or the proportion of out-of-distribution candidates exceeds the threshold, it is prohibited to trigger the stop based solely on the model risk value and uncertainty interval. Instead, the corresponding candidate is transferred to the forced exploration or legalized fallback set.

[0035] Out-of-distribution candidates are identified based on the conditional constraint graph representation, topological-geometric signature, and the distance of the version context relative to the training data; these out-of-distribution candidates are included in the forced exploration set and are not excluded from the verification candidates due to low prediction risk or narrow prediction interval.

[0036] Further, in step S6, candidate scores are calculated according to risk components, calibration uncertainty components, rule boundary components, topology and rule coverage gap components, and expected cost components, and the same batch is constructed one by one; the rule boundary components are determined based on the readable structured rule threshold, or when the design rule file is not parsable, based on rule identifiers, historical violation marks, and adjacent pass / fail candidates; for each selected verification point, an exclusion term is applied based on the similarity between the verification point and the unselected candidates in the condition constraint diagram, parameter values, or topology-geometric signature, and high-risk candidates at the blocking level are not completely suppressed by the exclusion term;

[0037] Maintain a set of pending submissions that have not yet been completed, and apply placeholders or conditional predictions to the neighborhood of the pending set when selecting candidates; issue verification points when any EDA execution process releases resources, and the number and combination of verification points are constrained by license tokens, node memory, expected runtime, storage budget, and dual verification source budget.

[0038] Further, in step S7, the EDA adapter state machine includes at least the following states: task created, PCell generated, verification input prepared, task queued, task running, result parsed, and result adjudicated. The adapter maps or skips intermediate states depending on whether the EDA tool directly reads the design database. Task failures are categorized into retryable infrastructure errors, retryable resource errors, deterministic PCell design errors, and verification source conflicts. Only retryable errors are executed again within the retry limit. Each state transition writes the input / output hashes, time, and responsibility process into the versioned evidence ledger.

[0039] For at least a subset of verification points, generate two or more usage context fixtures, wherein the usage context fixtures are selected from isolated instances, similar or dissimilar adjacent, four-way abutment, array, mosaic, mirror, rotation, guard ring, dummy / fill, and pin access; and perform at least one of DRC, LVS, parasitic parameter extraction, or simulation under two or more process-voltage-temperature PVT conditions, and record chip-level EM / IR, antenna, coupling, or voltage domain reliability results.

[0040] For high-risk verification or audit points at the blocking level, use at least two verification sources from two sets of design rule decks, two EDA validators, or a pre-defined golden pattern; or perform differential verification on paired parameter combinations that satisfy the metamorphic relationship of mirroring, rotation, parallel connection, unit equivalence, or do not change the actual effective parameter value; results of verification source conflicts or violations of metamorphic relationships are not used to update the prediction state before manual or preset rule adjudication.

[0041] Further, in step S8, the independent audit pool is reserved in layers according to parameter condition branches, design rule families, and known topological event boundaries for a limited set of legal candidates or a pre-determined candidate sampling distribution before candidate selection, and is not used for model training, calibration, collection weight selection, or candidate ranking; the one-sided confidence upper bound of the remaining missed detection probability is calculated based on the number of effective samples in the audit pool, the number of non-exempt blocking errors found, the stratified sampling weights, and the preset confidence level; the stopping conditions include at least the absence of non-exempt blocking level errors in the audit pool, the presence of verification evidence between the preset rule family and the known topological event boundaries, the one-sided confidence upper bound not being greater than the threshold δ, and the new coverage rate and counterexample detection rate of the most recent window not being greater than the corresponding thresholds;

[0042] The legalization fallback verification is first layered according to enumerated parameters, conditional branches, and topological-geometric signatures. Within each layer, maximin Latin hypercube or Sobol sampling is performed on continuous parameters to project integer parameters onto the process mesh. Then, illegal combinations are repaired or eliminated and duplicates are removed based on the conditional constraint diagram, and the minimum verification quota is reserved for the design rule boundaries that have not yet been covered.

[0043] A PCell constraint-topology-rule joint coverage verification system for conditional hybrid parameter spaces includes a constraint graph construction module, a parameter normalization and candidate solution module, a PCell generation and trajectory acquisition module, a topology-geometric signature module, a joint encoding and multi-task prediction module, a calibration and distributed external gating module, a joint acquisition and asynchronous scheduling module, an EDA adapter state machine, a versioned evidence ledger module, an independent audit and stop module, and a reporting module; each module is configured to collaboratively execute the steps of the above methods.

[0044] The versioned evidence ledger marks failure evidence and triggers selective retesting based on the dependencies of PCell source code, CDF / Callback, PDK, design rule deck, EDA tools, context fixtures, and PVT conditions; verification data and model artifacts are divided into namespaces according to PDK provider, project, or tenant, and only deidentified parameter types or topology statistics are shared across namespaces.

[0045] A computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the above-described method.

[0046] (III) Beneficial Effects

[0047] Compared with methods that only perform parameter scanning or select points solely based on model scores, the present invention has at least the following advantages:

[0048] 1. Conditional constraint graphs and ternary parameter records make candidate validity, parameter transformation, and actual generated input traceable, reducing invalid or equivalent repetitive combinations; initial seeds and on-demand generation mechanisms avoid making the generation of all PCells a prerequisite for point selection.

[0049] 2. The running trajectory and the topological-geometric signature that has been normalized, stably sorted and version-bound extend the sampling boundary from the numerical neighborhood to the locations of abrupt changes in the PCell program and layout structure;

[0050] 3. Rule family multi-task, calibration interval and OOD gating reduce the probability of blocking errors being masked by average and unfamiliar branches being incorrectly judged as low risk;

[0051] 4. Joint data collection and pending-aware scheduling enable recordable resource decisions regarding coverage, risk, and license / memory / duration costs;

[0052] 5. State machines, dual verification sources, and versioned evidence ledgers enable recomputed responses to failures, conflicting results, environmental changes, and selective retesting;

[0053] 6. Independent audit pool, rule / topology coverage, and recalculated one-sided miss detection upper bound together provide stopping evidence independent of the model training process and prevent early stopping when evidence is insufficient. Attached Figure Description

[0054] Figure 1 This is a flowchart illustrating the overall process of the method of the present invention.

[0055] Figure 2 This is a diagram showing the conditional constraints and the ternary parameter processing.

[0056] Figure 3 Extract graphs for running trajectory, topological-geometric signature, and event boundaries.

[0057] Figure 4 For joint encoding, multi-task prediction, calibration, and OOD gating graphs.

[0058] Figure 5 An asynchronous scheduling diagram for joint acquisition and pending perception.

[0059] Figure 6 A diagram of the state machine and versioned evidence ledger for the EDA adapter.

[0060] Figure 7 A fallback plan for halting and legitimizing independent audits.

[0061] Figure 8 This is a relationship diagram of context fixtures, PVT, and dual verification sources. Detailed Implementation

[0062] The following examples are used to illustrate the implementation of the present invention and do not constitute a limitation on model type, EDA vendor, file format, or specific threshold. Unless otherwise stated, all instances of "pass" indicate the absence of unexcused blocking level errors; tool execution anomalies are not directly considered PCell design errors.

[0063] As shown in the figure, this invention provides a joint coverage verification method for parameterized unit PCell constraints, topology, and rules oriented towards a conditional hybrid parameter space, including:

[0064] S1, read the PCell parameter definition, cell description format CDF, parameter callback program Callback and available design rule information from the target process design kit PDK, and construct a condition constraint diagram representing parameter enable conditions, derivation relationships, Callback call relationships and design rule constraints;

[0065] S2, based on the condition constraint diagram, the input parameter values ​​are converted to units, evaluated, aligned with the process grid, and processed with Callback to obtain the standard parameter values ​​and the actual effective parameter values. Unsatisfactory parameter combinations are eliminated to form a finite set of legal candidates and the candidate processing status is recorded.

[0066] S3, select an initial seed set from the legal candidate set according to the parameter condition branches and parameter intervals, generate a PCell from the initial seed set, record the PCell running trajectory, and extract the topological-geometric signatures from the generation results to represent the condition branches, geometric objects and connection relationships, forming a signature library of generated candidates;

[0067] S4. The parameter representations in the condition constraint diagram, the obtained topological-geometric signatures or missing flags indicating that the signatures have not yet been obtained, and the corresponding PCell version, PDK version and design rule file version are jointly encoded to obtain the candidate feature representations.

[0068] S5, perform multi-task prediction based on the candidate feature representation to obtain the PCell generation status, design rule check for DRC rule family anomalies, layout and circuitry, etc. Figure 1 Consistency checks for LVS anomalies, CDF or connectivity anomalies, and verification of predicted operating costs, outputting calibrated risk values ​​and uncertainty ranges;

[0069] S6. Based on the risk value, uncertainty range, distance to the design rule boundary or boundary indication, topological-geometric signature coverage gap, intra-batch diversity and verification operation cost, asynchronously select the next verification point from the set of legitimate candidates.

[0070] S7, the EDA adapter state machine performs PCell generation and verification on demand for the next verification point, extracts or updates the running trajectory and topological-geometric signature of the verification point, classifies the structured verification results, and writes the parameter processing process, version context, task status, verification results and adjudication information into the versioned evidence ledger;

[0071] S8. Update the signature library, coverage status, and prediction status used in steps S5 and S6 based on the newly added topological-geometric signature and structured verification results. Determine whether to stop based on the verification results of the independent audit pool isolated from model training, calibration, and candidate selection, the coverage of the design rule family, the coverage of the topological event boundary, and the upper bound of the remaining missed detection probability. If the stopping condition is not met, repeat steps S4 to S8. After the stopping condition is met, perform legalization fallback verification on the remaining uncovered areas and generate a verification report.

[0072] Example 1: Constraint Graph and Valid Candidate Solutions

[0073] Taking a PCell containing continuous parameters W and L, integer parameters fingerers, enumerated parameters contact_type, boolean parameters guard_enable, and guard_width enabled only when guard_enable is true as an example, the parser obtains the type, range, unit, default value, and display conditions from the CDF, the write-back relationship of W when fingerers change from the Callback, and the minimum grid, the available range of contact holes, and the constraints between parameters from the rule metadata.

[0074] Design rule information is categorized into three levels based on availability. Level 1 consists of readable, structured rule metadata or threshold summaries, directly establishing the relationship between rule thresholds and affected parameters and geometric measurements. Level 2 only provides rule IDs, severity, violation coordinates, and historical markers, with boundaries represented by rule families and local pass / fail pairs. Level 3 is a completely unparseable black-box design rule file, submitted only through the EDA adapter for layout submission and structured result retrieval. Levels 2 and 3 do not infer or derive the internal confidential expressions of the design rule file.

[0075] The system constructs a directed attribute graph. Parameter nodes store type, unit, and valid fields; conditional edges store `guard_enable=true → enable(guard_width)`; derived edges store the relationship between total width and single-point width; callback edges store the call entry point, input / output fields, and code hash. Complex Boolean and arithmetic constraints can be converted to SMT constraints; callbacks that cannot be converted are executed in a sandbox and represented by input / output samples and hashes.

[0076] After the sampler generates raw values, the normalizer performs unit conversion and process mesh alignment to obtain canonical values. Then, a callback is executed, and a minimum readback process is instantiated to obtain effective values. If two raw values ​​have the same effective value and the same conditional branch, they are deduplicated at the candidate layer, but their original sources are retained. If there are constraint conflicts, the conflicting fields, failed expressions, or unsatisfiable kernels are saved, and EDA is not submitted. Callbacks that time out, access unauthorized global state, or produce inconsistent outputs from the same input are marked as CALLBACK_UNRESOLVED and enter the adaptation or manual queue.

[0077] Example 2: Running trajectory, topological-geometric signature, and joint coding

[0078] The system first forms an initial seed set hierarchically based on enumerated parameters, conditional branches, and continuous parameter intervals, without generating all valid candidates before point selection. For the initial seed and subsequently selected candidates, the system prioritizes calling the read-only trace provided by the EDA or PCell runtime environment; if no trace is provided, a lightweight wrapper records the conditional branch ID, loop count bucket, and key constructor call count. Candidates not yet generated are set to SIGNATURE_MISSING, and may include the candidate signature category given by adjacent generated candidates or the prediction model; after a candidate is generated, the predicted value must be overwritten with the real signature, and the predicted signature itself is not used as evidence of approval.

[0079] After generation, the number, area range, bounding box, and connected components of polygons, paths, vias, pins, and nets at each layer are statistically analyzed. Coordinates are first quantized to the process mesh and normalized by translation relative to the PCell origin; layer names are normalized using the current PDK's layer mapping table; objects are stably sorted according to layer, type, normalized bounding box, area, and connection identifier; networks are numbered according to port sets and adjacency relationships. This forms the runtime trajectory signature and topology-geometric signature. The signature records the signature_schema_version, PDK mapping version, and generation tool version; signatures from different mode versions cannot be directly compared.

[0080] Signatures are compared between adjacent points on the process grid. If the number of contact loops, the number of vias, and the network connection summary change when the number of fingers changes from 4 to 5, then the interface is considered a topological event boundary; the system writes the valid grid points on both sides of the interface and the next one above and below it into the boundary set. The signature is only used for identification and encoding and does not replace the DRC / LVS results.

[0081] The joint encoder processes: node / edge representations of the constraint graph; normalized canonical values ​​relative to the valid intervals; obtained running trajectories and topological-geometric signatures, or corresponding missing flags and candidate signature categories; and versions of the PCell source code, CDF / Callback, PDK, and design rule files. Missing traces are handled using an explicit TRACE_MISSING flag, rather than an all-zero vector that creates the ambiguity of "normal without branches." Graph encoding, sequence encoding, or combinations thereof can be used; the key is to preserve the correspondence between the above representations.

[0082] Example 3: Multi-task severity, calibration integration and OOD gating

[0083] Training logs are tagged by generation status, DRC rule ID family, LVS port / device / parameter differences, CDF readback, connectivity, runtime, peak memory, and license type. The shared encoder connects multiple output heads: a generation success binary classification head, a rule family multi-label and severity head, an LVS / CDF / connectivity structure head, and a cost regression head. Generation failures, short circuits, and port or device inconsistencies set lower limits for blocking risks, preventing them from being diluted by a large number of passable tasks; waiver rules retain statistics but are not included in the number of non-waivered blocking rules.

[0084] The ensemble consists of models with 3 to 5 different initializations or data subsets. The calibration set is hierarchically structured by conditional branches and rule families and does not participate in model training or candidate weight adjustment. Classification outputs use temperature calibration, isometric calibration, or order-preserving calibration, while continuous outputs can use conformal intervals. Calibration drift is checked each time there is a major version change in the PCell source code, PDK, deck, or EDA; if it exceeds a threshold, the calibration parameters are rebuilt.

[0085] Each conditional layer requiring independent judgment has a minimum calibration sample requirement. If the number of samples is lower than the requirement, the expected calibration error exceeds the threshold, the prediction interval has insufficient empirical coverage on the validation set, or recalibration has not been completed after a version change, the state of this layer is recorded as CALIBRATION_INVALID. In this state, the model score can still be used for candidate coarse ranking, but it cannot meet the stopping gate alone, and the corresponding candidate enters forced exploration or hierarchical fallback.

[0086] OOD determination considers conditional graph embedding distance, unknown trajectory signature, version context, and numerical out-of-bounds degree. Candidates marked as OOD are included in the mandatory exploration quota even if the ensemble variance is low. When model ensemble increases inference cost, common encodings can be cached and all members can be run only on the pre-selected set.

[0087] Example 4: Joint Acquisition and Pending Awareness Asynchronous Scheduling

[0088] Define candidate x as follows:

[0089] score(x)=w_r·risk(x)+w_u·unc(x)+w_b·boundary(x)+w_g·gap(x)-w_c·cost(x)-w_d·sim(x,S∪P),

[0090] The boundary is composed of the rule threshold distance and the topological event boundary. When the design rule file is unparseable, local boundary indicators are formed using the geometric measurements of the markers corresponding to the same rule ID, historical violation points, and their adjacent process mesh points. The gap represents uncovered rule families, conditional branches, signatures, or fixture gaps; S represents the currently selected points in the batch; and P represents the set of tasks in progress. Weights, normalization ranges, and model versions are written to the evidence ledger. Candidates with blocking-level risks exceeding the threshold have a safety net queue, preventing them from being completely suppressed due to diversity exclusion.

[0091] The scheduler selects tasks point by point rather than taking a static Top-K list all at once. Similarity exclusion is updated immediately after selection; pending points reduce neighborhood duplication through placeholders or conditional predictions. When a worker is released, license tokens, peak memory predictions, estimated duration, storage, and dual oracle budgets are checked before reissued an executable point. Cost prediction deviations are updated based on task completion records; tasks with consecutive timeouts are placed in the resource analysis queue and are not retried indefinitely.

[0092] To ensure asynchronous reproducibility, each selection event saves the model and weight version, pending snapshot, candidate score decomposition, random seed, and resource snapshot. When the order of results changes, the decision at that time can be replayed according to the event log.

[0093] Example 5: EDA State Machine, Verification Source Decision, and Evidence Ledger

[0094] Tasks are created from CREATED, GENERATED upon successful PCell generation, INPUT_READY upon input verification, QUEUED upon entering the queue, RUNNING upon execution, PARSED upon report parsing, and ADJUDICATED after rule mapping, waiver, and conflict resolution. Tools that need to export GDS / OASIS should map INPUT_READY to STREAMED; tools that directly read the design database can enter QUEUED from GENERATED, but must record the database snapshot hash. Each transition uses idempotent writes, recording the task ID, input / output hashes, tool process, time, and log address.

[0095] License unavailability, node failure, and temporary storage full are categorized as retryable infrastructure or resource errors; PCell anomalies that occur repeatedly with the same input are categorized as deterministic design errors; inconsistencies between two validation sources are classified as ORACLE_CONFLICT. Only the first two categories are retried within the upper limit. Conflicting samples are not included in model training until manual or pre-defined arbitration is completed.

[0096] High-risk points at the blocking level can be verified using dual design rule files, dual EDA verifiers, or the golden pattern. Version regression can perform geometric XOR, port / netlist, and electrical parameter differential; metamorphic relationships such as mirroring, rotation, parallel connection coefficients, and unit equivalence must have their applicable conditions and expected differences registered in advance.

[0097] The evidence primary key in the ledger consists of at least the PCell identifier, effective parameter hash, fixture, PVT, PCell / CDF / Callback / PDK / design rule file / EDA tool version, and signature mode version. Each version object establishes a dependency edge with the outputs, verification results, calibration parameters, and stopping conclusions obtained using that object. When any dependency hash changes, the system marks the affected evidence as STALE along the dependency edge, excludes it from the trainable records and stopping evidence, and forms a selective retest queue; unaffected evidence remains valid.

[0098] Example 6: Independent Audit Termination and Hybrid Domain Coverage

[0099] Before any model training and candidate ranking, an audit pool is locked in layers based on enumerated values, conditional branches, known rule families, and expected topological boundaries. The audit pool is marked AUDIT_ONLY and must not be used for training, calibration, weight acquisition, or early stop hyperparameter tuning. If a new branch or signature is subsequently discovered, the corresponding audit layer is supplemented with a reserved seed that has never been touched during training, and the reason for the expansion is recorded.

[0100] The following minimum requirements must be met before stopping the audit: there are no unexempt blocking errors in the audit pool; all preset rule families have boundary evidence or recorded reasons for inapplicability; there are verification points on both sides of the boundary of the discovered topological events; the upper bound of the remaining missed detection probability calculated based on independent audit results does not exceed δ on one side; and the coverage of newly added rules / signatures and the counterexample rate in the most recent M windows are both below the threshold. If any one of these conditions is not met, verification must continue, and it cannot be substituted by reducing the reporting scope.

[0101] In a specific implementation, the audit objective is the probability of a non-exempt blocking error occurring when drawing candidates from a finite set of valid candidates with pre-fixed weights. Suppose the audit pool has n valid and independently drawn samples, and e blocking errors are found. With a confidence level of 1-α, p_upper can be calculated using the Clopper-Pearson one-sided binomial confidence upper bound or an equivalent conservative interval. When e=0, one way to write the upper bound is p_upper=1-α^(1 / n). During stratified sampling, the upper bounds for each stratum are calculated first, and then a conservative weighted upper bound is calculated based on the pre-fixed stratum weights. If the independence, valid sample size, or stratum weight conditions are not met, no upper bound that can be used for stopping is output. This upper bound only corresponds to the declared candidate domain, sampling distribution, confidence level, and error definition; it does not represent proof of zero missed detections for an infinite continuous space or rules not included in the sampling.

[0102] After verification is stopped, gaps are layered by enumeration parameters, conditional branches, and signature layers. Continuous parameters use maximinLHS or Sobol, with integers projected to the process mesh, and Boolean / enumeration values ​​fixed layer by layer; each sample is re-processed through the condition constraint graph, effective readback, and deduplication. A minimum quota is reserved for uncovered rule boundaries. The report lists model selection, audit, and fallback samples separately; quantity coverage is not presented as a proof of security.

[0103] Example 7: Context Fixtures, PVT, and Chip-Level Reliability

[0104] After an isolated PCell passes through, the system selects fixtures based on risk and coverage gaps, including adjacent fixtures of the same or different types, four-way abutments, arrays or mosaics, MX / MY / R90, guard rings, dummy / fills, and pin access fixtures. Fixture objects have separate levels or identifiers, allowing the resolver to distinguish between PCell internal markers and fixture-introduced markers; the boundary rules record the coordinate relationships of "internal," "interface," and "fixture external" separately.

[0105] For electrically sensitive PCells, perform PEX or simulation at the selected process-voltage-temperature PVT angle to compare CDF / effective parameter scaling, ports, parallel connection coefficients, and electrical quantities. Electromagnetic related checks are limited to chip-level EM / IR, current density, antenna, coupling, and voltage domain reliability, not board-level EMC. To avoid fixture × PVT combination explosions, the combined data acquisition unit includes uncovered fixtures / PVTs in the gap and their operating costs in the cost, and the report explicitly lists unexecuted combinations.

[0106] Example 8: Deployment, Benchmarking, and Knowledge Isolation

[0107] The system can be deployed on control nodes, EDA computing clusters, and evidence storage. Control nodes run constraint solving, joint encoding, prediction, acquisition, and scheduling; computing nodes run PCell generation, DRC / LVS, PEX, or simulation; evidence storage uses content-addressed objects and immutable event logs. The EDA adapter undergoes contract testing on a tool version basis, checking state mapping, report parsing, rule IDs, units, and coordinate transformations.

[0108] Before deployment, multiple PCell and legally authorized PDK environments were used for comparison with random, default / minimum / maximum, rule-based key point, ordinary LHS, classic active learning, and ablation schemes without topology / audit enhancements. Metrics included effective candidate rate, real defects found per 100 EDA calls, rule / trace / signature coverage, intra-batch duplication rate, upper bound of missed detections, license hours, peak memory usage, and end-to-end duration. Specific values ​​are subject to actual experimental results.

[0109] In multi-project environments, namespaces are divided by PDK provider, project, or tenant. Cross-domain sharing only involves deidentified parameter types, common graph structure patterns, or topology statistics; rule IDs, PCell code, logs, adaptation parameters, and model artifacts are not exported across domains. Sharing or publishing is stopped if access control, auditing, and member inference / inversion tests fail. Isolation reduces migration benefits but minimizes the leakage of Foundry rules and customer PCell confidentiality.

[0110] Example 9: MOS PCell End-to-End Example

[0111] This embodiment uses example data that does not correspond to specific foundry confidentiality rules to illustrate the complete data flow, and the thresholds or predicted values ​​described below are not taken as actual performance conclusions. The MOS PCell to be verified includes total width W_total, channel length L, finger index, contact type contact_type, guard ring switch guard_enable, and guard ring width guard_width. The example process mesh is 0.005 μm, and guard_width is only enabled when guard_enable=true.

[0112] The callback calculates the single-fork width W_finger by W_total / fingers and aligns it with the process mesh; when the single-fork width exceeds the example contact structure threshold, it switches from a single-row contact hole branch to a double-row contact hole branch. The condition constraint diagram must include at least: fingers≥1, valid W_finger intervals, guard ring condition enabled, and contact type compatibility relationships.

[0113] The three-value processing for a candidate is as follows:

[0114]

[0115] If another raw input ultimately yields the same effective field, conditional branch, and version key, then deduplication is performed at the candidate layer, but two raw source records are retained. The system is layered by fingers, contact_type, and guard_enable, forming an initial seed from the minimum, maximum, default values, and space-filling points of each layer. Assuming that in the seed, fingers=3 generates a single row of contact holes with a trajectory of CONTACT_ROW_SINGLE and 6 vias; and fingers=4 generates a double row of contact holes with a trajectory of CONTACT_ROW_DOUBLE and 12 vias, then the area between them is registered as a topology event boundary, and fingers=3, 4, and their adjacent valid points enter the boundary verification queue.

[0116] For the ungenerated fingerers=5 candidate, the feature record SIGNATURE_MISSING=1 and includes the candidate signature category; the model outputs the generation failure risk, the risk of each DRC rule family, the LVS / CDF / connectivity risk, the calibration interval, and the estimated running cost. The joint collector finds that this point is close to the boundary of a known topological event, the corresponding contact hole enclosing rule family is not yet covered, and it does not overlap with the in-transit task, so it is selected as the next validation point. Subsequently, S7 actually generates the PCell, covers the candidate signature with the real trajectory and signature, and performs DRC / LVS. If EDA returns a contact hole enclosing rule marker, the ledger saves the rule ID, severity, coordinates, fixture, version hash, and task status; this result updates the rule family risk, topological boundary evidence, and subsequent candidate ranking.

[0117] Before issuing access control, an independent sample is executed from the pre-locked audit layer. For illustrative purposes only, if the effective audit sample n=100, no blocking errors are found e=0, and α=0.05, then the one-sided upper bound example is 1-0.05^(1 / 100), approximately 0.0295. The system must still simultaneously check the rule family, topology event boundaries, calibration validity, and new counterexample rate; it cannot stop based on this single value. The thresholds, sample sizes, and effects in formal disclosures and applications should be determined based on actual experiments and target release standards.

[0118] Industrial application

[0119] This invention can be used for PCell development verification, PDK version release regression, design rule deck upgrade verification, and multi-tool consistency checks in foundries, PDK development teams, chip design companies, and EDA tool vendors. The method can connect to PCell generation, DRC, LVS, PEX, and simulation tools that support scripting or batch processing via adapters, and can be deployed in local clusters or isolated computing environments. Its inputs, tasks, and results are all bound to version evidence, making it suitable for forming auditable PDK release gates.

[0120] The above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention.

Claims

1. A joint coverage verification method for parameterized cell PCell constraints, topology, and rules oriented towards a conditional hybrid parameter space, characterized in that, include: S1, read the PCell parameter definition, cell description format CDF, parameter callback program Callback and available design rule information from the target process design kit PDK, and construct a condition constraint diagram representing parameter enable conditions, derivation relationships, Callback call relationships and design rule constraints; S2, based on the condition constraint diagram, the input parameter values ​​are converted to units, evaluated, aligned with the process grid, and processed with Callback to obtain the standard parameter values ​​and the actual effective parameter values. Unsatisfactory parameter combinations are eliminated to form a finite set of legal candidates and the candidate processing status is recorded. S3, select an initial seed set from the legal candidate set according to the parameter condition branches and parameter intervals, generate a PCell from the initial seed set, record the PCell running trajectory, and extract the topological-geometric signatures from the generation results to represent the condition branches, geometric objects and connection relationships, forming a signature library of generated candidates; S4. The parameter representations in the condition constraint diagram, the obtained topological-geometric signatures or missing flags indicating that the signatures have not yet been obtained, and the corresponding PCell version, PDK version and design rule file version are jointly encoded to obtain the candidate feature representations. S5. Based on the candidate feature representation, perform multi-task prediction to obtain the prediction results of PCell generation status, design rule check DRC rule family anomaly, layout and circuit diagram consistency check LVS anomaly, CDF or connectivity anomaly, and verification running cost, and output the calibrated risk value and uncertainty range. S6. Based on the risk value, uncertainty range, distance to the design rule boundary or boundary indication, topological-geometric signature coverage gap, intra-batch diversity and verification operation cost, asynchronously select the next verification point from the set of legitimate candidates. S7, the EDA adapter state machine performs PCell generation and verification on demand for the next verification point, extracts or updates the running trajectory and topological-geometric signature of the verification point, classifies the structured verification results, and writes the parameter processing process, version context, task status, verification results and adjudication information into the versioned evidence ledger; S8. Update the signature library, coverage status, and prediction status used in steps S5 and S6 based on the newly added topological-geometric signature and structured verification results. Determine whether to stop based on the verification results of the independent audit pool isolated from model training, calibration, and candidate selection, the coverage of the design rule family, the coverage of the topological event boundary, and the upper bound of the remaining missed detection probability. If the stopping condition is not met, repeat steps S4 to S8. After the stopping condition is met, perform legalization fallback verification on the remaining uncovered areas and generate a verification report.

2. The method according to claim 1, characterized in that, In step S1, the nodes of the condition constraint graph shall at least record the parameter identifier, data type, unit, legal range, default value, whether the condition is enabled, and whether it is a derived parameter; the edges of the condition constraint graph shall at least record one of the following: Boolean enable expression, algebraic constraint between parameters, derived function, callback relationship, or design rule related relationship. In step S2, for the same parameter, the unprocessed raw input value, the canonical value after unit conversion, expression evaluation and process mesh alignment, and the effective value after callback processing and confirmation by PCell are recorded respectively; caching and candidate deduplication are performed at least based on the actual effective parameter value, and when constraints cannot be satisfied, the set of unsatisfiable constraints or the failed path is saved.

3. The method according to claim 1, characterized in that, In step S3, the PCell running trajectory includes at least a conditional branch identifier or a loop count; when generating the topology-geometric signature, process mesh quantization and translation normalization are performed on the geometric coordinates, and layer objects, graphic objects, contact holes, ports or networks are stably sorted according to layer identifier, object type, normalized bounding box and connection identifier, and the object quantity, geometric summary and connection summary are formed; the topology-geometric signature is bound to the signature mode version, and when the running trajectory or the topology-geometric signature under the same mode version changes between adjacent parameter combinations of the process mesh, the corresponding parameter interface and its two adjacent points are marked as the topology event boundary.

4. The method according to claim 1, characterized in that, In step S4, the condition constraint graph, specification parameter values, and obtained topological-geometric signatures are encoded respectively. The resulting graph structure representation, numerical representation, and signature representation are merged with the version identifiers of the PCell source code, CDF / Callback, PDK, and design rule files. For candidates for which PCell has not yet been generated, a signature missing flag is set and the candidate signature category obtained based on adjacent generated candidates or prediction models is used, and the signature is not represented by a default zero value.

5. The method according to claim 1, characterized in that, In step S5, a shared encoder and multiple task output heads are used. The multiple task output heads output the validity of PCell parameters or the probability of successful generation, the multi-label result and severity of DRC rule family, the difference between LVS port / device / parameter, CDF readback or connectivity anomaly, runtime, peak memory and license category respectively; the risk of non-exempt blocking level anomalies is not offset by the average value of non-blocking tasks. An ensemble prediction is formed by multiple predictors with different initialization, training data subsets or model structures. The classification probability or regression interval is calibrated using a calibration set that does not participate in model training and candidate selection. The calibration parameters are saved separately according to the PCell, PDK, design rule file or EDA tool version. When the number of calibration samples in the parameter condition branch is insufficient, the calibration error exceeds the threshold or the proportion of out-of-distribution candidates exceeds the threshold, it is prohibited to trigger the stop based solely on the model risk value and uncertainty interval. Instead, the corresponding candidate is transferred to the forced exploration or legalized fallback set. Out-of-distribution candidates are identified based on the conditional constraint graph representation, topological-geometric signature, and the distance of the version context relative to the training data; these out-of-distribution candidates are included in the forced exploration set and are not excluded from the verification candidates due to low prediction risk or narrow prediction interval.

6. The method according to claim 1, characterized in that, In step S6, candidate scores are calculated according to risk components, calibration uncertainty components, rule boundary components, topology and rule coverage gap components, and expected cost components, and the same batch is constructed one by one; the rule boundary components are determined based on the readable structured rule threshold, or when the design rule file is not parsable, based on rule identifiers, historical violation marks, and adjacent pass / fail candidates; for each selected verification point, an exclusion term is applied based on the similarity between the verification point and the unselected candidates in the condition constraint diagram, parameter values, or topology-geometric signature, and high-risk candidates at the blocking level are not completely suppressed by the exclusion term; Maintain a set of pending submissions that have not yet been completed, and apply placeholders or conditional predictions to the neighborhood of the pending set when selecting candidates; issue verification points when any EDA execution process releases resources, and the number and combination of verification points are constrained by license tokens, node memory, expected runtime, storage budget, and dual verification source budget.

7. The method according to claim 1, characterized in that, In step S7, the EDA adapter state machine includes at least the states of task creation, PCell generation, verification input preparation, task queuing, task running, result parsing, and result adjudication. The adapter maps or skips intermediate states depending on whether the EDA tool directly reads the design database. Task failures are categorized into retryable infrastructure errors, retryable resource errors, deterministic PCell design errors, and verification source conflicts. Only retryable errors are allowed to be executed again within the retry limit. Each state transition writes the input / output hash, time, and responsible process into the versioned evidence ledger; For at least a subset of verification points, generate two or more usage context fixtures, wherein the usage context fixtures are selected from isolated instances, similar or dissimilar adjacent, four-way abutment, array, mosaic, mirror, rotation, guard ring, dummy / fill, and pin access; and perform at least one of DRC, LVS, parasitic parameter extraction, or simulation under two or more process-voltage-temperature PVT conditions, and record chip-level EM / IR, antenna, coupling, or voltage domain reliability results. For high-risk verification or audit points at the blocking level, use at least two verification sources from two sets of design rule decks, two EDA validators, or a pre-defined golden pattern; or perform differential verification on paired parameter combinations that satisfy the metamorphic relationship of mirroring, rotation, parallel connection, unit equivalence, or do not change the actual effective parameter value; results of verification source conflicts or violations of metamorphic relationships are not used to update the prediction state before manual or preset rule adjudication.

8. The method according to claim 1, characterized in that, In step S8, the independent audit pool is reserved in layers according to parameter condition branches, design rule families, and known topological event boundaries before candidate selection, based on a limited set of legal candidates or a pre-determined candidate sampling distribution. This reserved pool is not used for model training, calibration, weight selection, or candidate ranking. A one-sided confidence upper bound for the remaining missed detection probability is calculated based on the number of valid samples in the audit pool, the number of non-exempt blocking errors discovered, the stratified sampling weights, and the preset confidence level. The stopping conditions include at least the absence of non-exempt blocking level errors in the audit pool, the existence of verification evidence between the preset rule family and the known topological event boundaries, the one-sided confidence upper bound not exceeding a threshold δ, and the new coverage rate and counterexample discovery rate of the most recent window not exceeding the corresponding thresholds. The legalization fallback verification is first layered according to enumerated parameters, conditional branches, and topological-geometric signatures. Within each layer, maximin Latin hypercube or Sobol sampling is performed on continuous parameters to project integer parameters onto the process mesh. Then, illegal combinations are repaired or eliminated and duplicates are removed based on the conditional constraint diagram, and the minimum verification quota is reserved for the design rule boundaries that have not yet been covered.

9. A PCell constraint-topology-rule joint coverage verification system oriented towards a conditional hybrid parameter space, characterized in that, It includes a constraint graph construction module, a parameter normalization and candidate solution module, a PCell generation and trajectory acquisition module, a topology-geometric signature module, a joint encoding and multi-task prediction module, a calibration and distributed external gating module, a joint acquisition and asynchronous scheduling module, an EDA adapter state machine, a versioned evidence ledger module, an independent audit and stop module, and a reporting module; each module is configured to collaboratively execute steps S1 to S8 of claim 1; The versioned evidence ledger marks failure evidence and triggers selective retesting based on the dependencies of PCell source code, CDF / Callback, PDK, design rule deck, EDA tools, context fixtures, and PVT conditions; verification data and model artifacts are divided into namespaces according to PDK provider, project, or tenant, and only deidentified parameter types or topology statistics are shared across namespaces.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the method of any one of claims 1 to 8.

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