Read voltage method, circuit and chip based on programming voltage threshold asymmetry characteristics

Abstract

This application relates to a read voltage method, circuit, and chip based on the asymmetric characteristics of programming voltage thresholds, applicable to the fields of semiconductor memory and in-memory computing technology. The method includes: an array logic control module turns on the bit lines and source lines of a selected programmable device according to control instructions; assuming the current flows from the positive end of the bit line to the source line in the positive direction, if the positive programming voltage threshold of the programmable device is less than the negative programming voltage threshold, the bit line data logic operation module decodes the input bit line voltage data and controls the corresponding row and column voltage switches to turn on based on the decoding result, applying a first voltage to the source line and the negative end of the bit line, and a second voltage to the positive end of the bit line, making the current flowing through the programmable device negative. If the negative programming voltage threshold is less than the positive programming voltage threshold, a third voltage is applied to the positive end of the bit line, and a fourth voltage is applied to the source line and the negative end of the bit line, making the current flowing through the programmable device positive. This can improve programming accuracy.

Description

Technical Field

[0001] This application relates to the fields of semiconductor memory and in-memory computing technology, and in particular to a read voltage method, circuit and chip based on the asymmetric characteristics of programming voltage threshold. Background Technology

[0002] The range of the programming voltage threshold for resistive random access memory (RRAM) determines the magnitude of the read voltage. Only within this voltage range can the stored data be read correctly without altering the written data. Testing revealed a significant asymmetry in the programming voltage threshold of RRAM, with a substantial difference between the positive programming voltage threshold (SET voltage threshold) and the negative programming voltage threshold (RESET voltage threshold).

[0003] In related technologies, to avoid misprogramming RRAM weights due to read voltage, the read voltage is limited to a level far below the programming voltage threshold for smaller programming voltage thresholds. For example, if the positive programming voltage threshold is 0.2V and the negative programming voltage threshold is 1V, then the positive voltage difference applied across the RRAM (referred to as the positive read voltage) is approximately 0.1V. However, this method directly limits the range of the read current. For example, for an 8-bit current-mode ADC, when the read voltage is 0.1V, and simultaneously limited by the programmable resistance range of the RRAM (approximately 10kΩ~1250kΩ), the available read current range is only about ±10µA, resulting in a very small current resolution for a single code and placing high demands on the accuracy of the peripheral circuitry. RRAM exhibits resistance drift after programming (the device's conductance rapidly drifts and gradually saturates within minutes after programming), and this is particularly pronounced in intermediate conductance states. When the single-code current resolution is small, the current change caused by drift may cross one or even multiple code boundaries, thus significantly degrading programming accuracy and read accuracy. Furthermore, noise significantly increases the impact on accuracy and greatly increases the requirements for peripheral readout circuits, resulting in larger overall power consumption and area of ​​the circuit. Summary of the Invention

[0004] To address the aforementioned technical problems, this application provides a voltage reading method, circuit, chip, electronic device, storage medium, and computer program product based on the asymmetric characteristics of the programming voltage threshold.

[0005] According to a first aspect of this application, a voltage reading method based on the asymmetric characteristics of a programmable voltage threshold is provided, comprising: The array logic control module turns on the bit lines and source lines of the selected programmable device according to the control commands received from the field programmable gate array; Assuming the current flows positively from the positive end of the bit line to the source line, if the positive programming voltage threshold of the programmable device is less than the negative programming voltage threshold, the bit line data logic operation module decodes the input bit line voltage data, controls the corresponding row and column voltage switches to be turned on according to the decoding result, so as to select the first voltage and the second voltage from a plurality of pre-generated reference voltages, and applies the first voltage to the source line and the negative end of the bit line, and applies the second voltage to the positive end of the bit line, so that the current flowing through the programmable device is in the negative direction; or; If the negative programming voltage threshold is less than the positive programming voltage threshold, the bit line data logic operation module decodes the input bit line voltage data, controls the corresponding row and column voltage switches to be turned on according to the decoding result, so as to select the third voltage and the fourth voltage from the multiple reference voltages, and applies the third voltage to the positive terminal of the bit line, and applies the fourth voltage to the source line and the negative terminal of the bit line, so that the current flowing through the programmable device is in the positive direction. Wherein, the difference between the first voltage and the second voltage is the first preset bias voltage, which is greater than the existing positive read voltage and less than the negative programming voltage threshold; the difference between the third voltage and the fourth voltage is the second preset bias voltage, which is greater than the existing negative read voltage and less than the positive programming voltage threshold.

[0006] Optionally, the method further includes: The voltage reference buffer buffers and amplifies the voltage signal generated by the bandgap reference source to generate multiple reference voltages.

[0007] Optionally, generating multiple reference voltages includes: A series of resistors is added to the voltage reference buffer to generate multiple reference voltages including the first voltage and the second voltage, or to generate multiple reference voltages including the third voltage and the fourth voltage.

[0008] Optionally, the method further includes: Multiple reference voltages are generated using a negative voltage charge pump.

[0009] Optionally, applying the first voltage to the source line and the negative terminal of the bit line, and applying the second voltage to the positive terminal of the bit line, includes: Apply the first preset bias voltage to the negative terminals of the source line and the bit line, and ground the positive terminal of the bit line.

[0010] Optionally, the forward programming voltage threshold of the programmable device is 0.2V, the negative programming voltage threshold of the programmable device is 1V, the existing forward read voltage is 0.1V, and the first preset bias voltage is 0.7V.

[0011] Optionally, the programmable device includes RRAM.

[0012] According to a second aspect of this application, a read voltage circuit based on the asymmetric characteristics of a programmable voltage threshold is provided, comprising: The array logic control module is used to turn on the bit lines and source lines of the selected programmable device according to the control commands received from the field programmable gate array; Assuming the current flows positively from the positive end of the bit line to the source line, if the positive programming voltage threshold of the programmable device is less than the negative programming voltage threshold, the bit line data logic operation module is used to decode the input bit line voltage data, control the corresponding row and column voltage switches to turn on according to the decoding result, so as to select the first voltage and the second voltage from a plurality of pre-generated reference voltages, and apply the first voltage to the source line and the negative end of the bit line, and apply the second voltage to the positive end of the bit line, so that the current flowing through the programmable device is in the negative direction; or; If the negative programming voltage threshold is less than the positive programming voltage threshold, the bit line data logic operation module is used to decode the input bit line voltage data, control the corresponding row and column voltage switches to turn on according to the decoding result, so as to select the third voltage and the fourth voltage from the multiple reference voltages, and apply the third voltage to the positive terminal of the bit line, and apply the fourth voltage to the source line and the negative terminal of the bit line, so that the current flowing through the programmable device is in the positive direction. Wherein, the difference between the first voltage and the second voltage is the first preset bias voltage, which is greater than the existing positive read voltage and less than the negative programming voltage threshold; the difference between the third voltage and the fourth voltage is the second preset bias voltage, which is greater than the existing negative read voltage and less than the positive programming voltage threshold.

[0013] Optionally, the circuit further includes: A voltage reference buffer is used to buffer and amplify the voltage signal generated by a bandgap reference source to generate multiple reference voltages.

[0014] Optionally, the voltage reference buffer is used to add a resistor string to the voltage reference buffer to generate a plurality of reference voltages including the first voltage and the second voltage, or to generate a plurality of reference voltages including the third voltage and the fourth voltage.

[0015] Optionally, the circuit further includes: A negative voltage charge pump is used to generate multiple reference voltages.

[0016] Optionally, the bit line data logic operation module is specifically used to apply the first voltage to the source line and the negative terminal of the bit line, and apply the second voltage to the positive terminal of the bit line in the following manner: Apply the first preset bias voltage to the negative terminals of the source line and the bit line, and ground the positive terminal of the bit line.

[0017] Optionally, the forward programming voltage threshold of the programmable device is 0.2V, the negative programming voltage threshold of the programmable device is 1V, the existing forward read voltage is 0.1V, and the first preset bias voltage is 0.7V.

[0018] Optionally, the programmable device includes RRAM.

[0019] According to a third aspect of this application, a chip is provided, including the circuit described in the second aspect.

[0020] According to a fourth aspect of this application, an electronic device is provided, including the chip described in the third aspect.

[0021] According to a fifth aspect of this application, a computer-readable storage medium is provided having a computer program stored thereon, which, when executed by a processor, implements the method described in the first aspect.

[0022] According to a sixth aspect of this application, a computer program product is provided that, when the computer program product is run on a computer, causes the computer to perform the method described in the first aspect.

[0023] The technical solution provided in this application has the following advantages compared with the prior art: For programmable devices with different polarity programming voltage thresholds, a larger read voltage is applied to the polarity side with the larger programming voltage threshold. For example, if the positive programming voltage threshold is smaller than the negative programming voltage threshold, a negative bias voltage is directly applied to the programmable device; if the negative programming voltage threshold is smaller than the positive programming voltage threshold, a positive bias voltage is directly applied. Since the bias voltage is smaller than the larger programming voltage threshold, the read current range and single-code current resolution are increased without changing the programmable device's write weight. This improves programming accuracy while reducing the requirements for external read circuits. Simultaneously, the single-code current range is sufficient to cover the current changes caused by resistance drift after programming, fundamentally suppressing the impact of the programmable device's own resistance drift on programming accuracy. Furthermore, it reduces the impact of noise on accuracy and lowers the requirements for external read circuits, further reducing chip power consumption and area while improving overall read and programming accuracy, making the product more competitive. This application only adjusts the bias voltage on the existing architecture, requiring minimal modification and low cost, and is easily implemented on existing programmable devices. Attached Figure Description

[0024] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0025] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0026] Figure 1 The test data and intensive model simulation results for DC scanning of 28nm process RRAM in the embodiments of this application are presented. Figure 2 This is a flowchart of a voltage reading method based on the asymmetric characteristics of the programming voltage threshold in an embodiment of this application; Figure 3 This is a schematic diagram of a voltage reading method in the prior art; Figure 4 This is a schematic diagram of a voltage reading method in an embodiment of this application; Figure 5 A schematic diagram of a structure for generating multiple voltages using a voltage reference buffer in the prior art; Figure 6 This is a schematic diagram of a structure for a voltage reference buffer to generate multiple voltages in an embodiment of this application; Figure 7 This is a schematic diagram of the read voltage method based on the asymmetric characteristics of the RRAM programming voltage threshold in an embodiment of this application; Figure 8 This is a schematic diagram of the bit line data logic operation module in an embodiment of this application. Figure 9 This is a schematic diagram of a read voltage circuit based on the asymmetric characteristics of the programming voltage threshold in an embodiment of this application. Detailed Implementation

[0027] To better understand the above-mentioned objectives, features, and advantages of this application, the solution of this application will be further described below. It should be noted that, unless otherwise specified, the embodiments and features described in these embodiments can be combined with each other.

[0028] Many specific details are set forth in the following description in order to provide a full understanding of this application, but this application may also be implemented in other ways different from those described herein; obviously, the embodiments in the specification are only some embodiments of this application, and not all embodiments.

[0029] Resistive random access memory (RRAM) is a non-volatile memory device that switches between low-resistance and high-resistance states by forming or breaking conductive filaments in a dielectric layer. In analog multi-valued applications, the device is programmed to multiple intermediate conductance states by controlling the SET / RESET process, with each conductance state corresponding to a data (weight). A 2T2R structure is typically used (composed of two 1T1R structures controlled by the same word line). During readout, the word line (WL) activates the selector transistor, and a read voltage is applied between the bit line (BL) and the source line (SL). A current-mode readout circuit converts the current on the source line into digital code.

[0030] As shown in Figure 1, DC scan tests on 28nm process RRAM and fitting with a condensed model show that when a positive voltage is applied to the RRAM, most RRAM devices exhibit a significant increase in current when the voltage reaches 0.2V (considered a SET operation, high resistance → low resistance), meaning 0.2V can be considered the critical voltage for positive programming (i.e., the positive programming voltage threshold). Conversely, when a negative voltage is applied to the RRAM, most RRAM devices exhibit a significant decrease in current when the voltage reaches approximately 1.0V (considered a RESET operation, low resistance → high resistance), meaning 1V can be considered the critical voltage for negative programming (i.e., the negative programming voltage threshold). This demonstrates a clear positive-negative asymmetry in the programming voltage threshold. This application utilizes this asymmetry by applying a larger read voltage on the polarity side with a higher programming voltage threshold to improve readout accuracy.

[0031] See Figure 2 , Figure 2 This is a flowchart of a voltage reading method based on the asymmetric characteristics of the programming voltage threshold in an embodiment of this application, including the following steps: In step S202, the array logic control module turns on the bit lines and source lines of the selected programmable device according to the control command received from the field programmable gate array.

[0032] Step S204: Compare the magnitudes of the positive programming voltage threshold and the negative programming voltage threshold of the programmable device.

[0033] This application embodiment applies to programmable devices with asymmetric programming voltage thresholds, including RRAM and the like. If the positive programming voltage threshold of the programmable device is less than the negative programming voltage threshold, step S206 is executed; if the negative programming voltage threshold is less than the positive programming voltage threshold, step S208 is executed.

[0034] Step S206: Assuming the current flows from the positive end of the bit line to the source line in the positive direction, the bit line data logic operation module decodes the input bit line voltage data, controls the corresponding row and column voltage switches to be turned on according to the decoding result, so as to select the first voltage and the second voltage from multiple pre-generated reference voltages, and applies the first voltage to the source line and the negative end of the bit line, and applies the second voltage to the positive end of the bit line, so that the current flowing through the programmable device is in the negative direction.

[0035] After receiving an external command, the array logic control module decodes it and activates the corresponding bit line switch, completing the bit line selection process for a specified programmable device. The bit line data logic operation module processes the bit line voltage data to configure the bit line voltage. Combined, these two processes allow the appropriate voltage to be connected to the two ends of the selected programmable device.

[0036] If the positive programming voltage threshold of the programmable device is less than the negative programming voltage threshold, the first voltage applied to the negative terminals of the source line and the bit line is greater than the second voltage applied to the positive terminal of the bit line, and the difference between the first voltage and the second voltage is the first preset bias voltage.

[0037] Since the first preset bias voltage is greater than the existing positive read voltage, the read current range can be increased. Furthermore, the first preset bias voltage is less than the negative programming voltage threshold, so the weighting value stored by the programmable device will not change. Optionally, the first preset bias voltage is applied to the negative terminals of the source line and the bit line, while the positive terminal of the bit line is grounded. That is, the first voltage is the first preset bias voltage, and the second voltage is 0V, making the voltage reading method simpler.

[0038] Optionally, the forward programming voltage threshold of the programmable device is 0.2V, the negative programming voltage threshold is 1V, the existing forward read voltage is 0.1V, and the first preset bias voltage is 0.7V. Since 0.7V is less than the negative programming voltage threshold of 1V, the weighting value stored by the programmable device will not change. Increasing the read voltage amplitude from 0.1V to approximately 0.7V increases the read current range by approximately 7 times, thus improving programming accuracy and reducing the requirements for external readout circuitry. See also... Figure 3 and Figure 4 It can be seen that Figure 4 The circuit implementation in this paper generates a negative current for the RRAM being read (such as the P terminal) by raising the bias voltage of the source line. Compared to... Figure 3 The traditional forward readout method can be achieved simply by adjusting the bias voltage, requiring minimal modification and yielding significant benefits.

[0039] Multiple reference voltages can be generated as follows: A voltage reference buffer buffers and amplifies the voltage signal generated by a bandgap reference source to generate multiple reference voltages. Optionally, a resistor string can be added to the voltage reference buffer to generate multiple reference voltages including a first voltage and a second voltage, or multiple reference voltages including a third voltage and a fourth voltage. See also Figure 5 and Figure 6 As can be seen, by using resistor voltage division, adding a resistor string to the original circuit module can generate the required reading voltage and maintain the consistency of the reading voltage.

[0040] In addition to generating multiple reference voltages through a voltage reference buffer, multiple reference voltages can also be generated using a negative voltage charge pump. This application does not limit the method of generating multiple reference voltages.

[0041] In step S208, the bit line data logic operation module decodes the input bit line voltage data, controls the corresponding row and column voltage switches to be turned on according to the decoding result, so as to select the third voltage and the fourth voltage from multiple reference voltages, and applies the third voltage to the positive terminal of the bit line and applies the fourth voltage to the source line and the negative terminal of the bit line, so that the current flowing through the programmable device is in the positive direction.

[0042] Similarly, if the negative programming voltage threshold is less than the positive programming voltage threshold, the third voltage applied to the positive terminal of the bit line is greater than the fourth voltage applied to the source line and the negative terminal of the bit line. The difference between the third and fourth voltages is the second preset bias voltage, which is greater than the existing negative read voltage but less than the positive programming voltage threshold. Likewise, the read current range can be increased without changing the write weight of the programmable device, thereby improving programming accuracy and reducing the requirements for external read circuitry.

[0043] See Figure 7 , Figure 7 This is a schematic diagram of the voltage reading method based on the asymmetric characteristics of the RRAM programming voltage threshold in this embodiment. A voltage reference buffer generates multiple reference voltages. The array logic control module, according to control instructions, turns on the bit lines and source lines of the selected RRAM. The bit line data logic operation module decodes the input bit line voltage data and, based on the decoding result, controls the corresponding row and column voltage switches to turn on, selecting the required reference voltage. The processing procedure of the bit line data logic operation module is as follows: Figure 8 As shown. In this way, by applying a bias voltage between the existing positive read voltage and the negative programming voltage threshold to the source line and the negative bit line, and grounding the positive bit line, the current flowing through the RRAM is in the negative direction, and the voltage difference is the bias voltage, that is, a negative read voltage of the magnitude of the bias voltage is applied to the RRAM.

[0044] Since the negative programming voltage threshold is greater than the bias voltage, a read voltage amplitude several times higher than that of the traditional positive voltage read scheme can be used without changing the stored weight value, thereby significantly increasing the read current range and single-code current resolution.

[0045] The read voltage method based on the asymmetric characteristics of the programming voltage threshold in this application utilizes the positive and negative asymmetry of the programming voltage threshold of the programmable device. A larger read voltage is applied to the polarity side with a larger programming voltage threshold. Without changing the weighting of the programmable device, the read current range and single-code current resolution are increased, ensuring that the single-code current range is sufficient to cover the current changes caused by resistance drift after programming, thereby eliminating the impact of resistance drift on programming accuracy. Simultaneously, the impact of noise on accuracy is reduced, and the requirements of the programmable device on the external readout circuitry are lowered. While improving overall readout and programming accuracy, the power consumption and area of ​​the chip are further reduced, making the product more competitive.

[0046] It should be noted that although the steps of the method in this disclosure are described in a specific order in the accompanying drawings, this does not require or imply that the steps must be performed in that specific order, or that all the steps shown must be performed to achieve the desired result. Additional or alternative steps may be omitted, multiple steps may be combined into one step, and / or a step may be broken down into multiple steps.

[0047] This application also provides a read voltage circuit based on the asymmetric characteristics of the programming voltage threshold, see [link to relevant documentation]. Figure 9 The read voltage circuit 900 based on the asymmetric characteristics of the programming voltage threshold includes: The array logic control module 902 is used to turn on the bit lines and source lines of the selected programmable device 904 according to the control instructions received from the field programmable gate array; Assuming the current flows from the positive terminal of the bit line to the source line in the positive direction, if the positive programming voltage threshold of the programmable device 904 is less than the negative programming voltage threshold, the bit line data logic operation module 906 is used to decode the input bit line voltage data, control the corresponding row and column voltage switches to turn on according to the decoding result, so as to select the first voltage and the second voltage from a plurality of pre-generated reference voltages, and apply the first voltage to the source line and the negative terminal of the bit line, and apply the second voltage to the positive terminal of the bit line, so that the current flowing through the programmable device is in the negative direction; or; If the negative programming voltage threshold is less than the positive programming voltage threshold, the bit line data logic operation module 906 is used to decode the input bit line voltage data, control the corresponding row and column voltage switches to turn on according to the decoding result, so as to select the third voltage and the fourth voltage from multiple reference voltages, and apply the third voltage to the positive terminal of the bit line, and apply the fourth voltage to the source line and the negative terminal of the bit line, so that the current flowing through the programmable device is in the positive direction. The difference between the first voltage and the second voltage is the first preset bias voltage, which is greater than the existing positive read voltage and less than the negative programming voltage threshold; the difference between the third voltage and the fourth voltage is the second preset bias voltage, which is greater than the existing negative read voltage and less than the positive programming voltage threshold.

[0048] Optionally, the read voltage circuit 900 based on the asymmetric characteristics of the programming voltage threshold further includes: A voltage reference buffer is used to buffer and amplify the voltage signal generated by a bandgap reference source to generate multiple reference voltages.

[0049] Optionally, a voltage reference buffer is provided for adding a series of resistors to the voltage reference buffer to generate multiple reference voltages including a first voltage and a second voltage, or to generate multiple reference voltages including a third voltage and a fourth voltage.

[0050] Optionally, the read voltage circuit 900 based on the asymmetric characteristics of the programming voltage threshold further includes: A negative voltage charge pump is used to generate multiple reference voltages.

[0051] Optionally, the bit line data logic operation module is specifically used to apply a first voltage to the source line and the negative terminal of the bit line, and apply a second voltage to the positive terminal of the bit line in the following manner: Apply a first preset bias voltage to the negative terminals of the source line and the bit line, and ground the positive terminal of the bit line.

[0052] Optionally, the forward programming voltage threshold of the programmable device is 0.2V, the negative programming voltage threshold of the programmable device is 1V, the existing forward read voltage is 0.1V, and the first preset bias voltage is 0.7V.

[0053] Optionally, the programmable device includes RRAM.

[0054] The specific details of each module or unit in the above circuit have been described in detail in the corresponding methods, so they will not be repeated here.

[0055] It should be noted that although several modules or units for the device used to perform actions have been mentioned in the detailed description above, this division is not mandatory. In fact, according to the embodiments of this application, the features and functions of two or more modules or units described above can be embodied in one module or unit. Conversely, the features and functions of one module or unit described above can be further divided and embodied by multiple modules or units.

[0056] This application also provides a chip, including: the above-mentioned read voltage circuit based on the asymmetric characteristics of the programming voltage threshold.

[0057] This application also provides an electronic device including the above-described chip.

[0058] This application also provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the above-described voltage reading method based on the asymmetric characteristics of a programmed voltage threshold.

[0059] It should be noted that the computer-readable storage medium shown in this application can be, for example,—but not limited to—an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of computer-readable storage media may include, but are not limited to: electrical connections having one or more wires, portable computer disks, hard disks, random access memory, read-only memory, erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof. In this application, the computer-readable storage medium can be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, apparatus, or device. The program code contained on the computer-readable storage medium can be transmitted using any suitable medium, including but not limited to: wireless, wire, optical fiber, radio frequency, etc., or any suitable combination thereof.

[0060] In this embodiment of the application, a computer program product is also provided, which, when run on a computer, causes the computer to execute the above-described voltage reading method based on the asymmetric characteristics of the programmed voltage threshold.

[0061] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0062] The above description is merely a specific embodiment of this application, enabling those skilled in the art to understand or implement this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments described herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A voltage reading method based on the asymmetric characteristics of a programmed voltage threshold, characterized in that, include: The array logic control module turns on the bit lines and source lines of the selected programmable device according to the control commands received from the field programmable gate array; Assuming the direction of current flow from the positive end of the bit line to the source line is positive, if the positive programming voltage threshold of the programmable device is less than the negative programming voltage threshold, the bit line data logic operation module decodes the input bit line voltage data, controls the corresponding row and column voltage switches to be turned on according to the decoding result, so as to select the first voltage and the second voltage from a plurality of pre-generated reference voltages, and applies the first voltage to the source line and the negative end of the bit line, and applies the second voltage to the positive end of the bit line, so that the current flowing through the programmable device is in the negative direction; or; If the negative programming voltage threshold is less than the positive programming voltage threshold, the bit line data logic operation module decodes the input bit line voltage data, controls the corresponding row and column voltage switches to be turned on according to the decoding result, so as to select the third voltage and the fourth voltage from the multiple reference voltages, and applies the third voltage to the positive terminal of the bit line, and applies the fourth voltage to the source line and the negative terminal of the bit line, so that the current flowing through the programmable device is in the positive direction. Wherein, the difference between the first voltage and the second voltage is the first preset bias voltage, which is greater than the existing positive read voltage and less than the negative programming voltage threshold. The difference between the third voltage and the fourth voltage is a second preset bias voltage, which is greater than the existing negative read voltage and less than the positive programming voltage threshold.

2. The method according to claim 1, characterized in that, The method further includes: The voltage reference buffer buffers and amplifies the voltage signal generated by the bandgap reference source to generate multiple reference voltages.

3. The method according to claim 2, characterized in that, The generation of multiple reference voltages includes: A series of resistors is added to the voltage reference buffer to generate multiple reference voltages including the first voltage and the second voltage, or to generate multiple reference voltages including the third voltage and the fourth voltage.

4. The method according to claim 1, characterized in that, The method further includes: Multiple reference voltages are generated using a negative voltage charge pump.

5. The method according to claim 1, characterized in that, Applying the first voltage to the negative terminals of the source line and the bit line, and applying the second voltage to the positive terminal of the bit line, includes: Apply the first preset bias voltage to the negative terminals of the source line and the bit line, and ground the positive terminal of the bit line.

6. The method according to claim 1, characterized in that, The programmable device has a forward programming voltage threshold of 0.2V, a negative programming voltage threshold of 1V, an existing forward read voltage of 0.1V, and a first preset bias voltage of 0.7V.

7. The method according to claim 1, characterized in that, The programmable device includes resistive random access memory (RRAM).

8. A voltage reading circuit based on the asymmetric characteristics of a programming voltage threshold, characterized in that, include: The array logic control module is used to turn on the bit lines and source lines of the selected programmable device according to the control commands received from the field programmable gate array; Assuming the direction of current flow from the positive end of the bit line to the source line is positive, if the positive programming voltage threshold of the programmable device is less than the negative programming voltage threshold, the bit line data logic operation module is used to decode the input bit line voltage data, control the corresponding row and column voltage switches to be turned on according to the decoding result, so as to select the first voltage and the second voltage from a plurality of pre-generated reference voltages, and apply the first voltage to the source line and the negative end of the bit line, and apply the second voltage to the positive end of the bit line, so that the current flowing through the programmable device is in the negative direction; or; If the negative programming voltage threshold is less than the positive programming voltage threshold, the bit line data logic operation module is used to decode the input bit line voltage data, control the corresponding row and column voltage switches to turn on according to the decoding result, so as to select the third voltage and the fourth voltage from the multiple reference voltages, and apply the third voltage to the positive terminal of the bit line, and apply the fourth voltage to the source line and the negative terminal of the bit line, so that the current flowing through the programmable device is in the positive direction. Wherein, the difference between the first voltage and the second voltage is the first preset bias voltage, which is greater than the existing positive read voltage and less than the negative programming voltage threshold. The difference between the third voltage and the fourth voltage is a second preset bias voltage, which is greater than the existing negative read voltage and less than the positive programming voltage threshold.

9. A chip, characterized in that, Includes the circuit described in claim 8.

Images