On-line compensation method and device for in-memory computing device drift

Abstract

This application discloses an online compensation method and apparatus for in-memory computing device drift, relating to the field of online device drift compensation technology. The method includes: periodically measuring the device drift of the chip; fitting a chip-specific drift model based on the measured data, and combining this with a preset threshold (the weighted drift standard deviation corresponding to the accuracy tolerance limit) pre-calibrated and written to the chip according to the task before deployment, to calculate the next compensation time; acquiring the accumulated running time through an on-chip timer, and issuing a trigger signal when the calculated time is reached; performing online training on the digital layer in the trainable digital compensation module to simulate backbone freezing without reprogramming the simulated device. After this compensation is completed, the drift model recalculates the next trigger time based on the accumulated running time, allowing the above process to repeat cyclically and run automatically for a long time. This solves the problem that existing technologies cannot simultaneously meet the deployment requirements of online tracking of real drift and low device loss.

Description

Technical Field

[0001] This application relates to the field of online device drift compensation technology, and in particular to an online compensation method and apparatus for in-memory computing device drift. Background Technology

[0002] After the deployment of an Analogue Compute-In-Memory (ACIM) system, the device conductivity will continue to degrade and drift over time (on a scale of months or even years), causing the calculation results of the same chip to change over time. Therefore, it is necessary to continuously maintain the simulation calculation error after deployment, track the drift over time, and restore the accuracy in a timely manner.

[0003] Currently, existing technologies can compensate for device drift using the following three types of techniques: 1. Offline pre-stored, time-switched drift compensation: Multiple sets of compensation parameters corresponding to different drift degrees are pre-trained in the simulation, and the corresponding parameter set is selected according to the elapsed time after deployment; 2. In-situ reprogramming compensation: The memristor array is repeatedly programmed in hardware to rewrite the weights and offset the drift; 3. One-time static calibration / table lookup correction before deployment.

[0004] However, the existing technology has the following technical defects: 1. The offline pre-storage and time-based switching scheme is based on statistical models to pre-generate compensation parameters, which cannot perceive the actual drift trajectory and direction of the specific chip, and the compensation is not accurate enough.

[0005] 2. In-situ reprogramming requires repeated writing to the memristor array. Frequent writing will accelerate device aging, damage lifespan, and result in significant energy consumption and time overhead.

[0006] 3. The one-time static calibration / lookup correction before deployment is fixed after deployment and cannot track the drift over time, resulting in a decrease in accuracy over time.

[0007] In summary, existing technologies cannot simultaneously meet the deployment requirements of online tracking of real drift and low device loss, and this issue urgently needs to be addressed. Summary of the Invention

[0008] This application provides an online compensation method and apparatus for in-memory computing device drift, to solve the problem that existing technologies cannot simultaneously meet the deployment requirements of online tracking of real drift and low device loss.

[0009] The first aspect of this application provides an online compensation method for in-memory computing device drift, comprising the following steps: periodically measuring the device drift of a target in-memory computing chip to obtain corresponding measured data; fitting a target drift model corresponding to the target in-memory computing chip based on the measured data, and calculating the trigger time when the measured data reaches a pre-calibrated drift threshold based on the target drift model; calculating the cumulative running time of the target in-memory computing chip through a preset on-chip timer, and determining whether the cumulative running time has reached the trigger time; in response to the cumulative running time reaching the trigger time, triggering an online training operation of the digital layer; resetting the on-chip timer after training is completed, and recalculating the next trigger time using the target drift model based on the new cumulative running time of the on-chip timer.

[0010] Optionally, in one embodiment of this application, the periodic measurement of the device drift of the target in-memory computing chip to obtain corresponding measured data includes: reserving a set of reference cells in the target in-memory computing chip that do not participate in network computing; programming the reference cells to each initial conductance state during deployment; periodically reading the conductance of the reference cells after deployment; calculating the standard deviation of the logarithmic change in conductance under each initial state; and determining the measured data based on the standard deviation.

[0011] Optionally, in one embodiment of this application, the step of fitting a target drift model corresponding to the target in-memory computing chip based on the measured data, and calculating the trigger time for the measured data to reach a pre-calibrated drift threshold based on the target drift model, includes: fitting multiple target coefficients based on the logarithmic relationship of the measured data with running time to obtain a target drift model corresponding to the target in-memory computing chip; before deploying the current neural network task in the target in-memory computing chip, calibrating a weight drift standard deviation that meets a preset accuracy requirement, and using the weight drift standard deviation as the drift threshold, and writing the drift threshold into the target in-memory computing chip; calculating the running time required for the measured data to reach the drift threshold based on the target drift model, and determining the trigger time corresponding to the running time.

[0012] Optionally, in one embodiment of this application, the step of calculating the cumulative running time of the target in-memory computing chip using a preset on-chip timer, determining whether the cumulative running time has reached the trigger time, triggering an online training operation for the digital layer when the cumulative running time reaches the trigger time, and resetting the on-chip timer after training is completed includes: calculating the cumulative running time of the target in-memory computing chip using the on-chip timer, and determining whether the cumulative running time has reached the trigger time; if the cumulative running time has reached the trigger time, determining that the device drift is too large, triggering an online training operation for the digital layer on the target in-memory computing chip, and resetting the on-chip timer after online training is completed, wherein the online training operation of the digital layer only updates the digital layer of the pre-deployed mixed-signal neural network in the target in-memory computing chip, while freezing the weight parameters of the analog layer.

[0013] A second aspect of this application provides an online compensation device for in-memory computing device drift, comprising: a measurement module for periodically measuring the device drift of a target in-memory computing chip to obtain corresponding measurement data; a calculation module for fitting a target drift model corresponding to the target in-memory computing chip based on the measurement data, and calculating the trigger time when the measurement data reaches a pre-calibrated drift threshold based on the target drift model; and a compensation module for calculating the cumulative running time of the target in-memory computing chip using a preset on-chip timer, determining whether the cumulative running time has reached the trigger time, triggering a digital layer online training operation when the cumulative running time reaches the trigger time, resetting the on-chip timer after training, and recalculating the next trigger time using the target drift model based on the new cumulative running time of the on-chip timer.

[0014] Optionally, in one embodiment of this application, the measurement module includes: a statistics unit, used to reserve a set of reference units in the target in-memory computing chip that do not participate in network computing, to program the reference units to each initial conductance state during deployment, to periodically read out the conductance of the reference units after deployment, and to calculate the standard deviation of the logarithmic change in conductance under each initial state, and to determine the measured data based on the standard deviation.

[0015] Optionally, in one embodiment of this application, the estimation module includes: a fitting unit, configured to fit multiple target coefficients based on the logarithmic relationship between the measured data and the running time, to obtain a target drift model corresponding to the target in-memory computing chip; a calibration unit, configured to calibrate the weight drift standard deviation that meets a preset accuracy requirement before deploying the current neural network task in the target in-memory computing chip, and use the weight drift standard deviation as the drift threshold, and write the drift threshold into the target in-memory computing chip; and a determination unit, configured to estimate the running time required for the measured data to reach the drift threshold based on the target drift model, and determine the trigger time corresponding to the running time.

[0016] Optionally, in one embodiment of this application, the compensation module includes: a judgment unit, configured to calculate the cumulative running time of the target in-memory computing chip using the on-chip timer, and determine whether the cumulative running time has reached the trigger time; and a reset unit, configured to, if the cumulative running time has reached the trigger time, determine that the device drift is too large, trigger an online training operation on the digital layer of the target in-memory computing chip, and reset the on-chip timer after the online training is completed, wherein the online training operation of the digital layer only updates the digital layer of the pre-deployed mixed-signal neural network in the target in-memory computing chip, while freezing the weight parameters of the analog layer.

[0017] A third aspect of this application provides an electronic device, including: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the online compensation method for in-memory computing device drift as described in the above embodiments.

[0018] A fourth aspect of this application provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the above-described online compensation method for in-memory computing device drift.

[0019] A fifth aspect of this application provides a computer program product, including a computer program that is executed to implement the above-described online compensation method for in-memory computing device drift.

[0020] Therefore, the embodiments of this application have the following beneficial effects: The embodiments of this application obtain corresponding measured data by periodically measuring the device drift of the target in-memory computing chip; a target drift model corresponding to the target in-memory computing chip is fitted based on the measured data, and the trigger time when the measured data reaches a pre-calibrated drift threshold is calculated based on the target drift model; the cumulative running time of the target in-memory computing chip is calculated by a preset on-chip timer, and it is determined whether the cumulative running time has reached the trigger time. In response to the cumulative running time reaching the trigger time, an online training operation of the digital layer is triggered, and the on-chip timer is reset after training is completed. The next trigger time is recalculated based on the new cumulative running time of the on-chip timer using the target drift model. This application has low computational overhead and can be completed autonomously on the edge chip, significantly enhancing the robustness, stability, and maintainability of the system in long-term deployment scenarios, and has significant engineering practical value. Thus, it solves the problem that existing technologies cannot simultaneously meet the deployment requirements of online tracking of real drift and low device loss.

[0021] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description

[0022] The above and / or additional aspects and advantages of this application will become apparent and readily understood from the following description of the embodiments taken in conjunction with the accompanying drawings, wherein: Figure 1 This is a flowchart of an online compensation method for in-memory computing device drift according to an embodiment of this application; Figure 2 A general block diagram of a device drift online compensation self-maintenance process is provided as an embodiment of this application; Figure 3 This is an example diagram of an online compensation device for in-memory computing device drift according to an embodiment of this application; Figure 4 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application.

[0023] Among them, 10-online compensation device for in-memory computing device drift; 100-actual measurement module, 200-calculation module, 300-compensation module; 401-memory, 402-processor, 403-communication interface. Detailed Implementation

[0024] The embodiments of this application are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain this application, and should not be construed as limiting this application.

[0025] The following describes an online compensation method and apparatus for in-memory computing device drift according to embodiments of this application, with reference to the accompanying drawings. Addressing the problems mentioned in the background art, this application provides an online compensation method for in-memory computing device drift. In this method, the device drift of a target in-memory computing chip is periodically measured to obtain corresponding measured data. A target drift model corresponding to the target in-memory computing chip is fitted based on the measured data, and the trigger time when the measured data reaches a pre-calibrated drift threshold is calculated based on the target drift model. The cumulative running time of the target in-memory computing chip is calculated using a preset on-chip timer, and it is determined whether the cumulative running time has reached the trigger time. In response to the cumulative running time reaching the trigger time, an online training operation of the digital layer is triggered. After training is completed, the on-chip timer is reset, and the next trigger time is recalculated using the target drift model based on the new cumulative running time of the on-chip timer. This application has low computational overhead and can be completed autonomously on an edge chip, significantly enhancing the robustness, stability, and maintainability of the system in long-term deployment scenarios, and has significant engineering practical value. This solves the problem that existing technologies cannot simultaneously meet the deployment requirements of online tracking of real drift and low device loss.

[0026] Specifically, Figure 1 This is a flowchart illustrating an online compensation method for in-memory computing device drift provided in an embodiment of this application.

[0027] like Figure 1 As shown, the online compensation method for in-memory computing device drift includes the following steps: In step S101, the device drift of the target memory computing chip is periodically measured to obtain the corresponding measured data.

[0028] Figure 2 This is a general flowchart of the online compensation and self-maintenance process for device drift. (For example...) Figure 2 As shown in the diagram, the center of the block diagram is the in-memory computing chip (containing an analog backbone array and a trainable digital compensation module); the left side is the reference unit and readout circuit, where the measured data is sent to the drift model fitting and trigger calculation unit; the lower left dashed box represents the preset threshold (the standard deviation of the weight drift corresponding to the accuracy tolerance limit) pre-calibrated according to the neural network task before deployment, which is written into the chip for use by this unit; the calculated trigger time is configured to the on-chip timer; when the timer expires, it sends a trigger signal to the digital layer online training unit; the training unit reads the reference data from the calibration dataset storage, performs online training on the digital layer, resets the timing information, and the model recalculates the next trigger time. The arrows constitute a cyclical self-maintenance process.

[0029] Therefore, the embodiments of this application construct a self-maintenance process of "monitoring-modeling-triggering-compensation-recalculation" on the in-memory computing chip and its supporting control unit, which is composed of four parts working in concert. In actual execution, the embodiments of this application first periodically measure the device drift of the chip through the reference unit and the readout circuit to obtain the corresponding measured data, thereby providing a reliable data basis for subsequent drift compensation.

[0030] Optionally, in one embodiment of this application, periodically measuring the device drift of the target in-memory computing chip to obtain corresponding measured data includes: reserving a set of reference cells in the target in-memory computing chip that do not participate in network computing; programming the reference cells to each initial conductance state during deployment; periodically reading out the conductance of the reference cells after deployment; calculating the standard deviation of the logarithmic change in conductance under each initial state; and determining the measured data based on the standard deviation.

[0031] As one possible approach, embodiments of this application can reserve a set of reference cells that do not participate in network computation in the in-memory computing array (i.e., the target in-memory computing chip). During deployment (write verification), these reference cells are programmed into each initial conductance state (e.g., 15 weighted states corresponding to a 2T2R unit, with several units in each state). After deployment, the conductance of these reference cells is periodically read out, and the standard deviation of the logarithmic change in conductance under each initial state is calculated. The standard deviation is then used as the corresponding measured data.

[0032] In step S102, the target drift model corresponding to the target in-memory computing chip is fitted according to the measured data, and the trigger time when the measured data reaches the pre-calibrated drift threshold is calculated based on the target drift model.

[0033] Furthermore, in this embodiment of the application, the drift model fitting and trigger calculation unit can fit the chip-specific drift model (i.e., the target drift model) based on the measured data, and combine it with the drift threshold (the standard deviation of the weight drift corresponding to the accuracy tolerance limit) that is pre-calibrated and written into the chip according to the task (i.e. the current neural network task) before deployment, so as to calculate the next compensation time, i.e. the trigger time.

[0034] Optionally, in one embodiment of this application, fitting a target drift model corresponding to the target in-memory computing chip based on measured data, and calculating the trigger time when the measured data reaches a pre-calibrated drift threshold based on the target drift model, includes: fitting multiple target coefficients based on the logarithmic relationship of the measured data with running time to obtain a target drift model corresponding to the target in-memory computing chip; before deploying the current neural network task in the target in-memory computing chip, calibrating the weight drift standard deviation that meets the preset accuracy requirements, and using the weight drift standard deviation as the drift threshold, and writing the drift threshold into the target in-memory computing chip; calculating the running time required for the measured data to reach the drift threshold based on the target drift model, and determining the trigger time corresponding to the running time.

[0035] Those skilled in the art should understand that after a mixed-signal neural network (i.e., the current neural network task) is deployed on an in-memory computing chip, the conductivity of the devices used in its analog backbone will continuously degrade and drift over time (on a scale of months or even years), causing the weights to gradually deviate from their values ​​at the time of deployment.

[0036] The embodiments of this application do not rely on simulation assumptions, but establish a drift model based on actual measurements on a real chip: the degree of drift is characterized by the standard deviation of the logarithmic change in conductance, which is logarithmically dependent on the elapsed time T. std( ln G_t ln G_{t=0} ) = a · log10(T) + b.

[0037] Therefore, in this embodiment of the application, the standard deviation of the logarithmic change of conductance under different initial conductance states is measured over time on a real chip, and based on the above formula, the chip-specific coefficients (i.e. target coefficients) a and b are fitted according to different initial conductance states (for example, a set of parameters is fitted for each of the several conductance states of each 2T2R unit).

[0038] Therefore, the embodiments of this application can use this model to predict the degree of drift at any time from the current cumulative running time, and thus calculate the lower bound of the network accuracy.

[0039] Secondly, for the deployed neural network task, the standard deviation of the weight drift corresponding to the accuracy tolerance limit is pre-calibrated before deployment and written into the chip as a preset threshold for subsequent triggering and judgment. No simulation calculation is required during chip operation.

[0040] Subsequently, in this embodiment of the application, an on-chip timing tool can be set up to calculate the running time required for the standard deviation to reach the preset drift threshold based on the above-fitted drift model, and determine the trigger time corresponding to the running time.

[0041] Therefore, since the embodiments of this application only need to read a small number of reference units and do not read or interfere with the working units that carry network weights, the time and energy consumption of the measurement are extremely low.

[0042] In step S103, the cumulative running time of the target in-memory computing chip is calculated by a preset on-chip timer, and it is determined whether the cumulative running time has reached the trigger time. In response to the cumulative running time reaching the trigger time, the digital layer online training operation is triggered, and the on-chip timer is reset after training is completed. The next trigger time is recalculated based on the new cumulative running time of the on-chip timer using the target drift model.

[0043] Subsequently, in this embodiment, the running time can be accumulated via an on-chip timer to issue a trigger signal when it reaches the calculated time. Then, based on the trigger signal, this embodiment can trigger the online training unit of the digital layer and the calibration dataset storage operation. After being triggered, online training is performed on the digital layer in the trainable digital compensation module to simulate backbone freezing without reprogramming the analog device. After this compensation is completed, the drift model recalculates the next trigger time based on the accumulated running time, allowing the above process to repeat cyclically and run automatically for a long period.

[0044] Optionally, in one embodiment of this application, the cumulative running time of the target in-memory computing chip is calculated using a preset on-chip timer, and it is determined whether the cumulative running time has reached a trigger time. In response to the cumulative running time reaching the trigger time, an online training operation of the digital layer is triggered, and the on-chip timer is reset after training is completed. This includes: calculating the cumulative running time of the target in-memory computing chip using the on-chip timer, and determining whether the cumulative running time has reached a trigger time; if the cumulative running time has reached the trigger time, determining that the device drift is too large, triggering an online training operation of the digital layer on the target in-memory computing chip, and resetting the on-chip timer after online training is completed. The online training operation of the digital layer only updates the digital layer of the pre-deployed mixed-signal neural network in the target in-memory computing chip, while freezing the weight parameters of the analog layer.

[0045] In its implementation, this embodiment can determine whether the accumulated running time has reached the trigger point. When the accumulated running time of the on-chip timer reaches this point, it is determined that the drift is too large, triggering online training of the digital layer on the chip. After this compensation is completed, the timer is reset, thus forming a self-maintenance process of "monitoring-timing-triggering-compensation" that repeats continuously. This mechanism does not require continuous online drift inference; it only starts a lightweight training once when the threshold is reached, resulting in low overhead.

[0046] Furthermore, since the drift standard deviation increases logarithmically over time and the rate of increase gradually slows down, after compensation is completed, the next trigger time can be dynamically calculated by the drift model based on the total accumulated running time, rather than using a fixed interval, thereby avoiding excessively frequent triggers in the later stages and further reducing maintenance costs.

[0047] It should be noted that after triggering online training of the digital layer, online training is only performed on the digital layer in the trainable digital compensation module: the analog backbone weights are kept frozen and the analog devices are not reprogrammed, thereby avoiding repeated writes that accelerate device aging and restoring the accuracy loss caused by drift to a level close to that of the ideal digital network online.

[0048] It should be noted that in actual implementation, in addition to using the logarithmic time model, those skilled in the art can also use periodic accuracy sampling, error statistics or other degradation models as the triggering basis for drift monitoring. The trigger can be timed triggering, threshold triggering or a combination of both, and no specific limitation is made here.

[0049] In summary, the embodiments of this application can measure the drift of device conductance over time on a real chip, using the standard deviation of the logarithmic change in conductance std(ln G_t). The drift degree is characterized by ln G_{t=0}), and the drift model specific to the chip is obtained by fitting coefficients a and b according to the logarithmic relationship between std = a·log10(T) + b with the running time T. Secondly, in the embodiments of this application, an on-chip timer can be set. When the accumulated running time reaches the moment when the standard deviation exceeds the preset threshold, online training of the digital layer on the chip is triggered, thereby restoring the accuracy online without reprogramming the analog device.

[0050] It is understood that the embodiments of this application can fit the device drift velocity on a real chip and trigger lightweight online training of the digital layer with an on-chip timer when the drift exceeds a threshold. Only the digital layer is updated without reprogramming the analog device, which avoids the damage to the device lifespan caused by repeated writing and can restore the accuracy that has decreased over time to a level close to that of an ideal digital network. This solves the shortcomings of offline on-time switching, in-situ reprogramming, and static calibration schemes. In addition, the embodiments of this application can perform lightweight online maintenance directly on the edge chip without relying on an external high-performance processor.

[0051] The online compensation method for in-memory computing device drift proposed in this application involves periodically measuring the device drift of the target in-memory computing chip to obtain corresponding measured data. A target drift model corresponding to the target in-memory computing chip is fitted based on the measured data, and the trigger time when the measured data reaches a pre-calibrated drift threshold is calculated based on the target drift model. The cumulative running time of the target in-memory computing chip is calculated using a preset on-chip timer, and it is determined whether the cumulative running time has reached the trigger time. In response to the cumulative running time reaching the trigger time, an online training operation of the digital layer is triggered. After training, the on-chip timer is reset, and the next trigger time is recalculated using the target drift model based on the new cumulative running time of the on-chip timer. This application has low computational overhead and can be completed autonomously on an edge chip, significantly enhancing the robustness, stability, and maintainability of the system in long-term deployment scenarios, and has significant engineering practical value.

[0052] Secondly, with reference to the accompanying drawings, an online compensation device for in-memory computing device drift according to an embodiment of this application is described.

[0053] Figure 3 This is a block diagram of an online compensation device for in-memory computing device drift according to an embodiment of this application.

[0054] like Figure 3 As shown, the online compensation device 10 for in-memory computing device drift includes: a measurement module 100, a calculation module 200, and a compensation module 300.

[0055] Among them, the measurement module 100 is used to periodically measure the device drift of the target memory computing chip in order to obtain the corresponding measurement data; The calculation module 200 is used to fit the target drift model corresponding to the target in-memory computing chip based on the measured data, and to calculate the trigger time when the measured data reaches the pre-calibrated drift threshold based on the target drift model. The compensation module 300 is used to calculate the cumulative running time of the target in-memory computing chip through a preset on-chip timer, and to determine whether the cumulative running time has reached the trigger time. In response to the cumulative running time reaching the trigger time, it triggers the digital layer online training operation, and after the training is completed, it resets the on-chip timer and uses the target drift model to recalculate the next trigger time based on the new cumulative running time of the on-chip timer.

[0056] Optionally, in one embodiment of this application, the measurement module 100 includes: a statistics unit, used to reserve a set of reference units in the target memory computing chip that do not participate in network computing, to program the reference units to each initial conductance state during deployment, to periodically read out the conductance of the reference units after deployment, and to calculate the standard deviation of the logarithmic change of conductance under each initial state, and to determine the measured data based on the standard deviation.

[0057] Optionally, in one embodiment of this application, the calculation module 200 includes: a fitting unit, a calibration unit, and a determination unit.

[0058] The fitting unit is used to fit multiple target coefficients based on the logarithmic relationship between measured data and running time to obtain the target drift model corresponding to the target in-memory computing chip.

[0059] The calibration unit is used to calibrate the standard deviation of weight drift to meet the preset accuracy requirements before deploying the current neural network task in the target in-memory computing chip, and to use the standard deviation of weight drift as the drift threshold and write the drift threshold into the target in-memory computing chip.

[0060] The determination unit is used to calculate the running time required for the measured data to reach the drift threshold based on the target drift model, and to determine the trigger time corresponding to the running time.

[0061] Optionally, in one embodiment of this application, the compensation module 300 includes a judgment unit and a reset unit.

[0062] The judgment unit is used to calculate the cumulative running time of the target memory computing chip using the on-chip timer, and to determine whether the cumulative running time has reached the trigger time.

[0063] The reset unit is used to determine that the device drift is too large when the cumulative running time reaches the trigger time, trigger the online training operation of the digital layer on the target in-memory computing chip, and reset the on-chip timer after the online training is completed. The online training operation of the digital layer only updates the digital layer of the pre-deployed mixed-signal neural network in the target in-memory computing chip, while freezing the weight parameters of the analog layer.

[0064] It should be noted that the explanation of the above-described embodiment of the online compensation method for in-memory computing device drift also applies to the online compensation device for in-memory computing device drift in this embodiment, and will not be repeated here.

[0065] The online compensation device for in-memory computing device drift proposed in this application includes a measurement module 100 for periodically measuring the device drift of a target in-memory computing chip to obtain corresponding measurement data; a calculation module 200 for fitting a target drift model corresponding to the target in-memory computing chip based on the measurement data, and calculating the trigger time when the measurement data reaches a pre-calibrated drift threshold based on the target drift model; and a compensation module 300 for calculating the cumulative running time of the target in-memory computing chip using a preset on-chip timer, determining whether the cumulative running time has reached the trigger time, triggering an online training operation of the digital layer when the cumulative running time reaches the trigger time, resetting the on-chip timer after training, and recalculating the next trigger time using the target drift model based on the new cumulative running time of the on-chip timer. This application has low computational overhead and can be completed autonomously on an edge chip, significantly enhancing the robustness, stability, and maintainability of the system in long-term deployment scenarios, and has significant engineering practical value.

[0066] Figure 4 A schematic diagram of the structure of an electronic device provided in an embodiment of this application. The electronic device may include: The memory 401, the processor 402, and the computer program stored on the memory 401 and capable of running on the processor 402.

[0067] When the processor 402 executes the program, it implements the online compensation method for in-memory computing device drift provided in the above embodiments.

[0068] Furthermore, electronic devices also include: Communication interface 403 is used for communication between memory 401 and processor 402.

[0069] The memory 401 is used to store computer programs that can run on the processor 402.

[0070] Memory 401 may include high-speed RAM memory, and may also include non-volatile memory, such as at least one disk storage device.

[0071] If the memory 401, processor 402, and communication interface 403 are implemented independently, then the communication interface 403, memory 401, and processor 402 can be interconnected via a bus to complete communication between them. The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus, etc. Buses can be categorized as address buses, data buses, control buses, etc. For ease of representation, Figure 4 The bus is represented by a single thick line, but this does not mean that there is only one bus or one type of bus.

[0072] Optionally, in a specific implementation, if the memory 401, processor 402, and communication interface 403 are integrated on a single chip, then the memory 401, processor 402, and communication interface 403 can communicate with each other through an internal interface.

[0073] Processor 402 may be a central processing unit (CPU), an application specific integrated circuit (ASIC), or one or more integrated circuits configured to implement the embodiments of this application.

[0074] This application also provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the above-described online compensation method for in-memory computing device drift.

[0075] This application also provides a computer program product, including a computer program, which, when executed, is used to implement the above-described online compensation method for in-memory computing device drift.

[0076] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0077] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "N" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0078] Any process or method described in the flowchart or otherwise herein can be understood as representing a module, segment, or portion of code comprising one or N executable instructions for implementing custom logic functions or processes, and the scope of the preferred embodiments of this application includes additional implementations in which functions may be performed not in the order shown or discussed, including substantially simultaneously or in reverse order depending on the functions involved, as should be understood by those skilled in the art to which embodiments of this application pertain.

[0079] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (such as a computer-based system, a processor-included system, or other system that can fetch and execute instructions from, an instruction execution system, apparatus, or device). For the purposes of this specification, "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transmit programs for use by, or in conjunction with, an instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of computer-readable media include: an electrical connection having one or more wires (electronic device), a portable computer disk drive (magnetic device), random access memory (RAM), read-only memory (ROM), erasable and editable read-only memory (EPROM or flash memory), fiber optic devices, and portable optical disc read-only memory (CDROM). Alternatively, the computer-readable medium may be paper or other suitable media on which the program can be printed, since the program can be obtained electronically by optically scanning the paper or other medium, followed by editing, interpreting, or otherwise processing as necessary, and then stored in a computer memory.

[0080] It should be understood that the various parts of this application can be implemented using hardware, software, firmware, or a combination thereof. In the above embodiments, the N steps or methods can be implemented using software or firmware stored in memory and executed by a suitable instruction execution system. If implemented in hardware, as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.

[0081] Those skilled in the art will understand that all or part of the steps of the methods in the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, the program includes one or a combination of the steps of the method embodiments.

[0082] Furthermore, the functional units in the various embodiments of this application can be integrated into a processing module, or each unit can exist physically separately, or two or more units can be integrated into a module. The integrated module can be implemented in hardware or as a software functional module. If the integrated module is implemented as a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium.

[0083] The storage medium mentioned above can be a read-only memory, a disk, or an optical disk, etc. Although embodiments of this application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting this application. Those skilled in the art can make changes, modifications, substitutions, and variations to the above embodiments within the scope of this application.

Claims

1. An online compensation method for in-memory computing device drift, characterized in that, Includes the following steps: The device drift of the target in-memory computing chip is periodically measured to obtain the corresponding measured data; The target drift model corresponding to the target in-memory computing chip is fitted based on the measured data, and the trigger time when the measured data reaches the pre-calibrated drift threshold is calculated based on the target drift model. The cumulative running time of the target in-memory computing chip is calculated by a preset on-chip timer, and it is determined whether the cumulative running time has reached the trigger time. In response to the cumulative running time reaching the trigger time, the digital layer online training operation is triggered, and the on-chip timer is reset after the training is completed. The next trigger time is recalculated based on the new cumulative running time of the on-chip timer using the target drift model.

2. The online compensation method for in-memory computing device drift according to claim 1, characterized in that, The periodic measurement of the device drift of the target in-memory computing chip to obtain corresponding measured data includes: A set of reference cells that do not participate in network computation are reserved in the target in-memory computing chip. During deployment, the reference cells are programmed to each initial conductance state. After deployment, the conductance of the reference cells is periodically read out, and the standard deviation of the logarithmic change in conductance under each initial state is calculated. The measured data is determined based on the standard deviation.

3. The online compensation method for in-memory computing device drift according to claim 2, characterized in that, The step of fitting a target drift model corresponding to the target in-memory computing chip based on the measured data, and calculating the trigger time when the measured data reaches a pre-calibrated drift threshold based on the target drift model, includes: Based on the logarithmic relationship between the measured data and the running time, multiple target coefficients are fitted to obtain the target drift model corresponding to the target in-memory computing chip. Before deploying the current neural network task in the target in-memory computing chip, the standard deviation of weight drift that meets the preset accuracy requirements is calibrated, and the standard deviation of weight drift is used as the drift threshold, and the drift threshold is written into the target in-memory computing chip. The running time required for the measured data to reach the drift threshold is calculated based on the target drift model, and the trigger time corresponding to the running time is determined.

4. The online compensation method for in-memory computing device drift according to claim 3, characterized in that, The step of calculating the cumulative running time of the target in-memory computing chip using a preset on-chip timer, determining whether the cumulative running time has reached the trigger time, triggering a digital layer online training operation when the cumulative running time reaches the trigger time, and resetting the on-chip timer after training is completed includes: The on-chip timer is used to calculate the cumulative running time of the target in-memory computing chip, and it is determined whether the cumulative running time has reached the trigger time; If the cumulative running time reaches the trigger time, it is determined that the device drift is too large, triggering an online training operation on the digital layer on the target in-memory computing chip, and resetting the on-chip timer after the online training is completed. The online training operation of the digital layer only updates the digital layer of the pre-deployed mixed-signal neural network in the target in-memory computing chip, while freezing the weight parameters of the analog layer.

5. An online compensation device for in-memory computing device drift, characterized in that, include: The measurement module is used to periodically measure the device drift of the target in-memory computing chip in order to obtain the corresponding measurement data; The estimation module is used to fit the target drift model corresponding to the target in-memory computing chip according to the measured data, and based on the target drift model, to estimate the trigger time when the measured data reaches a pre-calibrated drift threshold. The compensation module is used to calculate the cumulative running time of the target in-memory computing chip through a preset on-chip timer, and determine whether the cumulative running time has reached the trigger time. In response to the cumulative running time reaching the trigger time, the module triggers the digital layer online training operation, and resets the on-chip timer after training is completed. The module then uses the target drift model to recalculate the next trigger time based on the new cumulative running time of the on-chip timer.

6. The online compensation device for in-memory computing device drift according to claim 5, characterized in that, The actual measurement module includes: A statistical unit is used to reserve a set of reference units in the target in-memory computing chip that do not participate in network computing. During deployment, the reference units are programmed to each initial conductance state. After deployment, the conductance of the reference units is read out periodically, and the standard deviation of the logarithmic change in conductance under each initial state is calculated. The measured data is determined based on the standard deviation.

7. The online compensation device for in-memory computing device drift according to claim 6, characterized in that, The calculation module includes: The fitting unit is used to fit multiple target coefficients based on the logarithmic relationship between the measured data and the running time, so as to obtain the target drift model corresponding to the target in-memory computing chip. The calibration unit is used to calibrate the standard deviation of weight drift that meets the preset accuracy requirements before deploying the current neural network task in the target in-memory computing chip, and to use the standard deviation of weight drift as the drift threshold and write the drift threshold into the target in-memory computing chip. The determining unit is used to calculate the running time required for the measured data to reach the drift threshold based on the target drift model, and to determine the trigger time corresponding to the running time.

8. An electronic device, characterized in that, include: A memory, a processor, and a computer program stored in the memory and executable on the processor, the processor executing the program to implement the online compensation method for in-memory computing device drift as described in any one of claims 1-4.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, The program is executed by the processor to implement the online compensation method for in-memory computing device drift as described in any one of claims 1-4.

10. A computer program product, comprising a computer program, characterized in that, The computer program is executed to implement the online compensation method for in-memory computing device drift as described in any one of claims 1-4.

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