Series compensation transformer secondary side solid state bypass anti-magnetic impact system and adaptive switching method

Abstract

This application relates to the field of AC voltage regulator technology, specifically to a solid-state bypass anti-magnetic shock system and adaptive switching method for the secondary side of a series compensation transformer. The system includes a compensation transformer, whose primary winding is connected in series to the main power circuit; a secondary bypass main channel, consisting of two N-channel MOSFETs Q1 and Q2 connected back-to-back in series as a bidirectional switch, connected to both ends of the secondary winding; and a nonlinear anti-magnetic shock drive network with a command input terminal, a drive output terminal, and a floating reference terminal. The drive output terminal is coupled to the common gate terminal of Q1 and Q2, and the floating reference terminal is coupled to the high-voltage terminal of the secondary winding to provide a reference potential. The nonlinear anti-magnetic shock drive network includes an adaptive Miller plateau extension circuit to extend the conduction time of Q1 and Q2 so that they operate in the linear amplification region; and a high-frequency inductive self-locking protection circuit that injects reverse induced charge into the common source terminal to raise the source potential when magnetic saturation precursors appear, forming a negative feedback clamp on the gate-source voltage.

Description

Technical Field

[0001] This application relates to the field of AC voltage regulator technology, specifically to a solid-state bypass anti-magnetic shock system for the secondary side of a series compensation transformer and an adaptive switching method. Background Technology

[0002] In series-connected electromagnetic compensation AC voltage regulators, when the grid voltage is within the normal range, the compensation transformer needs to be bypassed to reduce system losses. Existing bypass schemes typically involve connecting a mechanical relay in series with the primary winding of the transformer, utilizing its low on-resistance to achieve bypass. However, mechanical relays have inherent drawbacks such as slow operating speed, limited electrical life, and the presence of arcing during conduction.

[0003] To overcome the above-mentioned defects, a technology has emerged in the field that uses semiconductor solid-state switches (such as MOSFETs) for direct short-circuit bypass on the secondary side of transformers, in order to reduce conduction losses and improve switching life by utilizing the high-speed switching characteristics and contactless advantages of solid-state devices.

[0004] However, this solution faces a serious physical bottleneck: when the main circuit carries a large inductive load, if the solid-state switch turns on instantaneously at a non-zero-crossing point of the AC voltage, the secondary winding is equivalent to a momentary short circuit. Due to the leakage inductance between the primary and secondary sides of the transformer, the secondary short circuit will hinder the abrupt change in the primary magnetic flux, causing a significant unidirectional DC bias component inside the core. This DC bias will push the core into a deep saturation region within milliseconds, causing a sharp drop in the equivalent excitation impedance of the primary side. Under this condition, a destructive inrush current with an amplitude of several thousand amperes will be generated on the AC grid side, which is sufficient to burn out the primary main circuit protection components or trigger the protection action of the upstream switch of the grid.

[0005] To address the aforementioned issues, existing technologies employ two main strategies: First, at the design level, avoid using solid-state hard short-circuit bypass schemes on the secondary side of the compensation transformer, instead using primary-side mechanical relays or secondary-side series inductors to limit short-circuit current; second, rely on high-precision, ultra-high-speed digital signal processors to perform complex flux reset calculations and accurate zero-crossing predictions, aiming to complete the switching action near the voltage zero-crossing point. However, the former strategy sacrifices the speed and lifespan advantages of solid-state switches, while the latter strategy suffers from low overall system reliability due to the complexity of software algorithms, high dependence on crystal oscillator clocks, and potential issues such as program crashes or interrupt response delays. Summary of the Invention

[0006] This specification describes a series compensation transformer secondary solid-state bypass anti-magnetic shock system and adaptive switching method through several embodiments.

[0007] In one aspect, embodiments of this specification provide a solid-state bypass anti-magnetic shock system for the secondary side of a series compensation transformer, comprising a compensation transformer whose primary winding is connected in series in the main power circuit.

[0008] The secondary bypass main channel consists of a bidirectional switch composed of two N-channel MOSFETs Q1 and Q2 connected back-to-back in series, which is connected to both ends of the secondary winding of the compensation transformer.

[0009] A nonlinear antimagnetic shock drive network has an instruction input terminal, a drive output terminal, and a floating reference terminal. The instruction input terminal is coupled to an external bypass instruction terminal to receive a bypass trigger signal. The drive output terminal is coupled to the common gate terminal of Q1 and Q2 to output an extended gate drive voltage. The floating reference terminal is coupled to the high-voltage terminal of the secondary winding to provide a reference potential node.

[0010] The nonlinear antimagnetic shock drive network also includes:

[0011] An adaptive Miller platform extension circuit, which provides an extended gate drive voltage, is connected in series between the common gate terminal of Q1 and Q2 and the instruction input terminal to extend the conduction time of Q1 and Q2, so that Q1 and Q2 operate in the linear amplification region during conduction.

[0012] A high-frequency inductive self-locking protection circuit is connected in parallel across the secondary winding. When magnetic saturation precursor characteristics appear, it injects reverse induced charge into the common source terminals of Q1 and Q2 to raise the source potential and form a negative feedback clamp on the gate-source voltage.

[0013] Secondly, this specification provides an adaptive switching method for solid-state bypass on the secondary side of a series compensation transformer, applied to the aforementioned anti-magnetic shock system for solid-state bypass on the secondary side of a series compensation transformer, comprising the following steps:

[0014] Step 1: When the mains voltage is within the normal range, block the PWM output of the H-bridge converter connected in parallel across the secondary winding.

[0015] Step 2: Apply a bypass command signal to the nonlinear antimagnetic shock drive network;

[0016] Step 3: The adaptive Miller platform extension circuit extends the conduction time of Q1 and Q2, so that Q1 and Q2 exhibit a dynamic impedance gradient decreasing from large to small in the linear amplification region, and the voltage across the secondary winding decreases continuously to zero.

[0017] Step 4: During the dynamic impedance gradient descent, the leakage inductance energy of the transformer primary and secondary sides is smoothly consumed in the channel resistance of Q1 and Q2 as heat energy, and the core flux returns to zero without a step change.

[0018] Step 5: If a high-frequency harmonic abrupt change occurs due to the precursor of magnetic saturation during the conduction of Q1 and Q2, the high-frequency induction self-locking protection circuit is turned on instantaneously, injecting reverse induced charge into the common source terminals of Q1 and Q2 to raise the source potential, implementing negative feedback clamping on the gate-source voltage, and preventing the current from soaring disorderly.

[0019] Step 6: Q1 and Q2 enter the fully conducting state, and the secondary winding forms a short-circuit bypass.

[0020] The beneficial effects of the technical solutions provided in some embodiments of this specification include at least the following:

[0021] In several embodiments of this specification, the secondary-side solid-state bypass anti-magnetic shock system and adaptive switching method provided directly overcome the technical problem that the secondary side of the series compensation transformer cannot be directly subjected to solid-state hard short circuit. By realizing a passive nonlinear magnetic flux reset and charge pumping network between the driving gate of the back-to-back MOSFET bypass switch on the secondary side and the main circuit.

[0022] Without the need for microprocessor (MCU / DSP) intervention, the circuit, composed of passive electronic components, cleverly utilizes the parasitic capacitance effect of semiconductor devices in the amplification region within the microsecond-level transition band of solid-state switch conduction. This adaptively absorbs and cancels leakage inductance energy, achieving "zero-impact" forced reset of the transformer core flux. Consequently, the system can complete secondary side short-circuit bypass at any load condition, effectively eliminating inrush current and significantly reducing heat generation.

[0023] Other features and advantages of various embodiments of this specification will be further revealed in the following detailed description and accompanying drawings. Attached Figure Description

[0024] To more clearly illustrate the technical solutions in the embodiments of this specification, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this specification. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0025] Figure 1 This is a schematic diagram of the solid-state bypass anti-magnetic shock system provided in this manual.

[0026] Figure 2 This is a flowchart illustrating the adaptive switching method provided in this specification. Detailed Implementation

[0027] The technical solutions of the embodiments of this specification will be explained and described below with reference to the accompanying drawings. However, the following embodiments are only preferred embodiments of this specification and not all of them. Other embodiments obtained by those skilled in the art based on the embodiments in the implementation methods without creative effort are all within the protection scope of this specification.

[0028] The terms "first," "second," "third," etc., in the description, claims, and accompanying drawings are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to such processes, methods, products, or apparatus.

[0029] In the following description, terms such as “inner,” “outer,” “upper,” “lower,” “left,” and “right” are used only to facilitate the description of the embodiments and to simplify the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this specification.

[0030] Before introducing the technical solutions described in this manual, the application scenarios and related technologies of the technical solutions will be introduced.

[0031] Series compensation transformers are typically used as AC voltage stabilizers with series compensation. In countries or regions where the mains voltage is unstable, series compensation voltage stabilizers are needed to ensure electricity supply for households or industries.

[0032] In countries and regions with weak power grid infrastructure, mains voltage fluctuations are frequent and significant. Situations ranging from as low as 150V to as high as 280V are not uncommon. With the increasing prevalence of household appliances, electricity loads have increased dramatically, especially during peak hours when grid voltage is severely low, causing appliances such as air conditioners and refrigerators to fail to start or operate normally. In these scenarios, series voltage regulators become an effective means of ensuring normal household electricity supply.

[0033] The series compensation transformer is the core component of a series-compensated AC voltage regulator. The regulator works by superimposing an adjustable-amplitude, variable-polarity compensation voltage in series with the mains voltage. When the mains voltage fluctuates, the magnitude and direction of the compensation voltage are adjusted to maintain a stable output voltage to the load. Compared to traditional reactive or ferromagnetic saturation voltage regulators, the series compensation scheme offers significant advantages in terms of transformer capacity, size, and weight.

[0034] A fundamental operating condition exists for series compensation transformers: when the grid voltage is within the normal range and no compensation is required, the transformer needs to be bypassed to reduce its own losses and improve the overall system efficiency. The choice of bypass method directly affects the performance and reliability of the voltage regulator.

[0035] Traditional solutions place mechanical relays on the primary side of the transformer, utilizing their extremely low on-resistance to achieve bypassing. However, the operating delay, arc erosion, and limited electrical life caused by mechanical contacts are becoming increasingly apparent in scenarios involving frequent switching or rapid response.

[0036] To overcome these limitations, a natural improvement is to introduce semiconductor solid-state switches on the secondary side of the transformer, utilizing their high-speed, contactless conduction characteristics to replace mechanical relays. However, when the main circuit carries a large inductive load, once the solid-state switch conducts at a non-zero-crossing point, the secondary winding is instantaneously short-circuited, leaving leakage inductance energy with nowhere to be released. This forces the core flux to generate a unidirectional bias component. This bias component causes the core to rapidly enter deep saturation, and the equivalent excitation impedance on the primary side drops sharply, ultimately inducing inrush currents with amplitudes of several thousand amperes on the grid side. In severe cases, this can burn out protective components or trigger the tripping of upstream protection.

[0037] Therefore, the industry generally takes a cautious approach to the solid-state hard short-circuit solution for the secondary side of the compensation transformer, and instead relies on high-precision DSPs to perform complex zero-crossing prediction and magnetic flux reset calculations to reduce the risk of impact. However, this introduces concerns about algorithm complexity and reliability.

[0038] Introduction to relevant professional terms:

[0039] Series:

[0040] This refers to connecting a component or device in series in the main power circuit so that its current is the same as the main circuit current, and its voltage is superimposed on the main circuit voltage. The primary side of a compensation transformer is connected in series between the power grid and the load; the compensation voltage it generates is directly superimposed on the grid voltage, thereby regulating the output voltage. It does not simply mean a series connection.

[0041] Series compensation transformer:

[0042] A series compensation transformer, short for "series-compensated transformer," is the core electromagnetic component in a series-compensated AC voltage regulator. Its structural features include: the primary side connected in series to the main power circuit, and the secondary side connected to a power converter (such as an H-bridge). When the grid voltage fluctuates, the control circuit injects a corresponding compensation current into the transformer through the secondary converter, inducing a compensation voltage with adjustable amplitude and variable polarity on the primary side. This compensation voltage, superimposed on the grid voltage in series, maintains a stable voltage output to the load. The essential difference between a series compensation transformer and a regular power transformer lies in their voltage level transformation: regular transformers are primarily used for voltage level conversion (e.g., 10kV / 380V), while series compensation transformers are mainly used to generate controllable compensation voltages. Their capacity is typically much smaller than the total load capacity, offering advantages such as small size and light weight.

[0043] Series compensation voltage regulator:

[0044] A series-compensated voltage regulator, also known as a series-compensated AC voltage regulator, is an AC voltage stabilizing device with a series compensation transformer as its core component. Its basic working principle is as follows: the primary winding of the series compensation transformer is connected in series between the power grid and the load. By adjusting the magnitude and polarity of the compensation voltage output from the secondary converter, a compensation voltage with the same amplitude but opposite direction to the power grid voltage fluctuation is generated on the primary winding of the series compensation transformer. After being superimposed on the power grid voltage, the voltage output to the load remains stable at the set value.

[0045] Miller Platform:

[0046] The Miller Plateau is an inherent physical phenomenon that occurs during the switching process of a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor).

[0047] The cause is the presence of parasitic capacitance within the MOSFET, specifically the Miller capacitance (Cgd) between the gate (G) and drain (D). When the gate drive voltage (Vgs) rises and the MOSFET begins to conduct, the drain-source voltage (Vds) starts to decrease. This rapid change in Vds generates a feedback current through the Miller capacitance Cgd. This current shunts the drive current, causing the gate-source voltage (Vgs) to almost stop rising for a period of time, forming an approximately horizontal "plateau." Physically, measuring the MOSFET's gate-source voltage Vgs with an oscilloscope reveals a plateau or trough during the voltage rise; this is the Miller plateau. The Miller plateau is a typical indicator of a MOSFET operating in the linear amplification region (saturation region). During the Miller plateau period, the MOSFET operates in the linear amplification region, its channel exhibits controllable dynamic resistance characteristics, and the drain-source voltage (Vds) and drain current (Id) coexist, resulting in significant conduction losses.

[0048] This application proactively utilizes this "plateau period" by artificially extending the Miller plateau to the microsecond level (e.g., 2.5 μs) through external circuitry. This allows the MOSFET to remain in the linear amplification region for a sufficiently long time, smoothly dissipating the transformer leakage inductance energy in the form of dynamic resistance, thereby achieving "zero-impact" reset of the core flux. This is in stark contrast to the traditional design approach of "avoiding the Miller effect as much as possible to reduce switching losses," and is one of the core innovative ideas of this invention.

[0049] Specifically, this specification provides a solid-state bypass anti-magnetic shock system for the secondary side of a series compensation transformer and an adaptive switching method.

[0050] Its main technical contribution lies in realizing a passive nonlinear flux reset and charge gradual pumping network, which greatly avoids inrush current.

[0051] This circuit, composed of passive electronic components, achieves extremely high stability and response speed without the need for microprocessor (MCU / DSP) intervention. Within the microsecond-level transition band of solid-state switch conduction, it adaptively and gradually absorbs and cancels leakage inductance energy, realizing "zero-impact" forced reset of the transformer core flux and effectively suppressing the generation of inrush current.

[0052] For details, please refer to the appendix. Figure 1 This embodiment first provides a solid-state bypass anti-magnetic shock system for the secondary side of a series compensation transformer, including a compensation transformer whose primary winding is connected in series to the main power circuit;

[0053] The secondary bypass main channel includes a bidirectional switch consisting of two N-channel MOSFETs Q1 and Q2 connected back-to-back in series, which is connected to both ends of the secondary winding.

[0054] The nonlinear antimagnetic shock drive network has a command input terminal, a drive output terminal, and a floating reference terminal. The command input terminal is coupled to an external bypass command terminal to receive a bypass trigger signal. The drive output terminal is coupled to the common gate terminal of Q1 and Q2 to output an extended gate drive voltage. The floating reference terminal is coupled to the high-voltage terminal of the secondary winding to provide a reference potential node.

[0055] The common-source structure of two MOSFETs connected in reverse series enables this bidirectional switch to block voltages in both forward and reverse directions, while allowing current to flow in both directions when on, thus achieving bidirectional short-circuit bypass of the secondary winding AC circuit. Since the common source of Q1 and Q2 is connected in the secondary winding circuit, their source potential changes periodically with the AC voltage of the secondary winding. Therefore, the drive circuit must adopt a floating reference ground design, with the reference potential of the drive signal floating with the source potential to ensure effective control of the gate-source voltage (Vgs). The secondary side of the series compensation transformer is also connected to a filter capacitor C_f and a filter inductor L_f, which can be selected and connected using techniques already disclosed in the art. Other auxiliary components disclosed in the art can be set as needed according to known techniques, and will not be elaborated here. In this embodiment, the H-bridge converter uses a bidirectional full-bridge H-bridge converter, such as an H-bridge composed of 8 IGBTs. Other H-bridges or other power-controllable circuits disclosed in the art can be used, and this invention does not impose any rigid limitations on this.

[0056] The core of this embodiment is that the nonlinear antimagnetic shock drive network further includes an adaptive Miller platform extension circuit and a high-frequency induction self-locking protection circuit.

[0057] The nonlinear antimagnetic shock drive network further includes:

[0058] An adaptive Miller platform extension circuit, which provides an extended gate drive voltage, is connected in series between the common gate terminal of Q1 and Q2 and the instruction input terminal to extend the conduction time of Q1 and Q2, so that Q1 and Q2 operate in the linear amplification region during conduction.

[0059] A high-frequency inductive self-locking protection circuit is connected in parallel across the secondary winding. When magnetic saturation precursor characteristics appear, it injects reverse induced charge into the common source terminals of Q1 and Q2 to raise the source potential and form a negative feedback clamp on the gate-source voltage.

[0060] The adaptive Miller platform extension circuit includes:

[0061] A fast-start diode D1 is connected in series between the common gate terminal of Q1 and Q2 and the instruction input terminal, and the anode of the fast-start diode D1 is connected to the instruction input terminal;

[0062] Two compensation capacitors are connected across the gate and drain of Q1 and Q2, respectively. These capacitors are labeled C_miller in the attached diagram. An adaptive Miller platform extension circuit is connected in series between the common gate of Q1 and Q2 and the instruction input. A fast-turn-on diode D1 is connected in series between the common gate and the instruction input, with its anode connected to the instruction input and its cathode connected to the common gate, ensuring that the bypass instruction signal (high level) can quickly establish a gate drive current path. Two compensation capacitors are connected across the gate and drain of Q1 and Q2 respectively: one capacitor between the gate and drain of Q1 and one capacitor between the gate and drain of Q2, forming an external Miller capacitance multiplication network.

[0063] Its working principle is as follows: When the bypass command signal (high level) arrives, the drive current flows into the common gate terminal of Q1 and Q2 through the fast turn-on diode D1, starting to charge the gate-source capacitance, and the gate-source voltage Vgs gradually rises. When Vgs rises to the MOSFET's turn-on threshold voltage, Q1 and Q2 begin to conduct, and the drain-source voltage Vds begins to decrease. At this time, the rapid change in Vds generates a feedback current through the externally connected C_miller and the device's own parasitic Miller capacitance Cgd. This feedback current flows from the drain through the capacitor to the gate, in the opposite direction to the drive current, diverting part of the drive current, causing the rise rate of the gate-source voltage Vgs to slow down significantly. It may even almost stop for a period of time, forming a significantly elongated Miller plateau. In conventional MOSFET drive circuits, the Miller plateau usually lasts for tens to hundreds of nanoseconds before naturally ending, and Q1 and Q2 then enter the fully conducting state (variable resistance region), and Vds drops to an extremely low voltage in the millivolt range.

[0064] In this embodiment, by adding an external compensation capacitor C_miller to the platform, the total capacitance of the Miller capacitor (C_miller + Cgd) is artificially increased, resulting in an increased feedback current and a significantly extended plateau period of over 2 microseconds (μs). Preferably, in this embodiment, it is set to 2.5 μs.

[0065] It is worth emphasizing that it is this Miller plateau period, precisely extended to the microsecond level, that allows Q1 and Q2 to operate in the linear amplification region. Within this region, the MOSFET's channel resistance Rds exhibits controlled dynamic changes, smoothly transitioning from high impedance to low impedance.

[0066] Its advantages are:

[0067] Because the channel resistance is relatively high in the initial stage of conduction, the secondary winding is not instantaneously short-circuited, but rather the short-circuit process is completed through a smooth impedance gradient of "high resistance -> gradually decreasing -> low resistance". Within this 2.5μs dynamic impedance gradient window, the energy stored in the leakage inductance L_k of the transformer's primary and secondary sides is absorbed and consumed as heat by the MOSFET channel resistance, allowing the core flux to return to zero smoothly, thus completely avoiding DC bias and inrush current caused by a sudden change in flux.

[0068] It should be noted that the value of "above 2μs" is based on a comprehensive optimization of the power MOSFET channel thermal tolerance and the transformer leakage inductance energy dissipation time constant. If the extension time is too short (e.g., less than 1μs), the leakage inductance energy cannot be fully consumed within the Miller plateau period, and Q1 and Q2 enter the fully conducting state too early (Rds is extremely low), causing the secondary side to still exhibit an approximate hard short circuit. The step component of the core flux is not completely suppressed, and the anti-magnetic shock effect is significantly degraded. If the extension time is too long (e.g., more than 5μs), the MOSFET's conduction loss in the amplification region (the product of the channel resistance Rds and the square of the drain current Id, i.e., P_loss = Id) will increase. 2 If the duration of the ×Rds operation is too long, even if the transient junction temperatures of Q1 and Q2 remain within a safe range, repeated operation over a long period will lead to increased heat accumulation and shortened lifespan of the device. As an example, when the extension time is 2.5μs, the peak value of the primary-side inrush current of a 5kVA series-compensated voltage regulator is reduced from approximately 2800A to below approximately 120A, and the maximum deviation of the core flux density is reduced from 1.7T to less than 0.05T, achieving excellent suppression effect.

[0069] Furthermore, the adaptive Miller platform extension circuit is an asymmetrical positive and negative temperature coefficient RC voltage-controlled network;

[0070] The fast turn-on diode D1 and the compensation capacitor have opposite temperature coefficients, which are used to compensate each other when the temperature changes, so that the conduction delay time of Q1 and Q2 is stable.

[0071] The fast turn-on diode D1 and the compensation capacitor C_miller have opposite temperature coefficients, which are used to compensate each other when the temperature changes, so as to ensure the temperature stability of the conduction delay time.

[0072] Specifically, the forward voltage drop of the PN junction of a fast turn-on diode D1 (such as 1N4148 or similar high-speed switching diodes) has a negative temperature coefficient (typically about -2mV / ℃). When the ambient temperature rises, its forward voltage drop decreases, the gate drive current increases slightly, and it tends to shorten the gate charging time.

[0073] The compensation capacitor C_miller uses a capacitor dielectric with a positive temperature coefficient. Its capacitance increases slightly as the temperature rises, which enhances Miller feedback and tends to prolong the Miller plateau time.

[0074] In practical implementation, P-group temperature-compensated Class I ceramic capacitors (such as P100, P150, and P850 materials, with temperature coefficients of +100ppm / ℃, +150ppm / ℃, and +850ppm / ℃, respectively) are selected. Alternatively, an equivalent positive temperature coefficient capacitor network can be constructed by connecting a conventional C0G / NP0 ceramic capacitor in series with a linear PTC thermistor. When the ambient temperature rises, the diode forward voltage drop decreases (charging accelerates), while the capacitance of the positive temperature coefficient capacitor increases accordingly (Miller feedback is enhanced, pulling the charging process). The two factors perfectly cancel each other out, ensuring that the 2.5μs Miller extension plateau does not drift within the range of -40℃ to +125℃.

[0075] The synergistic effect of these two components forms a temperature self-compensation mechanism, ensuring that even within a wide temperature range of -40℃ to +125℃, the conduction delay time of Q1 and Q2 remains stable within an accuracy range of 2.5μs ± 5%, without relying on any temperature sensor or software calibration algorithm. This results in extremely high stability and response speed.

[0076] On the other hand, the high-frequency induction self-locking protection circuit includes a differential capacitor Cdiff and a transient voltage suppressor TVS connected in series. The branch formed by the differential capacitor Cdiff and the transient voltage suppressor TVS is connected in parallel across the secondary winding.

[0077] It is worth noting that:

[0078] The high-frequency inductive self-locking protection circuit includes a differential capacitor Cdiff and a transient voltage suppressor (TVS) connected in series. Neither the differential capacitor Cdiff nor the TVS is shown in the attached diagram; the series branch formed by them is connected in parallel across the secondary winding. When the system is under extreme load conditions, even after the aforementioned Miller plateau extension, if the core still exhibits weak precursors to magnetic saturation, the core magnetic flux approaching saturation will excite high-frequency harmonic spike voltages across the secondary winding.

[0079] The high-frequency component is coupled to the TVS terminals via the differential capacitor Cdiff. Once the peak voltage amplitude reaches the TVS breakdown voltage (e.g., a bidirectional TVS with a breakdown voltage of 15V is used in this embodiment), the TVS instantly avalanche conducts, directly drawing the reverse induced charge on the secondary winding and injecting it into the common source terminals of Q1 and Q2, instantaneously raising the source potential and forming a negative feedback clamp on the gate-source voltage Vgs. That is, the increase in source potential means a decrease in effective Vgs (i.e., the difference between the gate potential and the source potential), thereby preventing the channel current of Q1 and Q2 from spikeing disorderly, cutting off the positive feedback chain of magnetic saturation self-excitation, and ensuring reliable system operation. The response time of the high-frequency inductive self-locking protection circuit is determined by the capacitance of the differential capacitor Cdiff and the junction capacitance of the TVS, typically in the nanosecond range, much faster than the interrupt response speed of any digital controller.

[0080] It also includes an independent isolated power supply, the output of which is coupled to the command input terminal, and the reference ground of which is coupled to the floating reference terminal to provide a drive voltage relative to the floating reference terminal.

[0081] Because Q1 and Q2 are connected back-to-back with a common source, their common source terminals are connected to the secondary winding circuit. Their potential changes periodically with the AC voltage of the secondary winding (i.e., this node is a "floating" node), and it is not a fixed reference ground (GND) on the circuit board. If a conventional non-isolated drive circuit (i.e., the reference ground is fixed to GND) is used, the reference ground of the drive signal will not match the source potentials of Q1 and Q2, failing to provide an effective and stable gate-source voltage (Vgs), and the MOSFETs will not be able to reliably turn on or off.

[0082] This embodiment uses an independent isolated power supply, whose reference ground is directly coupled to the floating reference terminal (i.e., the common source terminal of Q1 and Q2). The "0V" potential of the drive signal is always consistent with the source potential, thus ensuring that the high-level drive applied to the common gate terminal of Q1 and Q2 is always a definite positive voltage relative to the source, satisfying the condition for reliable MOSFET conduction. Simultaneously, electrical isolation is achieved between the primary and secondary sides of the isolated power supply through transformers or optocouplers, preventing interference between the drive-side control circuit (usually the low-voltage side, with GND as the reference ground) and the high-voltage floating side of the secondary side. This ensures control safety and avoids the high-voltage surge risk associated with a common ground. The independent isolated power supply ensures that regardless of the fluctuation of the AC potential of the secondary winding, the gate drive voltage output by the drive network is always accurately superimposed on the source potential, guaranteeing that Q1 and Q2 receive a correct and stable gate drive signal at all times.

[0083] On the other hand, this specification provides an adaptive switching method for the solid-state bypass on the secondary side of a series compensation transformer, applied to the aforementioned anti-magnetic shock system with solid-state bypass on the secondary side of a series compensation transformer, comprising the following steps:

[0084] Step 1: When the mains voltage is within the normal range, block the PWM output of the H-bridge converter connected in parallel across the secondary winding.

[0085] Step 2: Apply a bypass command signal to the nonlinear antimagnetic shock drive network;

[0086] Step 3: The adaptive Miller platform extension circuit extends the conduction time of Q1 and Q2, so that Q1 and Q2 exhibit a dynamic impedance gradient decreasing from large to small in the linear amplification region, and the voltage across the secondary winding decreases continuously to zero.

[0087] Step 4: During the dynamic impedance gradient descent, the leakage inductance energy of the transformer primary and secondary sides is smoothly consumed in the channel resistance of Q1 and Q2 as heat energy, and the core flux returns to zero without a step change.

[0088] Step 5: If a high-frequency harmonic abrupt change occurs due to the precursor of magnetic saturation during the conduction of Q1 and Q2, the high-frequency induction self-locking protection circuit is turned on instantaneously, injecting reverse induced charge into the common source terminals of Q1 and Q2 to raise the source potential, implementing negative feedback clamping on the gate-source voltage, and preventing the current from soaring disorderly.

[0089] Step 6: Q1 and Q2 enter the fully conducting state, and the secondary winding forms a short-circuit bypass.

[0090] When the mains voltage is within the normal range, the voltage regulator does not require voltage compensation. In this case, the PWM output of the H-bridge converter connected in parallel across the secondary winding is first blocked, putting all power switches in the H-bridge in the off state. The H-bridge converter stops injecting compensation current into the secondary winding, which is in a high-impedance state, creating the preconditions for subsequent solid-state bypass operation. Conversely, if the H-bridge switches are still in high-frequency switching mode and bypass is performed directly, the H-bridge output may form a short-circuit loop with the bypass channel, causing device damage.

[0091] After the H-bridge PWM is completely blocked, a bypass command signal (active high) is applied to the command input of the nonlinear anti-magnetic shock drive network. This command signal can be triggered by a host computer, logic control circuit, or a simple hardware button, without requiring precise timing control or zero-crossing control. The command signal is applied to the input of the adaptive Miller platform extension circuit, preparing to start the conduction process of the secondary bypass main channel.

[0092] Upon arrival of the command signal, the adaptive Miller plateau extension circuit begins to operate. Drive current flows through the fast-turn-on diode D1 into the common gate of Q1 and Q2, charging the gate-source capacitance. Since the compensation capacitor C_miller is connected between the gate and drain, the decrease in drain-source voltage Vds when the MOSFET is turned on generates a Miller feedback current through C_miller. This current shunts the drive current, significantly slowing the rise rate of the gate-source voltage Vgs, thus extending the MOSFET's Miller plateau period to over 2 microseconds.

[0093] During this extension, Q1 and Q2 do not quickly cross the linear amplification region to enter the fully conducting state as in conventional applications, but are forced to operate in the linear amplification region.

[0094] Within the linear amplification region, the channel resistance Rds of the MOSFET is precisely controlled by the gate-source voltage Vgs:

[0095] (1) In the initial stage, Vgs just exceeds the turn-on threshold, the channel resistance is large, and the voltage across the secondary winding has not yet been pulled down.

[0096] (2) As the gate charge continues to accumulate, Vgs rises slowly, the channel resistance gradually decreases, and the voltage across the secondary winding decreases continuously until it approaches zero.

[0097] During the process, the bidirectional switch composed of Q1 and Q2 exhibits a monotonically smooth decrease from high impedance to low impedance, without any abrupt changes or jumps. The dynamic impedance gradient decreases monotonically and smoothly, the voltage across the secondary winding continuously decreases to zero over time, and the rate of change of magnetic flux does not exhibit any abrupt changes.

[0098] Therefore, during this process, the leakage inductance energy on the primary and secondary sides of the transformer is not excited by a forced abrupt change. Instead, as the channel resistance Rds gradually decreases, it is continuously and smoothly dissipated as heat energy across the channel resistances of Q1 and Q2. In other words, the leakage inductance energy that would normally be converted into DC bias magnetic energy of the core during a hard short circuit is absorbed by the linear region power consumption of the MOSFET within this 2.5 microsecond time window. The rate of change of magnetic flux dΦ / dt within the core does not exhibit a step-like abrupt change; the magnetic flux returns to zero along a smooth curve, and the transformer core does not enter the saturation region.

[0099] To address the issue of extremely high instantaneous thermal stress on MOSFETs under high-power conditions, where they experience both high voltage and high current simultaneously within the 2.5μs Miller plateau (linear amplification region), this invention provides a rigorous model for calculating and verifying the thermal resistance of the Safe Operating Area (SOA). Taking a 5kVA series compensation transformer prototype tested in this invention as an example:

[0100] Boundary condition extraction: The rated voltage of the secondary side of the 5kVA system is 100V, and the peak current under full load is approximately 70A. At the moment of short circuit in the secondary circuit, the current change is mainly limited by the transformer leakage inductance L_k (measured at approximately 30μH).

[0101] Energy Dissipation: Within an artificially extended 2.5μs linear conduction window, the drain-source voltage V... ds From 100V to near 0V, the drain current I d Due to leakage inductance, the maximum current only climbs to around 120A. The integral of the transient avalanche energy E absorbed by a single MOSFET during this period is:

[0102] .

[0103] Based on integral estimation, the total leakage inductance energy E≈15mJ is converted into heat by the channel resistance within 2.5μs.

[0104] Device SOA (Safe Operating Area) Verification: Industrial-grade high-current silicon power MOSFETs are preferred. In this example, an Infineon IRFP4668PbF power MOSFET (200V withstand voltage, 130A rated current) is selected. Referring to the official SOA curve and single-pulse avalanche energy specification of this device, its permissible single-pulse avalanche energy E... AS The J is as high as 730 mJ. Meanwhile, the SOA curve of this device shows that under extreme cross stress of 100 V and 100 A, its allowable linear region duration exceeds 100 μs.

[0105] This invention precisely limits its conduction time to 2.5 μs and absorbs only about 15 mJ of energy, far below the device's ultimate tolerance (730 mJ). Transient junction temperature rise. The temperature should not exceed 5°C. Therefore, this technical solution is not only theoretically feasible, but also provides a safety margin of more than 10 times in engineering practice, which can solve the risk of thermal breakdown of the device when it is operating in the linear amplification region.

[0106] During the aforementioned dynamic impedance reduction process, if extremely severe load conditions are encountered (such as sudden load changes, drastic voltage flicker in the power grid, etc.), even after the Miller plateau extension, if a weak precursor to magnetic saturation still appears in the core, the magnetic flux of the core approaching the saturation region will excite high-frequency harmonic peak voltages at both ends of the secondary winding.

[0107] The high-frequency component is immediately captured by the high-frequency induction self-locking protection circuit connected in parallel across the secondary winding. The differential capacitor Cdiff presents an extremely low impedance to this high-frequency component, and the voltage across the TVS diode rises rapidly. Once the breakdown voltage threshold of the TVS is reached (exemplarily, a bidirectional TVS with a breakdown voltage of 15V is selected in this embodiment), the TVS diode instantly avalanche conducts, directly drawing the reverse induced charge on the secondary winding and injecting it into the common source terminals of Q1 and Q2, instantaneously raising the source potential. The rise in source potential means that the effective gate-source voltage Vgs (= Vg - Vs) decreases, forming a negative feedback suppression on the channel current. That is, the larger the current, the higher the source potential rises, the more Vgs is suppressed, and the channel resistance rebounds, thereby preventing the current from soaring disorderly and cutting off the positive feedback chain of magnetic saturation self-excitation.

[0108] The response time of the high-frequency induction self-locking protection circuit is entirely determined by the inherent time constant of the physical components (typically in the nanosecond range), which is much faster than the interrupt response time of any digital controller and does not rely on any software judgment logic. Once the high-frequency harmonics disappear, the TVS automatically returns to cutoff, the protection circuit resets itself, and it does not affect the normal conduction process of the main channel.

[0109] After the Miller plateau extension period (approximately 2.5 microseconds) described in step three, the gate-source voltage Vgs of Q1 and Q2 has been charged to a level far above the turn-on threshold (typically 10V to 15V), and the MOSFET channel resistance Rds has dropped to its rated minimum value (typically a few milliohms to tens of milliohms). At this point, Q1 and Q2 are completely out of the linear amplification region and enter the variable resistance region (i.e., fully on state), and the two ends of the secondary winding are reliably short-circuited by a bidirectional switch with extremely low impedance. Thus, the secondary bypass operation is complete, the compensation transformer is reliably bypassed, and the system operates with extremely low conduction losses. Taking a 5kVA prototype as an example, the bypass on-resistance is approximately 1.5mΩ, and the conduction loss at rated current is only a few watts, reducing losses by approximately 80% compared to the traditional primary-side relay solution, and eliminating mechanical contact wear issues.

[0110] Before step two, a pre-detection step is also included:

[0111] Detect whether the output current of the H-bridge converter has decayed to zero or is less than a preset threshold; if so, proceed to step two.

[0112] Otherwise, the PWM lockout state of the H-bridge converter is maintained until the current decays to the preset threshold.

[0113] It should be noted that although the PWM output of the H-bridge converter has been blocked and all power switches in the H-bridge have been turned off, some energy may still be stored in the filter inductor or transformer leakage inductance between the secondary winding and the H-bridge output. This energy continues to be released through the body diode or freewheeling circuit of the H-bridge switches, forming a decaying freewheeling current. If the bypass is triggered before this freewheeling current has decayed to a sufficiently low level, i.e., Q1 and Q2 are turned on, the bypass main channel may be subjected to a large instantaneous current surge, increasing the conduction stress of the MOSFETs and potentially even affecting the natural zero-crossing commutation process of the secondary winding current.

[0114] This pre-detection step involves inserting a current sensing element (such as a current transformer or Hall effect current sensor) in series in the H-bridge output circuit to monitor the amplitude of the H-bridge output current in real time and compare it with a preset threshold (e.g., 5% of the rated current or an absolute value less than 1A). If the detected value is lower than the threshold, it indicates that the energy stored in the secondary winding has been largely discharged, allowing the execution of step two. If the detected value is still higher than the threshold, the process continues to wait, maintaining a blocked state, until the current naturally decays to within the threshold before executing step two. This preset threshold can be flexibly set according to the specific power level and device stress requirements.

[0115] The introduction of this pre-detection step further enhances the safety margin of bypass switching, ensuring that the current stress borne by Q1 and Q2 at the moment of conduction is within a controllable range, which is especially suitable for high-power or highly inductive load applications.

[0116] On the other hand, the compensation transformer is a three-phase compensation transformer, with each of the three-phase secondary windings independently connected in parallel to a set of secondary bypass main channels and the nonlinear anti-magnetic shock drive network. This allows it to be applied in industrial three-phase power supply.

[0117] The embodiments described above are merely preferred embodiments of this specification and are not intended to limit the scope of this specification. Any modifications and improvements made by those skilled in the art to the technical solutions of this specification without departing from the spirit of this specification should fall within the protection scope defined by the claims of this specification.

Claims

1. A solid-state bypass anti-magnetic shock system for the secondary side of a series-compensated transformer, comprising a compensation transformer, wherein its primary winding is connected in series in the main power circuit, characterized in that, Also includes: The secondary bypass main channel consists of a bidirectional switch composed of two N-channel MOSFETs Q1 and Q2 connected back-to-back in series, which is connected to both ends of the secondary winding of the compensation transformer. A nonlinear antimagnetic shock drive network has an instruction input terminal, a drive output terminal, and a floating reference terminal. The instruction input terminal is coupled to an external bypass instruction terminal to receive a bypass trigger signal. The drive output terminal is coupled to the common gate terminal of Q1 and Q2 to output an extended gate drive voltage. The floating reference terminal is coupled to the high-voltage terminal of the secondary winding to provide a reference potential node. The nonlinear antimagnetic shock drive network also includes: An adaptive Miller platform extension circuit, which provides an extended gate drive voltage, is connected in series between the common gate terminal of Q1 and Q2 and the instruction input terminal to extend the conduction time of Q1 and Q2, so that Q1 and Q2 operate in the linear amplification region during conduction. A high-frequency inductive self-locking protection circuit is connected in parallel across the secondary winding. When magnetic saturation precursor characteristics appear, it injects reverse induced charge into the common source terminals of Q1 and Q2 to raise the source potential and form a negative feedback clamp on the gate-source voltage.

2. The solid-state bypass anti-magnetic shock system for the secondary side of a series compensation transformer according to claim 1, characterized in that, The adaptive Miller platform extension circuit includes: A fast-turn-on diode is connected in series between the common gate terminal of Q1 and Q2 and the instruction input terminal, with the anode of the fast-turn-on diode connected to the instruction input terminal; Two compensation capacitors are connected across the gate and drain of Q1 and Q2, respectively.

3. The solid-state bypass anti-magnetic shock system for the secondary side of a series compensation transformer according to claim 2, characterized in that, The adaptive Miller platform extension circuit is an asymmetrical positive and negative temperature coefficient resistive-capacitive voltage-controlled network. The fast turn-on diode and the compensation capacitor have opposite temperature coefficients, which are used to compensate each other when the temperature changes, so that the conduction delay time of Q1 and Q2 is stable.

4. The solid-state bypass anti-magnetic shock system for the secondary side of a series compensation transformer according to claim 1, characterized in that, The adaptive Miller platform extension circuit extends the conduction time of Q1 and Q2 to more than 2μs.

5. The solid-state bypass anti-magnetic shock system for the secondary side of a series compensation transformer according to claim 1, characterized in that, The high-frequency induction self-locking protection circuit includes a differential capacitor and a transient voltage suppressor (TVS) connected in series. The branch formed by the differential capacitor and the transient voltage suppressor (TVS) is connected in parallel across the secondary winding.

6. The solid-state bypass anti-magnetic shock system for the secondary side of a series compensation transformer according to claim 1, characterized in that, It also includes an independent isolated power supply, the output of which is coupled to the command input terminal, and the reference ground of which is coupled to the floating reference terminal to provide a drive voltage relative to the floating reference terminal.

7. An adaptive switching method for solid-state bypass on the secondary side of a series-compensated transformer, applied to the anti-magnetic shock system for solid-state bypass on the secondary side of a series-compensated transformer as described in any one of claims 1 to 6, characterized in that, Includes the following steps: Step 1: When the mains voltage is within the normal range, block the PWM output of the H-bridge converter connected in parallel across the secondary winding. Step 2: Apply a bypass command signal to the nonlinear antimagnetic shock drive network; Step 3: The adaptive Miller platform extension circuit extends the conduction time of Q1 and Q2, so that Q1 and Q2 exhibit a dynamic impedance gradient decreasing from large to small in the linear amplification region, and the voltage across the secondary winding decreases continuously to zero. Step 4: During the dynamic impedance gradient descent, the leakage inductance energy of the transformer primary and secondary sides is smoothly consumed in the channel resistance of Q1 and Q2 as heat energy, and the core flux returns to zero without a step change. Step 5: If a high-frequency harmonic abrupt change occurs due to the precursor of magnetic saturation during the conduction of Q1 and Q2, the high-frequency induction self-locking protection circuit is turned on instantaneously, injecting reverse induced charge into the common source terminals of Q1 and Q2 to raise the source potential, implementing negative feedback clamping on the gate-source voltage, and preventing the current from soaring disorderly. Step 6: Q1 and Q2 enter the fully conducting state, and the secondary winding forms a short-circuit bypass.

8. The adaptive switching method for solid-state bypass on the secondary side of a series compensation transformer according to claim 7, characterized in that, The dynamic impedance gradient decreases in a monotonically smooth manner, the voltage across the secondary winding continuously decreases to zero over time, and there is no abrupt change in the rate of change of magnetic flux.

9. The adaptive switching method for solid-state bypass on the secondary side of a series compensation transformer according to claim 7, characterized in that, Before step two, a pre-detection step is also included: Detect whether the output current of the H-bridge converter has decayed to zero or is less than a preset threshold; if so, proceed to step two. Otherwise, the PWM lockout state of the H-bridge converter is maintained until the current decays to the preset threshold.

10. The adaptive switching method for solid-state bypass on the secondary side of a series compensation transformer according to claim 7, characterized in that, The compensation transformer is a three-phase compensation transformer, with each of the three secondary windings independently connected in parallel to a set of secondary bypass main channels and the nonlinear anti-magnetic shock drive network.

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