Method and device for midpoint voltage and dynamic voltage sharing of straight series igbt

Abstract

This application relates to the field of motor control technology and discloses a method and device for coordinated control of midpoint voltage and dynamic voltage equalization of series-connected IGBTs. The method includes: generating a midpoint current command based on the midpoint voltage imbalance; calculating the allocation coefficient of redundant small vectors based on the midpoint current command; calculating the dynamic voltage imbalance of the devices based on the collector-emitter voltage of each series-connected IGBT; constraining the allocation coefficients by combining the gate drive protection state and the dynamic voltage imbalance of the devices; calculating the action time of the redundant small vectors in the three-level INPC inverter based on the target output voltage vector; determining the first allocation time of the positive redundancy state and the second allocation time of the negative redundancy state in the redundant small vectors based on the action time and the constrained allocation coefficients; and then generating the drive signal for each series-connected IGBT. This application can avoid the safety hazards of uneven device voltage and abnormal protection states caused by simply pursuing midpoint balance.

Description

Technical Field

[0001] This application relates to the field of motor control technology, specifically to a method and device for coordinated control of midpoint voltage and dynamic voltage equalization of direct-connected IGBTs. Background Technology

[0002] High-voltage motors exert a significant impact on the power grid and the equipment itself during startup. Variable frequency soft starters for high-voltage motors enable smooth, shock-free starting and speed regulation, a key technology for ensuring equipment safety and extending its service life. Among these, frequency converters based on three-level neutral point clamped (NPC) or improved neutral point clamped (INPC) topologies are commonly used in high-voltage motor variable frequency soft starters due to their high output voltage levels and good harmonic performance.

[0003] However, the DC bus of a three-level inverter topology consists of upper and lower capacitors. Under the influence of load current, modulation strategy, and switching state, the voltages of the upper and lower capacitors are prone to deviation, i.e., midpoint potential drift. Midpoint potential imbalance can lead to output waveform distortion, increased harmonics, and even damage to switching devices and DC capacitors. To address this issue, various midpoint potential balancing methods have been proposed in the prior art. The mainstream strategy uses the DC bus midpoint voltage as the sole control object, achieving midpoint current regulation through proportional-integral (PI) regulators and redundant small vector allocation in space vector pulse width modulation (SVPWM). This type of method can suppress midpoint potential drift, but when the midpoint balancing algorithm rapidly changes the redundant small vector allocation, it may alter the switching stress of some bridge arm devices, leading to uneven dynamic voltage distribution of the direct-drive and series IGBTs, and inducing dynamic voltage equalization failure of the direct-drive and series IGBTs. Summary of the Invention

[0004] This application provides a method and device for coordinated control of midpoint voltage and dynamic voltage equalization of direct-connected and series IGBTs, so as to maintain the voltage balance between the upper and lower sections of the three-level INPC DC bus, while avoiding uneven dynamic voltage distribution of direct-connected and series IGBTs due to the rapid distribution of redundant small vectors, thereby achieving a balance between midpoint potential stability and safe operation of the devices.

[0005] In a first aspect, this application provides a method for coordinated control of midpoint voltage and dynamic voltage equalization of direct-connected and series-connected IGBTs, the method comprising: Calculate the midpoint voltage imbalance based on the upper and lower voltages of the DC bus, and generate a midpoint current command based on the midpoint voltage imbalance. The allocation coefficient of the redundant small vector is calculated based on the midpoint current command. The redundant small vector has positive redundancy state and negative redundancy state. Calculate the dynamic voltage imbalance of the device based on the collector-emitter voltage of each series-connected IGBT; The allocation coefficient is constrained by combining the gate drive protection state and the dynamic pressure imbalance of the device; The effective time of redundant small vectors in the three-level INPC inverter is calculated based on the target output voltage vector. The first allocation time of the positive redundancy state and the second allocation time of the negative redundancy state in the redundant small vectors are determined based on the effective time and the constrained allocation coefficient. The drive signals for each series-connected IGBT are generated based on the first allocation time and the second allocation time.

[0006] In one optional implementation, the midpoint voltage imbalance is calculated based on the upper and lower section voltages of the DC bus, including: Divide the difference between the upper and lower voltage segments by the total DC voltage to obtain the midpoint voltage imbalance.

[0007] In one alternative implementation, generating a midpoint current command based on the midpoint voltage imbalance includes: The initial midpoint current command is obtained by PI regulation based on the midpoint voltage imbalance. The initial midpoint current command is limited to obtain the midpoint current command.

[0008] In one alternative implementation, the allocation coefficient of the redundant small vector is calculated based on the midpoint current command, including: Substituting the midpoint current command into the first preset formula, the allocation coefficient is calculated. The first preset formula is:

[0009]

[0010] In the formula, This is the adjustment amount for the allocation coefficient. Let be the sensitivity of the k-th redundant small vector to the adjustment of the midpoint current. This is a midpoint current command. The average midpoint current, This is the set of adjustable redundant small vectors within the current PWM cycle. Let be the sensitivity of the j-th redundant small vector to the adjustment of the midpoint current. For allocation coefficients, These are the initial allocation coefficients. This is the lower limit of the allocation coefficient. This represents the upper limit of the allocation coefficient.

[0011] In one alternative implementation, the dynamic voltage imbalance of the device is calculated based on the collector-emitter voltage of each series-connected IGBT, including: When there are two IGBTs connected in series, the difference between the two collector-emitter voltages is divided by the sum of the two collector-emitter voltages to obtain the dynamic voltage imbalance of the device. When there are three or more IGBTs connected in series, the average voltage of each collector-emitter voltage is calculated, and the dynamic voltage imbalance of the device is obtained based on the deviation of each collector-emitter voltage from the average voltage.

[0012] In one alternative implementation, the allocation coefficient is constrained by combining the gate drive protection state and the device's dynamic pressure imbalance, including: The device voltage equalization risk factor is calculated by combining the gate drive protection status and the device dynamic voltage imbalance. The gate drive protection status includes at least one of the following: abnormal current change rate protection status, current or desaturation protection status, abnormal gate-emitter voltage protection status, and abnormal gate drive bias power supply voltage protection status. If the device voltage equalization risk factor is less than the first risk threshold, the allocation coefficient is not adjusted. If the device voltage equalization risk factor is at the first risk threshold and the second risk threshold, the allocation coefficient correction amount is reduced, and the lower limit of the allocation coefficient is increased and / or the upper limit of the allocation coefficient is decreased. Then the allocation coefficient is recalculated. If the device voltage equalization risk factor is greater than or equal to the second risk threshold, the small vector compensation is frozen or the fault soft shutdown is entered.

[0013] In one optional implementation, the formula for calculating the device voltage equalization risk factor is:

[0014] In the formula, This is the risk factor for voltage equalization of the device. For the dynamic pressure imbalance of the device, The allowable dynamic bearing pressure deviation threshold, The threshold for the allowable rate of change; This is a current change rate abnormality protection state. This is an overcurrent or desaturation protection state. This is a gate-emitter voltage abnormality protection state. This is a protection state for abnormal gate drive bias power supply voltage.

[0015] In an optional implementation, after calculating the device voltage equalization risk factor by combining the gate drive protection state and the device dynamic voltage imbalance, the method further includes: The midpoint balancing weight and the device voltage equalization protection weight are calculated based on the current operating stage of the motor variable frequency soft starter and the device voltage equalization risk factor. The allocation coefficients are adjusted based on the midpoint balancing weight and the device voltage equalization protection weight.

[0016] Secondly, this application provides a midpoint voltage and direct-connect IGBT dynamic voltage equalization coordinated control device, the device comprising: The current command generation module is used to calculate the midpoint voltage imbalance based on the upper and lower voltages of the DC bus, and generate a midpoint current command based on the midpoint voltage imbalance. The allocation coefficient calculation module is used to calculate the allocation coefficient of the redundant small vector based on the midpoint current command. The redundant small vector has positive redundancy state and negative redundancy state. The imbalance calculation module is used to calculate the dynamic voltage imbalance of the device based on the collector-emitter voltage of each series IGBT. The allocation coefficient constraint module is used to constrain the allocation coefficient by combining the gate drive protection state and the dynamic pressure imbalance of the device; The allocation time determination module is used to calculate the action time of redundant small vectors in the three-level INPC inverter based on the target output voltage vector, and determine the first allocation time of the positive redundancy state and the second allocation time of the negative redundancy state in the redundant small vectors based on the action time and the constrained allocation coefficient. The drive signal generation module is used to generate drive signals for each series-connected IGBT based on the first allocation time and the second allocation time.

[0017] Thirdly, this application provides an electronic device, including: a memory and a processor, which are communicatively connected to each other. The memory stores computer instructions, and the processor executes the computer instructions to perform the midpoint voltage and direct-connect IGBT dynamic voltage equalization coordinated control method described in the first aspect or any corresponding embodiment.

[0018] The technical effects of this application are as follows: The midpoint voltage and dynamic voltage equalization coordinated control method of the direct-series IGBTs in this application generates a midpoint current command based on the midpoint voltage imbalance, calculates the allocation coefficient of the redundant small vector using the midpoint current command, and constrains the allocation coefficient by combining the gate drive protection state and the dynamic voltage imbalance of the device. This makes the closed-loop regulation of the midpoint voltage no longer operate independently, but uses the dynamic voltage bearing capacity of the direct-series IGBTs and the gate drive protection state together as constraints of the modulation strategy, avoiding the safety hazards of uneven device voltage and abnormal protection state caused by simply pursuing midpoint balance. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the specific embodiments of this application or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0020] Figure 1 This is a schematic diagram of the structure of a high-voltage motor frequency conversion soft starter according to an embodiment of this application; Figure 2 This is a flowchart illustrating the method for coordinated control of midpoint voltage and dynamic voltage equalization of direct-connected and series-connected IGBTs according to an embodiment of this application. Figure 3 This is a logic block diagram of the SVPWM control algorithm according to an embodiment of this application; Figure 4 This is a logic block diagram based on device voltage equalization risk factor control according to an embodiment of this application; Figure 5 This is a schematic diagram of weight changes according to an embodiment of this application; Figure 6 This is a schematic diagram of the hardware structure of the midpoint voltage and the dynamic voltage equalization coordinated control device of the direct-series IGBTs in an embodiment of this application. Figure 7 This is a schematic diagram of the hardware structure of an electronic device according to an embodiment of this application. Detailed Implementation

[0021] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0022] The midpoint potential balancing methods in related schemes typically use the DC bus midpoint voltage as the main control object, and achieve midpoint current regulation through PI regulators and SVPWM redundant small vector allocation. This type of method can suppress midpoint potential deviation, but in high-voltage motor frequency converter soft starters, the low-frequency high current, voltage and frequency boost, near-power frequency, and bypass hot switching stages will create a constraint relationship between the midpoint balancing speed and the dynamic pressure bearing safety of the device.

[0023] In high-voltage INPC soft starters, each high-voltage switching position can be improved by using two or more IGBTs in series. Besides static voltage equalization via a parallel resistor between the collector and emitter (CE), these series-connected IGBTs also require dynamic voltage equalization detection and protection during turn-on, turn-off, and fault moments. When the midpoint balancing algorithm rapidly changes the redundancy vector allocation, it may alter the switching stress of some bridge arm devices. Therefore, midpoint voltage balancing, redundancy vector allocation, and dynamic voltage equalization protection of the series-connected IGBTs need to be considered collaboratively.

[0024] The midpoint potential balancing method in the relevant scheme has the following problems: it only takes the midpoint voltage as the closed-loop object and does not take into account the dynamic voltage difference of the collector-emitter voltage VCE of the direct-series IGBT into the modulation constraint; the small vector distribution compensation amount lacks linkage with the IGBT drive protection status, and may continue to adjust rapidly when fault precursors appear; the soft start conditions of high-voltage motors vary greatly, and the requirements for midpoint balancing speed and device voltage equalization safety are different in the low-frequency start, frequency boost and bypass hot switching stages.

[0025] Based on this, this application proposes a method for coordinated control of midpoint voltage and dynamic voltage equalization of direct-drive and series IGBTs. While maintaining voltage balance on the upper and lower sections of the three-level INPC DC bus, it avoids uneven dynamic voltage distribution of direct-drive and series IGBTs due to rapid allocation of redundant small vectors, and automatically adjusts the midpoint balancing weight and device voltage equalization protection weight at different stages of soft start-up and under fault precursor states.

[0026] The midpoint voltage and dynamic voltage equalization coordinated control method of the direct-series IGBTs in this application embodiment can be applied to a high-voltage motor variable frequency soft starter with a DC bus, a three-level INPC inverter bridge, a controller, and a gate drive protection circuit. A high-voltage motor variable frequency soft starter, such as... Figure 1 As shown, the high-voltage motor can be a 6kV or 10kV high-voltage motor.

[0027] The controller collects the voltage of the upper section of the DC bus in real time. Lower segment voltage Three-phase output current , , The protection states include the collector-emitter voltages VCE1 and VCE2 of each series-connected IGBT in the same high-voltage switch position, as well as the abnormal protection states DI / DT for the rate of change of current, OC for overcurrent or desaturation, VGE for the gate-emitter voltage, and BGV for the gate drive bias power supply voltage.

[0028] VCE1 and VCE2 are both collector-emitter voltages, differing in that they correspond to different series-connected IGBT units within the same high-voltage switching position. For example, when a high-voltage switching position consists of two IGBTs connected in series, VCE1 represents the collector-emitter voltage of the upper or first IGBT unit, and VCE2 represents the collector-emitter voltage of the lower or second IGBT unit. When it consists of n IGBTs connected in series, it can be extended to VCE1 to VCE1En.

[0029] The midpoint voltage and the dynamic voltage equalization coordinated control method of the direct-series IGBTs in this application embodiment are mainly executed in the controller.

[0030] According to an embodiment of this application, a method for coordinated control of midpoint voltage and dynamic voltage equalization of direct-connect IGBTs is provided. It should be noted that the steps shown in the flowchart in the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions. Furthermore, although a logical order is shown in the flowchart, in some cases, the steps shown or described may be executed in a different order than that shown here.

[0031] Figure 2 This is a flowchart of the midpoint voltage and the dynamic voltage equalization coordinated control method of direct-series IGBTs according to an embodiment of this application, as follows: Figure 2 As shown, the process includes the following steps: Step S201: Calculate the midpoint voltage imbalance based on the upper and lower voltages of the DC bus, and generate a midpoint current command based on the midpoint voltage imbalance.

[0032] Specifically, the controller acquires the voltage of the upper section of the DC bus in real time through voltage Hall sensors and current Hall sensors. and lower voltage By comparing the voltage of the upper section and lower voltage The midpoint voltage imbalance can be calculated. The midpoint voltage imbalance reflects the energy distribution of the DC-side energy storage capacitor and serves as a reference error signal for subsequent potential balance control.

[0033] The midpoint current command is used by the controller to map the voltage imbalance to obtain the control target. Based on the principle of capacitor charge balance, a specific average current is injected or extracted into the midpoint to compensate for the voltage deviation. Here, the midpoint current command does not directly drive the hardware current source, but rather serves as a reference quantity for the modulation layer, guiding the selection and allocation of subsequent redundancy vectors.

[0034] In one example, the midpoint voltage imbalance is used to obtain the midpoint current command via PI regulation.

[0035] Step S202: Calculate the allocation coefficient of the redundant small vector according to the midpoint current command. The redundant small vector has positive redundancy state and negative redundancy state.

[0036] Specifically, the allocation coefficient is a proportional factor that distributes the total duration of a redundant small vector between positive and negative redundant states.

[0037] Three-level inverters typically employ SVPWM control algorithms. Redundant small vectors, in three-level SVPWM modulation, are small vectors that can synthesize multiple sets of switching states with the same spatial voltage vector but producing different midpoint currents. These small vectors have positive and negative redundancy states. Positive and negative redundancy states are two different switching implementations of the same small vector; they output the same voltage vector but result in different directions or magnitudes of the midpoint current.

[0038] Step S203: Calculate the dynamic voltage imbalance of the device based on the collector-emitter voltage of each series-connected IGBT.

[0039] Specifically, for each high-voltage switching position consisting of two or more IGBTs connected in series, the controller acquires the collector-emitter voltage VCE of each series-connected IGBT.

[0040] The dynamic voltage imbalance of a device represents the degree of difference in collector-emitter voltage between different series-connected IGBTs during the switching process at the same high-voltage switching position. Therefore, the dynamic voltage imbalance of a device can be calculated based on the difference in collector-emitter voltage VCE between different series-connected IGBTs.

[0041] Step S204: Constrain the allocation coefficient by combining the gate drive protection state and the dynamic pressure imbalance of the device.

[0042] Specifically, the gate drive protection status refers to various abnormal states monitored in real time by the gate drive circuit, including at least one of the following: abnormal current rate of change protection status DI / DT, overcurrent or desaturation protection status OC, abnormal gate-emitter voltage protection status VGE, and abnormal gate drive bias power supply voltage protection status BGV.

[0043] The controller monitors the gate drive protection status of each series IGBT in real time, and combines the monitoring results with the dynamic pressure imbalance constraint allocation coefficient of the device. For example, when an abnormal gate drive protection status is detected or the dynamic pressure imbalance of the device is too high, the allocation coefficient is corrected by reducing the amplitude or rate of change of the allocation coefficient, etc., and the midpoint balance performance is temporarily reduced to ensure that the device is not damaged.

[0044] Step S205: Calculate the duration of the redundant small vectors in the three-level INPC inverter based on the target output voltage vector, and determine the first allocation time of the positive redundant state and the second allocation time of the negative redundant state in the redundant small vectors based on the duration and the constrained allocation coefficient.

[0045] Specifically, in a three-level INPC topology, there are multiple space voltage vectors that correspond to the same output level state but generate different midpoint currents; these vectors are called redundant small vectors. The target output voltage vector is the vector for which the three-level INPC topology requires an output voltage. The target output voltage vector is determined based on the current modulation requirements, and the duration of each vector is calculated. Furthermore, based on the midpoint current command, the first allocation time for the positive redundant state and the second allocation time for the negative redundant state in the redundant small vectors are calculated. The first and second allocation times determine the net charge flowing into or out of the midpoint within one PWM cycle, thus achieving active regulation of the midpoint voltage.

[0046] like Figure 3 As shown, in a three-level INPC, each phase arm can output three voltage levels: P, O, and N. P indicates that the phase is connected to the upper DC bus, O indicates that the phase is connected to the midpoint, and N indicates that the phase is connected to the lower DC bus. The voltage level describes the output potential of the phase, and the switching state describes the specific on / off combination of each IGBT in the INPC arm; a voltage level can be achieved by one or more physical switch states.

[0047] Three-phase combination states are represented by three letters, which correspond to the voltage levels of phases a, b, and c, respectively. For example, POO indicates that phase a is in the P state, phase b is in the O state, and phase c is in the O state; ONN indicates that phase a is in the O state, phase b is in the N state, and phase c is in the N state. Multiple different three-phase combination states can be combined to form the same space voltage vector, which is called a redundant state.

[0048] Taking sector I as an example, the small vector S1 can be implemented using two redundant states, POO and ONN, and the small vector S2 can be implemented using two redundant states, PPO and OON. The two redundant states correspond to the same output voltage vector, but due to the different phases connected to the midpoint, the resulting midpoint currents are different. Let... , , Let represent whether phases a, b, and c are in the 0 state, respectively. A value of 1 indicates they are in the 0 state, and a value of 0 indicates they are not. The midpoint current can then be expressed as: When the three-phase current satisfies At that time, the midpoint current in the POO state is The midpoint current in the ONN state is The small vector redundancy states of other sectors can be obtained by cyclic mapping according to the phase sequence.

[0049] The duration of the basic vector is calculated using the most recent three-vector or equivalent SVPWM. Let the current PWM period be... The target reference voltage vector is The three vectors involved in the synthesis are , , The corresponding duration of action is , , Then the following condition is met: , ,in, This is the set of vectors that participate in the synthesis during the current PWM cycle. and They are vector sets The k-th vector within the vector and its duration of action.

[0050] If the k-th vector For a small vector with positive and negative redundancy, the duration of action of the redundant small vector is then... The allocation is as follows: , .in, The first allocation time for the positive redundancy state. The second allocation time is for the negative redundancy state. For allocation coefficients, .

[0051] By adjusting the distribution coefficient of the positive and negative redundant state action time of the same small vector By changing the average current flowing into or out of the DC midpoint within one PWM cycle, the midpoint voltage can be balanced.

[0052] Step S206: Generate drive signals for each series-connected IGBT based on the first allocation time and the second allocation time.

[0053] Specifically, after identifying the small vectors with positive and negative redundant states, according to The action time of the small vector is divided into the first allocation time. Second allocation time The decomposed redundant states are arranged according to a symmetrical sequence of three-level space vector modulation. For example, for a PWM cycle containing small and medium vectors, the first and second half of the cycle can be mirrored to reduce low-order harmonics; when a small vector is decomposed into positive and negative redundant states, and It is inserted at the original time position of the small vector.

[0054] Then, the controller maps each P / O / N three-phase level state to the turn-on and turn-off commands of specific IGBTs within the INPC bridge arm. After inserting dead time and minimum pulse width limits, it outputs gate drive pulses, thus obtaining the drive signals for each series-connected IGBT. For the 0 state, if there are multiple zero-level current paths in the INPC bridge arm, the corresponding zero-level switching state can be selected based on the current phase current direction, device temperature, and VCE voltage equalization risk to avoid a single series-connected IGBT bearing excessive dynamic voltage.

[0055] The midpoint voltage and dynamic voltage equalization coordinated control method of the direct-series IGBTs in this application generates a midpoint current command based on the midpoint voltage imbalance, calculates the allocation coefficient of the redundant small vector using the midpoint current command, and constrains the allocation coefficient by combining the gate drive protection state and the dynamic voltage imbalance of the device. This makes the closed-loop regulation of the midpoint voltage no longer operate independently, but uses the dynamic voltage bearing capacity of the direct-series IGBTs and the gate drive protection state together as constraints of the modulation strategy, avoiding the safety hazards of uneven device voltage and abnormal protection state caused by simply pursuing midpoint balance.

[0056] Compared to traditional schemes where protection actions and modulation strategies are independent, this application's embodiment places security protection at the modulation command formation stage, enhancing the system's proactive defense capabilities. Furthermore, this application's embodiment maintains the basic framework of SVPWM throughout the entire control flow, achieving coordinated control simply by adding constraint elements and adjusting control parameters, demonstrating good engineering feasibility and compatibility.

[0057] In one embodiment, step S201, calculating the midpoint voltage imbalance based on the upper and lower section voltages of the DC bus, includes: Step S2011: Divide the difference between the upper and lower voltage segments by the total DC voltage to obtain the midpoint voltage imbalance.

[0058] Specifically, the total DC voltage for: .

[0059] The midpoint voltage imbalance is the ratio of the difference between the upper and lower voltage segments to the total DC voltage. The formula for its calculation is:

[0060] in, For the midpoint voltage imbalance, A positive value indicates that the voltage at the upper section of the busbar is higher than the voltage at the lower section. A negative value indicates that the voltage in the lower segment is higher than the voltage in the upper segment.

[0061] According to the above scheme, using the difference divided by the total voltage, compared with directly using the difference as the control variable, can adaptively adapt to the rise and fall of the bus voltage (such as the voltage boosting stage in the soft start process), ensuring that the control gain of the PI regulator remains stable across the entire voltage range, and avoiding fluctuations in control performance caused by changes in bus voltage.

[0062] In one embodiment, step S201, generating a midpoint current command based on the midpoint voltage imbalance, includes: Step S2012: Perform PI adjustment based on the midpoint voltage imbalance to obtain the initial midpoint current command.

[0063] Specifically, the midpoint current command obtained by PI regulation is a midpoint current command with a finite integral window or an anti-saturation integral state.

[0064] The calculation process for the midpoint current command with a finite integration window is as follows: In the k-th PWM cycle, the controller determines the voltage imbalance at the midpoint. Command to calculate initial midpoint current:

[0065] in, For PWM period, The length of the integration window. This is the initial midpoint current command for the k-th PWM cycle. and These represent the voltage imbalance in the k-th and m-th PWM cycles, respectively. and These are the proportional gain and integral gain, respectively.

[0066] The calculation process for the midpoint current command in the anti-saturation integral state is as follows: In the k-th PWM cycle, the controller determines the voltage imbalance at the midpoint. The initial midpoint current command is calculated using a recursive integral with amplitude limiting to achieve anti-integral saturation. The calculation formula is as follows:

[0067]

[0068] in, This is the accumulated value of the current integration status. This is the cumulative value of the integral state from the previous period. For the amplitude limiting function, and These are the upper and lower limits of the cumulative value of the integral state, respectively.

[0069] Step S2013: Limit the initial midpoint current command to obtain the midpoint current command.

[0070] To prevent over-adjustment, the initial midpoint current command is limited: .in, This represents the midpoint current command after limiting in the k-th PWM cycle. This represents the maximum average midpoint current amplitude allowed for midpoint equalization under current current, bus voltage, modulation depth, and device safety constraints.

[0071] According to the above scheme, a limiting circuit is added after the PI regulation to prevent excessive midpoint current command due to start-up impact, load change or integral saturation. The existence of the limiting circuit limits the adjustment range of the redundant small vector to within the safe switching capability of the device, avoiding excessive switching stress on the series IGBT or midpoint current exceeding the safe operating area of ​​the DC bus capacitor due to excessive command.

[0072] In one embodiment, step S202, calculating the allocation coefficient of the redundant small vector according to the midpoint current command, includes: Step S2021: Substitute the midpoint current command into the first preset formula to calculate the distribution coefficient. The first preset formula is:

[0073]

[0074] In the formula, This is the adjustment amount for the allocation coefficient. Let be the sensitivity of the k-th redundant small vector to the adjustment of the midpoint current. This is a midpoint current command. The average midpoint current, This is the set of adjustable redundant small vectors within the current PWM cycle. Let be the sensitivity of the j-th redundant small vector to the adjustment of the midpoint current. For allocation coefficients, The initial allocation coefficients can be preset or confirmed through optimization. This is the lower limit of the allocation coefficient. This represents the upper limit of the allocation coefficient.

[0075] Specifically, for one PWM cycle, the average midpoint current can be written as: Where Kr is the set of adjustable redundant small vectors in the current PWM cycle, B is the average midpoint current generated by the non-adjustable vector and the reference allocation of redundant small vectors, and Gk is the adjustment sensitivity of the k-th redundant small vector to the midpoint current.

[0076] The sensitivity adjustment Gk can be expressed as: .in, This represents the instantaneous midpoint current generated when the k-th redundant small vector adopts a positive redundancy state. This represents the instantaneous midpoint current generated when the k-th redundant small vector adopts a negative redundancy state.

[0077] To make the average midpoint current follow the midpoint current command of the PI output The allocation coefficients are calculated according to the least squares allocation principle, that is, according to the first preset formula mentioned above. If only one redundant small vector is adjustable, the allocation coefficients can also be directly obtained based on the sensitivity of that small vector. .

[0078] In the above scheme, the first preset formula is based on the least squares allocation principle, distributing the total adjustment task of the midpoint current proportionally according to the adjustment sensitivity of each redundant small vector. This ensures that all adjustable redundant small vectors work together to undertake the adjustment task, avoiding the switching stress concentration and uneven device heating caused by a single vector bearing the entire adjustment amount. Simultaneously, the limiting circuit... and This ensures that the allocation coefficient of any redundant small vector does not exceed a reasonable range, preventing any small vector from being overused. Mathematically, this allocation method guarantees that, while satisfying the average midpoint current tracking target, the sum of the squares of the adjustment amounts of each vector is minimized, thereby achieving midpoint voltage correction with minimal switching action cost.

[0079] In one embodiment, step S203, calculating the dynamic voltage imbalance of the device based on the collector-emitter voltage of each series-connected IGBT, includes: Step S2031: When there are two IGBTs connected in series, divide the difference between the two collector-emitter voltages by the sum of the two collector-emitter voltages to obtain the dynamic voltage imbalance of the device.

[0080] Step S2032: When there are three or more IGBTs connected in series, calculate the average voltage of each collector-emitter voltage, and obtain the dynamic voltage imbalance of the device based on the deviation of each collector-emitter voltage from the average voltage.

[0081] Specifically, for each high-voltage switching position consisting of two or more IGBTs connected in series, the controller acquires the collector-emitter voltage VCE of each series-connected IGBT. For the case of two series-connected IGBTs, the dynamic voltage imbalance of the device is calculated: .in, and This refers to the collector-emitter voltage of two IGBTs connected in series at the same high-voltage switching position.

[0082] If multiple IGBTs are connected in series, the dynamic voltage imbalance of the device... This represents the maximum deviation of VCE from the average value for each device.

[0083] In the above scheme, differentiated unbalance calculation methods are provided for different topologies of two devices in series and three or more devices in series. For the common case of two devices in series, the difference is divided by the sum to normalize the unbalance to between -1 and 1, with a clear physical meaning. For the complex case of multiple devices in series, the maximum deviation relative to the average value is used as the metric, which can capture the worst stress state of a single device and ensure that the protection logic can cover the weakest link among all devices in series.

[0084] In one embodiment, step S204, constraining the allocation coefficient by combining the gate drive protection state and the device dynamic pressure imbalance, includes: Step S2041: Combine the gate drive protection status and the device dynamic voltage imbalance to calculate the device voltage equalization risk factor. The gate drive protection status includes at least one of the following: abnormal current rate of change protection status, current or desaturation protection status, abnormal gate-emitter voltage protection status, and abnormal gate drive bias power supply voltage protection status.

[0085] Specifically, the formula for calculating the device voltage equalization risk factor is as follows:

[0086] In the formula, This is the risk factor for voltage equalization of the device. For the dynamic pressure imbalance of the device, The allowable dynamic bearing pressure deviation threshold, The threshold for the allowable rate of change; This is a current change rate abnormality protection state. This is an overcurrent or desaturation protection state. This is a gate-emitter voltage abnormality protection state. This indicates an abnormal gate drive bias power supply voltage protection state. When the corresponding protection state is abnormal... , , or Its value is 1, and its normal value is 0.

[0087] like Figure 4As shown, in addition to voltage-level monitoring, this embodiment also feeds forward the multi-dimensional protection states of the underlying hardware to the modulation layer. Specifically, the abnormal current rate of change protection state DI / DT originates from the current rate of change detection unit or di / dt feedback signal in the gate drive circuit, used to characterize the risk of current surges during the initial short circuit or commutation process; the overcurrent or desaturation protection state OC originates from the desaturation detection circuit or a high-precision current sensor, used to indicate whether the device has entered an overcurrent or quasi-short circuit state; the abnormal gate-emitter voltage protection state VGE originates from the gate clamping circuit or undervoltage lockout feedback, used to reflect whether the gate drive capability is abnormal or whether there is a risk of false turn-on; and the abnormal gate drive bias power supply voltage protection state BGV originates from the monitoring loop of the isolated drive power supply, used to indicate whether the drive bias voltage has dropped or the ripple is too large. The necessity of including these protection states in the constraints lies in the fact that in high-voltage, high-power applications, device failure is often a process from abnormal electrical parameters to thermal breakdown. The above protection signals are usually early warning signs of impending device failure, reflecting potential risks earlier than a simple VCE overvoltage signal. If only VCE imbalance is relied upon for constraint, the device may be on the verge of irreversible damage when a significant overvoltage is detected. However, by introducing multidimensional protection states as feedforward constraints, the controller can sense the risk and adjust the modulation strategy at the bud stage of the fault, avoiding the fault amplification problem caused by the disconnect between the protection layer and the control layer in the traditional method, and significantly improving the protection robustness of the system.

[0088] Step S2042: If the device voltage equalization risk factor is less than the first risk threshold, do not adjust the allocation coefficient. If the device voltage equalization risk factor is at the first risk threshold and the second risk threshold, reduce the allocation coefficient correction amount, increase the lower limit of the allocation coefficient and / or decrease the upper limit of the allocation coefficient, and then recalculate the allocation coefficient. If the device voltage equalization risk factor is greater than or equal to the second risk threshold, freeze the small vector compensation or enter the fault soft shutdown.

[0089] Specifically, based on the device voltage equalization risk factor The size of the control strategy is divided into three levels to achieve a dynamic optimal trade-off between performance and safety.

[0090] The first level is the normal adjustment zone, when... When the voltage is less than the first threshold, it indicates that the voltage equalization of the device is good and there are no abnormal precursors. At this time, the midpoint voltage PI closed-loop correction of the redundancy small vector allocation coefficient is allowed. The system prioritizes midpoint balance performance.

[0091] The second level is the warning speed limit zone, when... When the value is between the first and second thresholds, it indicates that the uneven pressure distribution on the device has worsened or that a slight abnormality has occurred, but it has not yet reached the critical point. At this time, the controller adjusts the allocation coefficient accordingly. Stricter amplitude and rate of change limits are imposed, narrowing the range between the lower and upper limits of the distribution coefficient. The physical mechanism of this design is that, under stress edge conditions, rapid vector switching may induce additional voltage spikes or current surges, thereby worsening the voltage equalization condition; by reducing the regulation speed, the system can actively suppress aggressive modulation behavior that may further deteriorate the stress while maintaining the basic midpoint balance function, providing buffer space for the device.

[0092] The third level is the fault freeze zone, when... If the second threshold is exceeded or any protection signal is active, it indicates that the device is in a critically unsafe state. At this point, the controller immediately freezes redundant small vector compensations; for example, minor anomalies are maintained from the previous cycle. If the value remains unchanged, it will be set to 0.5 during severe abnormalities or synchronous switching phases, or even trigger PWM blocking or soft shutdown timing to protect the direct-drive IGBT.

[0093] The above-mentioned graded treatment scheme avoids overly aggressive protective actions that could affect normal adjustment functions, while ensuring decisive intervention in times of real danger, thus achieving an organic balance between safety and availability.

[0094] In one embodiment, after calculating the device voltage equalization risk factor in step S2041 by combining the gate drive protection state and the device dynamic voltage imbalance, the method further includes: Step a1: Calculate the midpoint balancing weight and the device voltage equalization protection weight based on the current operating stage of the motor's variable frequency soft starter and the device voltage equalization risk factor.

[0095] Specifically, the operation phase of a motor's variable frequency soft starter can be divided into several stages: pre-charging / pre-excitation, low-frequency start, frequency and voltage ramp-up, approaching power frequency, bypass hot switching, and fault handling. Different midpoint balancing weights and device voltage equalization protection weights are used in different stages.

[0096] Define midpoint balance weights and device voltage equalization protection weight The formulas for calculating the two weights are: ,

[0097] and The results are automatically generated by looking up a table during the soft start phase or by following a preset curve.

[0098] Step a2: Adjust the allocation coefficients according to the midpoint equalization weight and the device voltage equalization protection weight.

[0099] Specifically, the changes in control logic after the weight changes are reflected in two aspects: First, the weighting ratio of each item is changed in the optimization function, and the initial allocation coefficients are solved through the optimization function. For example, optimization function ,in This represents the initial allocation coefficients calculated after the corresponding proportions of the risk term, which consists of VCE deviation, protection status, and switch stress, change. It can meet the corresponding control requirements; secondly, it can change the maximum amount and rate of change of the allocation coefficient according to the weight, when Decrease when rising Or freeze .

[0100] In one example, the midpoint balance weight and device voltage equalization protection weight Changes with the operational phase, such as Figure 5 As shown, during the low-frequency startup phase, the midpoint balance weight can be increased. To suppress midpoint fluctuations; during the bypass hot-switching phase, the midpoint balance weight can be reduced. To prioritize the stability of the voltage amplitude, frequency, and phase of the inverter output and the power supply, the rate of change of the allocation coefficient or the freezing of redundant small vector compensation should be reduced to maintain synchronization and stability between the inverter output and the power supply. During fault phases, When the value is at its maximum, the controller blocks the PWM and performs a soft shutdown.

[0101] After calculating the device voltage equalization risk factor ρ, the above scheme further calculates two weights based on the current operating stage of the motor frequency converter soft starter (such as pre-excitation, low-frequency start, frequency and voltage increase, approaching power frequency, bypass hot switching, etc.) and the ρ value—midpoint equalization weight and device voltage equalization protection weight. Then, these two weights are used to intervene in the adjustment process of the allocation coefficient, so that the system exhibits different control emphases at different stages.

[0102] The embodiments of the present invention can suppress the DC midpoint voltage deviation of the three-level INPC while incorporating the dynamic voltage bearing difference of the direct-series IGBT into the redundancy small vector allocation constraint of SVPWM, thus avoiding the introduction of additional device stress by simply pursuing rapid midpoint voltage balance.

[0103] The embodiments of the present invention incorporate the drive protection states such as DI / DT, OC, VGE, and BGV into risk factors and weight scheduling, and automatically reduce the small vector compensation speed or freeze compensation when fault precursors appear, thereby improving the protection robustness of the high-voltage soft starter.

[0104] The embodiments of the present invention automatically schedule the midpoint balancing weight and device protection weight according to the pre-excitation, low-frequency start, frequency and voltage increase, near power frequency and bypass hot switching stages, so that the control strategy is more suitable for the high-voltage motor frequency conversion soft start working condition.

[0105] This embodiment also provides a midpoint voltage and direct-series IGBT dynamic voltage equalization coordinated control device, which is used to implement the above embodiments and preferred embodiments, and will not be repeated as already described. As used below, the term "module" can be a combination of software and / or hardware that implements a predetermined function. Although the device described in the following embodiments is preferably implemented in software, hardware implementation, or a combination of software and hardware, is also possible and contemplated.

[0106] This embodiment provides a midpoint voltage and dynamic voltage equalization coordinated control device for direct-connected and series-connected IGBTs, such as... Figure 6 As shown, the device includes: The current command generation module 601 is used to calculate the midpoint voltage imbalance based on the upper and lower voltages of the DC bus, and generate a midpoint current command based on the midpoint voltage imbalance. The allocation coefficient calculation module 602 is used to calculate the allocation coefficient of the redundant small vector according to the midpoint current command. The redundant small vector has positive redundancy state and negative redundancy state. The imbalance calculation module 603 is used to calculate the dynamic voltage imbalance of the device based on the collector-emitter voltage of each series IGBT. The allocation coefficient constraint module 604 is used to constrain the allocation coefficient by combining the gate drive protection state and the dynamic pressure imbalance of the device; The allocation time determination module 605 is used to calculate the action time of redundant small vectors in the three-level INPC inverter based on the target output voltage vector, and determine the first allocation time of the positive redundancy state and the second allocation time of the negative redundancy state in the redundant small vectors based on the action time and the constrained allocation coefficient. The drive signal generation module 606 is used to generate drive signals for each series IGBT based on the first allocation time and the second allocation time.

[0107] The midpoint voltage and direct-series IGBT dynamic voltage equalization coordinated control device provided in this application embodiment can execute the midpoint voltage and direct-series IGBT dynamic voltage equalization coordinated control method provided in any embodiment of this application, and has the corresponding functional modules and beneficial effects of the method. Further functional descriptions of the above modules and units are the same as in the corresponding embodiments described above, and will not be repeated here.

[0108] Figure 7 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application.

[0109] The following is a detailed reference. Figure 7 The diagram illustrates a structural schematic suitable for implementing the electronic device described in the embodiments of this application. The electronic device may include a processor (e.g., a central processing unit, graphics processor, etc.) 701, which can perform various appropriate actions and processes according to a program stored in read-only memory (ROM) 702 or a program loaded from memory 708 into random access memory (RAM) 703. The RAM 703 also stores various programs and data required for the operation of the electronic device. The processor 701, ROM 702, and RAM 703 are interconnected via a bus 704. An input / output (I / O) interface 705 is also connected to the bus 704.

[0110] Typically, the following devices can be connected to I / O interface 705: input devices 706 including, for example, touchscreens, touchpads, keyboards, mice, cameras, microphones, accelerometers, gyroscopes, etc.; output devices 707 including, for example, liquid crystal displays (LCDs), speakers, vibrators, etc.; memory devices 708 including, for example, magnetic tapes, hard disks, etc.; and communication devices 709. Communication device 709 allows electronic devices to exchange data via wireless or wired communication with other devices. Although Figure 7 Electronic devices with various devices are shown, but it should be understood that it is not required to implement or have all of the devices shown, and more or fewer devices may be implemented or have instead.

[0111] Specifically, according to embodiments of this application, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, embodiments of this application include a computer program product comprising a computer program carried on a non-transitory computer-readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via a communication device 709, or installed from a memory 708, or installed from a ROM 702. When the computer program is executed by the processor 701, it performs the functions defined in the midpoint voltage and direct-connect IGBT dynamic voltage equalization coordinated control method of embodiments of this application.

[0112] Figure 7 The electronic device shown is merely an example and should not impose any limitation on the functionality and scope of use of the embodiments of this application.

[0113] This application also provides a computer-readable storage medium. The methods described in this application can be implemented in hardware or firmware, or implemented as recordable on a storage medium, or implemented as computer code downloaded via a network and originally stored on a remote storage medium or a non-transitory machine-readable storage medium and then stored on a local storage medium. Thus, the methods described herein can be processed by software stored on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. The storage medium can be a magnetic disk, optical disk, read-only memory, random access memory, flash memory, hard disk, or solid-state drive, etc.; further, the storage medium can also include combinations of the above types of memory. It is understood that computers, processors, microprocessor controllers, or programmable hardware include storage components capable of storing or receiving software or computer code. When the software or computer code is accessed and executed by the computer, processor, or hardware, the midpoint voltage and direct-connect IGBT dynamic voltage equalization collaborative control method shown in the above embodiments is implemented.

[0114] A portion of this application can be applied as a computer program product, such as computer program instructions, which, when executed by a computer, can invoke or provide the methods and / or technical solutions according to this application through the operation of the computer. Those skilled in the art will understand that the forms in which computer program instructions exist in a computer-readable medium include, but are not limited to, source files, executable files, installation package files, etc. Correspondingly, the ways in which computer program instructions are executed by a computer include, but are not limited to: the computer directly executing the instructions, or the computer compiling the instructions and then executing the corresponding compiled program, or the computer reading and executing the instructions, or the computer reading and installing the instructions and then executing the corresponding installed program. Here, the computer-readable medium can be any available computer-readable storage medium or communication medium accessible to a computer.

[0115] Although embodiments of this application have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of this application, and all such modifications and variations fall within the scope defined by the appended claims.

Claims

1. A method for coordinated control of midpoint voltage and dynamic voltage equalization of direct-drive and series-drive IGBTs, characterized in that, include: The midpoint voltage imbalance is calculated based on the upper and lower section voltages of the DC bus, and a midpoint current command is generated based on the midpoint voltage imbalance. The allocation coefficient of the redundant small vector is calculated based on the midpoint current command. The redundant small vector has a positive redundancy state and a negative redundancy state. Calculate the dynamic voltage imbalance of the device based on the collector-emitter voltage of each series-connected IGBT; The allocation coefficient is constrained by combining the gate drive protection state and the dynamic pressure imbalance of the device; The duration of the redundant small vectors in the three-level INPC inverter is calculated based on the target output voltage vector. The first allocation time of the positive redundancy state and the second allocation time of the negative redundancy state in the redundant small vectors are determined based on the duration of the redundancy and the constrained allocation coefficient. Drive signals for each series-connected IGBT are generated based on the first allocation time and the second allocation time.

2. The method according to claim 1, characterized in that, The calculation of the midpoint voltage imbalance based on the upper and lower voltage sections of the DC bus includes: The difference between the upper voltage and the lower voltage is divided by the total DC voltage to obtain the midpoint voltage imbalance.

3. The method according to claim 1, characterized in that, The step of generating a midpoint current command based on the midpoint voltage imbalance includes: The initial midpoint current command is obtained by PI regulation based on the midpoint voltage imbalance. The initial midpoint current command is limited to obtain the midpoint current command.

4. The method according to claim 1, characterized in that, The calculation of the allocation coefficient for the redundant small vector based on the midpoint current command includes: The allocation coefficient is calculated by substituting the midpoint current command into the first preset formula, which is: In the formula, This is the adjustment amount for the allocation coefficient. Let be the sensitivity of the k-th redundant small vector to the adjustment of the midpoint current. This refers to the midpoint current command. The average midpoint current, This is the set of adjustable redundant small vectors within the current PWM cycle. Let be the sensitivity of the j-th redundant small vector to the adjustment of the midpoint current. The allocation coefficient is... These are the initial allocation coefficients. This is the lower limit of the allocation coefficient. This represents the upper limit of the allocation coefficient.

5. The method according to claim 1, characterized in that, The calculation of the dynamic voltage imbalance of the device based on the collector-emitter voltage of each series-connected IGBT includes: When two IGBTs are connected in series, the difference between the two collector-emitter voltages is divided by the sum of the two collector-emitter voltages to obtain the dynamic voltage imbalance of the device. When there are three or more IGBTs connected in series, the average voltage of each collector-emitter voltage is calculated, and the dynamic voltage imbalance of the device is obtained based on the deviation of each collector-emitter voltage from the average voltage.

6. The method according to claim 4, characterized in that, The constraint on the allocation coefficient by combining the gate drive protection state and the dynamic pressure imbalance of the device includes: The device voltage equalization risk factor is calculated by combining the gate drive protection status and the device dynamic voltage imbalance. The gate drive protection status includes at least one of the following: abnormal current change rate protection status, current or desaturation protection status, abnormal gate-emitter voltage protection status, and abnormal gate drive bias power supply voltage protection status. If the device voltage equalization risk factor is less than the first risk threshold, the allocation coefficient is not adjusted. If the device voltage equalization risk factor is at the first risk threshold and the second risk threshold, the allocation coefficient correction amount is reduced, and the lower limit of the allocation coefficient is increased and / or the upper limit of the allocation coefficient is decreased before recalculating the allocation coefficient. If the device voltage equalization risk factor is greater than or equal to the second risk threshold, the small vector compensation is frozen or the fault soft shutdown is entered.

7. The method according to claim 6, characterized in that, The formula for calculating the voltage equalization risk factor of the device is as follows: In the formula, This is the voltage equalization risk factor for the device. The dynamic pressure imbalance of the device. The allowable dynamic bearing pressure deviation threshold, The threshold for the allowable rate of change; This is a current change rate abnormality protection state. This is an overcurrent or desaturation protection state. This is a gate-emitter voltage abnormality protection state. This is a protection state for abnormal gate drive bias power supply voltage.

8. The method according to claim 6, characterized in that, After calculating the device voltage equalization risk factor by combining the gate drive protection state and the device's dynamic pressure imbalance, the following is also included: The midpoint balancing weight and the device voltage equalization protection weight are calculated based on the current operating stage of the motor's variable frequency soft starter and the device's voltage equalization risk factor. The allocation coefficient is adjusted according to the midpoint equalization weight and the device voltage equalization protection weight.

9. A device for coordinated control of midpoint voltage and dynamic voltage equalization of direct-drive and series-drive IGBTs, characterized in that, The device includes: The current command generation module is used to calculate the midpoint voltage imbalance based on the upper and lower voltages of the DC bus, and generate a midpoint current command based on the midpoint voltage imbalance. The allocation coefficient calculation module is used to calculate the allocation coefficient of the redundant small vector according to the midpoint current command. The redundant small vector has a positive redundancy state and a negative redundancy state. The imbalance calculation module is used to calculate the dynamic voltage imbalance of the device based on the collector-emitter voltage of each series IGBT. The allocation coefficient constraint module is used to constrain the allocation coefficient by combining the gate drive protection state and the dynamic pressure imbalance of the device; The allocation time determination module is used to calculate the action time of redundant small vectors in the three-level INPC inverter based on the target output voltage vector, and determine the first allocation time of the positive redundancy state and the second allocation time of the negative redundancy state in the redundant small vectors based on the action time and the constrained allocation coefficient. The drive signal generation module is used to generate drive signals for each series-connected IGBT based on the first allocation time and the second allocation time.

10. An electronic device, characterized in that, include: The system includes a memory and a processor, which are interconnected. The memory stores computer instructions, and the processor executes the computer instructions to perform the midpoint voltage and dynamic voltage equalization coordinated control method of any one of claims 1 to 8.

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