A voltage surge suppressor based on SIP packaging and control method

CN122951454APending Publication Date: 2026-10-20TIANSHUI 749 ELECTRONICS
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Patent Information

Application Number
CN202611092798.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-07-22
Publication Date
2026-10-20

AI Technical Summary

Technical Problem

[0006]针对现有技术中存在的问题,本发明提供了一种基于SIP封装的电压浪涌抑制器及控制方法,其目的在于解决现有线性钳位模式发热极大,以及开关式稳压模块拓扑复杂、成本高昂且伴生高频开关噪声的问题,以精简的电路拓扑实现对冲击电流的主动限制与平滑的软启动,兼顾低发热与低噪声;打破传统厚膜工艺及气密性非标封装导致的尺寸庞大、物料成本高昂以及生产周期长的问题,通过标准且紧凑的SIP封装,大幅缩小产品体积,满足现代电子设备高度集成化的需求,并降低制造成本,实现大批量快速量产

Benefits of technology

本发明提供的一种基于SIP封装的电压浪涌抑制器,通过在单一基板上集成输入瞬态保护、线性电源、无稳态多谐振荡器以及浪涌抑制与主功率通路模块并采用SIP封装一体成型,克服了传统厚膜工艺及气密性非标封装带来的体积庞大和成本高昂的技术缺陷,在显著缩小产品尺寸、满足现代电子系统高度集成化与小型化需求的同时,大幅降低了制造门槛,提升了生产一致性与大批量快速交货的能力;此外,该方案在电路底层拓扑上进行了创新,突破了传统主动抑制技术中线性钳位模式发热极大以及开关式稳压模块结构复杂、伴生高频开关噪声的技术瓶颈,巧妙利用无稳态多谐振荡器输出的方波信号,经内置的整流滤波网络将其转化为缓慢上升的直流驱动电压,以极简的元器件架构实现了对主功率管开通斜率的精准控制,这种平滑的软启动机制不仅在严苛浪涌环境下有效且主动地限制了上电瞬间的冲击电流,还确保了主功率管在浪涌结束后维持低阻抗的完全导通状态,从而在无需引入复杂的高频开关控制芯片和庞大电感元件的前提下,兼顾了低发热、低噪声、低成本与高的运行可靠性。

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Abstract

This invention discloses a voltage surge suppressor and control method based on a SiP package, belonging to the field of circuit protection technology, and solving the problems of large size and severe heat generation in existing devices. It includes an input terminal, an output terminal, and a common ground terminal, and internally integrates: an input transient protection module connected to the input terminal; a linear power supply module providing the operating voltage; an astable multivibrator module generating a square wave signal; and a surge suppression and main power path module connected in series between the input and output terminals. This module rectifies and filters the square wave signal into a slowly rising DC voltage to drive the internal main power transistor, controlling the main power transistor to gradually transition from off to fully on. This invention achieves soft start with a simplified structure, effectively suppresses inrush current, meets miniaturization requirements, and is used for equipment overvoltage protection.
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Description

Technical Field

[0001] This invention belongs to the field of circuit protection technology, specifically relating to a voltage surge suppressor and control method based on SIP packaging. Background Technology

[0002] In fields such as aviation, aerospace, military electronics, and automotive electronics, voltage surge suppressors typically need to operate continuously for tens of milliseconds (e.g., 50ms) under surge voltages such as 80V. Traditional passive components struggle to withstand such high-energy surges independently without burning out. Therefore, the industry's technological approach has gradually shifted from passive absorption to active suppression.

[0003] Currently, mainstream active voltage suppression technologies mainly include two solutions: linear clamping mode and switching regulator modules. Linear clamping mode typically utilizes a high-power MOSFET operating in the linear region. When the input voltage exceeds the clamping threshold, the control circuit increases the impedance of the MOSFET by adjusting its gate voltage, thereby forcibly limiting the output voltage within a safe range. However, this approach causes all excess voltage to drop across the linearly operating MOSFET, resulting in extremely high heat generation and placing very high demands on the system's thermal design. Switching regulator modules often employ a Buck circuit-like topology, storing and releasing energy to regulate the output voltage through high-frequency switching. While this solution reduces heat generation to some extent, its complex circuit topology and numerous required components not only lead to high costs but also inevitably introduce additional electromagnetic interference and switching noise during the high-frequency switching process.

[0004] Furthermore, to meet the demands of high-reliability applications, existing technologies typically employ hermetic non-standard packaging combined with parallel soldering thick-film processes to manufacture the aforementioned surge suppressors. This thick-film process and non-standard packaging structure result in a large overall size for the surge suppressor, making it unsuitable for the highly integrated and miniaturized development trends of modern electronic devices. Simultaneously, the thick-film process involves high material costs, complex manufacturing processes, and long production cycles, making mass production extremely difficult.

[0005] In summary, existing voltage surge suppressors struggle to balance low heat generation, low noise, and low cost in their circuit design, while also suffering from physical limitations such as large size and difficulty in mass production. Therefore, there is an urgent need in this field for a voltage surge suppression solution that can achieve active limitation and soft-start of inrush current with a simplified circuit topology, while also enabling miniaturization and low-cost mass production through a more compact standard package. Summary of the Invention

[0006] To address the problems existing in the prior art, this invention provides a voltage surge suppressor and control method based on SIP packaging. Its purpose is to solve the problems of excessive heat generation in existing linear clamping modes, and the complex topology, high cost, and high-frequency switching noise of switching regulator modules. It achieves active limitation of inrush current and smooth soft-start with a simplified circuit topology, balancing low heat generation and low noise. It overcomes the problems of large size, high material costs, and long production cycles caused by traditional thick-film processes and hermetic non-standard packaging. Through standard and compact SIP packaging, it significantly reduces product size, meets the high integration requirements of modern electronic devices, reduces manufacturing costs, and enables rapid mass production.

[0007] To solve the above-mentioned technical problems, the present invention is achieved through the following technical solution: According to a first aspect of the present invention, a voltage surge suppressor based on a SIP package is provided, comprising an input terminal, an output terminal, and a common ground terminal, wherein the suppressor integrates: An input transient protection module, connected to the input terminal, is used to transiently clamp the input voltage; A linear power supply module, with its input terminal connected to the input terminal, is used to convert the input voltage into a stable internal DC operating voltage; An astable multivibrator module, powered by the linear power supply module, is used to generate a square wave signal of a preset frequency. A surge suppression and main power path module is connected in series between the input and output terminals. The surge suppression and main power path module receives the square wave signal and rectifies and filters the square wave signal into a slowly rising DC voltage to drive its internal main power transistor. It controls the main power transistor to gradually transition from the off state to the fully on state in order to suppress the inrush current at the moment of power-on.

[0008] In one possible implementation of the first aspect, the input transient protection module includes a transient suppression diode, the cathode of which is connected to the input terminal and the anode is connected to the common ground terminal.

[0009] In one possible implementation of the first aspect, the linear power supply module includes a first bias resistor, a second bias resistor, a Zener diode, a first capacitor, a regulating transistor, and a second capacitor; The collector of the regulating transistor and one end of the first bias resistor are both connected to the input terminal; the other end of the first bias resistor is connected to the base of the regulating transistor, the cathode of the Zener diode, and one end of the first capacitor via the second bias resistor; the anode of the Zener diode and the other end of the first capacitor are both connected to the common ground terminal; the emitter of the regulating transistor serves as an internal power supply terminal and is connected to one end of the second capacitor, and the other end of the second capacitor is connected to the common ground terminal.

[0010] In one possible implementation of the first aspect, the astable multivibrator module includes a timer chip, a sixth resistor, a fifth capacitor, and a fourth capacitor; the power supply terminal and reset terminal of the timer chip are both connected to the emitter of the regulating transistor, the ground terminal is connected to the common ground terminal, and the control terminal is connected to the common ground terminal via the fourth capacitor; the sixth resistor is connected in series between the output terminal of the timer chip and its trigger terminal and threshold terminal; the fifth capacitor is connected between the trigger terminal of the timer chip and the common ground terminal. The frequency of the square wave signal Satisfying the formula: .

[0011] In one possible implementation of the first aspect, the surge suppression and main power path module includes a main MOSFET, an eighth capacitor, a diode, an eighth resistor, a sixth capacitor, a driving circuit, and a seventh resistor; the drain of the main MOSFET is connected to the input terminal, and the source is connected to the output terminal; one end of the eighth capacitor is connected to the output terminal of the timer chip, and the other end is connected to one end of the eighth resistor via the diode; the other end of the eighth resistor is connected to one end of the sixth capacitor and the input terminal of the driving circuit, and the other end of the sixth capacitor is connected to the common ground terminal; the output terminal of the driving circuit is connected to the gate of the main MOSFET via the seventh resistor.

[0012] In one possible implementation of the first aspect, the driving circuit includes a second transistor and a third transistor; the eighth capacitor, diode, eighth resistor and sixth capacitor constitute a rectifier filter network for converting the square wave signal into a slowly rising DC bias voltage, and then amplifying it through the second transistor and the third transistor to slowly raise the gate voltage of the main MOS transistor.

[0013] In one possible implementation of the first aspect, all components of the input transient protection module, linear power supply module, astable multivibrator module, and surge suppression and main power path module are integrated on a single substrate and integrally formed in the form of SIP package.

[0014] According to a second aspect of the present invention, a control method suitable for the aforementioned SIP-based voltage surge suppressor is provided, comprising the following steps: Step S1: When the input terminal is connected to the power supply, the input transient protection module monitors the input voltage in real time and quickly clamps the voltage within the safe threshold when a voltage surge occurs at the moment of power-on. In step S2, the linear power supply module steps down and regulates the clamped input voltage to provide the operating voltage for the internal astable multivibrator module. Step S3: After the astable multivibrator module is powered on, it starts to oscillate and continuously outputs a square wave signal of a preset frequency. In step S4, the surge suppression and main power path module uses a rectifier filter network to smooth the square wave signal, generating a slowly rising drive voltage to control the main power transistor to perform a soft start, thereby suppressing the inrush current at the output terminal.

[0015] In one possible implementation of the second aspect, the soft-start process of the main power transistor in step S4 specifically includes: as the DC voltage output by the rectifier filter network slowly rises, the drive circuit raises the gate voltage of the main power transistor accordingly; the conduction degree of the main power transistor gradually changes from the off state, the slightly conducting state, to the fully conducting state, so that the input current flowing through the main power transistor is actively limited.

[0016] In one possible implementation of the second aspect, the control method further includes a normal operation phase: after the power-on surge suppression phase ends, the rectifier filter network outputs a stable high-level DC voltage; the drive circuit maintains the gate voltage of the main power transistor at a stable high level, the main power transistor remains fully turned on and presents a low impedance state, and the voltage at the input terminal is stably transmitted to the output terminal.

[0017] Compared with the prior art, the present invention has at least the following beneficial effects: This invention provides a voltage surge suppressor based on SiP packaging. By integrating input transient protection, linear power supply, astable multivibrator, and surge suppression and main power path modules onto a single substrate and using SiP packaging, it overcomes the technical shortcomings of traditional thick-film processes and hermetic non-standard packaging, which result in large size and high cost. It significantly reduces product size, meets the high integration and miniaturization requirements of modern electronic systems, greatly lowers the manufacturing threshold, and improves production consistency and the ability to deliver large quantities quickly. Furthermore, this solution innovates at the circuit bottom-level topology, overcoming the significant heat generation in the linear clamping mode of traditional active suppression technology. Addressing the technical bottlenecks of complex switching regulator modules and associated high-frequency switching noise, this solution cleverly utilizes the square wave signal output from an astable multivibrator. This signal is converted into a slowly rising DC drive voltage via a built-in rectifier and filter network. With a minimalist component architecture, precise control of the turn-on slope of the main power transistor is achieved. This smooth soft-start mechanism not only effectively and proactively limits the inrush current at the moment of power-on in harsh surge environments, but also ensures that the main power transistor maintains a low-impedance fully conducting state after the surge ends. Thus, without the need to introduce complex high-frequency switching control chips and large inductor components, it achieves low heat generation, low noise, low cost, and high operational reliability. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the specific embodiments of the present invention, the drawings used in the description of the specific embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0019] Figure 1 A circuit schematic diagram of a voltage surge suppressor based on a SIP package provided in an embodiment of the present invention; Figure 2 This is a schematic diagram of the layer layout structure of the voltage surge suppressor provided in an embodiment of the present invention; Figure 3 This is a schematic diagram of the internal chip bonding wiring of a voltage surge suppressor provided in an embodiment of the present invention; Figure 4 This is a schematic diagram of the substrate structure of the voltage surge suppressor after SMT assembly, as provided in an embodiment of the present invention. Figure 5 This is a schematic diagram of the substrate structure of the voltage surge suppressor after gold wire bonding, provided in an embodiment of the present invention. Figure 6 This is a perspective view of the internal structure of the voltage surge suppressor after molding, as provided in an embodiment of the present invention. Figure 7A schematic diagram of the finished product appearance structure of the voltage surge suppressor provided in the embodiment of the present invention. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0021] Example 1 The hardware structure and physical packaging of the SIP-packaged voltage surge suppressor are combined. Figure 1 The schematic diagram shown illustrates a voltage surge suppressor based on a SIP package. Its overall function is to convert the input +Vin into a stable +Vout output, preventing damage to downstream circuits from the inrush current during power-on, while also providing overvoltage and transient protection. This voltage surge suppressor includes an input terminal +Vin, an output terminal +Vout, and a common ground terminal COM. Its internal circuit topology integrates: an input transient protection module, a linear power supply module, an astable multivibrator module, a surge suppression and main power path module, and an output protection and filtering module.

[0022] The specific components and detailed connections of each functional module are as follows: The input transient protection module is used to clamp the input voltage in transient situations. It includes a transient voltage suppressor diode (TVS1). The cathode of the TVS1 is connected to the input terminal +Vin, and the anode is connected to the common ground terminal COM. When faced with a transient high voltage surge, the TVS1 will break down quickly, clamping the voltage to a safe value and protecting the subsequent circuitry from the impact.

[0023] The linear power supply module is used for step-down and voltage regulation, supplying power to the control circuit of the main power transistor. It includes a first bias resistor R1, a second bias resistor R2, a Zener diode Dz1, a first capacitor C1, a regulating transistor T1, and a second capacitor C2. The collector of the regulating transistor T1 and one end of the first bias resistor R1 are both connected to the input terminal +Vin. The other end of the first bias resistor R1 is connected to the base of the regulating transistor T1, the cathode of the Zener diode Dz1, and one end of the first capacitor C1 via the second bias resistor R2. The anode of the Zener diode Dz1 and the other end of the first capacitor C1 are both connected to the common ground terminal COM. The emitter of the regulating transistor T1 serves as the internal power supply terminal Vcc and is connected to one end of the second capacitor C2. The other end of the second capacitor C2 is connected to the common ground terminal COM.

[0024] The astable multivibrator module, powered by a linear power supply module, generates a square wave signal at a preset frequency. It includes a timer chip IC2, a sixth resistor R6, a fifth capacitor C5, and a fourth capacitor C4. The timer chip IC2 is a 555 timer. The power supply pin 8 and reset pin 4 of the timer chip IC2 are connected to the emitter of the regulating transistor T1, the ground pin 1 is connected to the common ground COM, and the control pin 5 is connected to the common ground COM via the fourth capacitor C4. The sixth resistor R6 is connected in series between the output pin 3 of the timer chip IC2, its trigger pin 2, and its threshold pin 6. The fifth capacitor C5 is connected between the trigger pin 2 of the timer chip IC2 and the common ground COM. The square wave signal generated by this module has a frequency of... Satisfying the formula: .

[0025] The surge suppression and main power path module is connected in series between the input terminal +Vin and the output terminal +Vout. It includes the main MOSFET Q1, the eighth capacitor C8, the diode D1, the eighth resistor R8, the sixth capacitor C6, a driver circuit composed of the second transistor T2 and the third transistor T3, and the seventh resistor R7. The drain of the main MOSFET Q1 is connected to the input terminal +Vin, and the source is connected to the output terminal +Vout. One end of the eighth capacitor C8 is connected to the output terminal of the timer chip IC2, and the other end is connected to one end of the eighth resistor R8 via the diode D1. The other end of the eighth resistor R8 is connected to one end of the sixth capacitor C6 and the input terminal of the driver circuit. The other end of the sixth capacitor C6 is connected to the common ground terminal COM. The output terminal of the driver circuit is connected to the gate of the main MOSFET Q1 via the seventh resistor R7.

[0026] The output protection and filtering module includes a reverse protection diode D2, voltage divider resistors R10 and R11, and filter capacitors C9 and C10. The reverse protection diode D2 is used to prevent the output voltage from backflowing and damaging the circuit. The voltage divider resistors R10 and R11, together with the filter capacitors C9 and C10, make the output smoother and more stable, reducing ripple and noise.

[0027] In terms of layout design and physical packaging, combined with Figures 2 to 7 As shown, in this embodiment, all integrated circuits IC1 and IC2, as well as core components such as diodes and transistors, involved in the schematic diagram are in bare chip form to meet military-grade environmental requirements and miniaturized design. In the specific manufacturing process, the layout is drawn using the SIP design module of Cadence 17.2, with each layer of the layout (…). Figure 2The finest linewidth is 75um, and the substrate plating process employs electroplating and etching-back processes. All capacitors and resistors are surface-mounted using SMT and reflow soldering processes; transistors T1 and T2, integrated circuits IC1 and IC2, and transient transistor TVS1, etc., are also integrated onto the substrate using SMT and reflow soldering processes (e.g., Figure 4 The substrate diagram after SMT is shown. For the main MOSFET Q1 and the bare diode chip, a die-mounting process is used, employing conductive adhesive for bonding. Regarding chip interconnects (such as...), Figure 5 The substrate diagram after bonding is shown. A planar bonding process and gold wire bonding technology are used. The main MOSFET Q1 and transient voltage suppressor diode TVS1 are bonded with 50µm gold wires to handle surge currents; the remaining chips are bonded with 25µm gold wires. The final product is packaged in an LGA(17501331-6)0003-SIP package (e.g., Figure 6 Plastic seal inspection diagram and Figure 7 (As shown in the product image), the actual size is only 17.5mm×13.31mm×4.28mm, which greatly reduces the volume and makes it easy to achieve low-cost, high-volume automated production.

[0028] Example 2: Voltage Surge Suppressor Control Method. Combining the hardware structure of Example 1, this example provides a voltage surge suppression control method based on the above circuit topology. It utilizes a rectifier-filter network composed of C8, D1, R8, and C6 to convert a square wave into a slowly rising DC voltage, achieving a soft-start similar to a charge pump. The specific process is divided into two stages: I. Power-on / Surge Suppression Phase (Soft Start): Step S1: When the input terminal +Vin is connected to the power supply, the transient suppression diode TVS1 in the input transient protection module monitors the input voltage in real time, and when an 80V voltage surge occurs at the moment of power-on, it breaks down quickly and clamps the voltage within the safe threshold, protecting the subsequent circuit from high voltage impact.

[0029] In step S2, the input voltage after clamping is stepped down and regulated by the linear power supply module to provide a stable DC operating voltage for the internal timer chip IC2.

[0030] In step S3, the astable multivibrator module composed of timer chip IC2 starts oscillating after being powered on, and continuously outputs a square wave signal of a preset frequency.

[0031] In step S4, the surge suppression and main power path module uses its internal rectifier and filter network (composed of C8, D1, R8, and C6) to smooth the square wave signal, generating a slowly rising DC drive voltage. This slowly rising voltage, through the drive circuit composed of T2 and T3, gradually raises the gate voltage of the main MOSFET Q1. During this process, the conduction level of the main MOSFET Q1 gradually changes from the initial off state to a slightly conducting state, and finally to a fully conducting state. Because the gate voltage is built up slowly, the input current is actively limited, avoiding the impact of instantaneous large current on the circuit, thereby achieving surge suppression.

[0032] II. Normal operating phase (without surge): After the power-on surge suppression phase (soft start) ends, the rectifier and filter network outputs a stable high-level DC voltage. At this time, the drive circuit maintains the gate voltage of the main MOSFET Q1 at a stable high level, and the main MOSFET Q1 remains fully turned on and presents a low-impedance state. The circuit only requires a very small drive current to operate, has extremely low power consumption, and stably transmits the voltage at the input terminal +Vin to the output terminal +Vout with low loss.

[0033] Based on the surge suppressor test data shown in Figure 1, the product of the specific embodiment of the present invention underwent rigorous performance testing. The product not only underwent a 96-hour high-temperature aging test, but also a three-temperature limit test (high temperature +100℃, low temperature -40℃, and room temperature +25℃).

[0034] Table 1. Actual measured data of surge suppressor

[0035] Test data shows that under extreme operating conditions with an 80V surge voltage applied to the input for 50ms, the output voltage is stably limited to the 31V-34V range. Under various input / output conditions (8V / 3A, 28V / 3A, 32V / 3A), the measured maximum voltage difference is only 0.13V, and the no-load input current is less than 20mA. These experimental results fully verify that this invention, while significantly reducing product size and adapting to the SIP standard package, provides excellent high-reliability active surge suppression with extremely low power consumption and heat generation.

[0036] In the description of this invention, it should be understood that the terms "upper", "lower", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0037] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0038] In this invention, unless otherwise explicitly specified and limited, the terms "connected" and "linked" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication between them; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise explicitly limited. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0039] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can mean that the first feature is in direct contact with the second feature, or that the first feature is in indirect contact with the second feature through an intermediate medium. Furthermore, "above," "over," and "on top" of the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0040] In this invention, the terms "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., refer to a specific feature, structure, material, or characteristic described in connection with that embodiment or example, which is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0041] Finally, it should be noted that the above-described embodiments are merely specific implementations of the present invention, used to illustrate the technical solutions of the present invention, and not to limit them. The scope of protection of the present invention is not limited thereto. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that any person skilled in the art can still modify or easily conceive of changes to the technical solutions described in the foregoing embodiments within the scope of the technology disclosed in the present invention, or make equivalent substitutions for some of the technical features; and these modifications, changes, or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be covered within the scope of protection of the present invention.

Claims

1. A voltage surge suppressor based on a SiP package, characterized in that, The suppressor includes an input terminal (+Vin), an output terminal (+Vout), and a common ground terminal (COM). Internally integrated are: An input transient protection module is connected to the input terminal (+Vin) and is used to perform transient clamping on the input voltage; A linear power supply module, with its input terminal connected to the input terminal (+Vin), is used to convert the input voltage into a stable internal DC operating voltage; An astable multivibrator module, powered by the linear power supply module, is used to generate a square wave signal of a preset frequency. The surge suppression and main power path module is connected in series between the input terminal (+Vin) and the output terminal (+Vout). The surge suppression and main power path module receives the square wave signal and rectifies and filters the square wave signal into a slowly rising DC voltage to drive its internal main power transistor. It controls the main power transistor to gradually transition from the off state to the fully on state in order to suppress the inrush current at the moment of power-on.

2. A voltage surge suppressor based on a SIP package according to claim 1, characterized in that, The input transient protection module includes a transient suppression diode (TVS1), the cathode of which is connected to the input terminal (+Vin), and the anode is connected to the common ground terminal (COM).

3. A voltage surge suppressor based on a SIP package according to claim 1, characterized in that, The linear power supply module includes a first bias resistor (R1), a second bias resistor (R2), a Zener diode (Dz1), a first capacitor (C1), a regulating transistor (T1), and a second capacitor (C2). The collector of the regulating transistor (T1) and one end of the first bias resistor (R1) are both connected to the input terminal (+Vin); the other end of the first bias resistor (R1) is connected to the base of the regulating transistor (T1), the cathode of the Zener diode (Dz1), and one end of the first capacitor (C1) via the second bias resistor (R2); the anode of the Zener diode (Dz1) and the other end of the first capacitor (C1) are both connected to the common ground terminal (COM); the emitter of the regulating transistor (T1) is connected as an internal power supply terminal to one end of the second capacitor (C2), and the other end of the second capacitor (C2) is connected to the common ground terminal (COM).

4. A voltage surge suppressor based on a SIP package according to claim 3, characterized in that, The astable multivibrator module includes a timer chip (IC2), a sixth resistor (R6), a fifth capacitor (C5), and a fourth capacitor (C4). The power supply and reset terminals of the timer chip (IC2) are both connected to the emitter of the regulating transistor (T1), its ground terminal is connected to the common ground (COM), and its control terminal is connected to the common ground (COM) via the fourth capacitor (C4). The sixth resistor (R6) is connected in series between the output terminal of the timer chip (IC2) and its trigger and threshold terminals. The fifth capacitor (C5) is connected between the trigger terminal of the timer chip (IC2) and the common ground (COM). The frequency of the square wave signal Satisfying the formula: 。 5. A voltage surge suppressor based on a SIP package according to claim 4, characterized in that, The surge suppression and main power path module includes a main MOSFET (Q1), an eighth capacitor (C8), a diode (D1), an eighth resistor (R8), a sixth capacitor (C6), a driving circuit, and a seventh resistor (R7). The drain of the main MOSFET (Q1) is connected to the input terminal (+Vin), and the source is connected to the output terminal (+Vout). One end of the eighth capacitor (C8) is connected to the output terminal of the timer chip (IC2), and the other end is connected to one end of the eighth resistor (R8) via the diode (D1). The other end of the eighth resistor (R8) is connected to one end of the sixth capacitor (C6) and the input terminal of the driving circuit, respectively. The other end of the sixth capacitor (C6) is connected to the common ground terminal (COM). The output terminal of the driving circuit is connected to the gate of the main MOSFET (Q1) via the seventh resistor (R7).

6. A voltage surge suppressor based on a SIP package according to claim 5, characterized in that, The driving circuit includes a second transistor (T2) and a third transistor (T3); the eighth capacitor (C8), diode (D1), eighth resistor (R8) and sixth capacitor (C6) constitute a rectifier and filter network, which is used to convert the square wave signal into a slowly rising DC bias voltage, and after being amplified by the second transistor (T2) and the third transistor (T3), slowly raise the gate voltage of the main MOSFET (Q1).

7. A voltage surge suppressor based on a SIP package according to any one of claims 1 to 6, characterized in that, All components of the input transient protection module, linear power supply module, astable multivibrator module, and surge suppression and main power path module are integrated on a single substrate and integrally formed in a SIP package.

8. A control method applicable to a voltage surge suppressor based on a SIP package as described in any one of claims 1 to 7, characterized in that, Includes the following steps: Step S1: When the input terminal (+Vin) is connected to the power supply, the input transient protection module monitors the input voltage in real time and clamps the voltage within the safe threshold when a voltage surge occurs at the moment of power-on. In step S2, the linear power supply module steps down and regulates the clamped input voltage to provide the operating voltage for the internal astable multivibrator module. Step S3: After the astable multivibrator module is powered on, it starts to oscillate and continuously outputs a square wave signal of a preset frequency. In step S4, the surge suppression and main power path module uses a rectifier filter network to smooth the square wave signal, generating a slowly rising drive voltage to control the main power transistor to perform a soft start, thereby suppressing the inrush current at the output terminal.

9. The control method according to claim 8, characterized in that, In step S4, the soft-start process of the main power transistor specifically includes: as the DC voltage output by the rectifier filter network slowly rises, the drive circuit raises the gate voltage of the main power transistor accordingly; the conduction degree of the main power transistor gradually changes from the off state, the slightly conducting state, to the fully conducting state, so that the input current flowing through the main power transistor is actively limited.

10. The control method according to claim 9, characterized in that, The control method also includes a normal operation phase: after the power-on surge suppression phase ends, the rectifier filter network outputs a stable high-level DC voltage; the drive circuit maintains the gate voltage of the main power transistor at a stable high level, the main power transistor remains fully turned on and presents a low impedance state, and the voltage at the input terminal (+Vin) is stably transmitted to the output terminal (+Vout).