Frequency multiplication circuit and method of operation thereof

Abstract

Embodiments of this application relate to a frequency multiplier circuit and its operation method. The frequency multiplier circuit includes: a parallel arrangement of resistive and switching devices; a current path including a first terminal coupled to a first terminal of the parallel arrangement; a current source configured to output current; a switching circuit coupled between a second terminal of the current path and the current source; and a voltage sensing circuit including an output terminal and an input terminal coupled to the switching circuit. The circuit is configured to output a signal at the output terminal of the voltage sensing circuit based on the simultaneous occurrence of a first voltage level output from the switching circuit and a current path conduction current and the switching devices being in a closed state, and the simultaneous occurrence of a second voltage level output from the switching circuit and a current path conduction current and the switching devices being in an open state.

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