Analog-to-digital converter based adaptive range threshold detection system and method

Abstract

This invention provides an adaptive range threshold detection system and method based on an analog-to-digital converter (ADC). The system includes: a digital control module, used to control the input of a target analog voltage stored in an analog voltage storage module to an output determination module when the system is in a sleep state; the target analog voltage is obtained by the digital control module controlling the dynamic attenuation processing of an externally input voltage signal when the system is powered on, and controlling the analog-to-digital conversion of the obtained attenuated voltage signal, so that when the voltage signal corresponding to the quantized codeword obtained by the analog-to-digital conversion conforms to a preset voltage range, the corresponding quantized codeword is converted from digital to analog; and an output determination module, used to perform analog comparison between the target analog voltage and a stepped-down signal obtained based on the dynamic attenuation processing of the current external input voltage, to obtain a determination signal and output it. This invention ensures that the system achieves high-precision adaptive detection over a wide range and ultra-long analog voltage holding at extremely low duty cycles.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit technology, and in particular to an adaptive range threshold detection system and method based on an analog-to-digital converter. Background Technology

[0002] With the rapid development of the Internet of Things (IoT), wearable smart devices, and environmental energy harvesting systems, edge computing nodes face increasingly stringent requirements for ultra-low power consumption and wide input voltage detection capabilities. In these miniaturized, battery-free, or micro-battery-powered systems, energy budgets are extremely limited, and the average power consumption is typically strictly limited to microwatts or even nanowatts. Simultaneously, due to the extreme volatility of external environmental energy sources or sensor signals, systems often require accurate detection capabilities for wide dynamic range input voltages, such as detecting high-voltage signals ranging from 3V to 5V above the standard core operating voltage. Therefore, designing a hybrid signal detection architecture that can balance wide-range high-voltage input, high-precision analog-to-digital conversion, and extremely low average system power consumption has become a critical problem urgently needing to be solved in the field of ultra-low power integrated circuit design.

[0003] Currently, the standard signal processing chain for wide voltage range detection and processing is typically as follows: A resistor divider or capacitor divider network is used to attenuate external high-voltage signals exceeding the chip's core voltage tolerance to a safe low-voltage range that can be processed by subsequent analog-to-digital converters; a low-power, high-efficiency successive approximation analog-to-digital converter is used to quantize the analog signal into digital characters; digital control logic processes these codewords according to a specific algorithm or scaling factor, and then inputs the target digital signal to the digital-to-analog converter to reconstruct the corresponding analog reference voltage; an analog comparator is used to continuously compare this reference voltage with the real-time input signal to achieve system status monitoring or threshold triggering.

[0004] However, the aforementioned signal processing architecture faces insurmountable power consumption and area performance bottlenecks in practical applications, especially in scenarios requiring low-frequency monitoring with extremely long analog voltage hold times. To provide a stable and reliable analog comparison reference for subsequent comparators, the above scheme requires analog active circuits such as digital-to-analog converters, reference voltage buffers, and common-mode bias circuits to remain constantly on throughout the entire monitoring cycle, which can last for tens of milliseconds. This results in continuous operating current losses of hundreds of microamps, leading to persistently high average power consumption for the entire system, which cannot meet the stringent budget requirements of nanowatt-level systems. Furthermore, the use of high-resistance polysilicon resistors in series with digital-to-analog converters to reduce static bias current consumes an extremely large chip silicon area, significantly increasing manufacturing costs.

[0005] Furthermore, while a passive capacitor sample-and-hold circuit can be used to store the output voltage of the digital-to-analog converter (DAC) to shut off power-consuming active circuits during the hold period, this approach also suffers from fatal flaws when faced with ultra-long hold times of tens of milliseconds. The gate tunneling leakage of conventional core thin-gate oxide capacitors and the subthreshold leakage of the sampling switching transistor cause rapid charge loss from the storage capacitor. This leakage leads to severe voltage drops, ultimately destroying the system's equivalent accuracy. In addition, traditional fixed-ratio front-end voltage divider networks lack dynamic adaptability. When the input signal level is low, the fixed high attenuation ratio significantly compresses the effective amplitude of the signal, causing a sharp deterioration in quantization accuracy and signal-to-noise ratio in the low-voltage range. This makes it difficult to simultaneously ensure the safety of high-voltage signal input and the high resolution of low-voltage signal detection. Summary of the Invention

[0006] This invention provides an adaptive range threshold detection system and method based on an analog-to-digital converter, which solves the defects in the prior art where the active analog circuit is always on during the monitoring period, resulting in high average power consumption and the fixed ratio voltage divider network lacks dynamic adaptability, resulting in limited quantization accuracy over a wide range. It ensures that the system can achieve high-precision adaptive detection over a wide range and maintain an ultra-long analog voltage at an extremely low duty cycle.

[0007] This invention provides an adaptive range threshold detection system based on an analog-to-digital converter (ADC), comprising: a digital control module, an analog voltage storage module, and an output determination module. The digital control module, when the system is in a sleep state, controls the input of a target analog voltage stored in the analog voltage storage module to the output determination module. The target analog voltage is obtained by the digital control module, when the system is powered on, controlling the dynamic attenuation processing of an externally input voltage signal and controlling the analog-to-digital conversion of the obtained attenuated voltage signal. When the voltage signal corresponding to the quantized codeword obtained from the analog-to-digital conversion conforms to a preset voltage range, the digital control module controls the digital-to-analog conversion of the corresponding quantized codeword. The output determination module performs an analog comparison between the target analog voltage and a stepped-down signal obtained from the dynamic attenuation processing of the current external input voltage to obtain a determination signal and output it.

[0008] According to the present invention, an adaptive range threshold detection system based on an analog-to-digital converter (ADC) is provided. The system further includes a signal conditioning module and an analog-to-digital (ADC) and digital-to-analog (DAC) conversion module. Specifically: a digital control module controls the attenuation ratio coefficient of the signal conditioning module and switches the ADC to ADC mode based on the system being powered on; the signal conditioning module dynamically attenuates the externally input voltage signal based on the attenuation ratio coefficient to obtain an attenuated voltage signal and a stepped-down signal, inputting the attenuated voltage signal to the ADC and DAC module and inputting the stepped-down signal to the output determination module; the ADC and DAC module is used to, based on the ADC mode, dynamically attenuate the input voltage signal to obtain an attenuated voltage signal and a stepped-down signal, and input the attenuated voltage signal to the ADC module and the stepped-down signal to the output determination module; the ADC and DAC module is used to, based on the ADC mode, adjust the attenuation ratio coefficient of the input voltage signal to the output threshold threshold detection module. The attenuated voltage signal undergoes analog-to-digital conversion to obtain a quantized codeword, which is then input to the digital control module. The digital control module, based on the received quantized codeword, determines if the corresponding voltage signal falls within a preset voltage range. Then, based on the quantized codeword and an externally input scaling factor, it obtains the target digital codeword, controls the switching of the analog-to-digital and digital-to-analog conversion modules to digital-to-analog conversion mode, and controls the writing of the target digital codeword into the analog-to-digital and digital-to-analog conversion modules. The analog-to-digital and digital-to-analog conversion modules, based on the digital-to-analog conversion mode, perform digital-to-analog conversion on the written target digital codeword to obtain the target analog voltage, and, under the control of the digital control module, store the target analog voltage in the analog voltage storage module.

[0009] According to the present invention, an adaptive range threshold detection system based on an analog-to-digital converter (ADC) is provided. The ADC and digital-to-analog conversion module includes a multiplexer, a rail-to-rail input buffer, a capacitor ADC array, and an internal comparison circuit unit. The multiplexer is used to select a first gate to receive an attenuated voltage signal based on the ADC mode and input the received attenuated voltage signal to the rail-to-rail input buffer. The rail-to-rail input buffer is used to drive the input attenuated voltage signal to the capacitor ADC array. The capacitor ADC array performs charge sampling based on the input attenuated voltage signal and adjusts the charge distribution based on a received reference voltage to generate a corresponding analog voltage, and inputs the reference voltage and the analog voltage to the internal comparison circuit unit. The internal comparison circuit unit compares the reference voltage and the corresponding analog voltage to obtain a comparison result and inputs the comparison result to a digital control module. The digital control module determines the code value of the corresponding effective bit of the capacitor ADC array based on the comparison result to obtain the corresponding quantized codeword.

[0010] According to the present invention, an adaptive range threshold detection system based on an analog-to-digital converter (ADC) is provided. The capacitor ADC array includes ADC components arranged in an array, each component including a voltage selection switch and a capacitor. The upper plate of each capacitor receives an input attenuated voltage signal and performs charge sampling before the ADC conversion begins. A sampling charge corresponding to the attenuated voltage signal is established within the ADC array. During the conversion phase, the voltage at the upper plate node is input to an internal comparison circuit unit. A digital control module is used to determine the code value of the corresponding valid bit of each ADC component bit by bit according to a preset valid bit order, and based on the final code values ​​of all valid bits of the ADC components, combined with an externally input ratio... The process involves several steps: First, a voltage selection switch, controlled by the digital control module, selects a reference voltage for the current valid bit and inputs it to the lower plate of a capacitor. Second, the lower plate adjusts the charge distribution of the capacitor based on the received reference voltage to generate a corresponding analog voltage, which is then input to the internal comparison circuit unit. Third, the internal comparison circuit unit compares the reference voltage with the corresponding analog voltage to obtain a comparison result, which is then input to the digital control module. Fourth, the digital control module adjusts the codeword of the current valid bit based on the received comparison result to obtain the corresponding quantized codeword, and adjusts the reference voltage for the next valid bit based on the comparison result.

[0011] According to the present invention, an adaptive range threshold detection system based on an analog-to-digital converter (ADC) is provided. The ADC and digital-to-analog conversion module includes a multiplexer, a rail-to-rail input buffer, a capacitor ADC array, and an internal comparison circuit unit. The capacitor ADC array includes conversion components arranged in an array, each component including a capacitor, and each capacitor including an upper plate and a lower plate. A digital control module is used to control the multiplexer to select a second gating terminal and to control the power supply to the internal comparison circuit unit to switch the ADC and ADC to digital-to-analog conversion mode; to control each capacitor to clear its charge and write the target digital codeword to the corresponding lower plate; the upper plate generates a target analog voltage based on charge conservation and inputs the target analog voltage to the multiplexer through the second gating terminal; the multiplexer is used to input the received target analog voltage to the rail-to-rail input buffer; the rail-to-rail input buffer is used to input the input target analog voltage to the analog voltage storage module.

[0012] According to the present invention, an adaptive range threshold detection system based on an analog-to-digital converter is provided. The analog voltage storage module includes a low-leakage transmission gate switch and a storage capacitor. The digital control center controls the low-leakage transmission gate switch to close, so as to store the target analog voltage output by the rail-to-rail input buffer into the storage capacitor. After storage is completed, the low-leakage transmission gate switch is controlled to open, so as to lock the charge onto the storage capacitor.

[0013] According to the adaptive range threshold detection system based on an analog-to-digital converter provided by the present invention, the digital control module is further configured to, based on the received quantization codeword, determine when the corresponding voltage signal does not conform to a preset voltage range, and control to increase the attenuation ratio coefficient of the signal conditioning module, or control the signal conditioning module to switch to or through mode; the signal conditioning module is configured to, based on the increased attenuation ratio coefficient or the switched through mode, re-perform dynamic attenuation processing on the externally input voltage signal to obtain an updated attenuated voltage signal and a stepped-down signal, and input the updated attenuated voltage signal to the analog-to-digital and digital-to-analog conversion module, and input the updated stepped-down signal to the output determination module; the analog-to-digital and digital-to-analog conversion module is configured to, based on the analog-to-digital conversion mode, perform analog-to-digital conversion on the updated attenuated voltage signal to obtain an updated quantization codeword, and input the updated quantization codeword to the digital control module; the digital control module is configured to, based on the received updated quantization codeword, determine when the corresponding voltage signal does not conform to a preset voltage range, and re-control to increase the attenuation ratio coefficient of the signal conditioning module, or control the signal conditioning module to switch to or through mode, until it conforms to the preset voltage range.

[0014] According to the present invention, an adaptive range threshold detection system based on an analog-to-digital converter is provided. The signal conditioning module includes a switched-capacitor voltage divider network and a continuous-time voltage divider network. The switched-capacitor voltage divider network is used to adjust the attenuation ratio coefficient based on the control of the digital control module to switch between three states: direct pass, first preset voltage divider ratio, and second preset voltage divider ratio. Based on the switched state, the externally input voltage signal is sampled at high speed in discrete time to obtain an attenuated voltage signal. The continuous-time voltage divider network is used to perform continuous-time voltage divider and step-down processing on the externally input voltage signal to obtain a stepped-down signal.

[0015] According to the present invention, an adaptive range threshold detection system based on an analog-to-digital converter includes an output determination module comprising a P-type input comparator, an N-type input comparator, and a digital data selector. The digital control module is further configured to enable either the P-type or N-type input comparator based on a target analog voltage, and control the digital data selector to select and output the output result of the enabled comparator. The P-type input comparator, based on the enabling of the digital control module, obtains a first voltage difference according to the target analog voltage and the stepped-down signal obtained through dynamic attenuation processing. When the first voltage difference is greater than or equal to a first comparison threshold, a high level is used as the first comparison result; or when the first voltage difference is less than the first comparison threshold, a low level is used as the first comparison result. The N-type input comparator, based on the enabling of the digital control module, obtains a second voltage difference according to the target analog voltage and the stepped-down signal obtained through dynamic attenuation processing. When the second voltage difference is greater than or equal to a second comparison threshold, a high level is used as the second comparison result; or when the second voltage difference is less than the second comparison threshold, a low level is used as the second comparison result.

[0016] This invention also provides an adaptive range threshold detection method based on an analog-to-digital converter (ADC), applied to any of the above-described adaptive range threshold detection systems based on an ADC, comprising: acquiring a stored target analog voltage when the system is in a sleep state; the stored target analog voltage is obtained by controlling the dynamic attenuation processing of an externally input voltage signal when the system is powered on, and controlling the analog-to-digital conversion of the obtained attenuated voltage signal, so that when the voltage signal corresponding to the quantized codeword obtained by the analog-to-digital conversion meets the preset voltage range, controlling the digital-to-analog conversion of the corresponding quantized codeword and storing it; and comparing the stored target analog voltage with the step-down signal obtained by the dynamic attenuation processing of the current external input voltage when the system is in a sleep state to obtain a judgment signal and output it.

[0017] The present invention also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the adaptive range threshold detection method based on an analog-to-digital converter as described above.

[0018] The present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the adaptive range threshold detection method based on an analog-to-digital converter as described above.

[0019] The present invention also provides a computer program product, including a computer program that, when executed by a processor, implements the adaptive range threshold detection method based on an analog-to-digital converter as described above.

[0020] The adaptive range threshold detection system and method based on analog-to-digital converter (ADC) provided by this invention, through a digital control module, dynamically attenuates and performs analog-to-digital conversion on the externally input voltage signal when the system is powered on. When the voltage signal corresponding to the quantized codeword obtained from the analog-to-digital conversion conforms to a preset voltage range, the system controls the corresponding quantized codeword to undergo digital-to-analog conversion to obtain the target analog voltage. This allows the system to accurately match a wide-range external high-voltage signal by adaptively adjusting the attenuation ratio during the initial operating phase and lock in a high-precision analog reference. This overcomes the limitations of traditional fixed attenuation ratio detection circuits, which suffer from limited dynamic range and quantization error due to the difficulty in balancing range and accuracy. Furthermore, when the system is in sleep mode, the digital control module controls the input of the target analog voltage stored in the analog voltage storage module to the output judgment module to ensure... During the extremely low-power sleep period, the system stably acquires the target analog voltage latched by the analog voltage storage module, avoiding the risk of system power consumption surges and reference loss caused by the reliance on continuous power supply from the analog active module or heavy load of digital logic in the sleep state. At the same time, the output judgment module directly compares the target analog voltage with the step-down signal obtained by dynamic attenuation processing to obtain and output the judgment signal. With a real-time comparison mechanism of static continuous signal in the pure analog domain, it avoids the monitoring blind spots and judgment glitches caused by the limitations of traditional sleep-state digital comparison due to high-frequency clock wake-up delay, analog-to-digital conversion sampling interval and excessive dynamic power consumption. This maximizes the real-time judgment response and ultra-low power continuous monitoring capability of the system during the ultra-long sleep period, thereby ensuring that the system can achieve wide-range high-precision adaptive detection and ultra-long analog voltage holding under extremely low duty cycle. Attached Figure Description

[0021] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0022] Figure 1 This is one of the structural schematic diagrams of the adaptive range threshold detection system based on an analog-to-digital converter provided by the present invention; Figure 2 This is the second schematic diagram of the adaptive range threshold detection system based on an analog-to-digital converter provided by the present invention; Figure 3 This is a schematic diagram of the structure of the analog-to-digital and digital-to-analog conversion module provided by the present invention; Figure 4 This is a flowchart illustrating the adaptive range threshold detection method based on an analog-to-digital converter provided by the present invention. Figure 5 This is a schematic diagram of the structure of the electronic device provided by the present invention.

[0023] Figure label: 100: Digital control module; 200: Analog voltage storage module; 210: Low leakage transmission gate switch; 220: Storage capacitor; 300: Output determination module; 400: Signal conditioning module; 410: Switched capacitor voltage divider network; 420: Continuous-time voltage divider network; 500: Analog-to-digital and digital-to-analog converter module; 510: Multiplexer; 520: Rail-to-rail input buffer; 530: Capacitor digital-to-analog converter array; 531: Voltage selection switch; 532: Capacitor; 540: Internal comparator circuit unit; 550: Upper plate sampling switch. Detailed Implementation

[0024] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0025] Figure 1 This is one of the structural schematic diagrams of the adaptive range threshold detection system based on an analog-to-digital converter provided by the present invention, such as... Figure 1 As shown, the system includes a digital control module 100, an analog voltage storage module 200, and an output determination module 300, wherein: The digital control module 100 is used to control the input of the target analog voltage stored in the analog voltage storage module 200 to the output determination module 300 when the system is in a sleep state. The target analog voltage is obtained by the digital control module controlling the external input voltage signal to perform dynamic attenuation processing when the system is powered on, and controlling the analog-to-digital conversion of the obtained attenuated voltage signal. When the voltage signal corresponding to the quantized code word obtained by analog-to-digital conversion meets the preset voltage range, the digital control module controls the corresponding quantized code word to perform digital-to-analog conversion. The output judgment module 300 is used to perform a simulation comparison between the target analog voltage and the step-down signal obtained by dynamic attenuation processing based on the current external input voltage, obtain a judgment signal and output it.

[0026] It should be added that the preset voltage range can be set according to the externally input voltage signal, so as to control the analog voltage corresponding to the quantized codeword obtained by analog-to-digital conversion to approximate or reach the voltage signal.

[0027] In this embodiment, reference Figure 2The system also includes a signal conditioning module 400 and an analog-to-digital (ADC) and digital-to-analog (DAC) conversion module 500. Specifically: a digital control module 100 controls the attenuation ratio of the signal conditioning module 400 and switches the ADC to ADC mode based on the system being powered on; the signal conditioning module 400 dynamically attenuates the externally input voltage signal based on the attenuation ratio to obtain an attenuated voltage signal and a stepped-down signal, inputting the attenuated voltage signal to the ADC 500 and the stepped-down signal to the output determination module 300; and the ADC 500 performs analog-to-digital conversion on the attenuated voltage signal based on the ADC mode. The system converts the received voltage signal to a quantized codeword and inputs the quantized codeword into the digital control module 100. The digital control module 100 determines, based on the received quantized codeword, that the corresponding voltage signal meets the preset voltage range. Then, based on the quantized codeword and the externally input scaling factor, it obtains the target digital codeword, controls the analog-to-digital (ADC) and digital-to-analog (DAC) conversion modules to switch to DAC mode, and controls the writing of the target digital codeword into the ADC conversion module 500. The ADC conversion module 500 performs DAC conversion on the written target digital codeword based on the DAC mode to obtain the target analog voltage, and stores the target analog voltage into the analog voltage storage module 200 under the control of the digital control module 100.

[0028] It should be added that before the system is powered on, the digital control module first receives the external input start signal and determines whether the start signal (enp0) is in a valid low-level state and whether the system is in a completed latch state (done_latch=0). When the digital control module determines that the start signal is in a valid low-level state and the system is not in a completed latch state, the pure hardware combinational logic gate of the digital control module will be turned on instantly, directly setting the global analog power signal (en_global) and the core enable signal (en_sar) to a high level, thereby waking up the system. The global analog power signal (en_global) is used to control the on / off state of the global analog power domain in the system to control whether to supply power to the rail-to-rail input buffer and oscillator. The core enable signal (en_sar) is used to control the on / off state of the local core power domain in the system to control whether to supply power to the internal comparator circuit unit. See the following description for the specific structure. This non-edge-triggered mechanism can ensure that the system is powered on safely and deterministically at any time. After power-on, the digital control module will control the signal conditioning module to select the default attenuation ratio coefficient, preferably one-third voltage divider, in order to protect the core circuit.

[0029] Additionally, after the digital control module controls the storage of the target analog voltage obtained from the analog-to-digital and digital-to-analog conversion modules into the analog voltage storage module and completes charge latching, the digital control module outputs a sampling completion signal (sample_done) to the external digital circuit. Upon detecting the sampling completion signal (sample_done), the external digital circuit adjusts the start signal to a high level and sends the adjusted start signal to the digital control module. Based on the high-level start signal, the digital control module adjusts the global analog power signal (en_global) to a low level to completely power off the global analog power domain, thus putting the system into an extremely low-power sleep state. In this sleep state, the output determination module officially starts and takes over the operation to determine the target analog voltage (V). hold Under the baseline, the signal is continuously compared with the buck signal input from the signal conditioning module using extremely low power analog comparison, and a judgment signal (comp_final) is output in real time based on the comparison result. The entire process requires no external processor intervention, and the overall running time can be controlled within a preset microsecond period, with an average running time preferably between 12 and 17 μs, thereby achieving nanowatt-level closed-loop monitoring.

[0030] In addition, the analog-to-digital and digital-to-analog conversion modules also include bias circuitry for powering the rail-to-rail input buffers.

[0031] Specifically, continue to refer to Figure 2 The signal conditioning module includes a switched capacitor voltage divider network 410 and a continuous-time voltage divider network 420. The switched capacitor voltage divider network is used to adjust the attenuation ratio coefficient based on the control of the digital control module, so as to switch between three states: direct, first preset voltage divider ratio, and second preset voltage divider ratio. Based on the switched state, the externally input voltage signal is sampled at high speed in discrete time to obtain an attenuated voltage signal. The continuous-time voltage divider network is used to perform continuous-time voltage division and step-down processing on the externally input voltage signal to obtain a stepped-down signal.

[0032] It should be added that the input terminals of both the switched capacitor voltage divider network and the continuous-time voltage divider network are connected to the external wide-range high-voltage node to be measured (V). in The circuit is connected to receive externally input voltage signals. The switched capacitor voltage divider network is mainly used for high-speed discrete-time sampling. Its output is connected to the input of the subsequent analog-to-digital and digital-to-analog converter module. Internally, it is driven by control signals and enable signals output by the digital control module and has three dynamically adjustable states: direct pass, first preset voltage division ratio, and second preset voltage division ratio. Preferably, the first preset voltage division ratio is one-half, and the second preset voltage division ratio is one-third.

[0033] In addition, the continuous-time voltage divider network employs a slow, ultra-low-power branch, whose output is directly connected to the output decision module, providing a stable real-time signal after voltage reduction. Optionally, the continuous-time voltage divider network includes at least three resistors connected in series, controlled by a voltage signal (V... in The input position relative to the series resistor is used to achieve control over V. in Different voltage divider methods exist, such as a continuous-time voltage divider network consisting of three resistors connected in series: a first resistor, a second resistor, and a third resistor. The output is positioned between the second and third resistors. When V... in When the input terminal is located between the second and third resistors, the corresponding output buck signal is equal to V. in When V in When the input terminal is located between the first resistor and the second resistor, the corresponding output step-down signal is V. in Half of the voltage signal (V) in The input position of the relative series resistor can be preset based on actual needs and / or prior experience, so that the configured network can be used to directly perform voltage division and step-down processing on the external input voltage signal after the system is powered on.

[0034] In one alternative embodiment, reference Figure 3 The analog-to-digital (ADC) and digital-to-analog (DAC) modules include a multiplexer 510, a rail-to-rail input buffer 520, a capacitor DAC array 530, and an internal comparison circuit unit 540. Specifically: the multiplexer 510 selects a first gate to receive an attenuated voltage signal based on the ADC mode and inputs the received attenuated voltage signal to the rail-to-rail input buffer 520; the rail-to-rail input buffer 520 drives the input attenuated voltage signal to the capacitor DAC array 530; the capacitor DAC array 530 performs charge sampling based on the input attenuated voltage signal and adjusts the charge distribution based on a received reference voltage to generate a corresponding analog voltage, and inputs the reference voltage and analog voltage to the internal comparison circuit unit 540; the internal comparison circuit unit 540 compares the reference voltage and the corresponding analog voltage to obtain a comparison result, and inputs the comparison result to the digital control module; the digital control module determines the code value of the corresponding valid bit of the capacitor DAC array based on the comparison result, obtaining the corresponding quantized codeword.

[0035] It should be noted that the first strobe terminal is "1" to connect the attenuated voltage signal to the circuit, and through the rail-to-rail input buffer, it exerts a strong current driving capability to drive the voltage of the attenuated voltage signal stably to the upper plate of the capacitor of the capacitor digital-to-analog converter array, eliminating the impedance effect of the attenuated voltage signal, providing a stable driving voltage for the capacitor digital-to-analog converter array, and avoiding sampling distortion.

[0036] In addition, the first gate of the multiplexer is connected to the output of the signal conditioning module, the second gate of the multiplexer is connected to the voltage of the upper plate of the capacitor inside the capacitor digital-to-analog converter array, and the output of the multiplexer is connected to the input of the rail-to-rail input buffer.

[0037] Further reference Figure 3 The capacitor-to-analog converter array includes arrayed conversion components, each component including a voltage selection switch 531 and a capacitor 532. Each capacitor includes an upper plate and a lower plate. The upper plates of each capacitor are interconnected to form a common upper plate node. The upper plate of each capacitor 532 is used to receive the input attenuated voltage signal and perform charge sampling before the analog-to-digital conversion begins. A sampled charge corresponding to the attenuated voltage signal is established within the capacitor-to-analog converter array. During the conversion phase, the voltage of the upper plate node is input to the internal comparison circuit unit 540. The digital control module is used to determine the code value of the corresponding valid bit of each conversion component bit by bit according to a preset valid bit order, and based on the final code values ​​of all valid bits of the conversion components, combined with the externally input ratio... The factors are used to obtain the target digital codeword, wherein: for the current valid bit, voltage selection switch 531 is used to select the corresponding reference voltage based on the control of the digital control module, and input the selected reference voltage to the lower plate of capacitor 532; the lower plate of capacitor 532 is used to adjust the charge distribution of capacitor 532 according to the received reference voltage, generate the corresponding analog voltage, and input the analog voltage to the internal comparison circuit unit 540; the internal comparison circuit unit 540 is used to compare the reference voltage and the corresponding analog voltage, obtain the corresponding comparison result, and input the comparison result to the digital control module; the digital control module is used to adjust the codeword of the current valid bit according to the received comparison result, obtain the corresponding quantized codeword, and adjust the reference voltage of the next valid bit according to the comparison result.

[0038] In addition, the preset valid bit order can be from the most significant bit to the least significant bit. During the sampling phase, the lower plate of each capacitor is pre-connected to the common-mode reference voltage V. cm After sampling, the lower plate of each capacitor remains at the same level as the common-mode reference voltage V. cm The internal comparison circuit unit directly performs the first comparison and determines the code value of the most significant bit based on the result of the first comparison. Based on this most significant bit code value, the reference voltage of the lower plate of the first capacitor is then determined.

[0039] Accordingly, the digital control module is used to: determine, based on the received comparison result, that when the analog voltage is greater than the reference voltage, it is in a high-level state, and control the voltage selection switch of the next valid bit to switch to the negative reference voltage (V). refn When the analog voltage is determined to be less than or equal to the reference voltage, it is in a low-level state, controlling the voltage selection switch of the next effective bit to switch to the positive reference voltage (V).refp ).

[0040] It should be noted that the system performs the above-mentioned digital-to-analog conversion within a first preset time window, the length of which is preferably 5µs, and the digital control center accumulates the conversion clock pulses in real time.

[0041] After completing the above digital-to-analog conversion, the digital control module reads the quantization codewords of the capacitor digital-to-analog converter array. After determining that the corresponding voltage signal meets the preset voltage range, the target digital codeword is determined based on the read quantization codeword and the externally input scaling factor (adj<7:0>), as described below and will not be repeated here. If the voltage signal corresponding to the quantization codeword does not meet the preset voltage range, the resampling process is triggered to significantly improve the adaptive response speed of wide dynamic range signals.

[0042] Accordingly, the digital control module is also used to, based on the received quantization codeword, determine when the corresponding voltage signal does not conform to the preset voltage range, and control to increase the attenuation ratio coefficient of the signal conditioning module, or control the signal conditioning module to switch to or through mode; the signal conditioning module is used to, based on the reduced attenuation ratio coefficient or the switched through mode, re-perform dynamic attenuation processing on the externally input voltage signal to obtain an updated attenuated voltage signal and a buck signal, and input the updated attenuated voltage signal to the analog-to-digital and digital-to-analog conversion module, and input the updated buck signal to the output determination module; the analog-to-digital and digital-to-analog conversion module is used to, based on the analog-to-digital conversion mode, perform analog-to-digital conversion on the updated attenuated voltage signal to obtain an updated quantization codeword, and input the updated quantization codeword to the digital control module; the digital control module is used to, based on the received updated quantization codeword, determine when the corresponding voltage signal does not conform to the preset voltage range, and control to increase the attenuation ratio coefficient of the signal conditioning module, or control the signal conditioning module to switch to or through mode, until it conforms to the preset voltage range.

[0043] It should be noted that when the above re-sampling process is triggered, the digital control module needs to first clear the residual charge of the capacitors inside the capacitor-to-analog converter array, and then re-execute the analog-to-digital conversion using the second preset time window. The length of the second preset time window is preferably 5µs.

[0044] Regardless of whether resampling is performed, when the voltage signal corresponding to the quantized codeword meets the preset voltage range, the quantized codeword corresponding to the capacitor digital-to-analog converter array is used as the final accurate quantized codeword.

[0045] Accordingly, the digital control module controls the multiplexer to select the second gate terminal and controls the power supply to disconnect the internal comparator circuit unit to switch the analog-to-digital and digital-to-analog conversion modules to digital-to-analog conversion mode; controls each capacitor to clear its charge and writes the target digital codeword to the corresponding lower plate; the upper plate generates the target analog voltage (V) based on charge conservation. cdac The target analog voltage is input to the multiplexer through the second strobe terminal; the multiplexer is used to input the received target analog voltage to the rail-to-rail input buffer; the rail-to-rail input buffer is used to input the input target analog voltage to the analog voltage storage module.

[0046] It should be noted that the discharge of each capacitor can be controlled by connecting the upper and lower plates of the capacitor to the reference voltage; the analog-to-digital and digital-to-analog conversion modules can be switched between analog-to-digital conversion mode and digital-to-analog conversion mode by the digital control module, so as to reuse the analog-to-digital and digital-to-analog conversion modules and realize the whole process of analog-to-digital conversion and digital-to-analog reference output without adding redundant physical hardware.

[0047] It should be added that after the digital control module determines the final accurate quantization codeword, the core enable signal (en_sar) needs to be adjusted to a low level to stop the analog-to-digital conversion circuits from working, thereby significantly reducing power consumption. At this time, the multiplexer state flips, selecting the second strobe terminal "0", while the global analog power domain where the rail-to-rail input buffer is located remains powered, and the multiplexer is triggered at the same time, so that the function of the analog-to-digital and digital-to-analog conversion modules can be smoothly switched from analog-to-digital mode conversion to digital-to-analog mode conversion.

[0048] Further reference Figure 3 The analog-to-digital and digital-to-analog conversion module also includes an upper plate sampling switch 550, which connects the output of the rail-to-rail input buffer 520 and the common upper plate node of the capacitor digital-to-analog converter (CDAC) array in analog-to-digital conversion mode; in digital-to-analog conversion mode, the upper plate sampling switch 550 is in the off state.

[0049] Additionally, the capacitor-to-analog converter array also includes an upper-level board reset switch, wherein: a digital control module is used to send a reset pulse signal to the upper-level board reset switch to control the connection of the common upper plate to the common-mode reference voltage V through the upper-level board reset switch. cm And control the lower plate of each capacitor to be connected to the common-mode reference voltage V. cm This clears the initial charge of the entire capacitor array, so that after the reset pulse ends, the final quantized codeword can be written to the lower plate of the internal capacitor of the internal capacitor digital-to-analog converter array.

[0050] Furthermore, the analog-to-digital and digital-to-analog conversion modules also include an oscillator controlled by a global analog power domain. The oscillator generates a clock signal during the global analog power domain enable period and inputs the clock signal to the digital control module. The digital control module generates a reset pulse signal based on the clock signal and controls the reset switch of the capacitor digital-to-analog converter array through the reset pulse signal.

[0051] In an alternative embodiment, continue to refer to Figure 3 The analog voltage storage module includes a low-leakage transmission gate switch 210 and a storage capacitor 220. The digital control center controls the low-leakage transmission gate switch to close, so as to store the target analog voltage output by the rail-to-rail input buffer 520 into the storage capacitor 220. After storage is completed, the low-leakage transmission gate switch 210 is controlled to open, so as to lock the charge onto the storage capacitor.

[0052] It should be added that the digital control center is used to control the closing and opening of the low leakage transmission gate switch based on clock pulses. One end of the low leakage transmission gate switch is connected to the output end of the rail-to-rail input buffer and the upper plate sampling switch, respectively, and the other end is connected to the upper plate of the storage capacitor. The lower plate of the storage capacitor is grounded.

[0053] Additionally, the digital control module controls the closing of the low-leakage transmission gate switch by adjusting the sample-and-hold enable signal to a high level, so that the rail-to-rail input buffer charges the storage capacitor with the target analog voltage within the charge transfer time window. The length of the charge transfer time window is preferably 2 µs.

[0054] In one alternative embodiment, the low-leakage transmission gate switch employs a thick gate oxide device design to leverage its gate drive voltage withstand capability, maintain a constant low on-resistance across a wide input range, and avoid nonlinear distortion caused by threshold voltage loss. The storage capacitor employs a thin gate oxide native capacitor to maximize the storage capacitance within a limited area by utilizing its high areal capacitance density, reducing the voltage drop slope to achieve long-term voltage retention, and outputting a holding voltage. Thus, by combining the extremely low subthreshold leakage characteristics of the thick gate oxide device with the high areal capacitance density of the thin gate oxide native capacitor, the problem of threshold charge leakage and accuracy degradation during ultra-long standby periods is effectively solved.

[0055] In an optional embodiment, the output determination module includes a P-type input comparator, an N-type input comparator, and a digital data selector, wherein: the digital control module is further configured to enable the P-type input comparator or the N-type input comparator based on the target analog voltage, and control the digital data selector to select and output the output result of the enabled comparator; the P-type input comparator is configured to, based on the enabling of the digital control module, obtain a first voltage difference according to the target analog voltage and the stepped-down signal obtained by dynamic attenuation processing, and determine that when the first voltage difference is greater than or equal to a first comparison threshold, use a high level as the first comparison result, or determine that when the first voltage difference is less than the first comparison threshold, use a low level as the first comparison result; the N-type input comparator is configured to, based on the enabling of the digital control module, obtain a second voltage difference according to the target analog voltage and the stepped-down signal obtained by dynamic attenuation processing, and determine that when the second voltage difference is greater than or equal to a second comparison threshold, use a high level as the second comparison result, or determine that when the second voltage difference is less than the second comparison threshold, use a low level as the second comparison result.

[0056] It should be noted that the non-inverting inputs of the P-type and N-type input comparators are connected in parallel to the output of the analog voltage storage module to receive the target analog voltage stored in the module. The inverting inputs of the P-type and N-type input comparators are connected in parallel to the step-down signal output by the continuous-time voltage divider network of the signal conditioning module. The outputs of the P-type and N-type input comparators are connected to the input of the digital data selector. The selection terminal of the digital data selector is driven by the digital control module according to the logic of the most significant bit of the final determined quantization codeword to output a judgment signal.

[0057] Furthermore, based on the voltage range of the target analog voltage, enabling the P-type input comparator or N-type input comparator further includes: when the target analog voltage is determined to be greater than a first preset voltage threshold, or when the most significant bit in the quantization codeword corresponding to the target voltage is determined to be high, the selection terminal selects the output of the first comparison result; when the target analog voltage is determined to be less than a second preset voltage threshold, or when the most significant bit in the quantization codeword corresponding to the target voltage is determined to be low, the selection terminal selects the output of the second comparison result; the second preset voltage threshold is less than or equal to the first preset voltage threshold. Finally, the data selector uses the selected comparison result as the high / low level digital signal, i.e., the judgment result of the entire detection system.

[0058] Furthermore, the P-type and N-type input comparators are suitable for different input common-mode voltage ranges. The P-type comparator compares the target analog voltage with the buck signal in the lower input common-mode voltage range, while the N-type comparator compares the target analog voltage with the buck signal in the higher input common-mode voltage range. The digital control module selectively enables either the P-type or N-type input comparator based on the most significant bit of the target digital codeword to cover the full input voltage range of the output decision module. The first comparison threshold and the second comparison threshold are different and can be determined based on the corresponding comparator; no further limitations are made here.

[0059] In an optional embodiment, for an external high-voltage signal under test with a voltage fluctuation range between 0-5V, the system is initially in a deep sleep state. When the start signal enp0 is low, the digital control module judges through internal combinational logic and instantly pulls up the global analog power signal en_global and the core enable signal en_sar without waiting for the clock edge, thus starting the detection process.

[0060] The system first enters the analog-to-digital conversion stage. The multiplexer in the analog-to-digital and digital-to-analog conversion modules is controlled by the high-level core enable signal en_sar. When its strobe terminal "1" is turned on, the attenuated signal output by the signal conditioning module is sent to the rail-to-rail input buffer, and the rail-to-rail input buffer drives the internal capacitor digital-to-analog converter array to quantize the signal.

[0061] The system first performs an initial probe lasting 5µs. If the digital control module determines that the target voltage signal corresponding to the quantized codeword obtained from the initial quantization does not meet the preset voltage range, it immediately outputs a voltage divider control signal to change the topology of the signal conditioning circuit, switching it from a 1:3 voltage divider mode to a 1:1 pass-through mode, and performs an additional 5µs of precise sampling after resetting the charge.

[0062] Once the initial detection determines that no gear shift is needed or the secondary sampling task is completed, the system enters a mode switching period. The digital control module instantly pulls the core enable signal en_sar low, which directly shuts down the power-intensive internal comparator circuit unit. At the same time, the multiplexer state flips to the strobe terminal "0", reconnecting the input terminal of the rail-to-rail input buffer to the upper plate node of the internal capacitor digital-to-analog converter array.

[0063] The lower plate of the capacitor-to-analog converter array is controlled to connect to the quantization codeword `target_code<7:0>` ultimately determined by the digital control module, while a reset pulse signal clears the charge from the capacitor array. During the setup time after the reset pulse ends, the upper plate of the capacitor-to-analog converter array establishes a precise target analog voltage. Subsequently, the digital control module pulls high the sample-hold enable signal `sample_hold_enp` and closes the low-leakage transmission gate sampling switch; the rail-to-rail input buffer drives the target analog voltage to be injected into the storage capacitor, and this charging process takes approximately 2 μs.

[0064] After charging is complete, the digital control module turns off the low-leakage transmission gate switch and outputs a sampling completion signal (sample_done) to the external digital circuit. When the external digital circuit detects the sampling completion signal (sample_done), it actively pulls the start signal (enp0) high. This transition triggers the system to momentarily pull the global analog power signal (en_global) low via combinational logic. At this point, all analog active modules in the entire system are completely powered off. The system enters a deep sleep period of up to 20ms. Simulation calculations show that the average power consumption throughout the entire cycle, including the working time and the sleep period, is only 402nW.

[0065] During the 20ms sleep period, the output decision module takes over the monitoring task. It uses the target analog voltage latched on the storage capacitor as a reference to perform a static comparison with the real-time buck signal, and outputs the final decision signal comp_final based on the highest bit of the quantization codeword corresponding to the target analog voltage. This ensures that the system can achieve high-precision adaptive detection over a wide range and hold the analog voltage for an ultra-long period of time with an extremely low duty cycle.

[0066] In summary, this embodiment of the invention, through a digital control module, controls the dynamic attenuation and analog-to-digital conversion of the externally input voltage signal when the system is powered on. When the voltage signal corresponding to the quantized codeword obtained from the analog-to-digital conversion conforms to a preset voltage range, the system controls the digital-to-analog conversion of the corresponding quantized codeword to obtain the target analog voltage. This allows the system to accurately match a wide-range external high-voltage signal by adaptively adjusting the attenuation ratio during the initial operating phase and lock a high-precision analog reference. This overcomes the limitations of traditional fixed attenuation ratio detection circuits, which suffer from limited dynamic range and quantization error due to the difficulty in balancing range and accuracy. Furthermore, by controlling the target analog voltage stored in the analog voltage storage module to be input to the output judgment module when the system is in a sleep state, the digital control module ensures that the system operates at extremely low power consumption. During the sleep period, the target analog voltage latched by the analog voltage storage module is stably acquired, avoiding the risk of system power consumption surge and reference loss caused by the continuous power supply of the analog active module or the heavy load of digital logic in the sleep state. At the same time, the target analog voltage is directly compared with the step-down signal obtained by dynamic attenuation processing by the output judgment module to obtain and output the judgment signal. With the real-time comparison mechanism of static continuous signal in pure analog domain, the monitoring blind spots and judgment glitches caused by the limitations of traditional sleep-state digital comparison due to high frequency clock wake-up delay, analog-to-digital conversion sampling interval and excessive dynamic power consumption are avoided. This maximizes the real-time judgment response and ultra-low power continuous monitoring capability of the system in the ultra-long sleep period, thereby ensuring that the system can achieve wide-range high-precision adaptive detection and ultra-long analog voltage holding under extremely low duty cycle.

[0067] The adaptive range threshold detection method based on analog-to-digital converter provided by the present invention will be described below. The adaptive range threshold detection method based on analog-to-digital converter described below can be referred to in correspondence with the adaptive range threshold detection system based on analog-to-digital converter described above.

[0068] Figure 4 A flowchart illustrating an adaptive range threshold detection method based on an analog-to-digital converter is shown, applicable to any of the above-described adaptive range threshold detection systems based on an analog-to-digital converter. The method includes: Step S41: Based on the system being in a sleep state, acquire the stored target analog voltage; the stored target analog voltage is obtained by first controlling the external input voltage signal to be dynamically attenuated based on the system being powered on, and controlling the obtained attenuated voltage signal to be converted from analog to digital, so that when the target voltage signal corresponding to the quantized codeword obtained by analog-to-digital conversion meets the preset voltage range, the corresponding quantized codeword is converted from digital to analog and stored. Step S42: Based on the system being in a sleep state, the system controls the storage of the target analog voltage and compares it with the step-down signal obtained by dynamic attenuation processing based on the current external input voltage to obtain a judgment signal and output it.

[0069] It should be noted that the specific principles of the embodiments of the present invention are the same as those of the system embodiments described above. For details, please refer to the system embodiments above. More detailed explanations will not be repeated here.

[0070] Figure 5 An example is a schematic diagram of the physical structure of an electronic device, such as... Figure 5 As shown, the electronic device may include: a processor 510, a communication interface 520, a memory 530, and a communication bus 540, wherein the processor 510, the communication interface 520, and the memory 530 communicate with each other through the communication bus 540. The processor 510 can call logic instructions in the memory 530 to execute an adaptive range threshold detection method based on an analog-to-digital converter. This method includes: acquiring a stored target analog voltage when the system is in a sleep state; the stored target analog voltage is obtained by controlling the dynamic attenuation processing of an externally input voltage signal when the system is powered on, and controlling the analog-to-digital conversion of the obtained attenuated voltage signal, so that when the target voltage signal corresponding to the quantized codeword obtained by the analog-to-digital conversion meets the preset voltage range, controlling the digital-to-analog conversion of the corresponding quantized codeword to obtain and store the target analog voltage; and when the system is in a sleep state, controlling the analog comparison between the stored target analog voltage and the step-down signal obtained by the dynamic attenuation processing of the current external input voltage to obtain and output a judgment signal.

[0071] Furthermore, the logical instructions in the aforementioned memory 530 can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0072] On the other hand, the present invention also provides a computer program product, which includes a computer program that can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer can execute the adaptive range threshold detection method based on an analog-to-digital converter provided by the above methods. The method includes: acquiring a stored target analog voltage based on the system being in a sleep state; the stored target analog voltage is obtained by controlling the dynamic attenuation processing of an externally input voltage signal based on the system being powered on, and controlling the analog-to-digital conversion of the obtained attenuated voltage signal, so that when the target voltage signal corresponding to the quantized codeword obtained by the analog-to-digital conversion meets the preset voltage range, the corresponding quantized codeword is converted from digital to analog to obtain the target analog voltage and stored; and comparing the stored target analog voltage with the step-down signal obtained by the dynamic attenuation processing of the current external input voltage based on the system being in a sleep state to obtain a judgment signal and output it.

[0073] In another aspect, the present invention also provides a non-transitory computer-readable storage medium storing a computer program thereon. When executed by a processor, the computer program implements the adaptive range threshold detection method based on an analog-to-digital converter provided by the above methods. The method includes: acquiring a stored target analog voltage based on the system being in a sleep state; the stored target analog voltage is obtained by controlling the dynamic attenuation processing of an externally input voltage signal based on the system being powered on, and controlling the analog-to-digital conversion of the obtained attenuated voltage signal, so that when the target voltage signal corresponding to the quantized codeword obtained by the analog-to-digital conversion meets the preset voltage range, the corresponding quantized codeword is converted from digital to analog to obtain and store the target analog voltage; and, based on the system being in a sleep state, controlling the analog comparison between the stored target analog voltage and the step-down signal obtained by the dynamic attenuation processing of the current external input voltage to obtain and output a judgment signal.

[0074] The system embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.

[0075] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.

[0076] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. An adaptive range threshold detection system based on an analog-to-digital converter, characterized in that, It includes a digital control module, an analog voltage storage module, and an output determination module, wherein: The digital control module is used to control the input of the target analog voltage stored in the analog voltage storage module to the output determination module when the system is in a sleep state. The target analog voltage is obtained by the digital control module controlling the dynamic attenuation of the externally input voltage signal when the system is powered on, and controlling the analog-to-digital conversion of the obtained attenuated voltage signal. When the voltage signal corresponding to the quantized codeword obtained by analog-to-digital conversion meets the preset voltage range, the digital control module controls the digital-to-analog conversion of the corresponding quantized codeword. The output determination module is used to perform a simulation comparison between the target analog voltage and the step-down signal obtained by dynamic attenuation processing based on the current external input voltage, and to obtain and output a determination signal.

2. The adaptive range threshold detection system based on an analog-to-digital converter according to claim 1, characterized in that, The system also includes a signal conditioning module and an analog-to-digital and digital-to-analog conversion module, wherein: The digital control module is used to control the attenuation ratio coefficient of the signal conditioning module and to control the analog-to-digital and digital-to-analog conversion module to switch to analog-to-digital conversion mode based on the system being powered on. The signal conditioning module is used to perform dynamic attenuation processing on the externally input voltage signal based on the attenuation ratio coefficient to obtain an attenuated voltage signal and a stepped-down signal, and input the attenuated voltage signal to the analog-to-digital and digital-to-analog conversion module, and input the stepped-down signal to the output determination module; The analog-to-digital and digital-to-analog conversion module is used to perform analog-to-digital conversion on the attenuated voltage signal based on the analog-to-digital conversion mode to obtain quantization codewords, and input the quantization codewords to the digital control module; The digital control module is used to determine, based on the received quantization codeword, when the corresponding voltage signal meets the preset voltage range, obtain the target digital codeword according to the quantization codeword and the externally input scaling factor, control the switching of the analog-to-digital and digital-to-analog conversion module to digital-to-analog conversion mode, and control the writing of the target digital codeword into the analog-to-digital and digital-to-analog conversion module. The analog-to-digital and digital-to-analog conversion module is used to perform digital-to-analog conversion on the written target digital codeword based on the digital-to-analog conversion mode to obtain the target analog voltage, and to store the target analog voltage in the analog voltage storage module based on the control of the digital control module.

3. The adaptive range threshold detection system based on an analog-to-digital converter according to claim 2, characterized in that, The analog-to-digital and digital-to-analog conversion module includes a multiplexer, a rail-to-rail input buffer, a capacitor-based digital-to-analog converter array, and an internal comparator circuit unit, wherein: The multiplexer is used to select the first gate to receive the attenuated voltage signal based on the analog-to-digital conversion mode, and input the received attenuated voltage signal to the rail-to-rail input buffer. The rail-to-rail input buffer is used to drive the input attenuated voltage signal to the capacitor digital-to-analog converter array; The capacitor-to-analog converter array performs charge sampling based on the input attenuated voltage signal and adjusts the charge distribution based on the received reference voltage to generate a corresponding analog voltage, and inputs the reference voltage and the analog voltage to the internal comparator circuit unit; The internal comparison circuit unit is used to compare the reference voltage and the corresponding analog voltage, obtain the corresponding comparison result, and input the comparison result into the digital control module. The digital control module is used to determine the code value of the corresponding effective bit of the capacitor digital-to-analog converter array based on the comparison result, and obtain the corresponding quantization codeword.

4. The adaptive range threshold detection system based on an analog-to-digital converter according to claim 3, characterized in that, The capacitor digital-to-analog converter array includes conversion components arranged in an array, and each component includes a voltage selection switch and a capacitor. The upper plate of each capacitor is used to receive the input attenuated voltage signal and perform charge sampling before the analog-to-digital conversion begins. In the capacitor digital-to-analog converter array, a sampled charge corresponding to the attenuated voltage signal is established. During the conversion stage, the node voltage of the upper plate is input to the internal comparison circuit unit. The digital control module is used to determine the code value of the corresponding valid bit of each conversion component in a preset valid bit order for the array-arranged conversion components, and based on the final code values ​​of all the valid bits of the conversion components, combined with an externally input scaling factor, to obtain the target digital codeword, wherein: For the currently valid bit, the voltage selection switch is used to select the corresponding reference voltage based on the control of the digital control module, and input the selected reference voltage to the lower plate of the capacitor; The lower plate of the capacitor is used to adjust the charge distribution of the capacitor according to the received reference voltage, generate a corresponding analog voltage, and input the analog voltage to the internal comparison circuit unit. The internal comparison circuit unit is used to compare the reference voltage and the corresponding analog voltage, obtain the corresponding comparison result, and input the comparison result into the digital control module. The digital control module is used to adjust the codeword of the current valid bit according to the received comparison result to obtain the corresponding quantized codeword, and to adjust the reference voltage of the next valid bit based on the comparison result.

5. The adaptive range threshold detection system based on an analog-to-digital converter according to claim 2, characterized in that, The analog-to-digital (ADC) and digital-to-analog (DAC) conversion module includes a multiplexer, a rail-to-rail input buffer, a capacitor-based ADC array, and an internal comparator circuit unit. The capacitor-based ADC array includes ADC components arranged in an array, and each component includes a capacitor. Each capacitor includes an upper plate and a lower plate, wherein: The digital control module is used to control the multiplexer to select the second gate terminal and to control the power supply of the internal comparison circuit unit to switch the analog-to-digital and digital-to-analog conversion module to digital-to-analog conversion mode; control each capacitor to clear its charge and write the target digital codeword to the corresponding lower plate; The upper electrode plate generates a target analog voltage based on charge conservation, and inputs the target analog voltage into the multiplexer through the second gate terminal; The multiplexer is used to input the received target analog voltage to the rail-to-rail input buffer; The rail-to-rail input buffer is used to input the target analog voltage to the analog voltage storage module.

6. The adaptive range threshold detection system based on an analog-to-digital converter according to claim 5, characterized in that, The analog voltage storage module includes a low-leakage transmission gate switch and a storage capacitor, wherein: The digital control center is used to control the low leakage current transmission gate switch to close, so as to store the target analog voltage output by the rail-to-rail input buffer into the storage capacitor, and after the storage is completed, to control the low leakage current transmission gate switch to open, so as to lock the charge onto the storage capacitor.

7. The adaptive range threshold detection system based on an analog-to-digital converter according to claim 2, characterized in that, The digital control module is also used to, based on the received quantized codeword, determine when the corresponding voltage signal does not conform to the preset voltage range, and control to increase the attenuation ratio coefficient of the signal conditioning module, or control the signal conditioning module to switch to or through mode. The signal conditioning module is used to dynamically attenuate the externally input voltage signal again based on the increased attenuation ratio coefficient or the switched pass-through mode to obtain an updated attenuated voltage signal and a step-down signal. The updated attenuated voltage signal is then input to the analog-to-digital and digital-to-analog conversion module, and the updated step-down signal is input to the output determination module. The analog-to-digital and digital-to-analog conversion module is used to re-convert the updated attenuated voltage signal based on the analog-to-digital conversion mode to obtain the updated quantization codeword, and input the updated quantization codeword to the digital control module. The digital control module is used to determine, based on the received updated quantization codeword, that when the corresponding voltage signal does not meet the preset voltage range, to re-control and increase the attenuation ratio coefficient of the signal conditioning module, or to control the signal conditioning module to switch to or through mode, until it meets the preset voltage range.

8. The adaptive range threshold detection system based on an analog-to-digital converter according to claim 2, characterized in that, The signal conditioning module includes a switched capacitor voltage divider network and a continuous-time voltage divider network, wherein: The switched capacitor voltage divider network is used to adjust the attenuation ratio coefficient based on the control of the digital control module, so as to switch between three states: direct, first preset voltage divider ratio and second preset voltage divider ratio, and to perform high-speed discrete-time sampling of the externally input voltage signal based on the switched state to obtain the attenuated voltage signal. The continuous-time voltage divider network is used to perform continuous-time voltage division and step-down processing on the externally input voltage signal to obtain a stepped-down signal.

9. The adaptive range threshold detection system based on an analog-to-digital converter according to claim 2, characterized in that, The output determination module includes a P-type input comparator, an N-type input comparator, and a digital data selector, wherein: The digital control module is also used to enable the P-type input comparator or the N-type input comparator based on the target analog voltage, and control the digital data selector to select and output the output result of the enabled comparator; A P-type input comparator is used to obtain a first voltage difference based on the target analog voltage and the step-down signal obtained by dynamic attenuation processing, based on the enable of the digital control module. When the first voltage difference is greater than or equal to a first comparison threshold, a high level is used as the first comparison result; or when the first voltage difference is less than the first comparison threshold, a low level is used as the first comparison result. An N-type input comparator is used to obtain a second voltage difference based on the target analog voltage and the step-down signal obtained by dynamic attenuation processing, based on the enable of the digital control module. When the second voltage difference is greater than or equal to a second comparison threshold, a high level is used as the second comparison result; or when the second voltage difference is less than the second comparison threshold, a low level is used as the second comparison result.

10. An adaptive range threshold detection method based on an analog-to-digital converter, applied to the adaptive range threshold detection system based on an analog-to-digital converter as described in any one of claims 1-9, characterized in that, include: Based on the system being in a sleep state, the stored target analog voltage is acquired; the stored target analog voltage is obtained by first controlling the external input voltage signal to be dynamically attenuated based on the system being powered on, and controlling the obtained attenuated voltage signal to be converted from analog to digital, so that when the voltage signal corresponding to the quantized codeword obtained by analog-to-digital conversion meets the preset voltage range, the corresponding quantized codeword is converted from digital to analog and stored. Since the system is in a sleep state, the controller compares the stored target analog voltage with the step-down signal obtained by dynamic attenuation processing based on the current external input voltage to obtain a judgment signal and output it.

Images