8-ary phase-shift keying constellation with grid-coded binary modulation

Abstract

Systems, methods, apparatus, and computer program products for trellis-coded binary modulation on an 8-phase-shift keying (PSK) constellation. One method may include: generating a sequence of trellis-coded modulation symbols for a binary data sequence via trellis codes. The method may also include: generating an orthogonal frequency division multiplexing (OFDM) signal precoded by discrete Fourier transform (DFT) based at least on the sequence of trellis-coded modulation symbols. The method may further include: performing a transmission to a network element based on the generated DFT-precoded OFDM signal. Additionally, the method may include: determining at least one phase transition between two consecutive trellis-coded modulation symbols of the sequence via trellis codes.

Description

Technical Field

[0001] Some example implementations may typically involve mobile or wireless telecommunications systems, such as Long Term Evolution (LTE) or 5th generation (5G) New Radio (NR) access technologies, or 5G and above, or 6th generation (6G) access technologies, or other communication systems. Background Technology

[0002] Examples of mobile or wireless telecommunications systems can include Universal Mobile Telecommunications System (UMTS) Terrestrial Radio Access Network (UTRAN), Evolved UTRAN (E-UTRAN) for Long Term Evolution (LTE), LTE-Advanced (LTE-A), MulteFire, LTE-A Pro, 5G or New Radio (NR) access technologies, and / or 6G radio access technologies. 5G and 6G radio systems refer to next-generation (NG) radio systems and network architectures. 5G and 6G network technologies are primarily based on New Radio (NR) technology, but 5G / 6G (or NG) networks can also be built on E-UTRAN radio. NR is estimated to provide bit rates of approximately 10 Gbit / s to 20 Gbit / s or higher and can at least support enhanced mobile broadband (eMBB) and ultra-reliable low-latency communications (URLLC) as well as massive machine-type communications (mMTC). NR promises to provide extremely wideband and ultra-robust, low-latency connectivity and massive networking to support the Internet of Things (IoT). Summary of the Invention

[0003] Some example embodiments may relate to a method. This method may include: generating a sequence of trellis-coded modulation symbols in an 8-phase-shift keying constellation for a binary data sequence via trellis codes. The method may also include: generating an orthogonal frequency division multiplexing (OFDM) signal precoded by discrete Fourier transform (DFT) based at least on the sequence of trellis-coded modulation symbols. The method may further include: performing a transmission to a network element based on the generated DFT-precoded OFDM signal. Additionally, the method may include: determining at least one phase transition between two consecutive trellis-coded modulation symbols of the sequence via trellis codes. According to some example embodiments, the absolute difference between two consecutive phase transitions determined by trellis codes is at most π / 4, or the two consecutive phase transitions are +π / 4, -π / 4, or -π / 4, +π / 4.

[0004] Other example embodiments may relate to an apparatus. The apparatus may include: at least one processor; and at least one memory storing instructions that, when executed by the at least one processor, cause the apparatus to at least: generate a sequence of trellis-coded modulation symbols in an 8-phase-shift keying constellation for a binary data sequence via trellis codes. The apparatus may also be configured to: generate an orthogonal frequency division multiplexed signal precoded by discrete Fourier transform, at least based on the sequence of trellis-coded modulation symbols. The apparatus may also be configured to: perform a transmission to a network element based on the generated orthogonal frequency division multiplexed signal precoded by discrete Fourier transform. Furthermore, the apparatus may be configured to: determine at least one phase transition between two consecutive trellis-coded modulation symbols of the sequence via trellis codes. According to some example embodiments, the absolute difference between two consecutive phase transitions determined by trellis codes is at most π / 4, or the two consecutive phase transitions are +π / 4, -π / 4, or -π / 4, +π / 4.

[0005] Other example embodiments may relate to an apparatus. This apparatus may include: means for generating a sequence of trellis-coded modulation symbols in an 8-phase-shift keying constellation via trellis codes for a binary data sequence. The apparatus may also include: means for generating an orthogonal frequency division multiplexing (OFDM) signal precoded by a discrete Fourier transform, at least based on the sequence of trellis-coded modulation symbols. The apparatus may further include: means for performing a transmission to a network element based on the generated OFDM signal precoded by a discrete Fourier transform. Additionally, the apparatus may include: means for determining at least one phase transition between two consecutive trellis-coded modulation symbols of the sequence via trellis codes. According to some example embodiments, the absolute difference between two consecutive phase transitions determined by trellis codes is at most π / 4, or the two consecutive phase transitions are +π / 4, -π / 4, or -π / 4, +π / 4.

[0006] According to other example embodiments, a non-transitory computer-readable medium may be encoded with instructions that, when executed in hardware, can perform a method. The method may include: generating a sequence of trellis-coded modulation symbols in an 8-phase-shift keying constellation for a binary data sequence via trellis codes. The method may also include: generating an orthogonal frequency division multiplexing (OFDM) signal precoded by a discrete Fourier transform, at least based on the sequence of trellis-coded modulation symbols. The method may further include: performing a transmission to a network element based on the generated OFDM signal precoded by a discrete Fourier transform. Additionally, the method may include: determining at least one phase transition between two consecutive trellis-coded modulation symbols of the sequence via trellis codes. According to some example embodiments, the absolute difference between two consecutive phase transitions determined by trellis codes is at most π / 4, or the two consecutive phase transitions are +π / 4, -π / 4, or -π / 4, +π / 4.

[0007] Other example embodiments may relate to a computer program product performing a method. The method may include: generating a sequence of trellis-coded modulation symbols in an 8-phase-shift keying constellation via trellis codes for a binary data sequence. The method may also include: generating an orthogonal frequency division multiplexing (OFDM) signal precoded by a discrete Fourier transform, at least based on the sequence of trellis-coded modulation symbols. The method may further include: performing a transmission to a network element based on the generated OFDM signal precoded by a discrete Fourier transform. Additionally, the method may include: determining at least one phase transition between two consecutive trellis-coded modulation symbols of the sequence via trellis codes. According to some example embodiments, the absolute difference between two consecutive phase transitions determined by trellis codes is at most π / 4, or the two consecutive phase transitions are +π / 4, -π / 4, or -π / 4, +π / 4.

[0008] Other example embodiments may relate to an apparatus that may include: a circuit system configured to generate a sequence of trellis-coded modulation symbols in an 8-phase-shift keying constellation via trellis codes for a binary data sequence. The apparatus may also include: a circuit system configured to generate an orthogonal frequency division multiplexing (OFDM) signal precoded by a discrete Fourier transform, at least based on the sequence of trellis-coded modulation symbols. The apparatus may further include: a circuit system configured to perform transmissions to network elements based on the generated OFDM signal precoded by a discrete Fourier transform. Additionally, the apparatus may include: a circuit system configured to determine at least one phase transition between two consecutive trellis-coded modulation symbols of the sequence via trellis codes. According to some example embodiments, the absolute difference between two consecutive phase transitions determined by trellis codes is at most π / 4, or the two consecutive phase transitions are +p / 4, -p / 4, or -p / 4, +p / 4. Attached Figure Description

[0009] To properly understand the exemplary embodiments, reference should be made to the accompanying drawings, in which: Figure 1 An example model of a permissible phase transition according to certain example embodiments is shown.

[0010] Figure 2 An example phase transition model for a 4-state recursive lattice code variant is shown according to certain example embodiments.

[0011] Figure 3A Two example bitmaps are shown according to certain example embodiments.

[0012] Figure 3B Another example of a bitmap according to some example embodiments is shown.

[0013] Figure 4A An example transmission operation of a transmitter according to certain example embodiments is shown.

[0014] Figure 4B An example receiving operation of a receiver according to certain example embodiments is shown.

[0015] Figure 5 An example flowchart of a method according to certain example embodiments is shown.

[0016] Figure 6 A set of apparatuses according to certain example embodiments is shown. Detailed Implementation

[0017] It will be readily understood that, as generally described and illustrated in the accompanying drawings, components of certain example embodiments can be arranged and designed in a variety of different configurations. The following is a detailed description of some example embodiments of systems, methods, apparatuses, and computer program products for performing trellis-coded binary modulation on an 8-phase-shift keying (PSK) constellation. For example, some example embodiments can be used for trellis-coded binary modulation on an 8-PSK constellation for extreme coverage and / or to achieve very low peak-to-average power ratio (PAPR) modulation.

[0018] The features, structures, or characteristics of the exemplary embodiments described throughout this specification can be combined in any suitable manner in one or more exemplary embodiments. For example, throughout this specification, the use of the phrases "certain embodiments," "exemplary embodiments," "some embodiments," or other similar language refers to the fact that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment. Therefore, the phrases "in some embodiments," "exemplary embodiments," "in some embodiments," "in other embodiments," or other similar language appearing throughout this specification do not necessarily refer to the same set of embodiments, and the described features, structures, or characteristics can be combined in any suitable manner in one or more exemplary embodiments. Furthermore, the terms "base station," "cell," "node," "gNB," "network," or other similar language throughout this specification are used interchangeably.

[0019] As used herein, “at least one of the following: ” and “at least one of ” and similar wording, where the list of two or more elements is connected by “and” or “or”, indicates at least any one of the elements, or at least any two or more of the elements, or at least all of the elements.

[0020] The 3rd Generation Partnership Project (3GPP) specifications describe the use of conventional modulation methods in the downlink (DL), such as Quadrature Phase Shift Keying (QPSK), 16 Quadrature Amplitude Modulation (16QAM), 64QAM, and up to 1024 QAM. Uplink (UL) coverage has become a critical issue, and various contributing factors to improving UL coverage have been introduced and investigated in 3GPP. As an example, 5G's new radio UL supports two waveforms: Orthogonal Frequency Division Multiplexing (OFDM) and Discrete Fourier Transform Extended Orthogonal Frequency Division Multiplexing (DFT-s-OFDM), the latter having a significantly lower PAPR and thus being used to achieve better coverage. The same waveform can also be supported in 6G. PAPR can be defined as the ratio of the peak power of a signal to its average power. Another metric used to define the performance of a power amplifier can include a cubic metric. The cubic metric is calculated based on the amplitude distribution of the signal and is designed to provide a more accurate representation of signal behavior compared to conventional PAPR measurements. In 5G UL, π / 2 binary phase shift keying (BPSK) can be configured, and frequency domain spectrum shaping (FDSS) can be used to achieve low PAPR. 3GPP has also studied frequency domain spectrum shaping with and without spectrum spread, with a focus on increasing the coverage of QPSK modulation. The 5G NR Release 18 specification also supports FDSS for QPSK without spectrum spread.

[0021] Extreme coverage solutions may be needed, which could be beneficial for enhanced mobile broadband (eMBB), especially when operating in the new frequency range of 7 GHz - 15 GHz (and higher at 6 GHz). Extreme coverage solutions may also be beneficial for various low-power wide-area (LPWA) scenarios, which can be expected to be part of early 6G use cases. The 3GPP specification also describes an interest in new low PAPR waveforms and modulation in 6G.

[0022] As described herein, certain example embodiments can provide trellis coding implementations, and the performance of trellis coding can be compared with known implementations. In current 5G architectures, π / 2-BPSK with FDSS has a low PAPR, for example, a 3dB reduction in PAPR at the 1% complementary cumulative distribution function (CCDF) point compared to QPSK. While this allows for a reduced maximum power reduction (MPR) (e.g., higher radiated power) in the user device (UE) radio frequency (RF), even lower PAPR may be expected for 6G. In modulation with constant amplitude symbols (such as BPSK), the amplitude of the resulting waveform exhibits significant variations and phase transitions and discontinuities between consecutive symbols / samples due to the influence of the cyclic prefix on the PAPR and out-of-band (OOB) characteristics of the waveform. Due to these drawbacks, certain example embodiments can consider both the PAPR and spectrum of the waveform to provide a modulation method that minimizes variations, phase transitions, and discontinuities.

[0023] When an allocation is not in the center of the operating band, or if the allocation is large compared to the bandwidth (BW) of the operating band, out-of-band (OOB) transmission (e.g., adjacent channel leakage ratio (ACLR) or spectrum emission masking (SEM)) can limit UE coverage. These allocation types are referred to as external allocations or edge allocations in 3GPP (while center allocations can be referred to as internal allocations). These limitations may cause the UE to require a large MPR to meet OOB transmission restrictions. UE limitations are also visible when MPR requirements are defined differently for different allocation areas, such as... Figure 1 As shown in the table.

[0024] In some example embodiments, gating factors may exist, such as Error Vector Magnitude (EVM), In-Band Emit (IBE), ACLR, and SEM for different modulations. Predefined UE RF requirements may exist for different scenarios (e.g., modulation, RB allocation, etc.). As UE Tx power increases, the power amplifier may introduce more distortion into the signal. For example, increased distortion may lead to more EVM, more IBE, and more ACLR. At any given moment, one of the requirements (e.g., IBE) may not be met. When this occurs, it is considered a gating factor for that scenario, and the gating factor can vary depending on the specific scenario. Even without any shaping, QPSK and π / 2 BPSK for DFT-s-OFDM are limited by ACLR or SEM for edge allocation and for central allocation (if the allocation size is large enough). Similarly, ACLR or SEM may be limited to external allocation (which lies between internal and edge allocation).

[0025] 6G can support power enhancement. For example, 6G offers the potential to unlock the available transmission (Tx) power that a UE can deliver. By unlocking the available Tx power, UL coverage can be maximized. For instance, 6G can enable a UE to transmit at its full individual potential while meeting requirements related to specific absorption rate (SAR) compliance. Beyond meeting SAR requirements, UE compliance with UL power controls can still be expected. Therefore, the additional flexibility of some of the example embodiments discussed herein can involve maximum UE Tx power. This would be a significant change compared to the current UE RF specification, where Tx power is capped. To prevent autonomous power boosting from exceeding the UE power class (e.g., 23 dBm for power class 3). Therefore, the improved power capability of the UE can be achieved in the field without the complex boosting framework defined in 5G. Furthermore, the gain potential of mesh modulation and other advanced Tx schemes is not affected by factors such as... PowerBoost Limitations on predefined values.

[0026] Some example embodiments may apply trellis coding to transmit binary data sequences using symbols from an 8-PSK constellation, instead of using a QPSK constellation as in existing low PAPR schemes. According to some example embodiments, the use of trellis coding avoids abrupt phase transitions in the resulting modulation symbol sequence, which covers the entire transmission including the actual payload (e.g., random or randomized bits to be transmitted) and the cyclic prefix. Additionally, some example embodiments may apply trellis coding of binary data over an 8-PSK constellation, followed by a standard DFT-s-OFDM process. Furthermore, signal oversampling, FDSS processing, and BW extension elements of most existing schemes can be avoided.

[0027] Figure 1 An example model of permissible phase transitions according to certain example embodiments is shown. Specifically, Figure 1 A general constellation diagram for 8-PSK modulation is shown. (e.g.) Figure 1 As shown, existing models of QPSK constellation-based schemes can be extended to include phase transitions of +π / 4 and -π / 4. These phase transitions can lead to 8-PSK constellations, which enable modulation schemes with built-in characteristics, namely very low PAPR and low OOB emission.

[0028] Figure 2 An example phase transition model for a 4-state recursive lattice code variant is shown according to certain example embodiments. Figure 2 As shown, a compact model for lattice codes can be provided. The phase transition model can be valid for all variations of the example embodiments described herein. However, different bit mappings can be considered. For example, Figure 2 The diagram shows an example bitmap for a 4-state recursive code variant, where "b" indicates selecting the corresponding phase transition when the current data bit is equal to the previous data bit, and " "Indicates the selection of the corresponding phase transition when the current data bit is opposite to the previous data bit."

[0029] According to certain example embodiments, the phase behavior of the new trellis code is smoother compared to the comparative example trellis code. Improved transmitter performance can be provided due to the smoothness of the new trellis code. Typically, signal amplitude variation can be minimized when repeating the same phase transitions (e.g., -π / 2, 0, or +π / 2). The switching point where the new transition differs from the previous transition can be critical. For example, a bit sequence [1, 0, 1, 0] starting from the state "+" and the previous bit 1 can be considered. The comparative trellis code generates a phase transition sequence [+π / 2, 0, -π / 2, -π / 2]. On the other hand, the new trellis code of certain example embodiments generates a smoother phase transition sequence with trellis-coded modulation symbols, which includes at least one of [0, +π / 2, +π / 4, -π / 4, -π / 2].

[0030] According to some example embodiments, the Bahl-Cockes-Jelinek-Raviv (BCJR) algorithm can be used to detect trellis codes, while the max-log-map (MLMAP) algorithm provides near-optimal detection performance while significantly reducing computational complexity. According to some example embodiments, a trellis model based on modulation symbol constellations can be used instead of a recursive model. For example, some example embodiments of a 4-state recursive code for receiver detection can utilize 8-PSK modulation, which may include 8 modulation symbol states, two modes, and two bit states for each modulation state, resulting in a 32-state non-recursive trellis model.

[0031] According to certain example embodiments, the phase transition behavior of the alternative lattice code can be determined by... Figure 2The same 4-state recursive phase transition diagram is used to represent this. Using this formula, PAPR and OOB emission characteristics may not need to depend on the bitmap. Other example embodiments can provide bitmaps for trellis codes that follow the phase transition model of the 4-state recursive model described herein. For example, a 16-state non-recursive phase transition model with 8 symbol states and two modes for each symbol can be used to formulate the bitmap. In some example embodiments, bitmaps with two transitions to each of the 16 states can reduce detection complexity. For example, bitmaps with two transitions to each of the 16 states can be attributed to the same bit value 0 or 1. In the case of 16 states, there are 2^8 = 256 different bitmaps with this property. In the case of 128 substantially different bitmaps, the bitmap and its complement (e.g., all bits are inverted) can provide equal performance. Testing the low-density parity-block error rate (BLER) of 128 different bitmaps resulted in two viable bitmaps that provide similar and significantly better link performance than the other bitmaps. According to some example embodiments, the bit mapping can be modified, for example, by changing all bits to their two's complement. Although other bit mappings are also possible (e.g., among the 128 alternatives with reduced detection complexity), they generally lead to a degraded link performance compared to the two preferred mappings: the recursive model and the 16-state non-recursive model.

[0032] like Figure 2 As shown, bit mappings and their complements (all bit complements) are Figure 2 The only feasible bit mapping for the phase transition model is determined, and this model results in the use of 32 states during detection at the receiver side. On the other hand, various alternative bit mappings can be used to follow... Figure 2 The phase transition diagram is a non-recursive trellis code, which can help find trellis codes with lower computational complexity, reducing the number of states and receiver detection processes.

[0033] In some example embodiments, soft bit detection on the receiver side can also be based on a 16-state non-recursive model using a maximum a posteriori (MAP) sequence detection method (e.g., the MLMAP algorithm). In some example embodiments, a 4-state recursive model can be formulated as 32 non-recursive trellis codes for MAP detection with optimal link performance. This may increase the computational complexity of the detection process compared to the computational complexity of a preferred bit mapping (e.g., as shown in Figure 3), which may have lower complexity but with similar computational complexity to... Figure 2 The model exhibits similar link and PAPR performance. In some example embodiments, based on... Figure 2 The recursive grid model scheme in the figure achieves similar BLER, PAPR, and ACLR performance to the preferred scheme based on the table in Figure 3, but has higher detection complexity.

[0034] Figure 3A Two example bitmaps (e.g., non-recursive codes) according to certain example embodiments are shown, which provide equal average link performance and equal PAPR and ACLR properties. Figure 3B Another example of a bitmap according to some example embodiments is shown. Another is obtained by supplementing all the bits highlighted by the gray background. As an example, according to some example embodiments, the phase transition sequence of the new lattice code [+π / 2, +π / 4, -π / 4, -π / 2] can be considered. As shown in Figure 3, starting from state "1" (which corresponds to the previous bit 0), the state transition sequence is [1, 5, 8, 6, 2]. When using the bitmap shown in Figure 3, this state transition sequence corresponds to the bit sequence [1, 0, 0, 1].

[0035] According to certain example embodiments, the recursive lattice code may be characterized by two allowed state transitions and a corresponding phase transition after each state (e.g., allowed phase transitions characterize each state), depending on the corresponding data bits, as follows: - After state 1, the next state is 1 and the phase transition is +π / 2; - After state 1, the next state is 2 and the phase transition is +π / 4; - After state 2, the next state is 3 and the phase transition is -π / 4; - After state 2, the next state is 4 and the phase transition is 0; - After state 3, the next state is 3 and the phase transition is -π / 2; - After state 3, the next state is 4 and the phase transition is -π / 4; - After state 4, the next state is 1 and the phase transition is +π / 4; and / or - After state 4, the next state is 2 and the phase transition is 0.

[0036] In some example embodiments, the possible bit mapping is based on a recursive state transition model, as follows: - In state 1, if the current data bit is equal to the previous data bit, then the next state is 1; - In state 1, if the current data bit is the opposite of the previous data bit, the next state is 2; - In state 2, if the current data bit is equal to the previous data bit, the next state is 4; - In state 2, if the current data bit is the opposite of the previous data bit, the next state is 3; - In state 3, if the current data bit is equal to the previous data bit, the next state is 4; - In state 3, if the current data bit is the opposite of the previous data bit, the next state is 3; - In state 4, if the current data bit is equal to the previous data bit, then the next state is 1; and / or - In state 4, if the current data bit is the opposite of the previous data bit, the next state is 2.

[0037] According to some example embodiments, other feasible bit mappings can be obtained by using a 16-state / phase transition model. Two distinct feasible mappings can exist, as well as two additional mappings obtained by complementing all bits. For example, in some example embodiments, a 4-state recursive state / phase transition model can also be applied to these cases, but the bit mappings can be different. According to other example embodiments, a recursive phase transition model can be obtained by... Figure 3A and Figure 3B The transformation table is used to formulate it. For example... Figure 3A and Figure 3B As shown, the two transition tables have a special structure that helps reduce the complexity of the detection process: the two transitions to each state may be due to the same bit value (e.g., each column of the bit transition table may contain only zero or only one bit transition).

[0038] Figure 4A An example transmission operation of a transmitter according to certain example embodiments is shown. Figure 4B An example receiving operation of a receiver according to certain example embodiments is illustrated. Specifically, Figure 4A and Figure 4B A transmission scheme including baseband transmitter and receiver signal processing is shown, wherein Figure 4A and Figure 4B The transmitter and receiver in the system can be a UE or a gNB.

[0039] refer to Figure 4A At 400, as an example, the transmitter can apply a low-density parity-check code (LDPC) to the input bitstream. In other example embodiments, other coding schemes, such as polarity, can also be applied. At 405, the transmitter can perform a cyclic prefix (CP) phase control operation on the signal to smooth the phase transient between the CP and the main OFDM symbol. According to some example embodiments, the phase control between the CP and OFDM symbols at 425 can be accomplished using a weighted overlap-add (WOLA) filter, where WOLA can be applied after 425. WOLA filtering is a signal processing technique used to efficiently achieve time-domain filtering by dividing the input signal into overlapping blocks, applying a window function to each block, and then performing a filtering operation in the frequency domain. The filtered blocks can then be recombined using the overlap-add method to reconstruct the output signal, thereby ensuring a smooth transition and good spectral characteristics.

[0040] At 410, the transmitter can perform trellis coding on the 8-PSK constellation (see [link]). Figure 2 (and Figure 3). At 415, the transmitter can perform a DFT on the signal, and at 420, it also performs an inverse fast Fourier transform (IFFT) on the signal. At 425, the transmitter can perform CP insertion using controlled phase transitions. According to some example embodiments, not all aspects of the proposed transmitter are shown. For example, the DFT size is not visible and is defined based on the signal bandwidth (e.g., the number of allocated resource elements or the number of modulation symbols fed to the DFT block). In other example embodiments, the issue not shown is resource element mapping, where the DFT extended signal to be transmitted is assigned to predefined locations in the frequency domain, as is conventionally done in DFT-s-OFDM waveform processing.

[0041] Reference Figure 4B At 430, the receiver can remove the CP from the signal. At 435, the receiver can perform a Fast Fourier Transform (FFT) on the signal, and at 440, filtering and channel equalization are performed using a weighted mask. At 445, the receiver can perform an IFFT on the signal, and at 450, an MLMAP-based detection process is performed to detect trellis coding. The sizes of the FFT and IFFT (or IDFT) blocks can correspond to, for example, the sizes of the IFFT and DFT in the transmitter. At 455, the receiver can perform LDPC decoding on the signal to provide forward error correction in the data channel.

[0042] In some example embodiments, phase continuity elements may be included in the trellis coding scheme, and results for both linear power amplifiers (PAs) and highly nonlinear PAs can be obtained using a 5G UL PA model with -4 dB output backoff. The results may include allocations of 10 resource blocks (e.g., 120 subcarriers) with an IFFT size of 1024 and a subcarrier spacing of 15 kHz. The 5G multipath channel model tapped delay line channel (TDL-C) can be used with 100 ns and 300 ns root mean square (RMS) delay spreads.

[0043] Furthermore, the results show that π / 2-BPSK (with basic detection) is more sensitive to frequency-selective multipath channels than BPSK and the trellis scheme. Additionally, basic BPSK and π / 2-BPSK may be sensitive to power amplifier nonlinearity. The results also indicate that strong PA nonlinearity has a relatively small impact on the link performance of the trellis scheme. Therefore, when a strongly nonlinear PA is present, the trellis scheme is shown to have link performance exceeding that of two BPSK schemes.

[0044] In some example embodiments, improved PSD was observed using the new trellis code. In some example embodiments, the new trellis scheme and oversampling phase interpolation scheme can provide a power spectral density (PSD) plot including phase continuity elements for a linear PA with 0 dB and 4 dB backoff. Some example embodiments can provide a scenario with a linear PA, corresponding to the ideal case where the signal is not distorted when passing through the power amplifier. Another scenario corresponds to an output backoff (OBO) of 0 dB. This OBO value represents the case where the signal is transmitted via a non-ideal PA without any backoff. Such transmission can lead to signal distortion visible in the signal spectrum. Another scenario corresponds to an OBO of 4 dB. This OBO value means a backoff of 4 dB, meaning that only the highest peak of the transmitted signal experiences distortion. According to some example embodiments, AC power can be measured using 180 subcarriers above and below the allocated 120 subcarriers, as well as a 16-subcarrier guard band (corresponding to a 5 MHz channel BW). It can be observed that the new trellis code achieves optimal ACLR, especially with the use of a non-linear PA.

[0045] In some example embodiments, the UE may indicate its capabilities to the gNB. These capabilities may include, for example, UE support for trellis modulation. In response to the UE's capabilities, the gNB may transmit a UL grant to the UE instructing the use of trellis modulation for UL Physical Uplink Shared Channel (PUSCH) transmissions. Once the UE receives the UL grant from the gNB, it can use trellis modulation to transmit the UL PUSCH according to the UL grant. In some example embodiments, trellis modulation may also be applied to DL transmissions (e.g., for PDSCH). According to some example embodiments, a minimum UE transmission power may be determined based on new MPR requirements and / or power boost values. That is, in some example embodiments, a new MPR may be specified for a new trellis-coded binary modulation on an 8-PSK constellation. According to other example embodiments, assuming SAR compliance requirements are met, the UE can transmit at its full individual potential. The MPR may define a minimum requirement for the maximum UE Tx power, or in other words, the MPR may define the maximum permissible reduction in transmission power from a reference value, and the MPR may be determined relative to a known reference value (such as, for example, 26 dBm). Alternatively or additionally, a new power boost value may also be specified, where the reference value may be increased.

[0046] Figure 5 An example flowchart of a method according to certain example embodiments is shown. In the example embodiments, Figure 5 The method can be performed by a network entity or a group of multiple network elements in a 3GPP system (such as LTE or 5G-NR). For example, in an example embodiment, Figure 5The method can be executed by the UE, similar to Figure 6 The device 10 shown.

[0047] like Figure 5 As shown, the method may include: at 500, generating a sequence of trellis-coded modulation symbols in an 8-phase-shift keying constellation for a binary data sequence via trellis codes. The method may also include: at 505, generating an orthogonal frequency division multiplexing (OFDM) signal precoded by a discrete Fourier transform (DFT) based at least on the sequence of trellis-coded modulation symbols. The method may also include: at 510, performing a transmission to a network element based on the generated OFDM signal precoded by a DFT. Additionally, the method may include: at 515, determining at least one phase transition between two consecutive trellis-coded modulation symbols of the sequence via trellis codes. According to some example embodiments, the absolute difference between two consecutive phase transitions determined by trellis codes is at most π / 4, or the two consecutive phase transitions are +π / 4, -π / 4, or -π / 4, +π / 4.

[0048] According to some example embodiments, the trellis code can be a multi-state trellis code used to transmit binary data sequences including a first state, a second state, a third state, and a fourth state. According to some example embodiments, the trellis code can be a phase transition sequence that generates corresponding trellis-coded modulation symbols, the phase transition sequence including at least one of the following phase transitions: 0, -π / 2, +π / 2, -π / 4, or +π / 4. According to other example embodiments, the trellis code may be characterized by two state transitions and the associated phase transitions after each state.

[0049] In some example embodiments, the characteristics of the lattice code depend on the corresponding data bits based on at least one of the following: after state 1, the next state is 1 and the phase transition is +π / 2; after state 1, the next state is 2 and the phase transition is +π / 4; after state 2, the next state is 3 and the phase transition is -π / 4; after state 2, the next state is 4 and the phase transition is 0; after state 3, the next state is 3 and the phase transition is -π / 2; after state 3, the next state is 4 and the phase transition is -π / 4; after state 4, the next state is 1 and the phase transition is +π / 4; or after state 4, the next state is 2 and the phase transition is 0.

[0050] According to some example embodiments, the two state transitions from each state may correspond to data bit values ​​0 and 1. According to some example embodiments, the method may also include mapping at least one data bit included in the transmission to a corresponding trellis code state and a corresponding phase of the transmission. According to other example embodiments, the mapping of at least one data bit may be based on a 4-state recursive model of the trellis code or a 16-state non-recursive phase transition model.

[0051] In some example embodiments, the 4-state recursive model of the trellis code includes at least one of the following: in state 1, if the data bit is equal to the previous data bit, the next state is 1; in state 1, if the data bit is opposite to the previous data bit, the next state is 2; in state 2, if the data bit is equal to the previous data bit, the next state is 4; in state 2, if the data bit is opposite to the previous data bit, the next state is 3; in state 3, if the data bit is equal to the previous data bit, the next state is 4; in state 3, if the data bit is opposite to the previous data bit, the next state is 3; in state 4, if the data bit is equal to the previous data bit, the next state is 1; or in state 4, if the data bit is opposite to the previous data bit, the next state is 2.

[0052] According to some example embodiments, the method may further include: transmitting the capability of means to the network element, wherein the capability includes support for trellis codes. According to some example embodiments, the method may also include: receiving an uplink grant from the network element, the uplink grant indicating the use of trellis codes for uplink physical shared channel transmission. According to other example embodiments, the 16-state phase transition model may include eight modulation symbol states and two trellis states for each symbol, the phase transitions between states may be directly based on trellis codes, and the mapping of at least one data bit may enable two transitions to each of the 16 states to be attributed to the same bit value.

[0053] In some example embodiments, the phase transition between two state transitions can be directly based on the recursive code, and the bit mapping can make two transitions to each of the 16 states attributable to the same bit value. In some example embodiments, the symbol phase for the 16 grid states is defined as at least one of the following: 0 for states 1 and 2; π / 4 for states 3 and 4; π / 2 for states 5 and 6; 3π / 4 for states 7 and 8; π for states 9 and 10; 5π / 4 for states 11 and 12; 3 / 2 for states 13 and 14; or 7π / 4 for states 15 and 16.

[0054] According to certain example embodiments, the recursive code defining state transitions operates based on input bit values ​​as one of the following: an input bit value of 0 (or 1) in state 1 causes a transition to state 4 (or 5); an input bit value of 0 (or 1) in state 2 causes a transition to state 15 (or 14); an input bit value of 0 (or 1) in state 3 causes a transition to state 4 (or 5); an input bit value of 0 (or 1) in state 4 causes a transition to state 3 (or 2); an input bit value of 0 (or 1) in state 5 causes a transition to state 8 (or 9); an input bit value of 0 (or 1) in state 6 causes a transition to state 3 (or 2); an input bit value of 0 (or 1) in state 7 causes a transition to state 8 (or 9); an input bit value of 0 (or 1) in state 8 causes a transition to state 9. The transition to state 6 (or 7); the input bit value 0 (or 1) in state 9 causes a transition to state 13 (or 12); the input bit value 0 (or 1) in state 10 causes a transition to state 6 (or 7); the input bit value 0 (or 1) in state 11 causes a transition to state 13 (or 12); the input bit value 0 (or 1) in state 12 causes a transition to state 10 (or 11); the input bit value 0 (or 1) in state 13 causes a transition to state 1 (or 16); the input bit value 0 (or 1) in state 14 causes a transition to state 10 (or 11); the input bit value 0 (or 1) in state 15 causes a transition to state 1 (or 16); or the input bit value 0 (or 1) in state 16 causes a transition to state 15 (or 14).

[0055] In some example implementations, the 16-state grid code can start from a predefined grid state.

[0056] Figure 6 A set of devices 10, 20 according to certain example embodiments is shown. In some example embodiments, devices 10, 20 may be elements in or associated with a communication network. For example, device 10 may be a UE or other similar radio communication computer equipment, and device 20 may be a BS, gNB, network, or other similar computing device.

[0057] In some example embodiments, devices 10, 20 may include one or more processors, one or more computer-readable storage media (e.g., memory, storage device, etc.), one or more radio access components (e.g., modem, transceiver, etc.), and / or a user interface. In some example embodiments, devices 10, 20 may be configured to operate using one or more radio access technologies, such as GSM, LTE, LTE-A, NR, 5G, WLAN, WiFi, NB-IoT, Bluetooth, NFC, MulteFire, and / or any other radio access technology. It should be noted that those skilled in the art will understand that devices 10, 20 may include... Figure 6 Components or features not shown in the diagram.

[0058] like Figure 6 As illustrated in the examples, devices 10, 20 may include or be coupled to processors 12, 22 for processing information and executing instructions or operations. Processors 12, 22 may be any type of general-purpose or special-purpose processor. In practice, as examples, processors 12, 22 may include one or more of a general-purpose computer, a special-purpose computer, a microprocessor, a DSP, a field-programmable gate array (FPGA), an application-specific integrated circuit (ASIC), and a processor based on a multi-core processor architecture. Although Figure 6 A single processor 12, 22 is shown, but multiple processors may be utilized according to other example embodiments. For example, it should be understood that in some example embodiments, devices 10, 20 may include two or more processors that can form a multiprocessor system capable of supporting multiple processing (e.g., in this case, processors 12, 22 may represent multiple processors). According to some example embodiments, the multiprocessor system may be tightly coupled or loosely coupled (e.g., to form a computer cluster).

[0059] Processors 12 and 22 can perform functions associated with the operation of devices 10 and 20, including, for example, precoding antenna gain / phase parameters, encoding and decoding of individual bits forming communication messages, formatting information, and overall control of devices 10 and 20. Figures 1 to 5 The process and examples are shown below.

[0060] Devices 10 and 20 may also include or be coupled to memories 14 and 24 (internal or external), which may be coupled to processors 12 and 22 respectively, for storing information and instructions executable by processors 12 and 22. Memories 14 and 24 may be one or more memories of any type suitable for the local application environment and may be implemented using any suitable volatile or non-volatile data storage technology, such as semiconductor-based memory devices, magnetic memory devices and systems, optical memory devices and systems, fixed memory and / or removable memory. For example, memories 14 and 24 may include random access memory (RAM), read-only memory (ROM), static storage devices such as disks or optical discs, hard disk drives (HDDs), or any other type of non-transitory machine or computer-readable medium, and any combination thereof. Instructions stored in memories 14 and 24 may include program instructions or computer program code that, when executed by processors 12 and 22, enable devices 10 and 20 to perform the tasks described herein.

[0061] In some example embodiments, devices 10, 20 may also include or be coupled to (internal or external) a drive or port configured to accept and read external computer-readable storage media, such as an optical disc, USB drive, flash drive, or any other storage media. For example, the external computer-readable storage media may store computer programs or software executed by processors 12, 22 and / or devices 10, 20 to perform... Figures 1 to 5 The methods and examples shown are any of the methods and examples.

[0062] In some example embodiments, devices 10, 20 may also include or be coupled to one or more antennas 15, 25 for receiving downlink signals and for transmission from devices 10, 20 via UL. Devices 10, 20 may also include transceivers 18, 28 configured to transmit and receive information. Transceivers 18, 28 may also include a radio interface (e.g., a modem) coupled to antennas 15, 25. The radio interface may correspond to a variety of radio access technologies, including one or more of GSM, LTE, LTE-A, 5G, NR, WLAN, NB-IoT, Bluetooth, BT-LE, NFC, RFID, UWB, etc. The radio interface may include other components such as filters, converters (e.g., digital-to-analog converters, etc.), symbol demappers, signal shaping components, IFFT modules, etc., to process symbols carried by the downlink or UL, such as OFDMA symbols.

[0063] For example, transceivers 18 and 28 may be configured to modulate information onto a carrier waveform for transmission by antennas 15 and 25, and demodulate information received via antennas 15 and 25 for further processing by other elements of devices 10 and 20. In other example embodiments, transceivers 18 and 28 may be able to directly transmit and receive signals or data. Additionally or alternatively, in some example embodiments, device 10 may include input and / or output devices (I / O devices). In some example embodiments, devices 10 and 20 may also include a user interface, such as a graphical user interface or a touchscreen.

[0064] In some example embodiments, memories 14, 24 store software modules that provide functionality when executed by processors 12, 22. These modules may include, for example, an operating system that provides operating system functionality to devices 10, 20. The memories may also store one or more functional modules, such as applications or programs, to provide additional functionality to devices 10, 20. Components of devices 10, 20 may be implemented in hardware or as any suitable combination of hardware and software. According to some example embodiments, devices 10, 20 may optionally be configured to communicate with each other via wireless or wired communication link 70 (in any combination) according to any radio access technology such as NR.

[0065] According to some example embodiments, processors 12, 22 and memories 14, 24 may be included in or form part of a processing circuit system or control circuit system. Additionally, in some example embodiments, transceivers 18, 28 may be included in or form part of a transceiver circuit system.

[0066] For example, in some exemplary embodiments, device 10 may be controlled by memory 14 and processor 12 to generate a sequence of trellis-coded modulation symbols in an 8-phase-shift keying constellation for a binary data sequence via trellis codes. Device 10 may also be controlled by memory 14 and processor 12 to generate an orthogonal frequency division multiplexing (OFDM) signal precoded by discrete Fourier transform, at least based on the sequence of trellis-coded modulation symbols. Device 10 may also be controlled by memory 14 and processor 12 to perform transmissions to network elements based on the generated OFDM signal precoded by discrete Fourier transform. Additionally, device 10 may be controlled by memory 14 and processor 12 to determine at least one phase transition between two consecutive trellis-coded modulation symbols of the sequence via trellis codes. According to some exemplary embodiments, the absolute difference between two consecutive phase transitions determined by trellis codes may be at most π / 4, or the two consecutive phase transitions may be +... / 4、- / 4 or - / 4、+ / 4.

[0067] In some example embodiments, the apparatus (e.g., apparatus 10 and / or apparatus 20) may include components for performing the methods, processes, or any variations discussed herein. Examples of components may include one or more processors, memory, controllers, transmitters, receivers, and / or computer program code for inducing the execution of operations.

[0068] Some example embodiments may relate to an apparatus comprising: means for generating a sequence of trellis-coded modulation symbols in an 8-phase-shift keying constellation via trellis codes for a binary data sequence. The apparatus may also include: means for generating an orthogonal frequency division multiplexing (OFDM) signal precoded by a discrete Fourier transform, at least based on the sequence of trellis-coded modulation symbols. The apparatus may further include: means for performing a transmission to a network element based on the generated OFDM signal precoded by a discrete Fourier transform. Additionally, the apparatus may include: means for determining at least one phase transition between two consecutive trellis-coded modulation symbols of the sequence via trellis codes. According to some example embodiments, the absolute difference between two consecutive phase transitions determined by trellis codes is at most π / 4, or the two consecutive phase transitions are +π / 4, -π / 4, or -π / 4, +π / 4.

[0069] Certain example embodiments described herein offer several technical improvements, enhancements, and / or advantages. For example, in some example embodiments, a scheme with excellent PAPR characteristics can be provided. Together with phase continuity elements, this scheme can provide excellent OOB characteristics even when using highly nonlinear power amplifiers. The new scheme can operate without inter-symbol interference in active white Gaussian noise (AWGN) channels. In other example embodiments, UE Tx power / UL coverage can be maximized for scenarios with approximately 0.5 bits / s / Hz (e.g., π / 2 BPSK with a coding rate of 1 / 2). According to other example embodiments, abrupt phase transitions covering the entire transmission (including, for example, the actual payload and cyclic prefix) in the generated modulation symbol sequence can be avoided.

[0070] In other example embodiments, the optimal mapping of data bits on the phase transition can be provided in a manner that minimizes the Hamming distance of the dual sequences mapped onto the symbol sequences with small Euclidean distances, resulting in a minimized detection error rate. In further example embodiments, a smooth time-varying phase transition can be provided in the generated unit-amplitude modulated symbol sequence. In other example embodiments, trellis-coded modulation that does not require a 2x DFT in the transmitter can be utilized.

[0071] A computer program product may include one or more computer-executable components configured to perform some example embodiments during program runtime. The one or more computer-executable components may be at least one piece of software code or a portion thereof. Modifications and configurations required to implement the functionality of certain example embodiments may be executed as routines, which may be implemented as added or updated software routines. The software routines may be downloaded to the device.

[0072] As an example, software or computer program code, or portions thereof, may be in the form of source code, object code, or some intermediate form, and may be stored in some carrier, distribution medium, or computer-readable medium, which may be any entity or device capable of carrying the program. Such a carrier may include, for example, recording media, computer memory, read-only memory, photoelectric and / or electrical carrier signals, telecommunication signals, and software distribution packages. Depending on the required processing power, the computer program may be executed in a single electronic digital computer or may be distributed across multiple computers. The computer-readable medium or computer-readable storage medium may be a non-transitory medium.

[0073] In other example embodiments, the function may be performed by hardware or circuitry included in the device (e.g., device 10 or device 20), for example, by using an application-specific integrated circuit (ASIC), a programmable gate array (PGA), a field-programmable gate array (FPGA), or any other combination of hardware and software. In yet another example embodiment, the function may be implemented as a signal, a non-tangible component that may be carried by an electromagnetic signal downloaded from the Internet or other networks.

[0074] According to certain example embodiments, an apparatus such as a node, device, or corresponding component may be configured as a circuit system, computer, or microprocessor (such as a single-chip computer element) or chipset, including at least a memory for providing storage capacity for arithmetic operations and an arithmetic processor for performing arithmetic operations.

[0075] It will be readily understood by those skilled in the art that the present disclosure as described above can be practiced with processes of a different sequence and / or with hardware elements in a configuration different from the disclosed configuration. Therefore, although the present disclosure has been described based on these exemplary embodiments, it will be apparent to those skilled in the art that certain modifications, variations, and alternative constructions will be readily apparent while remaining within the spirit and scope of the exemplary embodiments. While the above embodiments relate to 5G NR and LTE technologies, the above embodiments can also be applied to any other current or future 3GPP technologies, such as LTE Advanced and / or fourth-generation (4G) technologies.

[0076] Furthermore, the various implementations of this disclosure can be described with reference to the following terms, and their features can be combined in any reasonable manner.

[0077] Clause 1. An apparatus comprising: at least one processor; and at least one memory storing instructions, which, when executed by the at least one processor, cause the apparatus to at least: generate a sequence of trellis-coded modulation symbols in an 8-phase-shift keying constellation for a binary data sequence via trellis codes; generate an orthogonal frequency division multiplexing (OFDM) signal precoded by discrete Fourier transform (DFT) based at least on the sequence of trellis-coded modulation symbols; perform a transmission to a network element based on the generated OFDM signal precoded by discrete Fourier transform (DFT); and determine at least one phase transition between two consecutive trellis-coded modulation symbols of the sequence via the trellis codes, wherein the absolute difference between the two consecutively determined phase transitions via the trellis codes is at most π / 4, or the consecutive phase transitions are +p / 4, -p / 4 or -p / 4, +p / 4.

[0078] Clause 2. The apparatus according to Clause 1, wherein the trellis code is a multi-state trellis code used to transmit a binary data sequence including a first state, a second state, a third state, and a fourth state.

[0079] Clause 3. The apparatus according to Clause 1 or 2, wherein the lattice code is a phase transition sequence for generating corresponding lattice-coded modulation symbols, the phase transition sequence comprising at least one of the following phase transitions: 0, -π / 2, +π / 2, -π / 4, or +π / 4.

[0080] Clause 4. The apparatus according to any one of Clauses 1 to 3, wherein the lattice code is characterized by two state transitions and a corresponding phase transition after each state.

[0081] Clause 5. The apparatus according to Clause 4, wherein the characteristics of the lattice code depend on corresponding data bits based on at least one of the following: after state 1, the next state is 1 and the phase transition is +π / 2; after state 1, the next state is 2 and the phase transition is +π / 4; after state 2, the next state is 3 and the phase transition is -π / 4; after state 2, the next state is 4 and the phase transition is 0; after state 3, the next state is 3 and the phase transition is -π / 2; after state 3, the next state is 4 and the phase transition is -π / 4; after state 4, the next state is 1 and the phase transition is +π / 4; or after state 4, the next state is 2 and the phase transition is 0.

[0082] Clause 6. The apparatus according to Clause 4, wherein the two state transitions from each state correspond to data bit values ​​0 and 1.

[0083] Clause 7. The apparatus according to any one of Clauses 1 to 6, wherein the instructions, when executed by the at least one processor, further cause the apparatus to: map at least one data bit included in the transmission to a corresponding trellis code state and a corresponding phase of the transmission.

[0084] Clause 8. The apparatus according to Clause 7, wherein the mapping of the at least one data bit is based on a 4-state recursive model or a 16-state non-recursive phase transition model of the lattice code.

[0085] Clause 9. The apparatus according to Clause 8, wherein the 4-state recursive model of the lattice code comprises at least one of the following: in state 1, if the data bit is equal to the previous data bit, the next state is 1; in state 1, if the data bit is opposite to the previous data bit, the next state is 2; in state 2, if the data bit is equal to the previous data bit, the next state is 4; in state 2, if the data bit is opposite to the previous data bit, the next state is 3; in state 3, if the data bit is equal to the previous data bit, the next state is 4; in state 3, if the data bit is opposite to the previous data bit, the next state is 3; in state 4, if the data bit is equal to the previous data bit, the next state is 1; or in state 4, if the data bit is opposite to the previous data bit, the next state is 2.

[0086] Clause 10. The apparatus according to any one of Clauses 1 to 9, wherein the instructions, when executed by the at least one processor, further enable the apparatus to: transmit the apparatus's capability to the network element, wherein the capability includes support for the lattice code.

[0087] Clause 11. The apparatus according to any one of Clauses 1 to 10, wherein the instructions, when executed by the at least one processor, further cause the apparatus to: receive an uplink grant from the network element, the uplink grant indicating that the trellis code be used for uplink physical shared channel transmission.

[0088] Clause 12. The apparatus according to Clause 8, wherein the 16-state phase transition model comprises 8 modulation symbol states and 2 grid states for each symbol, wherein the phase transitions between states are directly based on the grid code, and wherein the mapping of the at least one data bit causes two transitions to each of the 16 states to be attributed to the same bit value.

[0089] Clause 13. The apparatus according to Clause 4, wherein the phase transition between the two state transitions is directly based on a recursive code, and wherein the bit mappings such that two transitions to each of the 16 states are attributed to the same bit value.

[0090] Clause 14. The apparatus according to Clause 8, wherein the symbol phase for the 16 grid states is defined as at least one of the following: 0 for states 1 and 2; π / 4 for states 3 and 4; π / 2 for states 5 and 6; 3π / 4 for states 7 and 8; π for states 9 and 10; 5π / 4 for states 11 and 12; 3 / 2 for states 13 and 14; or 7π / 4 for states 15 and 16.

[0091] Clause 15. The apparatus according to Clause 8, wherein the recursive code defining the state transition operates based on an input bit value as one of the following: an input bit value of 0 (or 1) in state 1 causes a transition to state 4 (or 5); an input bit value of 0 (or 1) in state 2 causes a transition to state 15 (or 14); an input bit value of 0 (or 1) in state 3 causes a transition to state 4 (or 5); an input bit value of 0 (or 1) in state 4 causes a transition to state 3 (or 2); an input bit value of 0 (or 1) in state 5 causes a transition to state 8 (or 9); an input bit value of 0 (or 1) in state 6 causes a transition to state 3 (or 2); an input bit value of 0 (or 1) in state 7 causes a transition to state 8 (or 9); an input bit value of 0 (or 1) in state 8 causes a transition to state 9; an input bit value of 0 (or 1) in state 8 causes a transition to state 9. The input bit value 0 (or 1) in state 9 causes a transition to state 13 (or 12); the input bit value 0 (or 1) in state 10 causes a transition to state 6 (or 7); the input bit value 0 (or 1) in state 11 causes a transition to state 13 (or 12); the input bit value 0 (or 1) in state 12 causes a transition to state 10 (or 11); the input bit value 0 (or 1) in state 13 causes a transition to state 1 (or 16); the input bit value 0 (or 1) in state 14 causes a transition to state 10 (or 11); the input bit value 0 (or 1) in state 15 causes a transition to state 1 (or 16); or the input bit value 0 (or 1) in state 16 causes a transition to state 15 (or 14).

[0092] Clause 16. The apparatus according to Clause 8, wherein the recursive code defining the state transition operates based on an input bit value as one of the following: an input bit value of 0 (or 1) in state 1 causes a transition to state 4 (or 5); an input bit value of 0 (or 1) in state 2 causes a transition to state 15 (or 14); an input bit value of 0 (or 1) in state 3 causes a transition to state 4 (or 5); an input bit value of 0 (or 1) in state 4 causes a transition to state 2 (or 3); an input bit value of 0 (or 1) in state 5 causes a transition to state 9 (or 8); an input bit value of 0 (or 1) in state 6 causes a transition to state 2 (or 3); an input bit value of 0 (or 1) in state 7 causes a transition to state 9 (or 8); an input bit value of 0 (or 1) in state 8 causes a transition to state 9 (or 8); The input bit value 0 (or 1) in state 9 causes a transition to state 13 (or 12); the input bit value 0 (or 1) in state 10 causes a transition to state 6 (or 7); the input bit value 0 (or 1) in state 11 causes a transition to state 13 (or 12); the input bit value 0 (or 1) in state 12 causes a transition to state 11 (or 10); the input bit value 0 (or 1) in state 13 causes a transition to state 16 (or 1); the input bit value 0 (or 1) in state 14 causes a transition to state 11 (or 10); the input bit value 0 (or 1) in state 15 causes a transition to state 16 (or 1); or the input bit value 0 (or 1) in state 16 causes a transition to state 15 (or 14).

[0093] Clause 17. The apparatus according to Clause 8, wherein the 16-state grid code begins from a predefined grid state.

[0094] Clause 18. An apparatus comprising: means for generating a sequence of trellis-coded modulation symbols in an 8-phase-shift keying constellation via trellis codes for a binary data sequence; means for generating an orthogonal frequency division multiplexing (OFDM) signal precoded by discrete Fourier transform based at least on the sequence of trellis-coded modulation symbols; means for performing a transmission to a network element based on the generated OFDM signal precoded by discrete Fourier transform; and means for determining at least one phase transition between two consecutive trellis-coded modulation symbols of the sequence via the trellis codes, wherein the absolute difference between the two consecutive phase transitions determined by the trellis codes is at most π / 4, or the consecutive phase transitions are +p / 4, -p / 4 or -p / 4, +p / 4.

[0095] Clause 19. A method comprising: generating a sequence of trellis-coded modulation symbols in an 8-phase-shift keying constellation for a binary data sequence via trellis codes; generating an orthogonal frequency division multiplexing (OFDM) signal precoded by discrete Fourier transform based at least on the sequence of trellis-coded modulation symbols; performing a transmission to a network element based on the generated OFDM signal precoded by discrete Fourier transform; and determining at least one phase transition between two consecutive trellis-coded modulation symbols of the sequence via the trellis codes, wherein the absolute difference between the two consecutive phase transitions determined by the trellis codes is at most π / 4, or the consecutive phase transitions are +p / 4, -p / 4 or -p / 4, +p / 4.

[0096] Partial vocabulary list:

Claims

1. A device for communication, comprising: At least one processor; as well as At least one memory stores instructions that, when executed by the at least one processor, cause the device to at least: A sequence of trellis-coded modulation symbols in an 8-phase-shift keying constellation is generated from a binary data sequence using trellis coding. The orthogonal frequency division multiplexing signal precoded by discrete Fourier transform is generated based at least on the sequence of trellis-coded modulation symbols. The transmission to network elements is performed based on the generated orthogonal frequency division multiplexed signal precoded by discrete Fourier transform. as well as The trellis code is used to determine at least one phase transition between two consecutive trellis-coded modulation symbols of the sequence. The absolute difference between two phase transitions continuously determined by the lattice code is at most π / 4, or the two phase transitions are either +p / 4, -p / 4 or -p / 4, +p / 4.

2. The apparatus of claim 1, wherein the lattice code is a multi-state lattice code used to transmit a binary data sequence including a first state, a second state, a third state, and a fourth state.

3. The apparatus according to claim 1 or 2, wherein the lattice code is a phase transition sequence for generating corresponding lattice-coded modulation symbols, the phase transition sequence including at least one of the following phase transitions: 0, -π / 2, +π / 2, -π / 4, or +π / 4.

4. The apparatus according to claim 1 or 2, wherein the lattice code is characterized by two state transitions and a corresponding phase transition after each state.

5. The apparatus of claim 4, wherein the feature of the grid code depends on corresponding data bits based on at least one of the following: After state 1, the next state is 1 and the phase transition is +π / 2; After state 1, the next state is 2 and the phase transition is +π / 4; After state 2, the next state is 3 and the phase transition is -π / 4; After state 2, the next state is 4 and the phase transition is 0; After state 3, the next state is 3 and the phase transition is -π / 2; After state 3, the next state is 4 and the phase transition is -π / 4; After state 4, the next state is 1 and the phase transition is +π / 4; or After state 4, the next state is 2 and the phase transition is 0.

6. The apparatus of claim 4, wherein the two state transitions from each state correspond to data bit values ​​0 and 1.

7. The apparatus according to claim 1 or 2, wherein the instructions, when executed by the at least one processor, further cause the apparatus to: At least one data bit included in the transmission is mapped to the corresponding trellis code state and corresponding phase of the transmission.

8. The apparatus of claim 7, wherein the mapping of the at least one data bit is based on a 4-state recursive model or a 16-state non-recursive phase transition model of the lattice code.

9. The apparatus of claim 8, wherein the 4-state recursive model of the lattice code comprises at least one of the following: In state 1, if the data bit is equal to the previous data bit, then the next state is 1; In state 1, if the data bit is opposite to the previous data bit, the next state is 2; In state 2, if the data bit is equal to the previous data bit, then the next state is 4; In state 2, if the data bit is opposite to the previous data bit, the next state is 3; In state 3, if the data bit is equal to the previous data bit, then the next state is 4; In state 3, if the data bit is opposite to the previous data bit, then the next state is 3; In state 4, if the data bit is equal to the previous data bit, then the next state is 1; or In state 4, if the data bit is opposite to the previous data bit, the next state is 2.

10. The apparatus according to claim 1 or 2, wherein the instructions, when executed by the at least one processor, further cause the apparatus to: The ability to transmit the device to the network element, wherein the ability includes support for the lattice code.

Images