Diamond composite phase change liquid cooling substrate

Abstract

This invention belongs to the field of liquid cooling technology, specifically a diamond composite phase change liquid cooling substrate. It provides a seven-layer composite structure substrate: a diamond thin film as the core insulating and heat dissipation layer, with a titanium transition layer connecting a copper layer to its upper and lower surfaces, forming a differentiated metallization structure that is thicker at the top and thinner at the bottom; the lower copper layer is integrated with the phase change evaporation chamber cold plate via a low-temperature brazing layer, and a microchannel is provided at the bottom of the evaporation chamber. This invention has an overall thermal resistance of <0.12℃·cm² / W and can withstand a heat flux density of ≥500W / cm², making it suitable for packaging and heat dissipation of high heat flux density electronic components such as AI chips, supercomputing chips, and SiC power devices.

Description

Technical Field

[0001] This invention belongs to the field of liquid cooling technology, specifically a diamond composite phase change liquid cooling substrate. Background Technology

[0002] With the exponential increase in computing power density of AI chips, supercomputing chips, and silicon carbide power devices, chip heat flux density has reached the physical limits of traditional heat dissipation solutions. The most advanced AI training chips (such as the NVIDIA H100 and Google TPU v4) have exceeded 700 watts in thermal dissipation, with heat flux densities in hot spots reaching 200-300 W / cm², and even exceeding 500 W / cm² in some core areas. SiC power devices, due to chip miniaturization, have heat flux densities reaching 500 W / cm², and prolonged high temperatures can easily lead to bonding wire detachment, substrate delamination, and other failures. Under such extreme high heat flux density conditions, chip heat dissipation has evolved from a "last-mile aid" to a core constraint determining whether computing power can be fully realized. Traditional heat dissipation solutions, including increasing the heat dissipation area with air cooling, increasing fan speed, and external cold plate cooling, are all approaching their physical limits, necessitating fundamental innovation in the heat dissipation path from the back of the chip.

[0003] Existing ceramic substrates still have the following shortcomings: The upper limit of thermal conductivity is insufficient. The theoretical maximum thermal conductivity of aluminum nitride ceramics is 319 W / (m·K), but in practical engineering applications, aluminum nitride DBC substrates only reach 180-260 W / (m·K), and silicon nitride AMB substrates only exceed 90 W / (m·K). This is insufficient even at high heat flux densities of 300-500 W / cm². 2 Under these conditions, even with the selection of the optimal aluminum nitride ceramic, heat conduction within the ceramic layer still constitutes a significant bottleneck.

[0004] The thermal resistance at the interface accumulates significantly. In the DBC / AMB solution, the thermal resistance of the chip, solder layer, upper copper layer, ceramic layer, lower copper layer, solder layer, and cold plate is stacked layer by layer. Each interface layer contributes a significant amount of thermal resistance, and the cumulative effect significantly reduces the overall heat dissipation efficiency.

[0005] Thermal stress concentration leads to ceramic cracking and delamination. The inherent brittleness of ceramic materials makes them extremely prone to cracking during thermal cycling. Especially under large-size substrate conditions, the internal stress caused by the difference in thermal expansion coefficients is difficult to release, directly leading to ceramic layer fracture or copper-ceramic interface delamination failure.

[0006] The heat flux density is not keeping pace with the rapid increase in power. As AI chips enter the era of over 2000W, heat flux density continues to climb, while the room for improvement in the thermal conductivity of ceramic materials is limited, and the gap between the two is widening rapidly. Ceramic substrates can no longer meet the heat dissipation requirements of next-generation chips.

[0007] The problem of matching coefficients of thermal expansion (CTE) has not been fundamentally solved. The CTE of diamond is approximately 0.8–1.0 ppm / ℃, while that of semiconductor chips (approximately 2.6 ppm / ℃) and oxygen-free copper (approximately 16.5 ppm / ℃) differs significantly. Although existing diamond / metal composite solutions attempt to reduce CTE mismatch by controlling the metal matrix, stress accumulation is still difficult to completely eliminate in large-area, multi-layer interface structures, and interface delamination under thermal cycling poses a long-term reliability risk.

[0008] Insufficient interfacial bonding strength results in high thermal resistance. Diamond and metals such as copper are naturally non-wetting, leading to severe phonon mismatch at the interface. While Ti plating can improve interfacial bonding, the thermal conductivity of currently available commercially available Ti-coated diamond / copper composites is only about 350 W / (m·K), far below the theoretical value. This excessively high interfacial thermal resistance directly negates the advantage of diamond's intrinsic ultra-high thermal conductivity.

[0009] Difficult to process and high cost. The high hardness of diamond makes precision machining extremely difficult, and the high production cost of large-size diamonds limits its application scenarios.

[0010] The heat dissipation path is short and the integration is low. Existing diamond heat dissipation solutions are mostly in the form of a single heat sink, which only undertakes the function of heat conduction and lacks deep integration with efficient phase change liquid cooling structures. The connection between the diamond and the liquid cooling heat sink is either brazed, which adds a layer of interfacial thermal resistance, or the embedded structure results in a limited heat exchange area.

[0011] There is a lack of double-sided metallization pre-integration solutions. In existing technologies, diamond films are typically only metallized on one side for chip assembly, while the other side is exposed or simply treated. This approach forces chip users to integrate the diamond film into the cold plate themselves during assembly, increasing the client's process complexity and risk, and making it difficult to guarantee consistent soldering quality.

[0012] The thermal process window lacks a systematic design. Existing technologies do not consider the sequential control logic for multi-temperature zone soldering and sintering. During chip sintering, customers may experience secondary melting and re-softening of the internal solder layer, leading to interface delamination failure. This lack of core process logic is one of the important reasons for the low yield and poor reliability of existing technologies.

[0013] From a broader perspective, the core dilemma facing the entire industry is that the growth rate of chip heat flux density far exceeds the improvement rate of heat dissipation capacity of traditional materials; no single commonly used material system (ceramics, copper, aluminum) can simultaneously meet the three major requirements of ultra-high thermal conductivity, electrical insulation, and thermal matching; and the fragmentation of various links in the industrial chain, with diamond film manufacturers lacking expertise in metallization, cold plate manufacturers lacking expertise in diamond integration, and packaging plants lacking diamond processing capabilities, making it difficult for the final product performance to reach its theoretical limit. Summary of the Invention

[0014] In order to overcome the shortcomings of the prior art and solve at least one technical problem raised in the background art; The current upper limit of thermal conductivity of ceramic substrates (200-260 W / (m·K)) cannot meet the heat dissipation requirements of AI chips with a heat flux density of 300-500 W / cm². Heat accumulates in large quantities in the ceramic layer, causing the chip crystallization to exceed the standard. Existing chip back-side packaging solutions have too many interface layers (chip, solder, top copper, ceramic, bottom copper, solder, cold plate), resulting in layer-by-layer thermal resistance, excessively high overall thermal resistance, and heat dissipation efficiency limited by the shortest board. The difference in thermal expansion coefficients between the ceramic substrate and the chip and copper layer generates huge internal stress during thermal cycling, leading to ceramic cracking, interface delamination, and poor long-term reliability. Existing diamond heat dissipation solutions suffer from insufficient interface bonding strength, high thermal resistance, and high cost. Furthermore, they lack deep pre-integration with phase change liquid cooling structures, resulting in complex secondary assembly processes, narrow process windows, and difficulty in guaranteeing yield rates for clients. The metallization layer thickness of diamond films in existing products is mismatched, and the design is not differentiated for the different needs of the chip side and the cold plate side. This results in the copper layer being too thick, causing warping, or too thin, causing poor solder wetting. The lack of dual-temperature sequential control in the system design, coupled with the inverted temperature sequence between factory soldering and customer chip sintering, leads to secondary melting and softening of the internal solder layer. This causes delamination failure during customer assembly, a common industry problem that has yet to be resolved.

[0015] The technical solution adopted by this invention to solve its technical problem is: a diamond composite phase change liquid-cooled substrate, comprising: The chip sintered copper layer is located on the top layer, with a thickness of 20-40μm. It is made of pure copper and has a surface roughness Ra<0.8μm. It is used to connect with the Ni / Au metallization layer on the back of the bare chip through a nano-silver sintering layer. The upper transition titanium layer, with a thickness of 80-150 nm, is located between the sintered copper layer and the diamond film and is deposited by magnetron sputtering. Titanium is a mainstream transition metal that can form a strong chemical bond with diamond and plays a key bridging role as an adhesion layer. Diamond film, as the core insulating and heat dissipation layer, has a thickness of 200-400μm and a thermal conductivity ≥1800W / (m·K). Its functions include: achieving vertical heat conduction with ultra-high thermal conductivity; ensuring electrical isolation between the chip and the cold plate with high insulation; and playing a role in thermal stress buffering and regulation in multilayer structures with its thermal expansion coefficient of 0.8-1.0ppm / ℃. The lower transition titanium layer is located between the diamond film and the thin copper layer, with a thickness of 80-150nm. It is deposited symmetrically with the upper titanium layer to prevent heating warping deformation caused by single-sided metallization. The lower thin copper layer is located between the lower titanium layer and the brazing layer, with a thickness of 3-8 μm. Its functions include: serving as a brazing wetting layer to ensure metallurgical bonding with the brazing material below; and maintaining a symmetrical structure with the upper copper layer to prevent stress concentration on one side. The low-temperature brazing layer is located between the thin copper layer and the cold plate of the phase change evaporation chamber, and firmly metallurgically bonds the thin copper layer and the cold plate of the phase change evaporation chamber in the molten state. The phase change evaporator features an integrated copper cold plate and a hollow structure. The cavity is evacuated at the factory, and users can inject deionized water as the working fluid before use. Microchannels are provided at the bottom for liquid cooling to remove heat.

[0016] Preferably, the overall thermal resistance of the diamond composite phase change liquid-cooled substrate is <0.12℃·cm. 2 / W.

[0017] Preferably, the insulation performance between the diamond film and the chip is ≥2kV withstand voltage and the resistance is >10 Ω. 10 Ω.

[0018] Preferably, the brazing temperature is 300-320℃, the sintering temperature of the nano-silver is 220-260℃, and the temperature difference between the two is ≥40℃.

[0019] Preferably, the brazing uses a Sn-Sb high-melting-point brazing alloy with a melting point ≥290℃.

[0020] Preferably, the X-Ray void ratio of the brazing layer is <3%.

[0021] Preferably, the diamond composite phase change liquid-cooled substrate shows no delamination or cracks after being subjected to 1000 thermal shocks at -40 to 125°C.

[0022] Preferably, the shear strength of the diamond composite phase change liquid cooling substrate is ≥30MPa.

[0023] Preferably, the evaporation chamber and the diamond film are separated only by a brazing layer, and the evaporation surface is adjacent to the bottom surface of the diamond heat dissipation material.

[0024] Preferably, the method for preparing the diamond composite phase change liquid-cooled substrate includes the following steps: Double-sided magnetron sputtering metallization of diamond thin films: titanium and copper layers are deposited sequentially on the lower surface and on the upper surface; the thickness of the titanium layer is 80-150 nm and the thickness of the copper layer on the lower surface is 3-8 μm. The copper layer on the upper surface is electroplated to thicken it to 20-40μm; A Sn-Sb brazing preform is placed between the double-sided metallized diamond film and the cold plate of the phase change evaporation chamber for sandwich assembly. Brazing is performed under vacuum conditions at 300-320℃; the brazing is carried out in a vacuum environment, a uniform pressure of 0.15-0.25MPa is applied to the plate surface, the heating rate is ≤3℃ / min, and the plate is slowly cooled in the furnace. Perform leak detection; After vacuuming, the product is sealed and delivered.

[0025] The beneficial effects of this invention are as follows: This invention utilizes magnetron sputtering of pure titanium on a diamond surface, rather than directly sputtering TiC. The principle behind this is that pure titanium, being an active element, reacts chemically with carbon atoms on the diamond surface during heat treatment, resulting in the in-situ growth of a TiC layer. This is accompanied by the diffusion of Ti atoms into the diamond (up to a depth of 600 nm), forming a strong chemical bond and a diffusion transition layer. Due to the presence of a diffusion layer with gradually changing composition and chemical bonds, the interface between the titanium layer and the diamond is extremely strong. Simultaneously, the pure titanium layer itself is a tough metal, which can buffer some stress. Through process control, a TiC reaction layer with gradually changing composition and properties can be generated, effectively alleviating the thermal mismatch stress between the diamond and the metal substrate. If the reaction step is skipped and TiC is directly deposited, the bonding strength is insufficient, the interface is prone to failure, and thermal mismatch stress easily leads to cracking. Furthermore, the microstructure is uncontrollable, and the process window is narrow.

[0026] This invention employs a differentiated copper layer thickness design, with a thicker upper layer and a thinner lower layer. The thicker upper copper layer (chip side) bears the dual responsibility of structure and heat dissipation: the thicker copper layer can better absorb and buffer the thermomechanical stress generated during chip soldering, preventing chip or solder layer cracking. Simultaneously, it acts as an effective heat diffusion layer, spreading the high heat flow from local hotspots in the chip planar direction. The thinner lower copper layer (evaporation cavity side) aims for a balance between low resistance and low stress: the thin copper layer effectively reduces interface thermal resistance while minimizing stress caused by thermal expansion, preventing interface cracking and delamination. The thin copper layer is connected to the copper evaporation cavity via a low-temperature solder layer. Both sides of the interface are pure copper with completely consistent coefficients of thermal expansion, and the solder interface itself does not generate thermal mismatch stress. The thin copper layer itself has low stiffness, preventing excessive tensile force on the diamond interface, and instead acting as a stress buffer. The low-temperature soldering temperature is approximately 300℃, far lower than conventional high-temperature soldering, significantly reducing thermal stress.

[0027] The overall thermal resistance of this invention is <0.12℃·cm. 2 / W, significantly better than traditional aluminum nitride DBC substrates (overall thermal resistance approximately 0.55℃·cm). 2 / W). Thanks to the ultra-high thermal conductivity of diamond film (≥1800W / (m·K)) replacing the ceramic layer with a thermal conductivity of only 200-260W / (m·K), and by integrating the nano-silver sintered layer, diamond film, brazing layer, and phase change cold plate on the chip side into an integrated module, the number of interface layers is greatly reduced, and the heat transfer path from the chip to the cold plate coolant is compressed to the shortest possible.

[0028] This invention allows for a heat flux density ≥500 W / cm² 2 It can cover the current AI chip's 200-300W / cm² coverage. 2 and SiC power devices 500W / cm 2 It meets the heat dissipation requirements and can adapt to future chip products with higher heat flux densities.

[0029] Diamond films are excellent insulators, with a breakdown voltage ≥2kV and a surface insulation resistance >10. 11 Ω, with two copper layers that are mutually isolated and insulated, eliminates the need for additional insulation layers.

[0030] The symmetrical titanium / copper metallized structure significantly absorbs and counteracts the internal stress caused by the difference in CTE between the diamond and copper cold plates. No delamination was observed after 1000 cycles of thermal shock from -40 to 125℃, with an X-ray void ratio of <3% and a shear strength ≥30MPa.

[0031] The finished product is a single integrated component, with the diamond and cold plate pre-brazed together, and the top surface metallized to a pure copper sintered surface. Users only need to sinter the bare chip with the metallized back side to the top copper layer at 220-260℃ to complete the chip assembly, without the need for diamond metallization and brazing of the cold plate integration.

[0032] The temperature difference between the factory brazing temperature (300-320℃) and the customer's sintering temperature (220-260℃) is ≥40℃, ensuring that the internal weld layer will not soften or melt again during the customer's sintering process, fundamentally solving the problem of internal interface delamination caused by the inverted temperature sequence in the industry.

[0033] A boiling-condensation phase change cycle is employed to achieve ultra-efficient heat transfer from the diamond to the cold plate, with a heat transfer coefficient far exceeding that of a pure conduction path. The phase change working fluid preferentially boils in the region directly below the chip projection under vacuum conditions, resulting in targeted enhanced heat dissipation at the hot spot.

[0034] This invention uses only inorganic materials (diamond, copper, titanium, nano silver, tin-antimony solder, deionized water), completely eliminating the use of plastics, ceramics (which have insufficient thermal conductivity and are prone to cracking), organic adhesives / epoxy resins, and other materials in traditional packaging solutions, thus fundamentally eliminating the risk of high-temperature failure caused by organic materials. Attached Figure Description

[0035] The invention will now be further described with reference to the accompanying drawings.

[0036] Figure 1 This is a schematic diagram of the structure of the diamond composite phase change liquid cooling substrate of the present invention; In the diagram: 1. Sintered copper layer of the chip; 2. Upper transition titanium layer; 3. Diamond film; 4. Lower transition titanium layer; 5. Lower thin copper layer; 6. Low-temperature brazing layer; 7. Phase change evaporator cold plate. Detailed Implementation

[0037] To make the technical means, creative features, objectives and effects of this invention easier to understand, the invention will be further described below in conjunction with specific embodiments. Example 1

[0038] like Figure 1 As shown in the embodiment of the present invention, a diamond composite phase change liquid cooling substrate adopts a 7-layer functional composite structure, which includes, from top to bottom: Chip sintered copper layer 1: Located on the top layer, with a thickness of 20-40μm, made of pure copper, with a surface roughness Ra<0.8μm, used to connect with the Ni / Au metallization layer on the back of the bare chip through a nano-silver sintering layer.

[0039] Upper transition titanium layer 2: Located between the sintered copper layer and the diamond film, with a thickness of 80-150 nm, it is deposited by magnetron sputtering. Ti is a mainstream transition metal that can form a strong chemical bond with diamond, and it plays a key bridging role as an adhesion layer.

[0040] Diamond film 3: As the core insulating and heat dissipation layer, with a thickness of 200-400μm and a thermal conductivity ≥1800W / (m·K). Its functions include: achieving ultra-high thermal conductivity for extremely rapid vertical heat conduction; and ensuring electrical isolation between the chip and the cold plate (withstand voltage ≥2kV, resistance >10). 10 Its ultra-low coefficient of thermal expansion (0.8-1.0ppm / ℃) plays a role in thermal stress buffering and regulation in multilayer structures.

[0041] Lower transition titanium layer 4: Located between the diamond film and the thin copper layer, with a thickness of 80-150nm, it is deposited symmetrically with the upper titanium layer to prevent heating warping deformation caused by single-sided metallization.

[0042] Lower thin copper layer 5: Located between the lower titanium layer and the brazing layer, with a thickness of 3-8μm, its functions include: serving as a brazing wetting layer to ensure metallurgical bonding with the brazing material below; and maintaining a symmetrical structure with the upper copper layer to prevent stress concentration on one side.

[0043] Low-temperature brazing layer 6: Located between the thin copper layer and the cold plate of the phase change evaporator cavity, it uses a Sn-Sb high-melting-point brazing alloy with a melting point ≥290℃. In the molten state, the thin copper layer is firmly metallurgically bonded to the cold plate of the phase change evaporation chamber.

[0044] Phase change evaporator cold plate 7: Copper integrated phase change evaporator (cavity structure), the inside is evacuated at the factory. Before use, the user should inject deionized water as the phase change working fluid. The bottom is equipped with microchannels for liquid cooling to remove heat.

[0045] It is particularly important to emphasize that this invention uses magnetron sputtering of Ti on the diamond surface instead of TiC, mainly for the following reasons: Pure Ti is an active element that reacts chemically with carbon atoms on the diamond surface during heat treatment, growing a TiC layer in situ. This process involves Ti atoms diffusing into the diamond (up to 600 nm deep), forming strong chemical bonds and a diffusion transition layer. Due to the presence of a diffusion layer with gradually changing composition and chemical bonds, its interfacial bonding with diamond is very strong, which can greatly improve the overall system reliability of the composite phase change liquid cooling substrate. The pure Ti layer itself is a tough metal that can buffer some stress. More importantly, through certain process control, a TiC reaction layer with gradually changing composition and properties can be generated. The TiC reaction layer acts as a bridge, which can effectively alleviate the huge thermal mismatch stress between diamond (with an extremely low coefficient of thermal expansion) and the metal matrix (copper in this invention, with a relatively high coefficient of thermal expansion), thus solving the thermal mismatch problem between diamond and the metal matrix.

[0046] If the reaction step is skipped and TiC is deposited directly, the substrate product may face the following risks: Insufficient bonding strength leads to easy interface failure. Studies have shown that pre-forming a TiC layer may actually weaken the adhesion of subsequent deposited layers. An external TiC layer cannot form a strong chemical bond with diamond as it can with naturally grown TiC layers, and under stress, the weak interface can easily become the starting point for failure.

[0047] Stress concentration and cracking risk Thermal mismatch stress: Diamond has an extremely low coefficient of thermal expansion, while TiC has a relatively high coefficient of thermal expansion. Directly forming a thick TiC layer will generate huge tensile stress during the cooling process from high temperature, which can easily lead to cracking of the diamond or the TiC layer itself.

[0048] Microstructural stress: TiC, as a ceramic material, has high hardness but poor toughness. Molecular dynamics simulations show that under tensile stress, stress concentration at the diamond / TiC interface induces microcracks, and the fracture mode is brittle fracture.

[0049] Uncontrollable microstructure and non-uniform performance Grain size influence: The grain size of TiC has a significant impact on its mechanical properties when bonded to diamond. The grain size of directly sputtered TiC is difficult to control precisely, and grains of different sizes will lead to inconsistent interface properties.

[0050] Porosity defects: TiC layers formed directly under certain processes may be porous, which can severely weaken the interfacial bonding strength and become structural defects.

[0051] Narrow process window, reduced yield Compared to the mature, controllable heat treatment process for sputtering pure Ti, direct sputtering of TiC is extremely sensitive to process parameters (such as temperature, gas pressure, and bias voltage). Even small fluctuations in these parameters can lead to significant changes in the structure, composition, or properties of the TiC layer, thereby reducing product consistency and yield.

[0052] In summary, the ingenuity of this invention lies in utilizing the reactivity of pure Ti to induce a chemical reaction between it and diamond through a process, thereby growing a high-performance gradient transition layer. This in-situ generation method ensures interfacial bonding strength, stress buffering, and overall stability, which is unmatched by directly using inert TiC for physical covering.

[0053] It should be further explained that this invention employs a differentiated copper layer thickness design, with the upper layer being thicker than the lower layer. Its core principle lies in simultaneously solving two mutually constraining engineering challenges: the upper layer (chip side) requires a sufficiently thick copper layer to withstand welding stress and ensure efficient heat transfer, while the lower layer (evaporation chamber side) requires a sufficiently thin copper layer to reduce interfacial thermal resistance and minimize thermal mismatch stress.

[0054] Top layer of thick copper (chip side): bears the dual responsibility of structure and heat dissipation. Mechanical strength and reliability: The soldering process between the chip and the substrate generates significant thermomechanical stress. A thicker copper layer can better absorb and buffer these stresses, preventing cracking of the chip or solder layer. It also provides more stable support for the chip.

[0055] Highly efficient lateral heat diffusion: The thick copper layer can serve as an effective heat diffusion layer, rapidly spreading the high heat flow of local hot spots on the chip in the planar direction, and then transferring it to the high thermal conductivity diamond layer below, thereby improving the overall heat dissipation efficiency.

[0056] Lower thin copper layer (evaporation chamber side): pursuing the golden balance of low resistance and low stress. Reducing interfacial thermal resistance: The interface between copper and diamond is the main obstacle to heat transfer. Interfacial thermal resistance is proportional to the thickness of the transition layer, so a thin copper layer can effectively reduce interfacial thermal resistance, allowing heat to be transferred more smoothly from the diamond layer to the evaporation chamber.

[0057] Relieving thermal mismatch stress: Copper (CTE≈17ppm / K) and diamond (CTE≈1ppm / K) have vastly different coefficients of thermal expansion. During high-temperature processes or operation, this mismatch generates significant thermal stress. Thinning the copper layer can reduce the stress caused by thermal expansion at its source, preventing interface cracking and delamination.

[0058] Furthermore, the main reasons for adopting the differentiated copper layer thickness design with a thicker top and thinner bottom in this invention are as follows: Zero thermal mismatch at the weld interface (most critical) The thin copper layer (layer 5) is connected to the 7th copper evaporation chamber via the 6th low-temperature brazing layer. This means that the materials on both sides of the interface are pure copper with identical coefficients of thermal expansion (CTE≈17ppm / K). During the brazing cooling process, the thin copper layer and the copper evaporation chamber contract synchronously, and the weld interface itself does not generate any thermal mismatch stress. The stress only occurs between copper (CTE17) and diamond (CTE1), not between copper layers.

[0059] Thinning can weaken the driving force, rather than resist the stress. If the lower layer is thick copper, it will experience a huge absolute shrinkage upon cooling (deformation ∝ thickness × temperature difference). This thick, rigid copper will violently pull on the diamond layer above, creating enormous shear forces. With thinner copper: the absolute deformation displacement of the copper layer is significantly reduced. The thin copper layer itself has low stiffness and cannot exert excessive tensile force on the diamond interface. It is no longer the... The force, ironically, becomes a buffer against the force.

[0060] Narrowing the temperature difference in low-temperature brazing process This invention specifically emphasizes that the sixth layer is a low-temperature brazing layer, with a corresponding brazing temperature of approximately 300°C, far lower than conventional high-temperature welding (>800°C) or the brazing temperature of active metals. The thermal stress formula is: Thermal Stress ∝ CTE Difference × Temperature Change (ΔT). Because the brazing temperature is low, ΔT decreases significantly when cooling from the brazing temperature to room temperature. Since the stress itself is not large, and the interface bonding (copper-copper) is perfectly matched, the thin layer is fully capable of withstanding this thermal shock without needing to increase its thickness to withstand it.

[0061] The plastic and compliant cushioning mechanism of thin copper Thick copper layers are difficult to deform under stress, directly transferring stress to the fragile diamond / Ti interface. Thin copper layers, on the other hand, have better flexibility. They can absorb and dissipate shear strain energy caused by the thermal expansion difference between the upper and lower layers (diamond and evaporation chamber) by utilizing their own micro-elasticity or plastic deformation, much like a spring.

[0062] If this invention deviates from this design and makes the 5th layer also a thick copper layer (the same as the previous layer), the following problems may occur: Interface cracking: During cooling, the enormous shrinkage force of the thick copper is directly applied to the lower transition layer (Ti, about several hundred nanometers). This transition layer is extremely thin and is a brittle ceramic phase, which is easily torn apart by the shrinkage shear force of the thick copper, resulting in delamination between the diamond film and the evaporation chamber.

[0063] Diamond fracture: If the copper layer is thick enough and the welding strength is strong enough, the huge tensile stress may even directly tear the extremely thin diamond film in the middle (a few micrometers to tens of micrometers), causing the entire substrate to be scrapped.

[0064] A sharp drop in yield: Thick copper increases the overall rigidity of the substrate, which exacerbates warping deformation during the brazing process and leads to an increase in the weld void rate.

[0065] In summary: Because the lower layer is welded with homogeneous copper (without interfacial stress), this design can boldly utilize thin copper to reduce its own stiffness, thereby actively relieving the destructive tension on the diamond interface. This is precisely the dialectical unity of the design difference between thick and thin materials. Example 2

[0066] The fabrication process of a diamond composite phase change liquid-cooled substrate according to an embodiment of the present invention includes the following steps: S1. Cleaning and activation of diamond films CVD (chemical vapor deposition) single-crystal or polycrystalline diamond films are selected, with a thickness of 200–400 μm, thermal conductivity ≥1800 W / (m·K), surface roughness Ra≤0.1 μm, and warpage ≤10 μm / 10 mm. The size of the diamond film is determined according to the target chip specifications, with typical sizes being 20 mm × 20 mm, 30 mm × 30 mm, or 50 mm × 50 mm.

[0067] Diamond films must undergo rigorous cleaning and surface activation treatment before coating to remove surface contaminants and increase surface activity, ensuring the adhesion of the magnetron sputtering coating.

[0068] S2, Double-sided magnetron sputtering metallization process The activated diamond film is placed on the substrate stage with the surface to be deposited facing upwards. A vacuum is then applied until the base vacuum level is better than 5 × 10⁻⁶. -4 Pa. Introduce high-purity argon gas (purity ≥99.999%) as the working gas and adjust the working pressure to 0.6-1.5 Pa. Turn on the titanium target DC magnetron sputtering source, sputtering power density 3-8 W / cm³. 2 The substrate temperature is controlled between 25℃ and 200℃, and the deposition time is calculated based on the required film thickness (the deposition rate of titanium is about 0.5-2nm / s). The thickness of the deposited titanium layer is 80-150nm.

[0069] During deposition, the substrate stage rotates at a speed of 5-20 r / min to ensure uniformity of film thickness (uniformity deviation ≤ ±5%).

[0070] After the titanium layer deposition is complete, turn off the titanium target and switch to the copper target. Maintain a constant vacuum and introduce high-purity argon gas (purity ≥99.999%) at a working pressure of 0.5-1.0 Pa. Turn on the DC magnetron sputtering source on the copper target, with a sputtering power density of 4-10 W / cm², and control the substrate temperature at 25℃-150℃. Deposit a copper layer thickness of 3-8 μm. Since magnetron sputtering deposition rate is relatively slow (the deposition rate of copper is approximately 1-5 nm / s), a 3-8 μm copper layer requires a relatively long deposition time. Efficiency can be improved by increasing the sputtering power or using a multi-target co-sputtering method.

[0071] After the lower surface is metallized, it should be placed in a vacuum environment or after the vacuum is broken (the vacuum needs to be re-evacuated to a value better than 5×10). -4 (Pa) Flip the diamond film so that the surface to be coated is facing up.

[0072] Titanium transition layer deposition: Deposition parameters are exactly the same as those for the underlying titanium layer: working gas pressure 0.6-1.5 Pa, titanium target sputtering power density 3-8 W / cm³. 2 The substrate temperature is 25℃-200℃, and the thickness of the deposited titanium layer is 80-150nm.

[0073] Copper seed layer deposition: Deposition parameters are the same as those for the lower surface copper seed layer: working gas pressure 0.5-1.0 Pa, copper target sputtering power density 4-10 W / cm³. 2 The substrate temperature is 25℃-150℃, and a copper layer with a thickness of 3-5μm is deposited as a seed layer. This seed layer will be thickened to the target thickness of 20-40μm by electroplating.

[0074] After double-sided metallization, vacuum heat treatment is performed in the vacuum chamber of a magnetron sputtering coating machine or transferred to a dedicated vacuum heat treatment furnace to promote the diffusion reaction between the titanium layer and the diamond interface and generate a TiC gradient transition layer in situ.

[0075] Heat treatment process parameters: Vacuum degree: better than 5×10 -3 Pa; Heating rate: 5~10℃ / min; Heat treatment temperature: 500-700℃; holding time: 30-120min; cooling method: cooling to room temperature in the furnace, cooling rate ≤5℃ / min.

[0076] During this heat treatment process, titanium atoms in the pure titanium layer diffuse to the diamond surface and react chemically with carbon atoms on the diamond surface, forming TiC in situ. Studies have shown that the degree of reaction between the titanium coating and the diamond surface intensifies with increasing temperature. With the formation of the TiC phase, a diffusion transition layer with gradually varying TiC composition is formed at the interface. This TiC reaction layer acts as a bridge, effectively alleviating the significant thermal mismatch stress between diamond and copper.

[0077] The heat treatment temperature should not exceed 700℃ to avoid graphitization on the diamond surface; it should also not be lower than 500℃, otherwise the TiC formation reaction will be insufficient and the interfacial bonding strength will be inadequate.

[0078] S3, Electroplating Thickening Process Pretreatment of the substrate that has undergone magnetron sputtering and vacuum heat treatment before electroplating: Weak acid activation: Immerse the substrate in a 5-10% dilute sulfuric acid solution and treat it at room temperature for 30-60 seconds to remove the surface oxide layer; Deionized water rinse: Rinse thoroughly with ultrapure water; Electroplating solution preheating: Immerse the substrate in an electroplating solution preheated to 40-50℃ for 1-2 minutes.

[0079] An acidic sulfate electroplating process is used to thicken the copper seed layer on the chip side (top surface).

[0080] Thickness control: Electroplating should be performed to achieve the target thickness of 20-40 μm. During the electroplating process, the film thickness should be monitored periodically (every 10-15 minutes) using a coulomb meter or thickness gauge to ensure uniform thickness. The thin copper layer on the lower surface (cold plate side) is only 3-8 μm thick and should not be electroplated.

[0081] Post-electroplating treatment includes: deionized water rinsing: immediately after electroplating, thoroughly rinse with ultrapure water to remove residual electroplating solution; anti-discoloration treatment: immerse in 0.5-1% benzotriazole (BTA) solution and treat at room temperature for 1-3 minutes to form an anti-oxidation protective film; deionized water rinsing: rinse again with ultrapure water; nitrogen drying: dry with high-purity nitrogen; drying: place in a clean oven and dry at 80-100℃ for 30 minutes.

[0082] After the electroplating thickening is completed, the upper copper layer undergoes surface treatment to meet the requirements for chip nano-silver sintering: Grinding / polishing: Using a precision grinding and polishing machine, diamond grinding paste (3-5μm particle size) or chemical mechanical polishing (CMP) process, the surface roughness of the upper copper layer is reduced to Ra<0.8μm; Cleaning: Ultrasonic cleaning removes polishing residue; Surface roughness inspection: Surface profilometer or atomic force microscope is used for inspection. Ra<0.8μm is acceptable.

[0083] S4. Preparation of the cold plate for the phase change evaporator chamber The phase change evaporator cold plate is a one-piece copper structure (made of oxygen-free copper TU1 or TU0, purity ≥99.97%), consisting of an upper cover plate, a lower base plate, and a sealing frame. It contains an evaporator cavity with microchannels at the bottom. Typical structural parameters: evaporator cavity depth: 1-3mm; microchannel width: 0.5-2mm; microchannel depth: 0.5-1.5mm; microchannel spacing: 1-3mm; total cold plate thickness: 5-15mm. Machining of the lower base plate: Microchannel structures are machined on the inner surface of the lower base plate using a CNC milling machine. The machining accuracy requirements for the microchannels are: dimensional tolerance ±0.05mm, surface roughness Ra≤1.6μm; Machining of the sealing frame: Mounting grooves or welding bevels for the sealing frame are machined on the edge of the lower base plate; Machining of the upper cover plate: The inner surface of the upper cover plate is flat, requiring a flatness ≤25μm and a surface roughness Ra0.6-1.6μm; Cleaning: After processing, use acetone for ultrasonic cleaning to remove oil and metal shavings, rinse with deionized water, and dry with nitrogen.

[0084] Pre-assemble the upper cover plate and lower base plate (including the sealing frame) and check the fit clearance and flatness. If necessary, a porous sponge copper structure (alternative) can be sintered inside the evaporation chamber to provide a greater vaporization core density and heat exchange area.

[0085] S5, Vacuum Brazing Process A high-melting-point Sn-Sb brazing alloy (Sb content 5-10wt%, balance Sn) with a melting point ≥290℃ is selected to form a pre-formed thin brazing sheet with a thickness of 0.08-0.12mm. The size of the brazing sheet is consistent with the bottom surface size of the diamond substrate (slightly larger by 0.5-1mm) to ensure that the solder fully covers the entire connection surface during brazing.

[0086] The characteristics of Sn-Sb brazing filler metal are: it does not contain harmful elements such as lead, has a moderate melting point (290-320℃), good wettability with copper, and the brazed joint has high strength and reliability.

[0087] Diamond substrate bottom surface treatment: The bottom surface (thin copper layer) of the double-sided metallized diamond substrate is inspected, requiring a flatness of ≤25μm and a roughness Ra of 0.6-1.6μm; those that fail to meet the requirements need to be precision ground or reworked; Cold plate cover plate treatment: The inner surface of the cold plate cover plate is inspected, requiring a flatness of ≤25μm and a roughness Ra of 0.6-1.6μm; Plasma deoxidation treatment: The assembly surfaces of the diamond substrate and the cold plate cover plate are placed in a plasma cleaner and subjected to plasma deoxidation treatment in an argon / hydrogen mixed atmosphere (Ar:H2=9:1), with an RF power of 200-500W and a treatment time of 10-30min, to remove the surface oxide layer and improve solder wettability; Placement of solder pads: Precisely place the Sn-Sb preformed thin solder pads in the center of the area to be brazed on the cover plate of the cold plate.

[0088] The diamond substrate (bottom side down) is precisely aligned and placed on the Sn-Sb solder pad, forming a three-layer sandwich structure consisting of the diamond substrate (bottom thin copper layer), Sn-Sb solder pad, and cold plate cover plate. Assembly accuracy requirement: positional deviation ≤ 0.5mm.

[0089] The assembled components are placed in a vacuum brazing furnace.

[0090] Brazing process parameters: Vacuuming: Close the furnace door, start the vacuum system, and evacuate to a vacuum level better than 5×10⁻⁶. -3 Pa; Apply pressure: Apply a uniform pressure of 0.15-0.25 MPa to the plate surface using the upper pressure head; Heating phase: Heating from room temperature to 300-320℃ at a rate of ≤3℃ / min; Insulation stage: Insulate at 300-320℃ for 15-30 minutes to allow the Sn-Sb brazing filler metal to fully melt, spread and wet the bonding interface; Cooling stage: After the heat preservation is completed, turn off the heating power and allow the furnace to cool slowly to below 150℃ (cooling rate ≤3℃ / min). Then, high-purity nitrogen can be introduced to assist cooling to room temperature. Sudden air cooling is prohibited to avoid thermal stress causing interface cracking.

[0091] Key points of process control: An excessively rapid heating rate can lead to uneven temperature distribution and concentrated thermal stress. Uneven pressure can lead to uneven brazing layer thickness and increased voids. Insufficient heat preservation time will result in the brazing filler metal not spreading completely, while excessive heat preservation time may lead to excessive growth of intermetallic compounds.

[0092] Brazing quality inspection: Visual inspection: Visually inspect the appearance of the brazed joint, requiring no cracks, no obvious brazing filler metal overflow or unfilled areas; X-Ray void ratio inspection: The void ratio of the brazed layer is inspected using X-ray non-destructive testing equipment, and the void ratio is required to be <3%; Flatness inspection: Inspect the overall flatness of the finished substrate, which should be ≤50μm / 10mm; Shear strength sampling inspection: Samples are taken from each batch of products and shear strength is tested in accordance with GB / T6400 or equivalent standards. The shear strength is required to be ≥30MPa.

[0093] S6. Phase change evaporator cavity encapsulation and leak detection The upper cover plate and lower base plate (including the sealing frame) of the cold-rolled steel plate are sealed and welded together. The following methods can be used: Vacuum brazing: In a vacuum environment, copper-based or silver-based brazing filler metal is used to braze and seal the upper cover plate and the lower base plate along the sealing frame. Electron beam welding: In a vacuum environment, electron beam welding is used to perform penetration welding along the sealed frame; Laser welding: High-power lasers are used to perform sealing welding along the sealing frame.

[0094] After sealing and welding, a closed cavity structure is formed inside the evaporation chamber, with only a working fluid injection port reserved (or connected to an external injection system via a pipeline).

[0095] Vacuuming and sealing Vacuuming: The evaporation chamber is evacuated to a vacuum level better than 10 through the filling port. -2 Pa; Pressure holding test: Close the vacuum valve, maintain for 30 minutes, and observe the change in vacuum level. The vacuum level should decrease by ≤5%. Sealing: The filling port is sealed under vacuum conditions by electron beam welding or cold pressure welding; Helium mass spectrometry leak detection: A helium mass spectrometer is used to detect leaks in the sealed evaporation chamber. The leakage rate is required to be ≤1×10⁻⁶. -9 Pa·m³ / s.

[0096] For ease of transportation and storage, a solution can also be adopted where a liquid filling port is pre-installed at the factory and the product is vacuum-sealed upon delivery. After the evaporation chamber is evacuated, the vacuum state is maintained by valves or puncture-resistant sealing structures; After delivery to the user, the user injects deionized water as the phase change working fluid through the injection port; After the injection is completed, the user should seal the injection port.

[0097] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The embodiments and descriptions in the specification are merely illustrative of the principles of the invention. Various changes and modifications can be made to the invention without departing from its spirit and scope, and all such changes and modifications fall within the scope of the present invention as claimed. The scope of protection of the present invention is defined by the appended claims and their equivalents.

Claims

1. A diamond composite phase change liquid-cooled substrate, characterized in that: include: The chip sintered copper layer (1) is located on the top layer, with a thickness of 20-40μm, made of pure copper, with a surface roughness Ra<0.8μm, and is used to connect with the Ni / Au metallization layer on the back of the bare chip through a nano-silver sintered layer; The upper transition titanium layer (2) is located between the sintered copper layer and the diamond film, with a thickness of 80-150 nm, and is deposited by magnetron sputtering. Titanium is a mainstream transition metal that can form a strong chemical bond with diamond, and plays a key bridging role as an adhesion layer. Diamond film (3) serves as the core insulating and heat dissipation layer, with a thickness of 200-400μm and a thermal conductivity ≥1800W / (m·K); Its functions include: ultra-high thermal conductivity to achieve longitudinal heat conduction; high insulation to ensure electrical isolation between the chip and the cold plate; and its thermal expansion coefficient of 0.8-1.0ppm / ℃ to play a role in thermal stress buffering and regulation in multilayer structures. The lower transition titanium layer (4) is located between the diamond film and the thin copper layer, with a thickness of 80-150nm. It is deposited symmetrically with the upper titanium layer to prevent heating warping deformation caused by single-sided metallization. The lower thin copper layer (5) is located between the lower titanium layer and the brazing layer, with a thickness of 3-8 μm. Its functions include: serving as a brazing wetting layer to ensure metallurgical bonding with the brazing material below; and maintaining a symmetrical structure with the upper copper layer to prevent stress concentration on one side. The low-temperature brazing layer (6) is located between the thin copper layer and the phase change evaporation chamber cold plate, and firmly metallurgically bonds the thin copper layer and the phase change evaporation chamber cold plate in the molten state; The phase change evaporator cold plate (7) is a copper integrated phase change evaporator with a cavity structure. The cavity is evacuated at the factory. Before use, the user injects deionized water as the phase change working fluid. The bottom is equipped with a microchannel for liquid cooling to carry away heat.

2. The diamond composite phase change liquid-cooled substrate according to claim 1, characterized in that: The overall thermal resistance of the diamond composite phase change liquid-cooled substrate is <0.12℃·cm. 2 / W.

3. The diamond composite phase change liquid-cooled substrate according to claim 2, characterized in that: The insulation performance between the diamond film and the chip is ≥2kV withstand voltage and resistance >10 Ω. 10 Ω.

4. The diamond composite phase change liquid-cooled substrate according to claim 3, characterized in that: The brazing temperature is 300-320℃, and the sintering temperature of the nano-silver is 220-260℃, with a temperature difference of ≥40℃ between the two.

5. A diamond composite phase change liquid-cooled substrate according to claim 4, characterized in that: The brazing process uses a Sn-Sb high-melting-point brazing alloy with a melting point ≥290℃.

6. The diamond composite phase change liquid-cooled substrate according to claim 5, characterized in that: The X-Ray void ratio of the brazed layer is <3%.

7. A diamond composite phase change liquid-cooled substrate according to claim 6, characterized in that: The diamond composite phase change liquid-cooled substrate showed no delamination or cracks after being subjected to 1000 thermal shocks at -40 to 125°C.

8. A diamond composite phase change liquid-cooled substrate according to claim 7, characterized in that: The shear strength of the diamond composite phase change liquid-cooled substrate is ≥30MPa.

9. A diamond composite phase change liquid-cooled substrate according to claim 8, characterized in that: The evaporation chamber and the diamond film are separated only by a brazing layer, and the evaporation surface is adjacent to the bottom surface of the diamond heat dissipation.

10. A diamond composite phase change liquid-cooled substrate according to claim 9, characterized in that: The method for preparing the diamond composite phase change liquid-cooled substrate includes the following steps: Double-sided magnetron sputtering metallization of diamond thin films: titanium and copper layers are deposited sequentially on the lower surface and on the upper surface; the thickness of the titanium layer is 80-150 nm and the thickness of the copper layer on the lower surface is 3-8 μm. The copper layer on the upper surface is electroplated to thicken it to 20-40μm; A Sn-Sb brazing preform is placed between the double-sided metallized diamond film and the cold plate of the phase change evaporation chamber for sandwich assembly. Brazing is performed under vacuum conditions at 300–320°C; the brazing is carried out in a vacuum environment, a uniform pressure of 0.15–0.25 MPa is applied to the plate surface, the heating rate is ≤3°C / min, and the plate is slowly cooled in the furnace. Perform leak detection; After vacuuming, the product is sealed and delivered.

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