Method for improving incomplete grinding of back-drilling resin plug holes

Abstract

This application discloses a method for improving the incomplete resin filling and polishing of back-drilled holes, comprising: graphic design; setting a copper layer PAD in the PCB board corresponding to the back-drilled hole area; the back-drilled hole completely covering the copper layer PAD in a plane perpendicular to the PCB board stacking plane; sequentially stacking, pressing, and drilling the PCB board; back-drilling the PCB board to remove the copper layer PAD; filling the back-drilled hole; and resin polishing the surface of the PCB board after filling. This application enables the formation of a uniform and dense dielectric layer at the back-drilled hole location to resist the downward pressure of the polishing head, preventing elastic depressions at the back-drilled hole location during polishing, ensuring a flat polished surface, and thus ensuring that the resin outside the back-drilled hole is effectively removed, reducing rework caused by incomplete resin polishing, as well as the risk of insufficient copper thickness and poor impedance due to over-polishing.

Description

Technical Field

[0001] This invention relates to the field of printed circuit board manufacturing technology, and in particular to a method for improving the incomplete grinding of resin plugs in back-drilled holes. Background Technology

[0002] With the rapid iterative development of 5G communication, AI servers, and high-speed computing hardware, printed circuit boards (PCBs) are continuously evolving towards higher speeds, higher frequencies, higher density interconnects, and ultra-high layer counts. The ever-increasing signal transmission rates place increasingly stringent technical requirements on the signal integrity, board flatness, and long-term reliability of PCB products. Back-drilling, a key process to meet these evolving needs, involves removing some of the copper from electroplated through-holes using precision depth-controlled drilling technology, leaving only the effective copper segment required for signal transmission. The core function of this process is to effectively suppress parasitic interference such as signal reflection and crosstalk caused by excess copper during high-speed signal transmission, ensuring the integrity and stability of high-speed signal transmission. Furthermore, it offers significant advantages in cost control and has become the mainstream manufacturing process for meeting the performance requirements of high-frequency, high-speed circuit boards.

[0003] In recent years, the integration density of printed circuit boards (PCBs) has been continuously increasing. The original technical approach of increasing planar density by constantly reducing hole diameter, line width, and line spacing has reached a bottleneck. Therefore, improving 3D interconnect density has become a new direction for breakthrough development in the PCB industry. Resin plugging is used to fill and seal back-drilled vias. After curing, a belt abrasive grinding process is used to remove excess resin from the via openings. Subsequent processes such as copper plating, circuit board electroplating, and circuit pattern fabrication are then performed on the plugged surface. Thus, the combination of back-drilling and resin plugging has become a core technical solution for improving PCB 3D density and adapting to high-density interconnect requirements. However, in actual production, after grinding, resin residue remains at the edges of the back-drilled via openings, making complete cleaning difficult. This residual resin at the edges forms significant stress concentration points after subsequent copper plating and circuit board electroplating, easily inducing failures such as board bursting and delamination at the via edges, posing a serious threat to the long-term reliability of PCB products.

[0004] Currently, industry improvements to address this issue primarily focus on optimizing resin plugging processes and grinding parameters. However, these methods are passive and fail to fundamentally resolve the problem of incomplete resin grinding caused by the concave edges of back-drilled holes. Not only are the improvement effects limited, but the process window is also narrow, making it difficult to adapt to the demands of large-scale production. Therefore, a technological solution that achieves breakthrough improvements at the structural design or process principle level is urgently needed to completely overcome the technical pain point of incomplete resin grinding at the edges of back-drilled holes, ensuring the performance and reliability of PCB products. Summary of the Invention

[0005] This invention aims to at least partially solve one of the problems in related technologies. Therefore, one objective of this invention is to provide a method for improving the incomplete grinding of resin plugs in back-drilled holes. This method enables the formation of a uniform and dense media layer at the back-drilled hole location to resist the downward pressure of the grinding head, preventing elastic depressions at the back-drilled hole location during grinding, ensuring a smooth grinding surface, and thereby ensuring that the resin on the outside of the back-drilled hole is effectively removed. This reduces rework caused by incomplete resin grinding, as well as the risk of insufficient copper thickness and poor impedance due to over-grinding.

[0006] A method for improving the incomplete grinding of resin plugging in back-drilled holes includes: The graphic design involves setting a copper layer PAD in the PCB board corresponding to the back-drilled hole area, and the back-drilled hole completely covers the copper layer PAD in a plane perpendicular to the PCB board stacking plane. The PCB boards are stacked, laminated, and drilled in sequence; during the lamination process, the copper layer PAD forms a support layer in the back-drilled area, making the dielectric layer thickness in the back-drilled area uniform. Back-drill the PCB board to remove the copper layer PAD; The back-drilled holes are plugged, and the PCB board surface after plugging is resin-polished. Because the dielectric layer thickness in the back-drilled hole area is uniform, the resin on the outside of the back-drilled hole is uniformly removed.

[0007] Furthermore, after the PCB boards are stacked to form a stacked structure, a hole is drilled through the stacked structure to form a hole that penetrates the stacked structure; back drilling is performed on the back of the PCB board to form a back drill hole located on the back of the hole, and the diameter of the back drill hole is larger than the diameter of the hole.

[0008] Furthermore, after drilling a hole and before back drilling, the process includes electroplating the hole to form a copper layer on the sidewall of the hole.

[0009] Furthermore, in a plane perpendicular to the PCB stack, the copper layer PAD completely covers the drilled hole.

[0010] Furthermore, in the stacking direction of the PCB board, the center lines of the drill hole, the back drill hole, and the copper layer PAD coincide; The diameter of the first drill hole is D, and the diameter of the back drill hole is D+h, where h refers to the upper limit of the diameter deviation between the first drill hole and the back drill hole; the diameter of the copper layer PAD is D+x, where x is less than h.

[0011] Furthermore, the diameter of the copper layer PAD is D+x; x is less than h / 2-y, and y refers to the hole position deviation during back drilling.

[0012] Furthermore, in the stacking direction of the PCB boards, the copper layer PADs located in different PCB boards are staggered.

[0013] Furthermore, within the PCB board, the thickness of the copper layer PAD is the same as the thickness of the patterned area within the PCB board.

[0014] Furthermore, in the stacking direction of the PCB boards, the back-drilled hole area is formed by stacking M PCB boards; there are M copper layer PADs, and the M copper layer PADs are located in the M PCB boards respectively; M is an integer greater than 0.

[0015] Furthermore, in the stacking direction of the PCB boards, the back-drilled hole area is formed by stacking M PCB boards; there are N copper layer PADs, and the N copper layer PADs are distributed at intervals in the M PCB boards; M is an integer greater than 1, and N is an integer less than M.

[0016] Compared with the prior art, the technical solution provided in this application has the following advantages: In the graphic design, a corresponding copper layer PAD is designed in the back-drilled hole area. In the direction of the back-drilled hole, the back-drilled hole completely covers the copper layer PAD. That is, in the subsequent back-drilling process, the copper layer PAD will disappear synchronously with the back-drilling process, avoiding signal interference at the back-drilled hole position. In this application, the copper layer PAD exists in the process before back-drilling. As a copper layer support layer, it can ensure that during the pressing process, the prepreg forms a uniform and dense dielectric layer with uniform thickness at the copper layer PAD position. With the help of this dielectric layer, in the subsequent resin plugging and grinding process, although the copper layer PAD has been removed, the uniform and dense dielectric layer formed at this position can resist the downward pressure of the grinding head, avoiding elastic depression at the back-drilled hole position during the grinding process, ensuring a flat grinding surface, and thus ensuring that the resin on the outside of the back-drilled hole is effectively removed, reducing rework caused by incomplete resin grinding, as well as the risk of insufficient copper thickness and poor impedance caused by excessive grinding. Attached Figure Description

[0017] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.

[0018] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, those skilled in the art can obtain other drawings based on these drawings without creative effort.

[0019] In the attached image: Figure 1This is a schematic diagram of a drill hole structure in the prior art when there is no graphic support layer; Figure 2 This is a schematic diagram of the structure of a drilled hole after adding a copper layer PAD in an embodiment of this application; Figure 3 This is a schematic diagram of the structure of the back hole drilled after adding a copper layer PAD in the embodiment of this application.

[0020] Reference numerals: 11. Stacked structure; 12. One drill hole; 13. Back drill hole; 14. Copper layer PAD. Detailed Implementation

[0021] To provide a clearer understanding of the technical features, objectives, and effects of this invention, specific embodiments are now described in detail with reference to the accompanying drawings. In the following description, it should be understood that the orientations or positional relationships indicated by terms such as "front," "rear," "upper," "lower," "left," "right," "longitudinal," "horizontal," "vertical," "horizontal," "top," "bottom," "inner," "outer," "head," and "tail" are based on the orientations or positional relationships shown in the accompanying drawings, and are constructed and operated in a specific orientation. They are only for the convenience of describing this technical solution and do not indicate that the referred mechanism or element must have a specific orientation; therefore, they should not be construed as limitations on this invention.

[0022] It should also be noted that, unless otherwise explicitly specified and limited, terms such as "installation," "connection," "linking," "fixing," and "setting" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. When an component is referred to as being "on" or "below" another component, the component can be located "directly" or "indirectly" on the other component, or there may be one or more intermediary components. The terms "first," "second," "third," etc., are only for the convenience of describing this technical solution and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, features defined with "first," "second," "third," etc., may explicitly or implicitly include one or more of that feature. For those skilled in the art, the specific meaning of the above terms in this invention can be understood according to the specific circumstances.

[0023] In the following description, specific details such as particular system structures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of the invention. However, those skilled in the art will understand that the invention can be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, mechanisms, circuits, and methods are omitted so as not to obscure the description of the invention with unnecessary detail.

[0024] Example 1

[0025] This application provides a method for improving the incomplete resin grinding of back-drilled holes 13, comprising: In the graphic design, a copper layer PAD 14 is set in the PCB board corresponding to the back drill hole area. In the plane perpendicular to the PCB board stacking, the back drill hole 13 completely covers the copper layer PAD 14. The PCB boards are stacked, laminated, and drilled in sequence. During the lamination process, the copper layer PAD 14 forms a support layer in the back-drilled area, making the dielectric layer thickness in the back-drilled area uniform. Back-drill the PCB board to remove the copper layer PAD 14; The back-drilled hole 13 is plugged, and the PCB board surface after plugging is resin polished; because the dielectric layer thickness in the back-drilled hole area is uniform, the resin on the outside of the back-drilled hole 13 is uniformly removed.

[0026] In this application, back-drilled hole 13 refers to a re-drilling on the back side of a previously drilled hole 12. This is to completely eliminate residual copper plating, thereby reducing signal reflection, crosstalk, and electromagnetic interference. In the prior art, to ensure the formation of an insulating zone at the location of back-drilled hole 13, copper leakage is not allowed on the hole wall to avoid interlayer short circuits, leakage current, and parasitic capacitance. Simultaneously, it must meet insulation withstand voltage requirements to ensure high-speed signal quality and long-term reliability. Therefore, no patterned area is set around back-drilled hole 13, meaning no copper layer exists there. In other words, the design logic of back-drilled hole 13 dictates that no copper layer pattern exists at the location of back-drilled hole 13. Before back drilling, the PCB board needs to go through stacking, lamination and drilling once. Since there is no copper layer pattern around the back drill hole 13, there is no mechanical support anchor point in the back drill hole area. During the stacking and lamination process of the PCB board, the PCB boards are melted and pressed together through prepreg. The prepreg flows and solidifies under the high temperature and pressure of lamination. If there is a pattern support layer, the hard pattern support layer will restrict the flow and extrusion of the molten prepreg, so that a uniform and dense dielectric layer is formed in the pattern support layer area. If there is no pattern support layer, the molten prepreg in the copper-free area will stack freely, with high fluidity. Without the pattern support layer to occupy the space, the prepreg resin is easily squeezed out. After lamination, the thickness of this area is relatively thin, which easily forms an "hourglass" thickness distribution. Moreover, the material of the overall stack structure 11 is relatively softer and has a lower density.

[0027] During subsequent resin polishing, if the dielectric layer is uniform and dense, the PCB board can resist the downward pressure of the polishing head when it applies pressure, ensuring a flat polishing surface and uniform removal of resin outside the back-drilled hole 13. If there is no pattern support layer, as mentioned above, this will lead to insufficient rigidity in this area. During resin polishing, when the polishing head applies pressure to the PCB board, after the resin is filled into the back-drilled hole 13, the excess resin at the hole opening hardens and forms local high points. Under polishing pressure, the excess high-hardness resin protruding from the hole opening causes the hole opening area of ​​the back-drilled hole 13 to elastically sink downwards like a soft cushion. This further exacerbates the sinking of the hole opening area of ​​the back-drilled hole 13, which is below the polishing plane. The polishing head can only polish the raised areas and cannot polish the recessed areas, resulting in incomplete polishing and resin residue at the hole opening.

[0028] like Figure 2 and Figure 3 As shown, the core of this application is that, based on the existing design logic of no pattern support layer at the back drill hole 13, a copper layer PAD 14 is added to ensure that a uniform and dense dielectric layer is formed at the back drill hole 13 during pressing. The copper layer PAD 14 can be effectively removed in subsequent processes and will not cause any interference to the signal at the back drill hole 13.

[0029] In this application, a copper layer PAD 14 is designed in the back-drilled hole area during the graphic design phase. The back-drilled hole 13 completely covers the copper layer PAD 14 in the direction of the back-drilled hole 13. This means that during subsequent back-drilling, the copper layer PAD 14 disappears synchronously with the back-drilling process, avoiding signal interference at the back-drilled hole 13 location. In this application, the copper layer PAD 14 exists in the process prior to back-drilling. As a copper layer support layer, it ensures that during the lamination process, the prepreg forms a uniform, dense, and uniformly thick dielectric layer at the copper layer PAD 14 location. With the help of this dielectric layer, even though the copper layer PAD 14 has been removed during the subsequent resin plugging and grinding process, the uniform and dense dielectric layer formed at this location can resist the downward pressure of the grinding head, preventing elastic depressions at the back-drilled hole 13 location during grinding. This ensures a smooth grinding surface and effectively removes the resin outside the back-drilled hole 13, reducing rework caused by incomplete resin grinding and the risk of insufficient copper thickness and poor impedance due to over-grinding.

[0030] Example 2

[0031] This application provides a method for improving the incomplete resin grinding of back-drilled holes 13, comprising: S1: Graphic design, a copper layer PAD 14 is set in the PCB board corresponding to the back drill hole area, and the back drill hole 13 completely covers the copper layer PAD 14 in the plane perpendicular to the PCB board stacking.

[0032] In practice, the PCB board corresponding to the back-drilled hole 13 may be a structure formed by stacking multiple PCB boards. In the stacking direction of the PCB boards, the back-drilled hole area is formed by stacking M PCB boards; there are M copper layer PADs 14, each located in one of the M PCB boards; M is an integer greater than 0. That is, back-drilling needs to be performed simultaneously on the M stacked PCB boards. Correspondingly, a corresponding copper layer PAD 14 is set in each PCB board. This ensures that during subsequent lamination, adjacent PCB boards form a uniform, compact, and uniformly thick dielectric layer at the location of the back-drilled hole 13, thereby improving the mechanical properties of the stacked PCB board.

[0033] In this application, the copper layer PAD 14 is a cylindrical structure located within the PCB board, and the thickness of the copper layer PAD 14 is the same as the thickness of the patterned area within the PCB board; this facilitates the preparation and formation of the copper layer PAD 14.

[0034] In this application, copper PADs in different PCBs are staggered in the stacking direction of the PCBs; within the range of back-drilled hole size and drilling precision, the edge area of ​​the back-drilled hole is avoided from being a copper-free area in the vertical direction. This position is prone to forming an "hourglass" thickness distribution after lamination, i.e., a concave board surface.

[0035] S2: Stack the PCBs. There are M PCBs at the back drill hole 13 position. Therefore, the number of PCBs to be stacked must be greater than M. After all the PCBs are stacked, a stack structure 11 is formed. A semi-cured sheet is placed between adjacent PCBs for subsequent pressing of the stacked PCBs.

[0036] S3: Press the stacked structure 11 together. During the pressing process, the copper layer PAD 14 forms a support layer in the back-drilled hole area, so that the dielectric layer thickness in the back-drilled hole area is uniform.

[0037] In this step, since copper layer PAD 14 is added to each of the M PCBs corresponding to the back drill hole 13, the copper layer PAD 14 restricts the flow and compression of the molten prepreg during the lamination process, so that a uniform and dense dielectric layer with uniform thickness is formed on the copper layer PAD 14, resulting in a large overall rigidity of the stacked structure 11 formed by the M PCBs where the back drill hole 13 is located.

[0038] S4: As Figure 2 As shown, a hole is drilled once in the stacked structure 11; after the first drilling, a through hole 12 is formed, penetrating the stacked structure 11; then, the drilled hole 12 is electroplated to form a copper layer located on the sidewall of the drilled hole 12. In the plane perpendicular to the PCB board stacking plane, the copper layer PAD 14 completely covers the drilled hole 12.

[0039] In fact, when designing the size of the copper layer PAD 14, the larger the size of the copper layer PAD 14, the larger the size of the uniform and dense dielectric layer it helps form. However, the size of the copper layer PAD 14 cannot exceed the size of the back drill hole 13 to avoid signal interference at the back drill hole 13. As a preferred embodiment, the size of the copper layer PAD 14 can be designed to be larger than the drill hole 12 and smaller than the back drill hole 13. This ensures that the area of ​​the copper layer PAD 14 is as large as possible and can be effectively removed.

[0040] In one specific embodiment, in the stacking direction of the PCB board, the center lines of the drill hole 12, the back drill hole 13, and the copper layer PAD 14 coincide; the diameter of the drill hole 12 is D, the diameter of the back drill hole 13 is D+h, where h refers to the upper limit of the diameter deviation between the drill hole 12 and the back drill hole 13; the diameter of the copper layer PAD 14 is D+x; x is less than h / 2-y, where y refers to the hole position deviation when drilling the back drill hole 13.

[0041] For example, the alignment of the back drill hole 13 is calculated according to the process capability of the drilling device in the prior art, and the value of h is 6mil. That is, during the back drilling process, the upper limit of the deviation between the diameter of the back drill hole 13 and the diameter of the drill hole 12 is 6mil. This can ensure that the electroplated copper layer on the hole wall of the drill hole 12 is completely removed.

[0042] The value of y is 1 mil, which represents the hole position deviation during the back-drilling process of hole 13, specifically the positional deviation between the center of back-drilled hole 13 and the center of drilled hole 12 during back-drilling. In actual operation, the diameter of drilled hole 12 is D, the diameter of back-drilled hole 13 is D+6 mil, and the diameter of copper layer PAD 14 is D+1.5 mil, ensuring that within the allowable error range, copper layer PAD 14 can be completely removed during the back-drilling process.

[0043] S5: As Figure 3 As shown, the stacked structure 11 is back-drilled to remove the copper layer PAD 14; S6: Plug the back-drilled hole 13 and perform resin polishing on the PCB board surface after plugging; since the dielectric layer thickness in the back-drilled hole area is uniform, the resin on the outside of the back-drilled hole 13 is uniformly removed.

[0044] In this application, copper layer PADs 14 are provided in each of the M PCBs containing the back-drilled holes 13. During the lamination process, the copper layer PADs 14 restrict the flow and compression of the molten prepreg, resulting in a uniform and dense dielectric layer with a uniform thickness above the copper layer PADs 14. This gives the stacked structure 11 formed by the M PCBs containing the back-drilled holes 13 a high overall rigidity. During resin polishing, because the dielectric layer is uniform and dense with a uniform thickness, the PCB can resist the downward pressure of the polishing head when pressure is applied to it, ensuring a flat polished surface and uniform removal of resin outside the back-drilled holes 13.

[0045] Example 3

[0046] This application provides a method for improving the incomplete resin grinding of back-drilled holes 13, comprising: S1: Graphic design, a copper layer PAD 14 is set in the PCB board corresponding to the back drill hole area, and the back drill hole 13 completely covers the copper layer PAD 14 in the plane perpendicular to the PCB board stacking.

[0047] In practice, the PCB board corresponding to the back drill hole 13 may be a structure formed by stacking multiple PCB boards. In the stacking direction of the PCB boards, the back drill hole area is formed by stacking M PCB boards; the copper layer PAD 14 is N, and the N copper layer PADs 14 are spaced apart in the M PCB boards; M is an integer greater than 1, and N is an integer less than M.

[0048] For example, if M is 5 and N is 3, then the three copper layer PADs 14 are located in the first, second, and third PCB layers, respectively. In practice, the more copper layer PADs 14 there are, the greater the mechanical strength of the final stacked structure 11. However, increasing the number of copper layer PADs 14 also complicates the manufacturing process. Considering both factors, spaced copper layer PADs 14 can still meet the grinding requirements. Spaced copper layer PADs 14 in the PCB ensures that a uniform, compact, and uniformly thick dielectric layer is formed at the back drill holes 13 during subsequent lamination, thereby improving the mechanical properties of the stacked PCB.

[0049] In this application, the copper layer PAD 14 is a cylindrical structure located within the PCB board, and the thickness of the copper layer PAD 14 is the same as the thickness of the patterned area within the PCB board; this facilitates the preparation and formation of the copper layer PAD 14.

[0050] In this application, copper PADs in different PCBs are staggered in the stacking direction of the PCBs; within the range of back-drilled hole size and drilling precision, the edge area of ​​the back-drilled hole is avoided from being a copper-free area in the vertical direction. This position is prone to forming an "hourglass" thickness distribution after lamination, i.e., a concave board surface.

[0051] S2: Stack the PCBs. There are M PCBs at the back drill hole 13 position. Therefore, the number of PCBs to be stacked must be greater than M. After all the PCBs are stacked, a stack structure 11 is formed. A semi-cured sheet is placed between adjacent PCBs for subsequent pressing of the stacked PCBs.

[0052] S3: Press the stacked structure 11 together. During the pressing process, the copper layer PAD 14 forms a support layer in the back-drilled hole area, so that the dielectric layer thickness in the back-drilled hole area is uniform.

[0053] In this step, since copper PAD 14 is added to each of the N PCBs corresponding to the back drill hole 13, the copper PAD 14 restricts the flow and compression of the molten prepreg during the lamination process, so that a uniform and dense dielectric layer with uniform thickness is formed on the copper PAD 14, resulting in a large overall rigidity of the stacked structure 11 formed by the N PCBs where the back drill hole 13 is located.

[0054] S4: As Figure 2 As shown, a hole is drilled once in the stacked structure 11; after the first drilling, a through hole 12 is formed, penetrating the stacked structure 11; then, the drilled hole 12 is electroplated to form a copper layer located on the sidewall of the drilled hole 12. In the plane perpendicular to the PCB board stacking plane, the copper layer PAD 14 completely covers the drilled hole 12.

[0055] In fact, when designing the size of the copper layer PAD 14, the larger the size of the copper layer PAD 14, the larger the size of the uniform and dense dielectric layer it helps form. However, the size of the copper layer PAD 14 cannot exceed the size of the back drill hole 13 to avoid signal interference at the back drill hole 13. As a preferred embodiment, the size of the copper layer PAD 14 can be designed to be larger than the drill hole 12 and smaller than the back drill hole 13. This ensures that the area of ​​the copper layer PAD 14 is as large as possible and can be effectively removed.

[0056] In one specific embodiment, in the stacking direction of the PCB board, the center lines of the drill hole 12, the back drill hole 13, and the copper layer PAD 14 coincide; the diameter of the drill hole 12 is D, the diameter of the back drill hole 13 is D+h, where h refers to the upper limit of the diameter deviation between the drill hole 12 and the back drill hole 13; the diameter of the copper layer PAD 14 is D+x; x is less than h / 2-y, where y refers to the hole position deviation when drilling the back drill hole 13.

[0057] For example, the alignment of the back drill hole 13 is calculated according to the process capability of the drilling device in the prior art, and the value of h is 6mil. That is, during the back drilling process, the upper limit of the deviation between the diameter of the back drill hole 13 and the diameter of the drill hole 12 is 6mil. This can ensure that the electroplated copper layer on the hole wall of the drill hole 12 is completely removed.

[0058] The value of y is 1 mil, which represents the hole position deviation during the back-drilling process of hole 13, specifically the positional deviation between the center of back-drilled hole 13 and the center of drilled hole 12 during back-drilling. In actual operation, the diameter of drilled hole 12 is D, the diameter of back-drilled hole 13 is D+6 mil, and the diameter of copper layer PAD 14 is D+1.5 mil, ensuring that within the allowable error range, copper layer PAD 14 can be completely removed during the back-drilling process.

[0059] S5: As Figure 3As shown, the stacked structure 11 is back-drilled to remove the copper layer PAD 14; S6: Plug the back-drilled hole 13 and perform resin polishing on the PCB board surface after plugging; since the dielectric layer thickness in the back-drilled hole area is uniform, the resin on the outside of the back-drilled hole 13 is uniformly removed.

[0060] In this application, copper layer PADs 14 are provided in each of the M PCBs containing the back-drilled holes 13. During the lamination process, the copper layer PADs 14 restrict the flow and compression of the molten prepreg, resulting in a uniform and dense dielectric layer with relatively uniform thickness above the copper layer PADs 14. This makes the overall rigidity of the stacked structure 11 formed by the N PCBs containing the back-drilled holes 13 relatively high. During resin polishing, because the dielectric layer is uniform and dense with relatively uniform thickness, the PCB can resist the downward pressure of the polishing head when pressure is applied to it, ensuring a flat polished surface and uniform removal of resin outside the back-drilled holes 13.

[0061] In this application, the copper layer PAD 14 exists in the process prior to back drilling. As a copper layer support layer, it ensures that during the lamination process, the prepreg forms a uniform, dense, and uniformly thick dielectric layer at the location of the copper layer PAD 14. With the help of this dielectric layer, even though the copper layer PAD 14 has been removed during the subsequent resin plugging and grinding process, the uniform and dense dielectric layer formed at this location can resist the downward pressure of the grinding head, preventing elastic depression at the location of the back drill hole 13 during the grinding process, ensuring a flat grinding surface, and thus ensuring that the resin on the outside of the back drill hole 13 is effectively removed, reducing the risk of rework caused by incomplete resin grinding, as well as insufficient copper thickness and poor impedance caused by over-grinding.

[0062] It is understood that the above embodiments only illustrate preferred embodiments of the present invention, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can freely combine the above technical features without departing from the concept of the present invention, and can also make several modifications and improvements, all of which fall within the protection scope of the present invention. Therefore, all equivalent transformations and modifications made with respect to the scope of the claims of the present invention should fall within the scope of the claims of the present invention.

Claims

1. A method for improving the incomplete grinding of resin plugging in back-drilled holes, characterized in that, include: The graphic design involves setting a copper layer PAD in the PCB board corresponding to the back drill hole, and the back drill hole completely covers the copper layer PAD in the stacking plane perpendicular to the PCB board. The PCB boards are stacked, laminated, and drilled in sequence; during the lamination process, the copper layer PAD forms a support layer in the back-drilled area, making the dielectric layer thickness in the back-drilled area uniform. Back-drill the PCB board to remove the copper layer PAD; The back-drilled holes are plugged, and the PCB board surface after plugging is resin-polished. Because the dielectric layer thickness in the back-drilled hole area is uniform, the resin on the outside of the back-drilled hole is uniformly removed.

2. The method for improving the incomplete grinding of resin plugging in back-drilled holes according to claim 1, characterized in that, The PCB boards are stacked to form a stacked structure. A hole is drilled through the stacked structure to form a hole that penetrates the stacked structure. The hole is then back-drilled from the back of the PCB board to form a back-drilled hole. The diameter of the back-drilled hole is larger than that of the hole in the first drilling.

3. The method for improving the incomplete grinding of resin plugging in back-drilled holes according to claim 2, characterized in that, After a drilling operation and before a back drilling operation, the drilling operation includes electroplating the drilled hole to form a copper layer on the sidewall of the drilled hole.

4. The method for improving the incomplete grinding of resin plugging in back-drilled holes according to claim 2, characterized in that, In a plane perpendicular to the PCB stack, the copper layer PAD completely covers the drilled hole.

5. The method for improving the incomplete grinding of resin plugging in back-drilled holes according to claim 4, characterized in that, In the stacking direction of the PCB board, the center lines of the drill hole, the back drill hole, and the copper layer PAD coincide; The diameter of the first drill hole is D, and the diameter of the back drill hole is D+h, where h refers to the upper limit of the diameter deviation between the first drill hole and the back drill hole; the diameter of the copper layer PAD is D+x, where x is less than h.

6. The method for improving the incomplete grinding of resin plugging in back-drilled holes according to claim 5, characterized in that, The diameter of the copper layer PAD is D+x; x is less than h / 2-y, where y refers to the hole position deviation during back drilling.

7. The method for improving the incomplete grinding of resin plugging in back-drilled holes according to claim 1, characterized in that, In the stacking direction of the PCB boards, the copper layer PADs located in different PCB boards are staggered.

8. The method for improving the incomplete grinding of resin plugging in back-drilled holes according to claim 7, characterized in that, Within the PCB board, the thickness of the copper layer PAD is the same as the thickness of the patterned area within the PCB board.

9. The method for improving the incomplete grinding of resin plugging in back-drilled holes according to claim 1, characterized in that, In the stacking direction of the PCB boards, the back-drilled hole area is formed by stacking M PCB boards; there are M copper layer PADs, and the M copper layer PADs are located in the M PCB boards respectively; M is an integer greater than 0.

10. The method for improving the incomplete grinding of resin plugging in back-drilled holes according to claim 1, characterized in that, In the stacking direction of the PCB boards, the back-drilled hole area is formed by stacking M PCB boards; there are N copper layer PADs, and the N copper layer PADs are distributed at intervals in the M PCB boards; M is an integer greater than 1, and N is an integer less than M.

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