Method for manufacturing a downgraded circuit board structure

CN122952520APending Publication Date: 2026-10-20TRIPOD WUXI ELECTRONICS
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Patent Information

Application Number
CN202611248485.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-08-17
Publication Date
2026-10-20

AI Technical Summary

Technical Problem

[0003]本发明公开一种降级电路板结构的制造方法,主要用以改善由于单层中的金属接垫的尺寸是过大,导致现有的电路板结构的制造方法制得的电路板结构存在有层数过高的问题

Benefits of technology

[0015]综上所述,本发明的降级电路板结构的制造方法,其能通过“所述第一金属接垫与所述核心基板中的一个所述第一线路层通过所述第一导通铜层导通”以及“所述第一金属接垫的所述第一径向尺寸小于500微米”的技术方案以有效改善由于单层中的金属接垫的尺寸是过大,导致现有的电路板结构的制造方法制得的电路板结构存在有层数过高的问题。

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Abstract

This invention discloses a method for manufacturing a degraded circuit board structure, comprising: a pre-processing step of providing a core substrate, which includes a first insulating layer and two first circuit layers; a first lamination step of laminating a second insulating layer onto the core substrate; a laser step of laser-applying the second insulating layer to form laser holes; a mechanical drilling step of mechanically drilling the second insulating layer to form machine-drilled holes; an electroplating step of electroplating a copper foil layer onto the second insulating layer, forming a first conductive copper layer in the laser holes, and forming a second conductive copper layer in the machine-drilled holes; an etching step of etching to form a second circuit layer; and a second lamination step of laminating a third insulating layer onto the second insulating layer to form a degraded circuit board structure. The manufacturing method for the degraded circuit board structure disclosed in this invention can improve the problem of excessively high layer counts in circuit board structures produced by existing circuit board manufacturing methods.
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Description

Technical Field

[0001] This invention relates to a method for manufacturing a circuit board structure, and more particularly to a method for manufacturing a degraded circuit board structure. Background Technology

[0002] In circuit board structures manufactured using existing methods, the size of the metal pads in a single layer is often too large, causing the layer to be unable to accommodate more circuits and requiring the number of layers to be increased. Therefore, circuit board structures manufactured using existing methods have the problem of having too many layers. Summary of the Invention

[0003] This invention discloses a method for manufacturing a downgraded circuit board structure, which is mainly used to improve the problem that the existing circuit board structure manufacturing methods have too many layers because the size of the metal pads in a single layer is too large.

[0004] One embodiment of the present invention discloses a method for manufacturing a degraded circuit board structure, comprising: a pre-processing step of providing a core substrate, the core substrate including a first insulating layer and two first circuit layers located on both sides of the first insulating layer; a first lamination step of laminating a second insulating layer onto one side of the core substrate; wherein the second insulating layer defines a first surface away from the core substrate and a second surface adjacent to the core substrate; a laser step of lasering the first surface of the second insulating layer to form a laser hole penetrating the first insulating layer and the second insulating layer; a mechanical drilling step of mechanically drilling the first surface of the second insulating layer to form a drilled hole penetrating the first insulating layer and the second insulating layer; an electroplating step of forming a copper foil layer on the first surface of the second insulating layer, a first conductive copper layer in the laser hole, and a second conductive copper layer in the drilled hole by electroplating; and an etching step of removing a portion of the copper foil layer by etching to form a second circuit layer; wherein the second circuit layer includes a first metal pad and a second metal pad respectively surrounding the laser hole and the drilled hole; and

[0005] A second lamination step involves laminating a third insulating layer onto the first surface of the second insulating layer to form a degraded circuit board structure; wherein a first metal pad is connected to a first circuit layer in the core substrate via a first conductive copper layer; wherein a first radial dimension of the first metal pad is less than 500 micrometers.

[0006] Optionally, the third insulating layer defines a body portion and an extension portion extending from a surface adjacent to the second insulating layer, the extension portion extending into the laser aperture and surrounded by a first conductive copper layer.

[0007] Optionally, in the second pressing step, the prepreg forming the third insulating layer partially flows into the laser hole before it is fully cured to form an extension of the third insulating layer.

[0008] Optionally, the body and extension of the third insulating layer are integrally formed.

[0009] Optionally, the viscosity of the prepreg forming the third insulating layer is greater than the viscosity of the prepreg forming the first or second insulating layer.

[0010] Optionally, the aperture of the laser aperture is between 75 micrometers and 300 micrometers.

[0011] Optionally, the depth of the laser aperture is between 45 micrometers and 300 micrometers.

[0012] Optionally, the first radial dimension of the first metal pad is between 200 micrometers and 300 micrometers.

[0013] Optionally, a second radial dimension of the second metal pad is between 350 micrometers and 500 micrometers.

[0014] Optionally, after the etching step and before the second lamination step, the method for manufacturing the degraded circuit board structure further includes a resin filling step, in which a filling resin is filled into a machine-drilled hole and the filling resin is surrounded by a second conductive copper layer.

[0015] In summary, the manufacturing method of the downgraded circuit board structure of the present invention can effectively improve the problem of excessively high number of layers in the circuit board structure produced by the existing circuit board structure manufacturing method due to the excessive size of the metal pad in a single layer, by means of the technical solutions of "the first metal pad and one of the first circuit layers in the core substrate being connected through the first conductive copper layer" and "the first radial dimension of the first metal pad being less than 500 micrometers".

[0016] To further understand the features and technical content of this invention, please refer to the following detailed description and accompanying drawings. However, these descriptions and drawings are only for illustrating the invention and are not intended to limit the scope of protection of the invention in any way. Attached Figure Description

[0017] Figure 1 This is a flowchart illustrating a method for manufacturing a downgraded circuit board structure according to an embodiment of the present invention.

[0018] Figure 2 This is a schematic diagram of the preliminary steps in the manufacturing method of the downgraded circuit board structure according to an embodiment of the present invention.

[0019] Figure 3 This is a schematic diagram of the first lamination step in the manufacturing method of the downgraded circuit board structure according to an embodiment of the present invention.

[0020] Figure 4 This is a schematic diagram of the laser step in the manufacturing method of the downgraded circuit board structure according to an embodiment of the present invention.

[0021] Figure 5 This is a schematic diagram of the mechanical drilling step in the manufacturing method of the downgraded circuit board structure according to an embodiment of the present invention.

[0022] Figure 6 This is a schematic diagram of the electroplating steps in the manufacturing method of the downgraded circuit board structure according to an embodiment of the present invention.

[0023] Figure 7 This is a schematic diagram of the etching steps in the manufacturing method of the downgraded circuit board structure according to an embodiment of the present invention.

[0024] Figure 8 This is a schematic diagram of the resin filling step in the manufacturing method of the downgraded circuit board structure according to an embodiment of the present invention.

[0025] Figure 9 This is a schematic diagram of the second lamination step in the manufacturing method of the downgraded circuit board structure according to an embodiment of the present invention. Detailed Implementation

[0026] The following specific embodiments illustrate the implementation of the "manufacturing method for a degraded circuit board structure" disclosed in this invention. Those skilled in the art can understand the advantages and effects of this invention from the content disclosed in this specification. This invention can be implemented or applied through other different specific embodiments, and various details in this specification can also be modified and changed based on different viewpoints and applications without departing from the concept of this invention. Furthermore, the accompanying drawings of this invention are for simple illustrative purposes only and are not depictions of actual dimensions; this is stated beforehand. The following embodiments will further describe the relevant technical content of this invention in detail, but the disclosed content is not intended to limit the scope of protection of this invention.

[0027] It should be understood that while terms such as "first," "second," and "third" may be used in this document to describe various components or signals, these components or signals should not be limited by these terms. These terms are primarily used to distinguish one component from another, or one signal from another. Furthermore, the term "or" as used herein should, as appropriate, include any combination of one or more of the associated listed items.

[0028] This invention provides a method for manufacturing a degraded circuit board structure and a degraded circuit board structure. The manufacturing method and the degraded circuit board structure will be described in turn below.

[0029] [Manufacturing Method for Degraded Circuit Board Structure]

[0030] Please see Figure 1 As shown, Figure 1 This is a flowchart illustrating a method for manufacturing a degraded circuit board structure according to an embodiment of the present invention. The present invention provides a method for manufacturing a degraded circuit board structure. The method includes a pre-processing step S110, a first lamination step S120, a laser step S130, a mechanical drilling step S140, an electroplating step S150, an etching step S160, and a second lamination step S170. Of course, the method for manufacturing the degraded circuit board structure may include other steps as needed, and the present invention does not limit this.

[0031] Please see Figure 2 As shown, Figure 2 This is a schematic diagram of the preliminary steps in the manufacturing method of the downgraded circuit board structure according to an embodiment of the present invention. In the preliminary step S110, a core substrate 1 is provided, the core substrate 1 including a first insulating layer 11 and two first circuit layers 12 located on both sides of the first insulating layer 11.

[0032] Please see Figure 3 As shown, Figure 3 This is a schematic diagram of the first lamination step in the manufacturing method of the downgraded circuit board structure according to an embodiment of the present invention. In the first lamination step S120, a second insulating layer 2 is lamination onto one side of the core substrate 1. The second insulating layer 2 defines a first surface 2a away from the core substrate 1 and a second surface 2b adjacent to the core substrate 1.

[0033] Please see Figure 4 As shown, Figure 4 This is a schematic diagram of the laser step in the manufacturing method of a degraded circuit board structure according to an embodiment of the present invention. In the laser step S130, the first surface 2a of the second insulating layer 2 is laser-treated to form a laser hole 3 penetrating the first insulating layer 11 and the second insulating layer 2. After the laser step S130, the first circuit layer 12, which is away from the second insulating layer 2, may be partially exposed from the laser hole 3.

[0034] Furthermore, since the laser hole 3 is formed by laser, the hole wall of the laser hole 3 can be tapered. In other words, other machine-drilled holes formed by mechanical drilling are not suitable for comparison with the laser hole 3 of the present invention. The aperture W of the laser hole 3 can be between 75 micrometers and 300 micrometers, and the hole depth D of the laser hole 3 can be between 45 micrometers and 300 micrometers, but the present invention is not limited thereto. Alternatively, the aperture W of the laser hole 3 can be between 75 micrometers and 150 micrometers, but the present invention is not limited thereto.

[0035] Please see Figure 5As shown, Figure 5 This is a schematic diagram of the mechanical drilling step in the manufacturing method of the downgraded circuit board structure according to an embodiment of the present invention. In the mechanical drilling step S140, the first surface 2a of the second insulating layer 2 is mechanically drilled to form a drilled hole 4 penetrating the first insulating layer 11 and the second insulating layer 2. Since the drilled hole 4 is formed by mechanical drilling, the hole wall size is substantially uniform (i.e., not tapered). Furthermore, in this embodiment, the drilled hole 4 may penetrate both of the first circuit layers 12 of the core substrate 1, but the present invention is not limited thereto.

[0036] Please see Figure 6 As shown, Figure 6 This is a schematic diagram of the electroplating steps in the manufacturing method of the downgraded circuit board structure according to an embodiment of the present invention. In the electroplating step S150, a copper foil layer 5 is formed on the first surface 2a of the second insulating layer 2 by electroplating, a first conductive copper layer 31 is formed in the laser hole 3, and a second conductive copper layer 41 is formed in the machine-drilled hole 4. In other words, the copper foil layer 5, the first conductive copper layer 31, and the second conductive copper layer 41 are all formed in the same step (i.e., the electroplating step S150).

[0037] Please see Figure 7 As shown, Figure 7 This is a schematic diagram of the etching steps in the manufacturing method of the downgraded circuit board structure according to an embodiment of the present invention. In the etching step S160, a portion of the copper foil layer 5 is removed by etching to form a second circuit layer 5'. The second circuit layer 5' includes a first metal pad 51' and a second metal pad 52' surrounding the laser hole 3 and the machine-drilled hole 4, respectively.

[0038] The first metal pad 51' is connected to one of the first circuit layers 12 in the core substrate 1 through the first conductive copper layer 31. The second metal pad 52' is connected to one of the first circuit layers 12 in the core substrate 1 through the second conductive copper layer 41. Alternatively, the second metal pad 52' can be connected to both of the first circuit layers 12 in the core substrate 1 through the second conductive copper layer 41.

[0039] It is worth mentioning that, since the first metal pad 51' and the first circuit layer 12 are connected through the first conductive copper layer 31, the area occupied by the first metal pad 51' on the first surface can be smaller compared to other conductive structures formed by electroplating in drilled holes. In this way, more circuitry can be accommodated in a single layer, thus further reducing the overall number of layers.

[0040] The first metal pad 51' and the second metal pad 52' may be generally annular in shape. A first radial dimension d1 of the first metal pad 51' is less than 500 micrometers. Alternatively, the first radial dimension d1 of the first metal pad 51' may be between 200 and 300 micrometers, and a second radial dimension d2 of the second metal pad 52' may be between 350 and 500 micrometers, but the invention is not limited thereto.

[0041] Please see Figure 8 As shown, Figure 8 This is a schematic diagram of the resin filling step in the manufacturing method of the degraded circuit board structure according to an embodiment of the present invention. After the etching step S160 and before the second bonding step S170, the manufacturing method of the degraded circuit board structure may further include a resin filling step S161, in which a filling resin 42 is filled into the machine-drilled hole 4, and the filling resin 42 is surrounded by the second conductive copper layer 41.

[0042] Please see Figure 9 As shown, Figure 9 This is a schematic diagram of the second lamination step in the manufacturing method of the degraded circuit board structure according to an embodiment of the present invention. In the second lamination step S170, a third insulating layer 6 is lamination onto the first surface 2a of the second insulating layer 2 to form a degraded circuit board structure 100.

[0043] The third insulating layer 6 defines a body portion 62 and an extension portion 61 extending from a surface adjacent to the second insulating layer 2. The extension portion 61 extends into the laser aperture 3 and is surrounded by the first conductive copper layer 31. The shape of the extension portion 61 may correspond to the shape of the laser aperture 3. In other words, the extension portion 61 extends toward the core substrate 1 and is tapered.

[0044] In the second lamination step S170, the prepreg forming the third insulating layer 6 partially flows into the laser hole 3 before complete curing to form the extension 61 of the third insulating layer 6. Furthermore, since the extension 61 of the third insulating layer 6 is formed in the second lamination step S170 by the prepreg forming the third insulating layer 6 flowing into the laser hole 3, the manufacturing method of the degraded circuit board structure does not require additional steps to fill the laser hole 3, thus simplifying the process.

[0045] Furthermore, since the body portion 62 and the extension portion 61 of the third insulating layer 6 are both formed in the second pressing step S170, the body portion 62 and the extension portion 61 of the third insulating layer 6 can be integrally formed.

[0046] The viscosity of the prepreg forming the third insulating layer 6 is greater than the viscosity of the prepreg forming the first insulating layer 11 or the second insulating layer 2. This reduces the likelihood of air bubbles and voids forming in the third insulating layer 6, but the invention is not limited thereto. The aforementioned prepreg may be, for example, epoxy resin-impregnated fiberglass cloth, but the invention is not limited thereto.

[0047] [Degraded Circuit Board Structure]

[0048] like Figure 9 As shown, Figure 9 This can also be considered a schematic diagram of a degraded circuit board structure according to an embodiment of the present invention. The present invention also provides a degraded circuit board structure 100. The degraded circuit board structure 100 can be obtained by the aforementioned manufacturing method for degraded circuit board structures, but the present invention is not limited thereto.

[0049] The degraded circuit board structure 100 includes a core substrate 1. The core substrate 1 includes a first insulating layer 11 and two first circuit layers 12 located on both sides of the first insulating layer 11. The degraded circuit board structure 100 also includes a second insulating layer 2, a laser hole 3, a machine-drilled hole 4, a second circuit layer 5', and a third insulating layer 6.

[0050] The second insulating layer 2 is formed on one side of the core substrate 1. The second insulating layer 2 defines a first surface 2a away from the core substrate 1 and a second surface 2b adjacent to the core substrate 1.

[0051] The laser hole 3 penetrates both the first insulating layer 11 and the second insulating layer 2, and a first conductive copper layer 31 is formed within the laser hole 3. The aperture W of the laser hole 3 can be between 75 micrometers and 300 micrometers, and the depth D of the laser hole 3 can be between 45 micrometers and 300 micrometers, but the present invention is not limited thereto. The machine-drilled hole 4 penetrates both the first insulating layer 11 and the second insulating layer 2, and a second conductive copper layer 41 is formed within the machine-drilled hole 4. Furthermore, a filling resin 42 surrounded by the second conductive copper layer 41 may also be formed within the machine-drilled hole 4.

[0052] The second circuit layer 5' is formed on the first surface 2a of the second insulating layer 2. The second circuit layer 5' includes a first metal pad 51' and a second metal pad 52' surrounding the laser hole 3 and the machine-drilled hole 4, respectively.

[0053] The first metal pad 51' is electrically connected to one of the first circuit layers 12 in the core substrate 1 through the first conductive copper layer 31. The second metal pad 52' is electrically connected to one of the first circuit layers 12 in the core substrate 1 through the second conductive copper layer 41. Alternatively, the second metal pad 52' may be electrically connected to both of the first circuit layers 12 in the core substrate 1 through the second conductive copper layer 41. A first radial dimension d1 of the first metal pad 51' is less than 500 micrometers. Alternatively, the first radial dimension d1 of the first metal pad 51' may be between 200 and 300 micrometers, and a second radial dimension d2 of the second metal pad 52' may be between 350 and 500 micrometers, but the invention is not limited thereto.

[0054] The third insulating layer 6 is formed on the first surface 2a of the second insulating layer 2. The third insulating layer 6 defines a body portion 62 and an extension portion 61 extending from the surface adjacent to the second insulating layer 2, the extension portion 61 extending into the laser hole 3 and being surrounded by the first conductive copper layer 31.

[0055] It is worth mentioning that the prepreg that forms the third insulating layer 6 partially flows into the laser hole 3 before it is fully cured to form the extension 61 of the third insulating layer 6. The body portion 62 and the extension 61 of the third insulating layer 6 are integrally formed. The viscosity of the prepreg that forms the third insulating layer 6 is greater than the viscosity of the prepreg that forms the first insulating layer 11 or the second insulating layer 2, but the present invention is not limited thereto.

[0056] [Beneficial Effects of the Embodiments of the Invention]

[0057] In summary, the manufacturing method of the downgraded circuit board structure of the present invention can effectively improve the problem of excessively high number of layers in the circuit board structure produced by the existing circuit board structure manufacturing method due to the excessive size of the metal pad in a single layer, by means of the technical solutions of "the first metal pad and one of the first circuit layers in the core substrate being connected through the first conductive copper layer" and "the first radial dimension of the first metal pad being less than 500 micrometers".

[0058] The above description is only a preferred embodiment of the present invention and does not limit the patent scope of the present invention. Therefore, all equivalent technical changes made based on the description and drawings of the present invention are included within the protection scope of the present invention.

Claims

1. A method for manufacturing a degraded circuit board structure, characterized in that, The manufacturing method of the downgraded circuit board structure includes: A preliminary step involves providing a core substrate, the core substrate comprising a first insulating layer and two first circuit layers located on both sides of the first insulating layer; A first lamination step involves laminating a second insulating layer onto one side of the core substrate; wherein the second insulating layer defines a first surface away from the core substrate and a second surface adjacent to the core substrate; A laser step involves lasering the first surface of the second insulating layer to form a laser hole penetrating both the first and second insulating layers. A mechanical drilling step is performed to mechanically drill the first surface of the second insulating layer to form a machine-drilled hole that penetrates both the first and second insulating layers. An electroplating step involves forming a copper foil layer on the first surface of the second insulating layer, forming a first conductive copper layer in the laser hole, and forming a second conductive copper layer in the machine-drilled hole by electroplating. An etching step removes a portion of the copper foil layer by etching to form a second circuit layer; wherein the second circuit layer includes a first metal pad and a second metal pad respectively surrounding the laser hole and the machine-drilled hole; and A second lamination step involves laminating a third insulating layer onto the first surface of the second insulating layer to form a degraded circuit board structure. The first metal pad is connected to one of the first circuit layers in the core substrate through the first conductive copper layer. Wherein, a first radial dimension of the first metal pad is less than 500 micrometers.

2. The manufacturing method of the downgraded circuit board structure according to claim 1, characterized in that, The third insulating layer defines a body portion and an extension portion extending from a surface adjacent to the second insulating layer, the extension portion extending into the laser aperture and surrounded by the first conductive copper layer.

3. The manufacturing method of the downgraded circuit board structure according to claim 2, characterized in that, In the second pressing step, the prepreg that forms the third insulating layer partially flows into the laser hole before it is fully cured to form the extension of the third insulating layer.

4. The manufacturing method of the downgraded circuit board structure according to claim 2, characterized in that, The body portion and the extension portion of the third insulating layer are integrally formed.

5. The manufacturing method of the downgraded circuit board structure according to claim 1, characterized in that, The viscosity of the prepreg forming the third insulating layer is greater than the viscosity of the prepreg forming the first or second insulating layer.

6. The method for manufacturing a degraded circuit board structure according to claim 1, characterized in that, The aperture of the laser aperture is between 75 micrometers and 300 micrometers.

7. The method for manufacturing a degraded circuit board structure according to claim 1, characterized in that, The depth of the laser aperture is between 45 micrometers and 300 micrometers.

8. The method for manufacturing a degraded circuit board structure according to claim 1, characterized in that, The first radial dimension of the first metal pad is between 200 micrometers and 300 micrometers.

9. The method for manufacturing a degraded circuit board structure according to claim 1, characterized in that, The second radial dimension of the second metal pad is between 350 micrometers and 500 micrometers.

10. The method for manufacturing a degraded circuit board structure according to claim 1, characterized in that, After the etching step and before the second lamination step, the method of manufacturing the degraded circuit board structure further includes a resin filling step, in which a filling resin is filled into the machine-drilled hole, and the filling resin is surrounded by the second conductive copper layer.