A programmable memistor based on ferroelectric parametric modulation and application thereof

Abstract

A programmable memory sensor based on ferroelectric sequence parameter control and its application are disclosed. From bottom to top, the sensor includes a conductive substrate, a sequence parameter inductor material layer, and at least two top electrodes. Channels between adjacent top electrodes constitute the memory-sensing functional region. The material layer possesses ferroelectric sequence, exhibiting no long-range magnetic sequence within a specific temperature range, but only local magnetic moments and local chiral spin correlations. Using this ferroelectric sequence as the core, polarization and chiral spin dynamics are coupled. Pulsed polarization is driven to oscillate via Dzyaloshinskii-Moriya interaction (DMI), generating a positive inductance in the impedance. Adjusting the polarization magnitude tunes the inductance, achieving intrinsic memory sensing. The sequence parameter inductor and ferroelectric tunnel junction are integrated into an array, allowing for programmable multi-level sensing states. These states are multiplexed with resistive states to construct a patterned sensing memory, and the resonant frequency response is tuned via AC / DC coupling. This transforms the inductor into a writable state, filling the gaps in the memory sensor.

Description

Technical Field

[0001] This invention belongs to the field of microelectronic device technology, specifically relating to a programmable memory sensor based on ferroelectric sequence parameter control and its application. Background Technology

[0002] Memory sensors demonstrate great potential for achieving adaptive filtering and integrated sensing-memory-prediction in next-generation intelligent systems. Currently, inductors are primarily implemented as a circuit parameter, lacking an inherent controllable state to store historical information and achieve in-memory programmability.

[0003] Current research strategies mainly fall into two categories: one is based on physical mechanisms such as internal spin dynamics or carrier inertia, which, while expanding the physical origins of inductance, fails to provide electrically addressable order parameters for storing historical information; the other utilizes active modules or reconfigurable networks to synthesize memory-sensing characteristics at the circuit level. However, this "state dependence" is imposed through external control or feedback, rather than being an inherent property of the material itself. Therefore, existing explorations have failed to achieve an inherent, writable inductive memory state in materials.

[0004] Based on the above analysis, the existing technology suffers from the following problems and shortcomings: It lacks a microscopic memory state variable capable of persistently defining the sensing response. This prevents current inductors from achieving true physical-level storage and programming, making it difficult to meet the application requirements of sensing-memory systems. Summary of the Invention

[0005] Technical problem to be solved: In view of the problems of existing memory inductors lacking an inherently controllable state, having low inductance density, and lacking programmability, the present invention proposes a programmable memory sensor based on ferroelectric sequence parameter control and its application, which can transform the inductor from traditional circuit parameters into a memory state that can be electrically written, stored, and programmed, thereby realizing intrinsic memory sensing function.

[0006] Technical Solution: The first objective of this invention is to provide a programmable memory sensor based on ferroelectric order parameter control, comprising: a conductive substrate, an order parameter inductive material layer, and a top electrode. The order parameter inductive material layer is disposed on the conductive substrate and is a ferroelectric material exhibiting ferroelectric order that disappears in a specific temperature range and only possesses local magnetic moments and local chiral spin correlations. The top electrode is disposed on the order parameter inductive material layer, and there are at least two top electrodes. The channel of the order parameter inductive material layer between adjacent top electrodes constitutes a memory-sensing functional region.

[0007] The memory sensor uses ferroelectric sequence as the core sequence parameter. Through the coupling of ferroelectric polarization and local chiral spin dynamics, under the action of pulse modulation mode, the ferroelectric polarization drives the local chiral spin to oscillate through the Dzyaloshinskii-Moriya interaction (DMI), generating a positive inductance contribution in the impedance. The magnitude of the ferroelectric polarization is controlled by electrical pulses, thereby adjusting the inductance and realizing the intrinsic memory sensing function.

[0008] Preferably, the ferroelectric polarization is an electrically writable sequence parameter. By writing different polarization states (in the direction perpendicular to the thin film plane, a pulsed electric field is applied to modulate the polarization of the ferroelectric material (i.e., the charge distribution shifts), the ferroelectric polarization can point away from the substrate (upward) or towards the substrate (downward)), the multi-level inductance value of the memory sensor can be programmed to achieve in-memory programmability; the multi-level inductance value includes at least two distinguishable inductance states.

[0009] Preferably, the ferroelectric material is an oxide ferroelectric material, which includes BiFeO3 and La. x Bi 1- x At least one of FeO3, 0 < x ≤ 0.45.

[0010] Preferably, the specific temperature range is higher than the magnetic order temperature (Nell transition temperature T) of the order parameter inductor material layer. N And below its ferroelectric Curie point T C The temperature range; within this temperature range, the order parametric inductive material layer maintains ferroelectric order, and the long-range antiferromagnetic order disappears, forming a disordered local magnetic moment to carry local chiral spin correlation.

[0011] Preferably, the top electrode is a metal electrode; the thickness of the sequence parametric inductor material layer is 10-100 nm.

[0012] Furthermore, the top electrode is made of platinum and has a thickness of 15 nm.

[0013] Preferably, the top electrode is a plurality of independent top electrodes arranged in an array, the conductive substrate is used as a programming electrode, and the polarization state of the sequence parameter inductor material layer is controlled by applying a pulse signal between the conductive substrate and the top electrode; the top electrode is also used as a read electrode, and an inductive response is generated in the memory sensing functional region by applying an AC read signal between adjacent top electrodes.

[0014] Furthermore, the array is a 4×4 array, and the independent top electrode is a square electrode.

[0015] The second objective of this invention is to provide a programmable memory based on ferroelectric sequence parameter modulation, comprising the aforementioned memory, wherein the memory is a ferroelectric tunnel junction array containing several in-situ integrated elements, such as a 4×4 or larger array; in each element, the out-of-plane top electrode-sequence parameter inductive material layer-conductive substrate constitute a vertical ferroelectric tunnel junction, used to achieve resistive state storage by modulating the tunneling resistance through ferroelectric polarization; the in-plane channel between adjacent top electrodes constitutes a planar memory, used to achieve inductive state storage by modulating local chiral spin oscillation through ferroelectric polarization; each element is written to a polarization state by an electrical pulse, and the co-storage of resistive and inductive states is achieved by changing the tunneling barrier and the oscillation of local chiral spin through the polarization state, with the same polarization state corresponding to one resistive state and one inductive state.

[0016] Furthermore, the memory sensor has a bidirectional LR coupling function: in pulse modulation mode, the discrete resistance state and the corresponding inductance state form a repeatable cyclic mapping relationship, which, combined with the capacitor, enables non-volatile reversible tuning of the resonant frequency of the LC circuit; in pulse adjustment mode, pulse stimulation of different amplitudes can set the corresponding inductance level and simultaneously adjust the tunnel resistance, forming an L-to-R mapping.

[0017] Preferably, the memory has a bidirectional inductor-resistance (LR) coupling function: in pulse modulation mode, pulse stimulation of different amplitudes can set the corresponding ferroelectric polarization intensity; different ferroelectric polarization intensities can adjust the tunneling resistance state of the ferroelectric tunnel junction, and at the same time can tune the inductance value integrated with the ferroelectric tunnel junction to form a repeatable cyclic mapping relationship.

[0018] A third objective of this invention is to provide a programmable LC resonant circuit, which includes the aforementioned programmable memory sensor and capacitor. The programmable memory sensor and capacitor constitute an LC resonant circuit. By changing the ferroelectric polarization state of the programmable memory sensor through a programming electrical signal, its inductance value is tuned in a non-volatile manner, thereby changing the resonant frequency of the LC resonant circuit.

[0019] Furthermore, the capacitance of the capacitor in the LC circuit is 10 pF, and the AC excitation voltage V ac When the voltage is 1V, the resonant frequency is discretely tuned around 6.033 kHz.

[0020] A fourth objective of this invention is to provide the application of the above-described programmable memory, the above-described memory memory, or the above-described LC resonant circuit in adaptive filtering or real-time signal processing.

[0021] Beneficial effects:

[0022] (1) This invention is the first to realize a sequence parameter inductor based on ferroelectric sequence, reshaping the inductor from a traditional circuit parameter into a memory state with inherent dynamic characteristics and dependent on history, thus realizing intrinsic memory sensing function. The sequence parameter inductor uses ferroelectric sequence as the core sequence parameter, and realizes intrinsic memory sensing function through the coupling of ferroelectric polarization and local chiral spin dynamics; under pulse excitation, ferroelectric polarization drives local chiral spin correlation to oscillate through DMI, and the oscillation process does not involve long-range magnetic sequence, thus generating a positive inductance contribution in the impedance. This collective motion of spin then generates a back electromotive force, which is ultimately manifested as a measurable inductance signal.

[0023] (2) This invention realizes the in-memory programmability of the device. Polarization is an order parameter that is "electrically writable and non-volatile". By writing different polarization states through pulses, the characteristics of the driving local chiral spin oscillation (different oscillation amplitude and phase) are changed, which is eventually converted into different inductance values. This process of "writing polarization state = programming inductance value" does not require external auxiliary storage or circuits and is completed directly inside the device, that is, "in-memory programmability".

[0024] (3) This invention discovers the existence of local chiral spin, and the material needs to be at the ferroelectric Curie temperature (T). C Below and above magnetic sequence temperature (Nell temperature T) N (Above). Electropolarization possesses non-volatility and adjustability, serving as an "electrically writable sequence parameter core." Its direction / intensity can be precisely controlled via pulsed electric fields (e.g., upward, downward), and it can maintain its state long-term after power is off, providing a carrier for the "memory property" of the inductor. This invention discovers a stable ferroelectric sequence-driven localized chiral spin oscillation-generated memory sensor: the material must be at the magnetic Nell temperature (T0). N Above, the ferroelectric Curie temperature T C The following describes how the inductance and inductive behavior of a memory sensor are modulated by controlling the residual polarization intensity through electrical pulse stimulation and by driving local chiral spin correlation oscillation modes through DMI.

[0025] (4) This invention achieves the combination of in-situ memory sensor and ferroelectric tunnel junction through a 4×4 array structure, realizes the cooperative storage of resistive state and inductive state and bidirectional LR coupling, and reversibly tunes the resonant frequency, providing core device support for adaptive filtering and real-time signal processing, and has broad application prospects.

[0026] Therefore, this invention demonstrates that inductance can be an intrinsic property of a material, directly defined by the microscopic order parameter of electrons / spins (ferroelectric polarization). By modulating the order parameter with an electric field, inductance can be non-volatilely written and stored at the atomic scale. Simultaneously, this invention shows that resistance and inductance states can be programmed simultaneously in the same device (or array). This LR coexistence mechanism overcomes the limitation of "limited single-variable control capability," providing the possibility for constructing novel neuromorphic computing or filtering circuits with resonant tuning capabilities. Finally, it reveals a strong coupling between ferroelectric order and local chiral spin correlation, which allows ferroelectric polarization to directly drive local chiral spin dynamics, thereby generating a significant induced electromotive force. Attached Figure Description

[0027] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the embodiments of the present invention will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0028] Figure 1 The following are schematic diagrams provided by embodiments of the present invention: (a) A schematic diagram showing local chiral spin by controlling the spin alignment direction of the electric dipole moment through DMI; (b) A schematic diagram showing the control of local chiral spin by controlling the residual polarization intensity through electric pulse, thereby driving local chiral spin oscillation through polarization; (c) A schematic diagram showing that under the action of an applied AC electric field, the torque formed by the residual polarization and the electric field drives the local chiral spin to precess in the XOY plane, thereby generating an induced response; (d) A schematic diagram showing that when the direction of the applied AC electric field is reversed, the direction of the torque is reversed, driving local chiral spin oscillation to complete a periodic induced inductance.

[0029] Figure 2 The BiFeO3(a) and La provided in the embodiments of the present invention 0.15 Bi 0.85 The frequency-dependent inductance L of FeO3(b) was measured at 10 K intervals within the temperature range of 573 K to 753 K. The value of L when the temperature exceeds the Nell temperature (T0). N At this point, inductive characteristics begin to appear, and the gray dashed line represents the self-resonant frequency; due to La 0.15 Bi 0.85 FeO3 has a higher Nell temperature, and its critical temperature for inductance characteristics is higher than that of BiFeO3. The applied voltage V... ac = 3 V.

[0030] Figure 3 The embodiments of the present invention provide (a) different AC voltages V at 753 K. ac(a) Relationship between the inductance L of BiFeO3 and frequency under certain conditions; (b) Different AC voltages V at 753 K ac La under the condition 0.15 Bi 0.85 The relationship between the inductance value L of FeO3 and frequency variation, with the gray dashed line representing the self-resonant frequency in (a, b); (c) a comparison of the inductance density of the present invention and existing inductors;

[0031] Figure 4 The following are examples of the embodiments of the present invention: (a) Left image: Scanning electron microscope image and structural schematic diagram of a 4×4 ferroelectric programmable memory sensor array. A BiFeO3 thin film with a thickness of approximately 20 nm is prepared on an Nb-doped SrTiO3 substrate; Scale bar: 50 μm; Right image: Schematic diagram of a composite structure integrating a planar memory sensor and a vertical ferroelectric tunnel junction; (b) Cyclic operation of discrete inductance value L obtained by multi-level writing polarization state control through cyclic electrical pulse control; (c) Retention characteristics of BiFeO3 thin film memory: after applying different voltage pulses, every 10 3 (d) Acquire a set of test data per second; (d) When different inductance values ​​L are obtained by adjusting along the lateral memory path, the resistance state R corresponding to the ferroelectric tunnel junction channel is read; read the voltage V. dc = 1 V. Illustration: Schematic diagram of voltage pulse waveform; Figure (e) shows the resonant frequency of the polarization-controlled LC resonant circuit; the circuit consists of this memory sensor and a standard capacitor (capacitance C = 10 pF). Applying voltage pulses of opposite polarity can electrically control the resonant frequency to different values ​​such as 8.69 kHz and 6.48 kHz; Figures (b) to (e) show the unified test conditions: AC excitation voltage V ac = 1 V, test frequency f = 10.37 kHz, pulse bandwidth τ d = 100 µs. Detailed Implementation

[0032] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0033] This invention addresses the current limitations of physical implementations of memory sensors, which are primarily limited to traditional inductors as circuit parameters. Existing components lack microscopic state variables to persistently define their sensing response, making it difficult to achieve physical-level "memory" functionality. This invention proposes a programmable memory sensor based on ferroelectric sequence parameter control. The core physical mechanism of this invention lies in utilizing a ferroelectric functional layer (such as a BiFeO3 thin film) at its Nair temperature (T0). N Above ) Curie temperature (T) CWhen the ferropolarization is below the pulse excitation, the ferropolarization oscillates through the DMI-driven local chiral spin correlation, thereby generating an intrinsic inductive response; at the same time, since the ferropolarization state can be reversibly and non-volatilely adjusted through the electric field, the inductance value also has programmable and memory characteristics.

[0034] Example 1: Order Parametric Inductance and Performance Testing Based on BiFeO3

[0035] This embodiment provides a planar memory sensor based on BiFeO3 (BFO) thin film, and the fabrication method is as follows:

[0036] Step 1: Select a (100) oriented SrTiO3 conductive substrate, which itself serves as the bottom electrode. Clean the substrate with acetone, ethanol, and deionized water by ultrasonication, and then dry it with nitrogen. A 60 nm thick polycrystalline BiFeO3 film is grown on the substrate using pulsed laser deposition (PLD) at a deposition temperature of 750 °C and a laser pulse frequency of 3 Hz. The resulting BFO film has a trigonal R3c structure at room temperature, with ferroelectricity and antiferroelectricity coexisting (the antiphase oxygen octahedral torsion in this structure naturally breaks the spatial inversion symmetry, which is the most critical prerequisite for the generation of DMI; both Bi and Fe atoms in BFO have significant strong spin-orbit coupling effects).

[0037] Step 2: Define a 4×4 square top electrode matrix pattern on the BFO thin film surface using standard photolithography. Specifically, spin-coat a positive photoresist onto the thin film surface at 500 rpm for 6 seconds and 5000 rpm for 30 seconds, pre-bake at 95°C for 1.5 minutes, and then expose to ultraviolet light through a mask at an exposure dose of 200 mJ / cm². 2 The development time is 45 seconds, after which the electrode pattern area is exposed. The side length of a single square electrode is 40 μm, and the channel spacing between adjacent electrodes is 50 μm.

[0038] Step 3: Place the sample into the magnetron sputtering vacuum chamber, evacuate the chamber to a background high vacuum, and then introduce high-purity inert working gas argon, maintaining this for 10 minutes. -1 ~10 -2 The working gas pressure is Pa. A platinum top electrode is deposited on the thin film surface by sputtering. An 80W high-voltage electric field is applied between the platinum target and the substrate to cause Ar atoms in the cavity to undergo collisional ionization, forming Ar atoms. +Ions bombard the target surface under the strong acceleration of the cathode electric field, thereby ejecting target atoms from the target surface. The sputtered target atoms are transported to the substrate surface in a vacuum environment, where they nucleate and grow to form a platinum (Pt) top electrode with a thickness of 15 nm. After the photoresist is stripped off, a complete device with 4×4 independent top electrodes is obtained. The BFO thin film channel between two adjacent (horizontally or vertically adjacent) top electrodes is an independent memory-sensing functional region. A vertical ferroelectric tunnel junction structure is formed between each top electrode and the bottom electrode.

[0039] Performance testing:

[0040] (1) Performance test of inductance as a function of temperature:

[0041] The prepared device is placed in a heating stage. The bottom electrode is connected to the output of a pulse signal generator, and any two adjacent top electrodes are connected to an LCR meter to apply in-plane alternating current. V is set... ac = 3 V, frequency-dependent inductance value L measured at 10 K intervals over a temperature range of 573 K to 753 K.

[0042] See results Figure 2 a. When the test temperature is below the Nell temperature (633 K) of BiFeO3, and an AC voltage amplitude of 3V is applied, for example at 573 K and 593 K, the inductance values ​​are extremely low at both high and low frequencies, and the system is in a pure capacitive state. Within the effective inductance temperature range, as the temperature increases, the local chiral spin gradually disintegrates, leading to a decrease in inductance caused by local chiral spin oscillations and an increase in its self-resonant frequency. Ferropolarization drives oscillations of local chiral spin correlation through DMI. This mechanism requires the temperature to be below the Curie temperature of the material's ferroelectric order and close to or above the temperature of long-range ordered magnetic order.

[0043] Physical Membrane Membrane Function: Intrinsic membrane sensing is achieved through the coupling of ferropolarization and local chiral spin dynamics. Under pulse excitation, ferropolarization drives local chiral spin correlation to oscillate via DMI, and this oscillation process is unaffected by long-range magnetic order, thus generating a positive inductive contribution to the impedance. Utilizing the temperature range where the long-range magnetic moment is about to disintegrate or has already disintegrated, ferropolarization, through DMI, causes adjacent spin magnetic moments to become local chiral spins (…). Figure 1 a) Under the action of a pulse voltage, the residual ferropolar polarization intensity can be reversibly and non-volatilely adjusted, and the change in the residual ferropolar polarization intensity simultaneously alters its local chiral spin ( Figure 1 (b) Under the influence of an external electric field, the ferroelectric polarization forms a torque with it, driving the local chiral spin correlation to oscillate, thus exhibiting inductive characteristics. Figure 1 (c and 1d); thus exhibiting different magnitudes of inductive reactance.

[0044] (2) Voltage-dependent inductance characteristic test:

[0045] At a fixed temperature of 753 K, the AC voltage amplitude V is changed. ac See results Figure 3 Unlike traditional current-driven inductors, sequence parametric inductors are driven by an external electric field. Therefore, the inductance changes with the applied electric field. As the AC excitation field increases, the inductance of the BiFeO3 polycrystalline thin film gradually decreases, while the self-resonant frequency gradually increases.

[0046] Example 2 is based on La 0.15 Bi 0.85 Order parametric inductance and performance testing of FeO3

[0047] Same as Example 1, except that BiFeO3 is replaced with La. 0.15 Bi 0.85 Preparation of La from FeO3 0.15 Bi 0.85 FeO3 thin film devices.

[0048] Test the device, such as Figure 2 As shown in Figure b, La was measured using an LCR meter combined with a heating stage. 0.15 Bi 0.85 The Nell temperature T of FeO3 N Compared to pure BiFeO3, the K value is improved (approximately 643 K; La doping enhances the Fe-O-Fe superexchange effect). However, it remains below La in the K range of 573 K-643 K. 0.15 Bi 0.85 FeO3 T N Similarly, only a purely capacitive response was observed in La, with no inductive contribution. An inductive response began to appear above 673 K. Unlike BiFeO3, La... 0.15 Bi 0.85 The inductive characteristics of FeO3 only become significant at a higher temperature threshold (approximately 653 K), i.e., a higher critical temperature. Figure 2 b). The gray dashed line represents the self-resonant frequency.

[0049] Different AC voltages V at 753 K ac La under the condition 0.15 Bi 0.85 The relationship between the inductance L of FeO3 and frequency change can be found in [reference needed]. Figure 3 b, This type of order parametric inductor has an extremely high inductance surface density, up to 10. 5 H / mm 2 This far exceeds existing traditional inductors, with an improvement of more than 5 orders of magnitude (see...). Figure 3 c).

[0050] The above test results show that the inductance characteristic onset temperature of this device varies with the T value caused by La doping. N As temperatures rise, they move synchronously upwards, within the corresponding temperature range (above T). N And below T C Within this range, it exhibits inductive behavior consistent with BiFeO3 devices, including inductance value increasing with V. ac The changing pattern of the order parameter inductance proves its universality for different structures.

[0051] Physical Mechanism: Intrinsic memsenchymal function is achieved through the coupling of ferroelectric polarization and local chiral spin dynamics. La doping in BiFeO3 polycrystalline thin films effectively increases the Nell temperature, and the inductance increases synchronously with the increase of the Nell temperature, thus confirming the above theory. Furthermore, within the effective temperature range, the inductance decreases with increasing temperature, maintaining a similarity to the inductance-temperature curve of the BiFeO3 polycrystalline thin film. The La-doped BiFeO3 polycrystalline thin film also retains the corresponding properties.

[0052] Example 3: Electrical Programming and Polymorphic Storage Based on Polarization Order Parameter P

[0053] Same as Example 1, except that the substrate is an Nb-doped SrTiO3 conductive substrate (Nb-doped SrTiO3) with an Nb doping amount of 15 wt%. The thickness of the BiFeO3 film is 20 nm.

[0054] The fabricated device was subjected to electrical programming and memory sensitivity testing:

[0055] The device was placed in a room temperature vacuum environment. The bottom electrode was connected to the output of a pulse signal generator to apply an out-of-plane programming pulse. Any two adjacent top electrodes were connected to an impedance analyzer to apply an in-plane AC readout signal. The specific operation was as follows: A square wave voltage pulse with a width of 100 µs was applied between the top electrode pair and the bottom electrode. The pulse amplitude increased in steps of 0.5 V within the range of -4 V to +4 V. This out-of-plane electric field acted along the thickness direction of the entire ferroelectric thin film, controlling the direction and amplitude of the ferroelectric polarization sequence parameter P. After the pulse ended, the external pulse bias was removed, and a small-signal AC voltage (V0.05) was applied between two adjacent top electrodes in the in-plane. ac =1 V, frequency f=10.37 kHz) to read the inductance value. Test results are as follows Figure 4As shown in b, when the programming pulse changes from -4 V to +4 V, the direction and amplitude of the ferroelectric polarization sequence parameter P are gradually modulated, and the inductance value is monotonically adjustable within the range of 18 H to 205 H, with the ratio of the maximum to the minimum inductance value (switching ratio) reaching approximately 1100%. By selecting eight different intermediate programming voltages (e.g., -3.5 V, -2.5 V, -1.5 V, -0.5 V, +0.5 V, +1.5 V, +2.5 V, +3.5 V), eight distinguishable non-volatile inductance states can be stably obtained. After each state is left to stand at room temperature for 1000 seconds and then reread, the inductance value drift is less than ±2%; after multiple erase-write cycles, the inductance value of each state does not show significant degradation, demonstrating excellent retention characteristics and durability. Figure 4 c).

[0056] Example 4: In-situ Co-mapping of Resistor-Inductor and Array Programming

[0057] Same as Example 1, except that the substrate is an Nb-doped SrTiO3 conductive substrate with an Nb doping amount of 15 wt%. The thickness of the BiFeO3 film is 20 nm.

[0058] The fabricated devices were verified to demonstrate the physical homology between memsensing and resistive switching, as well as their array scalability.

[0059] For the same 4×4 array cell, see Figure 4 a. A ferroelectric tunnel junction is formed in the out-of-plane direction (a vertically stacked structure consisting of the top electrode, BFO film, and bottom electrode). The resistance state R is obtained by reading the tunneling current in this vertical direction. A memory sensor is formed in the in-plane direction (the lateral BFO ​​channel between two adjacent top electrodes). The inductance value L is read by applying an in-plane AC signal. The same programming pulse sequence as in Example 3 is applied to any cell in the array. While reading the in-plane inductance value, the resistance value of the out-of-plane ferroelectric tunnel junction is simultaneously measured, and the voltage V is read. dc = 1 V. Experimental data show that ( Figure 4 d): There is a strict one-to-one correspondence between the eight non-volatile inductive states and the eight resistive states of the ferroelectric tunnel junction, and this correspondence remains unchanged during repeated programming. Since the resistive states of the ferroelectric tunnel junction are determined solely by ferroelectric polarization, this result directly confirms that the inductance change of the memory sensor also originates from the direct modulation of ferroelectric polarization, excluding other intrinsic factors.

[0060] Example 5: Programmable Non-Volatile LC Resonant Circuit

[0061] Same as Example 1, except that the substrate is an Nb-doped SrTiO3 conductive substrate with an Nb doping amount of 15 wt%. The thickness of the BiFeO3 film is 20 nm.

[0062] The fabricated memory sensor was used as a programmable passive component to construct an active adaptive resonant circuit.

[0063] A memory sensor (inductance value denoted as L) between any two adjacent top electrode pairs is connected in series with a capacitor of fixed capacitance (C = 10 pF) to form an LC resonant circuit. The resonant circuit is connected to a network analyzer to measure its transmission characteristics. Initially, a -3 V, 100 μs programming pulse is applied through the out-of-plane electrode. After the pulse is removed, the inductance stabilizes at a high value, and the resonant peak appears at 8.69 kHz. Subsequently, a +3 V, 100 μs programming pulse is applied, and the inductance switches to a low value, with the resonant peak reformed at 6.48 kHz (Figure 4e). Both frequency states can be maintained without continuous power supply, exhibiting non-volatile characteristics.

[0064] Example 6: Functional Verification of a 4×4 Sequence Parametric Inductor Memory

[0065] Same as Example 1, except that the substrate is an Nb-doped SrTiO3 conductive substrate with an Nb doping amount of 15 wt%. The thickness of the BiFeO3 film is 20 nm.

[0066] Functional verification of the fabricated 4×4 array showed that the polarization intensity is an electrically controllable sequence parameter. Therefore, the voltage pulse used to reverse the polarization can modulate the inductor state determined by the polarization, thereby realizing a memory inductor with in-memory programmable characteristics.

[0067] Cooperative storage test: Multiple cells in the 4×4 array were written to their polarization states via pulsed electrical write and then read. Each element in the array achieved the same memory-sensing characteristics and cooperative storage of multi-level resistance-inductance states as in Examples 3 and 4, with a stable mapping relationship between resistance and inductance states. In pulsed control mode, the discrete resistance states written into the tunnel junction are accompanied by corresponding inductance states with repeatable cyclic correspondences, establishing a robust mapping from R to L. Figure 4 d demonstrates that by applying voltage pulse sequences with different amplitudes and directions, reversible and controllable enhancement and suppression of the inductance and tunneling resistance states of the device and the ferroelectric tunnel junction can be achieved.

[0068] Resonance frequency tuning test: The test circuit consists of an LC circuit composed of any target memory cell in the array and a 10 pF standard capacitor. A 2.5 V pulse voltage is applied, and by changing the polarization state and polarization orientation, non-volatile discrete tuning of the resonance frequency around 6.033 kHz is achieved. Figure 4 e). The impedance-frequency response of the sequence parameter inductor under different ferroelectric polarization directions is key experimental data proving that the inductance value can be programmed and tuned by the polarization state, thereby changing the LC resonant frequency. The vertical axis represents the impedance magnitude |Z| (unit: MΩ). Both curves show obvious peaks near their respective resonant frequencies, which is a typical characteristic of LC series resonance (the impedance is minimum when the actual circuit is in series resonance; here it may be parallel resonance or the actual measured impedance magnitude, with the peak corresponding to the resonant point). Blue / bottom curve (P) Up ): The ferroelectric polarization direction is upward (or a predetermined direction). At this time, the inductance value is L. up LC resonant frequency f 01 =8.695 kHz. Red / Top Curve (P) down ): The ferroelectric polarization direction is downward (reverse). At this time, the inductance value becomes L. Down LC resonant frequency f 02 =6.486 kHz. The shift in peak value directly reflects the change in inductance. By pulsed electrical writing to different polarization states, the LC resonant frequency can be tuned discretely and reversibly.

[0069] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any modifications, equivalent substitutions, and improvements made by those skilled in the art within the scope of the technology disclosed in the present invention, and within the spirit and principles of the present invention, should be covered within the scope of protection of the present invention.

Claims

1. A programmable memory sensor based on ferroelectric sequence parameter control, characterized in that, include: The invention comprises a conductive substrate, a sequence parametric inductor material layer, and a top electrode. The sequence parametric inductor material layer is disposed on the conductive substrate and is a ferroelectric material having ferroelectric order and exhibiting only local magnetic moments and local chiral spin correlations, where long-range magnetic order disappears within a specific temperature range. The top electrode is disposed on the sequence parametric inductor material layer, and there are at least two top electrodes. The channel of the sequence parametric inductor material layer between adjacent top electrodes constitutes a memsensing functional region. The memory sensor uses ferroelectric sequence as the core sequence parameter. Through the coupling of ferroelectric polarization and local chiral spin dynamics, under the action of pulse modulation mode, the ferroelectric polarization drives the local chiral spin correlation to oscillate through the Dzyaloshinskii-Moriya interaction, generating a positive inductance contribution in the impedance. The magnitude of ferroelectric polarization is controlled by electrical pulses, thereby adjusting the inductance and realizing the intrinsic memory sensing function.

2. A programmable memory sensor based on ferroelectric sequence parameter control according to claim 1, characterized in that, The ferroelectric polarization is an electrically writable sequence parameter. By writing different polarization states, the multi-level inductance values ​​of the memory sensor can be programmed to achieve in-memory programmability. The multi-level inductance values ​​include at least two distinguishable inductance states.

3. A programmable memory sensor based on ferroelectric sequence parameter control according to claim 1, characterized in that, The ferroelectric material is an oxide ferroelectric material, which includes BiFeO3 and La. x Bi 1-x At least one of FeO3, 0 < x ≤ 0.

45.

4. A programmable memory sensor based on ferroelectric sequence parameter control according to claim 1, characterized in that, The specific temperature range is higher than the magnetic sequence temperature of the sequence parameter inductor material layer but lower than its ferroelectric Curie point. The temperature range in which the magnetic order temperature is the Nell transition temperature. Within this temperature range, the order parametric inductive material layer maintains ferroelectric order, and the long-range antiferromagnetic order disappears, forming a disordered local magnetic moment to carry local chiral spin correlation.

5. A programmable memory sensor based on ferroelectric sequence parameter control according to claim 1, characterized in that, The top electrode is a metal electrode; the thickness of the sequence parametric inductor material layer is 10-100 nm.

6. A programmable memory sensor based on ferroelectric sequence parameter control according to claim 1, characterized in that, The top electrode consists of multiple independent top electrodes arranged in an array. The conductive substrate is used as a programming electrode. By applying a pulse signal between the conductive substrate and the top electrode, the polarization state of the sequence parameter inductor material layer is controlled. The top electrode is also used as a read electrode. By applying an AC read signal between adjacent top electrodes, an inductor response is generated in the memory sensing functional region.

7. A programmable memory based on ferroelectric sequence parameter control, characterized in that, The memory includes any one of claims 1-6, wherein the memory is a ferroelectric tunnel junction array comprising a plurality of in-situ integrated elements; in each element, the out-of-plane top electrode-sequence parametric inductance material layer-conductive substrate constitute a vertical ferroelectric tunnel junction for storing resistive states by modulating the tunneling resistance through ferroelectric polarization, and the channel of the sequence parametric inductance material layer between adjacent top electrodes in the in-plane direction constitutes a planar memory, for storing inductive states by modulating local chiral spin oscillation through ferroelectric polarization; each element is written to a polarization state by an electrical pulse, and the co-storage of resistive and inductive states is achieved by changing the tunneling barrier and the oscillation of local chiral spin through the polarization state, with the same polarization state corresponding to one resistive state and one inductive state.

8. A programmable memory based on ferroelectric sequence parameter control according to claim 7, characterized in that, The memory has a bidirectional inductor-resistance (LR) coupling function: in pulse regulation mode, pulse stimulation of different amplitudes can set the corresponding ferroelectric polarization intensity; different ferroelectric polarization intensities can adjust the tunneling resistance state of the ferroelectric tunnel junction, and at the same time, can tune the inductance value integrated with the ferroelectric tunnel junction to form a repeatable cyclic mapping relationship.

9. A programmable LC resonant circuit, characterized in that, The circuit includes a programmable memory sensor and a capacitor as described in any one of claims 1-6. The programmable memory sensor and the capacitor constitute an LC resonant circuit. The ferroelectric polarization state of the programmable memory sensor is changed by a programming electrical signal, and its inductance value is tuned in a non-volatile manner, thereby changing the resonant frequency of the LC resonant circuit.

10. The application of the programmable memory sensor according to any one of claims 1-6, the memory sensor memory according to any one of claims 7-8, or the LC resonant circuit according to claim 9 in adaptive filtering or real-time signal processing.

Images