Solar cell and method of manufacturing the same
Patent Information
- Application Number
- CN202611132573.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-07-28
- Publication Date
- 2026-10-20
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Abstract
Description
Technical Field
[0001] This invention relates to the field of solar power generation, and more specifically, to a solar cell and a method for its fabrication. Background Technology
[0002] Tunneling oxide passivation contact technology (TOPCon) has become the preferred choice for high photoelectric conversion efficiency batteries due to its excellent interface passivation performance and low metal contact resistance, and has become one of the mainstream technical routes in the current photovoltaic cell field.
[0003] In TOPCon battery structures, the passivation contact structure typically employs a doped polycrystalline silicon layer as the carrier transport layer. The doping concentration distribution directly affects the battery's contact resistance, parasitic absorption, and interface passivation performance, and is a key factor determining the fill factor (FF) and short-circuit current density (Jsc). Therefore, optimizing the concentration distribution design of the P-type and N-type doped layers is of great significance for improving the overall battery efficiency.
[0004] However, the passivated contact structure in related technologies faces a clear technical contradiction in the design of doping concentration distribution: how to effectively suppress parasitic absorption while reducing the metal-semiconductor contact resistance, so as to simultaneously improve the fill factor and short-circuit current density, is a technical problem that urgently needs to be solved. Summary of the Invention
[0005] The present invention aims to at least solve the problem in related technologies that it is impossible to simultaneously reduce contact resistance and effectively suppress parasitic absorption, and proposes a solar cell and its preparation method.
[0006] To achieve the objectives of this invention, according to a first aspect, a solar cell is provided, comprising: a silicon substrate; a doped layer disposed on the silicon substrate, the average concentration of the doped layer being a first doping concentration, the doped layer having at least one heavily doped sublayer internally, the peak value of the concentration peak of the at least one heavily doped sublayer being a second doping concentration, the ratio of the second doping concentration to the first doping concentration being x and satisfying 1.2 ≤ x ≤ 16; a metal electrode disposed on the side of the doped layer away from the silicon substrate, the metal electrode having a conductive portion extending into the doped layer; wherein the conductive portion at least partially overlaps with the depth region where the at least one heavily doped sublayer is located.
[0007] In some embodiments, the ratio x of the second doping concentration to the first doping concentration satisfies 1.5 ≤ x ≤ 8.
[0008] In some embodiments, the distance between the peak position of the concentration peak and the surface of the doped layer facing away from the silicon substrate is D1, the thickness of the doped layer is D2, and D1 / D2 satisfies 0.1≤D1 / D2≤0.8.
[0009] In some embodiments, the ratio of the thickness D3 of the heavily doped sublayer to the thickness D2 of the doped layer is Y and satisfies 0.01≤Y≤0.4.
[0010] In some embodiments, the ratio Y of the thickness D3 of the heavily doped sublayer to the thickness D2 of the doped layer satisfies 0.05≤y≤0.2.
[0011] In some embodiments, the maximum length of the conductive portion of the metal electrode is greater than or equal to the depth of the concentration peak.
[0012] In some embodiments, the projection of the heavily doped sublayer onto one side of the silicon substrate at least partially overlaps with the projection of the metal electrode onto the same side of the silicon substrate.
[0013] In some embodiments, there are multiple heavily doped sublayers.
[0014] In some embodiments, the doped layer is a P-type doped layer.
[0015] In some embodiments, the first doping concentration is 1×10⁻⁶. 19 cm -3 Up to 8×10 19 cm -3 .
[0016] In some embodiments, the first doping concentration is 1×10⁻⁶. 19 cm -3 Up to 5×10 19 cm -3 .
[0017] In some embodiments, the second doping concentration is 0.5 × 10⁻⁶. 20 cm -3 Up to 5×10 20 cm -3 .
[0018] In some embodiments, the doped layer is an N-type doped layer.
[0019] In some embodiments, the first doping concentration is 1×10⁻⁶. 19 cm -3 Up to 1.6×10 20 cm -3 .
[0020] In some embodiments, the first doping concentration is 1×10⁻⁶. 19 cm -3 Up to 8×10 19 cm -3 .
[0021] In some embodiments, the second doping concentration is 0.8 × 10⁻⁶. 20 cm -3 Up to 9×10 20 cm -3 .
[0022] In some embodiments, the doped layer includes a P-type doped layer and an N-type doped layer, wherein the heavily doped sublayer is located within the P-type doped layer and / or the N-type doped layer.
[0023] In some embodiments, the silicon substrate has a light-facing side and a back-light-facing side, and the P-type doped layer and the N-type doped layer are alternately disposed on the back-light-facing side. The solar cell further includes: a first dielectric layer disposed between the P-type doped layer and the silicon substrate; and a second dielectric layer disposed between the N-type doped layer and the silicon substrate.
[0024] In some embodiments, the silicon substrate has a first surface and a second surface disposed opposite to each other, the P-type doped layer is disposed on the first surface, the N-type doped layer is disposed on the second surface, and the solar cell further includes: a first dielectric layer disposed at intervals below the plurality of metal electrodes, located between the P-type doped layer and the silicon substrate.
[0025] In some embodiments, the silicon substrate has a first surface and a second surface disposed opposite to each other, the P-type doped layer is a single-crystal silicon doped layer disposed on a side close to the first surface, the N-type doped layer is disposed on the second surface, and the solar cell further includes a second dielectric layer disposed between the N-type doped layer and the silicon substrate.
[0026] In some embodiments, the metal electrode is made of at least one of aluminum, copper, silver, or nickel.
[0027] In some embodiments, the solar cell further includes: a first inner extension layer disposed on the side of the silicon substrate facing the p-type doped layer, the inner extension layer having a depth of less than 90 nm and a doping concentration of 1 × 10⁻⁶. 15 cm -3 Up to 1×10 19 cm -3 .
[0028] In some embodiments, the solar cell further includes: a second inner extension layer disposed on the side of the silicon substrate facing the N-type doped layer, the inner extension layer having a depth of less than 70 nm and a doping concentration of 1 × 10⁻⁶. 14 cm -3 Up to 1×10 17 cm -3 .
[0029] According to another aspect of the present invention, a method for preparing a solar cell is also disclosed, the method comprising: pre-embedding a doped source layer in a polycrystalline silicon layer; activating the polycrystalline silicon layer in which the doped source layer is pre-embedded at an activation temperature of 800~960°C for an activation time of 2~50 min, so as to form the doped layer.
[0030] The solar cell of this invention, by setting a main doped layer and a heavily doped sublayer with different doping concentrations in the vertical direction (the thickness direction of the cell), independently controls parasitic absorption and contact resistance by allocating them to regions with different doping concentrations. Since the main doped layer with a lower doping concentration is located near the surface of the solar cell, parasitic absorption is reduced with a lower concentration, thus increasing the short-circuit current density. Meanwhile, the heavily doped sublayer inside reduces contact resistance with a higher concentration, and overlaps with it through conductive parts to ensure a low-resistance ohmic contact, improving the fill factor. Parasitic absorption and contact resistance are no longer controlled by the same doping concentration parameter, achieving independent regulation and synergistic optimization of both, ultimately improving cell efficiency.
[0031] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of this disclosure, nor is it intended to limit the scope of this disclosure. Other features of this disclosure will become readily apparent from the following description. Attached Figure Description
[0032] Figure 1 This is a partial structural schematic diagram of a solar cell according to an embodiment of the present invention;
[0033] Figure 2 This is a partial structural schematic diagram of a solar cell according to another embodiment of the present invention;
[0034] Figure 3 This is a partial structural schematic diagram of a solar cell according to another embodiment of the present invention;
[0035] Figure 4 for Figure 1 ECV curve of the solar cell structure of the embodiment shown
[0036] Figure 5 This is a schematic diagram of the cross-sectional microstructure of the conductive portion of the metal electrode penetrating the doped layer in one embodiment of the present invention;
[0037] Figure 6 This is a schematic diagram of the back contact battery structure in one embodiment of the present invention;
[0038] Figure 7 This is a schematic diagram of the back contact battery structure in one embodiment of the present invention;
[0039] Figure 8This is a schematic diagram of the back contact battery structure in one embodiment of the present invention;
[0040] Figure 9 This is a schematic diagram of the TOPCon battery structure in one embodiment of the present invention;
[0041] Figure 10 This is a schematic diagram of the TOPCon battery structure in another embodiment of the present invention;
[0042] Figure 11 This is a schematic diagram of the TOPCon battery structure in another embodiment of the present invention;
[0043] Figure 12 This is a schematic diagram of the TOPCon battery structure in one embodiment of the present invention;
[0044] Figure 13 This is a schematic diagram of the TOPCon battery structure in another embodiment of the present invention;
[0045] Figure 14 This is a schematic diagram of the TOPCon battery structure in another embodiment of the present invention.
[0046] List of reference numerals in the attached diagram:
[0047] 10. Silicon substrate; 20. Doped layer; 20a. P-type doped layer; 20b. N-type doped layer; 21. Main doped layer; 21a. First main doped layer; 21b. Second main doped layer; 22. Heavily doped sublayer; 22a. First heavily doped sublayer; 22b. Second heavily doped sublayer; 30. Metal electrode; 31. Conductive part; 40. Dielectric layer; 41. First dielectric layer; 42. Second dielectric layer; 50. Inner expansion layer; 51. First inner expansion layer; 52. Second inner expansion layer; 60. Alumina layer; 70. Silicon nitride layer; 80. Silicon oxynitride layer; 90. Silicon oxide layer. Detailed Implementation
[0048] To enable those skilled in the art to better understand the technical solution of the present invention, the solar cell and its preparation method provided by the present invention will be described in detail below with reference to the accompanying drawings.
[0049] In related technologies, passivated contact structures typically include P-type passivated contact structures (P-TOPCon) and N-type passivated contact structures (N-TOPCon). P-type passivated contact structures usually employ a uniform doping distribution, meaning the entire doped polycrystalline silicon layer has a roughly uniform doping concentration. In this approach, the doping concentration is set to an intermediate value to achieve a trade-off between lateral carrier transport and contact resistance versus parasitic absorption. However, for the uniform doping scheme, the doping concentration is set to an intermediate value to balance contact resistance and parasitic absorption. But because the doping concentration is a global parameter in the uniform doping scheme, it's impossible to simultaneously satisfy all the requirements. This leads to an inability to simultaneously reduce metal-semiconductor contact resistance and effectively suppress parasitic absorption, thus affecting the performance of the solar cell.
[0050] To solve the above problems, such as Figures 1 to 3 As shown, this invention discloses a solar cell comprising a silicon substrate 10, a doped layer 20, and a metal electrode 30. The doped layer 20 is disposed on the silicon substrate 10, and the average concentration of the doped layer 20 is a first doping concentration. The doped layer 20 contains a main doped layer 21 and at least one heavily doped sublayer 22. The peak value of the concentration peak of the at least one heavily doped sublayer 22 is a second doping concentration. The ratio of the second doping concentration to the first doping concentration is x, where x satisfies 1.2 ≤ x ≤ 16. The metal electrode 30 is disposed on the side of the doped layer 20 away from the silicon substrate 10. The metal electrode 30 has a conductive portion 31 extending into the doped layer 20, and the conductive portion 31 at least partially overlaps with the depth region where the at least one heavily doped sublayer 22 is located.
[0051] In the doped layer 20, the first doping concentration is the average concentration of the entire doped layer 20, representing the baseline doping level of the doped layer 20. The heavily doped sublayer 22 is located inside the doped layer 20, and the ratio x of its peak concentration (second doping concentration) to the first doping concentration is between 1.2 and 16, indicating that the doping concentration of the heavily doped sublayer 22 is significantly higher than the average level of the doped layer 20. When the conductive portion 31 of the metal electrode 30 penetrates into the doped layer 20 and at least partially overlaps with the depth region where the heavily doped sublayer 22 is located, the conductive portion 31 contacts the highly concentrated heavily doped sublayer 22, forming a low-resistance ohmic contact at the metal-semiconductor interface, thus reducing the contact resistance. The larger the ratio x of the second doping concentration to the first doping concentration, the more significant the average concentration advantage of the heavily doped sublayer 22 relative to the overall doped layer 20, and the better the effect on reducing the contact resistance. When x is less than 1.2, the concentration difference between the heavily doped sublayer 22 and the overall doped layer 20 is too small to form an effective improvement in ohmic contact. When x is greater than 16, excessively high concentration of heavily doped sublayers may cause additional lattice damage. This ratio range ensures effective division of labor between the main doped layer 21 and the heavily doped sublayers.
[0052] The solar cell of the present invention, by setting a main doped layer 21 and a heavily doped sublayer 22 with different doping ion concentrations in the vertical direction (thickness direction of the cell), independently controls parasitic absorption and contact resistance by allocating them to regions with different doping concentrations. Since the main doped layer 21 with a lower doping concentration is located near the surface of the solar cell, parasitic absorption is suppressed with a low concentration, thereby increasing the short-circuit current density. Meanwhile, the heavily doped sublayer 22 inside reduces contact resistance with a high concentration, and overlaps with it through the conductive part 31 to ensure the actual realization of low-resistance ohmic contact, thereby improving the fill factor. Parasitic absorption and contact resistance are no longer controlled by the same doping concentration parameter, realizing independent regulation and synergistic optimization of the two, ultimately improving cell efficiency.
[0053] It is understood that a dielectric layer 40 is disposed between the silicon substrate 10 and the doped layer 20, and an inner extension layer 50 is formed on the side of the silicon substrate 10 facing the dielectric layer 40.
[0054] like Figure 5 The image shown is a cross-sectional micrograph of the conductive portion 31 of the metal electrode penetrating the doped layer 20. (For ease of understanding...) Figure 5 The actual physical correspondence of each labeled area is shown in the figure, with three horizontal auxiliary lines (①, ②, and ③) used to delineate the boundaries:
[0055] ① indicates the schematic boundary of the peak position of the concentration peak within the heavily doped sublayer 22;
[0056] ② This represents the schematic boundary of the concentration region division between the heavily doped sublayer 22 and the main doped layer 21 (the actual doping concentration changes continuously and gradually along the thickness direction, and is not a physical separation).
[0057] ③ indicates the schematic boundary of the interface between the main doped layer 21 and the silicon substrate 10.
[0058] It should be understood that the above auxiliary lines are all schematic markings based on concentration distribution and interface location. The above auxiliary lines are used to help understand the spatial hierarchical relationship of each region, and are not the actual abrupt boundary of microscopic morphology.
[0059] In some embodiments, the ratio x of the second doping concentration to the first doping concentration satisfies 1.5 ≤ x ≤ 8. Specifically, when x ≥ 1.5, the doping concentration of the heavily doped sublayer 22 has a more significant difference from the average concentration of the overall doped layer 20, providing more free carriers at the metal-semiconductor interface and forming a good low-resistance ohmic contact. When x ≤ 8, Auger recombination enhancement or lattice damage that may be caused by excessively high doping concentration of the heavily doped sublayer 22 is avoided, maintaining the crystal quality of the heavily doped sublayer 22 at a better level.
[0060] Therefore, this preferred ratio range ensures that the contact resistance is sufficiently reduced while avoiding the negative impact of excessively high doping concentration on the crystal quality of the heavily doped sublayer 22, thus improving the fill factor while ensuring the reliability of the battery structure.
[0061] In some embodiments, the distance between the peak position of the concentration peak and the surface of the doped layer 20 away from the silicon substrate 10 is D1, the thickness of the doped layer 20 is D2, and D1 / D2 satisfies 0.1≤D1 / D2≤0.8.
[0062] Specifically, such as Figure 1 As shown, D1 refers to the depth of the highest concentration point of the concentration peak within the doped layer 20, i.e., the distance from the outer surface of the doped layer 20 (the surface facing away from the silicon substrate 10) to the location of the concentration peak. D2 is the total thickness of the doped layer 20, i.e., the distance from the outer surface of the doped layer 20 to the interface between the doped layer 20 and the silicon substrate 10. A D1 / D2 ratio between 0.1 and 0.8 indicates that the peak value of the concentration peak is located within the doped layer 20 at a depth of 10% to 80% of the outer surface. Figure 1 The boundary between the middle main doped layer 21 and the heavily doped sublayer 22 is shown as a dashed line, which is used to distinguish the boundaries of regions with different doping concentrations. The actual doping concentration changes continuously and gradually along the thickness direction.
[0063] In a solar cell, the conductive portion 31 of the metal electrode 30 extends from the outer surface of the doped layer 20 inward. When D1 / D2 is between 0.1 and 0.8, there is a sufficient distance between the concentration peak and the outer surface of the doped layer 20. Within this distance, the doping concentration of the doped layer 20 is close to the first doping concentration, which is relatively low. The conductive portion 31 needs to pass through this low-concentration region to reach the depth region where the heavily doped sublayer 22 is located. The low-concentration region above the concentration peak has weak parasitic absorption, which helps to reduce non-power generation losses of photons in the doped layer 20.
[0064] When D1 / D2 is less than 0.1, the concentration peak is too close to the outer surface of the doped layer 20, and the heavily doped sublayer 22 is almost exposed on the surface. The thickness of the low-concentration region in the doped layer 20 is too thin, which weakens the suppression effect on parasitic absorption. When D1 / D2 is greater than 0.8, the concentration peak is too close to the silicon substrate 10. The conductive part 31 needs to penetrate a thicker doped layer 20 to reach the depth where the heavily doped sublayer 22 is located, which increases the process difficulty of achieving overlap between the conductive part 31 and the heavily doped sublayer 22. This may result in some conductive parts 31 not being able to effectively contact the heavily doped sublayer 22, leading to an increase in contact resistance.
[0065] like Figure 2As shown, in some embodiments, the ratio of the thickness D3 of the heavily doped sublayer 22 to the thickness D2 of the doped layer 20 is Y, and satisfies 0.01 ≤ Y ≤ 0.4. D3 is the dimension of the heavily doped sublayer 22 in the thickness direction of the doped layer 20. In the ECV curve, the thickness D3 of the region corresponding to the concentration peak of the heavily doped sublayer 22 can be determined by the half-width at half-maximum (WHM) method, that is, taking half the peak concentration of the concentration peak as the height to draw a horizontal line, and the width between the intersection of this line and the two sides of the concentration peak is D3. D2 is the total thickness of the doped layer 20, that is, the distance from the outer surface of the doped layer 20 to the interface between the doped layer 20 and the silicon substrate 10. The value of Y is 0.01 to 0.4, indicating that the thickness of the heavily doped sublayer 22 does not exceed 40% of the total thickness of the doped layer 20, and is not less than 1%.
[0066] In a solar cell, the conductive portion 31 of the metal electrode 30 at least partially overlaps with the depth region of the heavily doped sublayer 22, forming an ohmic contact after contact between the conductive portion 31 and the heavily doped sublayer 22. When Y is between 0.01 and 0.4, the heavily doped sublayer 22 has sufficient extension in the thickness direction to provide a sufficient contact window for the conductive portion 31, ensuring that the conductive portion 31 can still achieve at least partial overlap with the heavily doped sublayer 22 within the range of process fluctuations, thus reducing the requirements for the penetration depth accuracy of the conductive portion 31. At the same time, the thickness ratio of the heavily doped sublayer 22 does not exceed 0.4, limiting the volume ratio of the high-concentration doped region in the overall doped layer 20. This thickness ratio range ensures reliable contact between the conductive portion 31 and the heavily doped sublayer 22 while controlling the volume of the high-concentration doped region at a low level, thus balancing the reduction of contact resistance and the suppression of parasitic absorption.
[0067] In some embodiments, the ratio Y of the thickness D3 of the heavily doped sublayer 22 to the thickness D2 of the doped layer 20 satisfies 0.05 ≤ y ≤ 0.2. When y ≥ 0.05, the heavily doped sublayer 22 has a sufficient thickness, which can provide a wider contact window for the conductive portion 31. Even if there are process fluctuations in the penetration depth of the conductive portion 31, it can still ensure that the two achieve at least partial overlap, further reducing the requirements for the penetration depth accuracy of the conductive portion 31. And Y ≤ 0.2 further reduces the volume proportion of the high-concentration doped region in the overall doped layer 20, further reducing the parasitic absorption caused by the heavily doped sublayer 22 itself, and keeping the parasitic absorption of incident light or back-reflected light of the doped layer 20 at a lower level.
[0068] In some embodiments, the maximum length of the conductive portion 31 of the metal electrode 30 is greater than or equal to the depth of the concentration peak. Specifically, the maximum length of the conductive portion 31 refers to the maximum depth distance that the conductive portion 31 of the metal electrode 30 extends from the outer surface of the doped layer 20 towards the silicon substrate 10. The depth of the concentration peak refers to the distance from the peak position of the concentration peak to the outer surface of the doped layer 20, i.e., D1. The maximum length of the conductive portion 31 being greater than or equal to the depth of the concentration peak means that the conductive portion 31 can extend at least to the position where the peak value of the concentration peak is located, or even deeper.
[0069] In a solar cell, the conductive portion 31 of the metal electrode 30 extends from the outer surface of the doped layer 20 inward, and the heavily doped sublayer 22 is located at a certain depth within the doped layer 20. The conductive portion 31 needs to penetrate the low-concentration region above the heavily doped sublayer 22 within the doped layer 20 to make contact with it. When the maximum length of the conductive portion 31 is greater than or equal to the depth of the concentration peak, the conductive portion 31 can extend at least to the location of the concentration peak, i.e., the core region with the highest doping concentration in the heavily doped sublayer 22, thereby ensuring that the conductive portion 31 and the heavily doped sublayer 22 at least partially overlap, forming a low-resistance ohmic contact. If the maximum length of the conductive portion 31 is less than the depth of the concentration peak, the conductive portion 31 cannot reach the depth region where the heavily doped sublayer 22 is located. The conductive portion 31 actually contacts a low-concentration region with a doping concentration close to the first doping concentration, increasing the contact resistance. This provides a structural guarantee for forming a low-resistance ohmic contact and improves the fill factor.
[0070] like Figure 3 As shown, in some embodiments, the projection of the heavily doped sublayer 22 onto one side of the silicon substrate 10 at least partially overlaps with the projection of the metal electrode 30 onto the same side of the silicon substrate 10. Specifically, the heavily doped sublayer 22 and the metal electrode 30 are projected onto the same reference plane on the side of the silicon substrate 10 facing the doped layer 20, and the two projection regions overlap. This means that in the direction parallel to the silicon substrate 10, the horizontal distribution range of the heavily doped sublayer 22 at least partially corresponds to the horizontal distribution range of the metal electrode 30, rather than being completely offset from each other. Depending on the horizontal distribution of the heavily doped sublayer 22, the two projection regions can partially overlap or completely overlap.
[0071] When the projections of the heavily doped sublayer 22 and the metal electrode 30 onto the silicon substrate 10 at least partially overlap, the heavily doped sublayer 22 is located within the reachable range of the conductive portion 31 in the horizontal direction. During its penetration into the doped layer 20, the conductive portion 31 can enter the horizontal region where the heavily doped sublayer 22 is located, thus achieving at least partial spatial overlap with the heavily doped sublayer 22 and forming a low-resistance ohmic contact. If the projections are completely misaligned, the conductive portion 31 cannot reach the horizontal position of the heavily doped sublayer 22 during penetration. The conductive portion 31 actually contacts a low-concentration region with a doping concentration close to the first doping concentration, resulting in increased contact resistance. This projection overlap ensures that the heavily doped sublayer 22 is within the reachable range of the conductive portion 31 in the horizontal direction. Together with the overlap limitation in the depth direction, this ensures reliable contact between the conductive portion 31 and the heavily doped sublayer 22 in three-dimensional space, reducing contact resistance and improving the fill factor.
[0072] like Figure 2 As shown, in some embodiments, there are multiple heavily doped sublayers 22. In other words, the number of heavily doped sublayers 22 is two or more, and each heavily doped sublayer 22 is spaced apart along the thickness direction inside the doped layer 20. The area between adjacent heavily doped sublayers 22 is a portion of the doped layer 20, which has a first doping concentration. Each heavily doped sublayer 22 corresponds to a concentration peak on the doping concentration distribution curve, and the peak concentration of each concentration peak satisfies the condition that the ratio x of the second doping concentration to the first doping concentration is between 1.2 and 16.
[0073] The conductive portion 31 of the metal electrode 30 penetrates from the outer surface of the doped layer 20 into the interior. Multiple heavily doped sublayers 22 provide multiple high-concentration regions at different depths within the doped layer 20, allowing for contact. When the penetration depth of the conductive portion 31 varies due to process variations, a low-resistance ohmic contact can be formed as long as the conductive portion 31 at least partially overlaps with at least one of the heavily doped sublayers 22, without relying on the precise depth of a single heavily doped sublayer 22. When the penetration depth of the conductive portion 31 is large, it can simultaneously contact multiple heavily doped sublayers 22, with multiple high-concentration regions participating in conduction, increasing the effective contact area of the metal-semiconductor interface and further reducing contact resistance.
[0074] It is understandable that the doped layer 20 can be either a P-type doped layer 20a or an N-type doped layer 20b. When a P-type doped layer 20a is used, the first doping concentration can be 1 × 10⁻⁶. 19 cm -3 Up to 8×10 19 cm -3 The second doping concentration can be 0.5 × 10⁻⁶. 20 cm -3 Up to 5×10 20 cm-3 Among them, when the first doping concentration is 1×10 19 cm -3 Up to 5×10 19 cm -3 This will significantly reduce parasitic absorption.
[0075] When doped layer 20 is an N-type doped layer 20b, the first doping concentration can be 1×10⁻⁶. 19 cm -3 Up to 1.6×10 20 cm -3 The second doping concentration can be 0.8 × 10⁻⁶. 20 cm -3 Up to 9×10 20 cm -3 Among them, when the first doping concentration is 1×10 19 cm -3 Up to 8×10 19 cm -3 This will significantly reduce parasitic absorption.
[0076] It is understood that the doped layer 20 includes a P-type doped layer 20a and an N-type doped layer 20b, with the heavily doped sublayer 22 located within the P-type doped layer 20a and / or the N-type doped layer 20b. In other words, the P-type doped layer 20a may include a first main doped layer 21a and a first heavily doped sublayer 22a, and the N-type doped layer 20b may include a second main doped layer 21b and a second heavily doped sublayer 22b.
[0077] Specifically, the doped layer 20 includes two doped layers 20 with opposite conductivity types: a P-type doped layer 20a and an N-type doped layer 20b. The dopant element of the P-type doped layer 20a is a group III element such as boron or gallium, while the dopant element of the N-type doped layer 20b is a group V element such as phosphorus, arsenic, or antimony. The heavily doped sublayer 22 can be disposed only within the P-type doped layer 20a, only within the N-type doped layer 20b, or simultaneously within both the P-type doped layer 20a and the N-type doped layer 20b.
[0078] In a solar cell, the P-type doped layer 20a and the N-type doped layer 20b respectively perform the function of transporting carriers of different polarities. When the heavily doped sublayer 22 is disposed inside the P-type doped layer 20a, in other words, when the P-type doped layer 20a has a first heavily doped sublayer 22a, the high concentration of the first heavily doped sublayer 22a provides sufficient freely movable holes, forming a low-resistance ohmic contact at the metal-semiconductor interface and reducing the P-type contact resistance.
[0079] When the heavily doped sublayer 22 is disposed inside the N-type doped layer 20b, in other words, when the N-type doped layer 20b has a second heavily doped sublayer 22b, the high concentration of the second heavily doped sublayer 22b provides sufficient freely moving electrons to form a low-resistance ohmic contact at the metal-semiconductor interface, thereby reducing the N-type contact resistance.
[0080] When both the P-type doped layer 20a and the N-type doped layer 20b contain heavily doped sublayers 22, that is, when the P-type doped layer 20a contains a first heavily doped sublayer 22a and the N-type doped layer 20b contains a second heavily doped sublayer 22b, the contact resistance for both polarities can be reduced. Therefore, by providing heavily doped sublayers 22 within the P-type doped layer 20a and / or the N-type doped layer 20b, the contact resistance for the corresponding polarity can be flexibly reduced according to the requirements of the battery structure, improving the flexibility of battery design. Simultaneously, the doped layers 20 as a whole maintain a relatively low average concentration, thus suppressing parasitic absorption and improving battery efficiency.
[0081] For example, such as Figures 6 to 8 In the embodiments shown, the solar cell can be a back-contact cell. Specifically, the silicon substrate 10 has a light-facing side and a back-facing side. P-type doped layer 20a and N-type doped layer 20b are alternately disposed on the back-facing side. The solar cell also includes a first dielectric layer 41 and a second dielectric layer 42. The first dielectric layer 41 is disposed between the P-type doped layer 20a and the silicon substrate 10. The second dielectric layer 42 is disposed between the N-type doped layer 20b and the silicon substrate 10.
[0082] In other words, the silicon substrate 10 has two opposing main surfaces, with the surface facing the incident light being the light-facing surface and the surface facing away from the incident light being the back-light surface. P-type doped layers 20a and N-type doped layers 20b are alternately arranged on the back-light surface in a direction parallel to the silicon substrate 10, forming an interdigitated structure. A first dielectric layer 41 is disposed between the P-type doped layer 20a and the silicon substrate 10, and a second dielectric layer 42 is disposed between the N-type doped layer 20b and the silicon substrate 10. The first dielectric layer 41 and the second dielectric layer 42 are passivation dielectric layers such as silicon oxide, silicon nitride, or silicon carbide, used to provide interface passivation and carrier tunneling transport channels. A first heavily doped sublayer 22a may be located inside the P-type doped layer 20a, and a second heavily doped sublayer 22b may be located inside the N-type doped layer 20b.
[0083] In the back-contact battery, both the P-type doped layer 20a and the N-type doped layer 20b are disposed on the back surface of the battery, and no metal electrode 30 is disposed on the light-facing surface. Incident light can directly enter the silicon substrate 10 without being blocked by the metal electrode 30. The conductive portion 31 of the metal electrode 30 is in contact with the P-type doped layer 20a and the N-type doped layer 20b, respectively.
[0084] In such Figure 6In the illustrated embodiment, when the P-type doped layer 20a has a first heavily doped sublayer 22a and the N-type doped layer 20b has a second heavily doped sublayer 22b, the contact resistance for both polarities can be reduced. Therefore, by providing heavily doped sublayers 22a within the P-type doped layer 20a and the N-type doped layer 20b, the contact resistance for the corresponding polarity can be flexibly reduced according to the requirements of the battery structure, improving the flexibility of battery design. Simultaneously, the doped layers 20 maintain a relatively low average concentration, thus suppressing parasitic absorption and improving battery efficiency.
[0085] However, this is not limiting; in cases such as Figure 7 In another embodiment shown, its structure is similar to Figure 6 The embodiments shown are basically the same, except that the heavily doped sublayer 22 is only disposed within the P-type doped layer 20a and not within the N-type doped layer 20b. In other words, only the P-type doped layer 20a has the first heavily doped sublayer 22a. The conductive portion 31 of the metal electrode 30 extends into the P-type doped layer 20a and at least partially overlaps with the depth region where the first heavily doped sublayer 22a is located within the P-type doped layer 20a. The high concentration of the first heavily doped sublayer 22a provides sufficient freely movable holes to form a low-resistance ohmic contact at the metal-semiconductor interface, thereby reducing the P-type contact resistance.
[0086] Similarly, in such Figure 8 In another embodiment shown, its structure is similar to Figure 6 The embodiments shown are basically the same, except that the heavily doped sublayer 22 is only disposed within the N-type doped layer 20b and not within the P-type doped layer 20a. In other words, only the N-type doped layer 20b has a second heavily doped sublayer 22b. When the N-type doped layer 20b has a second heavily doped sublayer 22b, the conductive part 31 and the heavily doped sublayer 22 in the N-type doped layer 20b at least partially overlap. The high concentration of the second heavily doped sublayer 22b provides sufficient freely moving electrons to form a low-resistance ohmic contact at the metal-semiconductor interface, thereby reducing the N-type contact resistance.
[0087] Since both the P-type doped layer 20a and the N-type doped layer 20b are located on the back surface, when light incident from the back or light reflected from the radial surface passes through the doped layer 20, the region of the doped layer 20, except for the heavily doped sublayer 22, maintains a low doping level close to the first doping concentration. The free carrier concentration is low, and the parasitic absorption of this part of the light is weak, which helps to maintain a high short-circuit current density.
[0088] Therefore, the back-contact battery structure alternately places P-type doped layers 20a and N-type doped layers 20b on the back surface, which, together with the dielectric layer, provides interface passivation. Simultaneously, by placing a heavily doped sublayer 22 within the doped layer 20 that overlaps with the conductive portion 31, the contact resistance is reduced. With no metal electrode 30 obstructing the light-facing surface, incident light can directly enter the silicon substrate 10, resulting in less light loss on the front side. The low-concentration region of the doped layer 20 suppresses parasitic absorption, and combined with the low contact resistance, this simultaneously increases the short-circuit current density and fill factor, thereby improving the battery's photoelectric conversion efficiency.
[0089] It is understandable that the back surface of the back contact battery structure is also provided with an aluminum oxide layer 60 and a silicon nitride layer 70. The aluminum oxide layer 60 is disposed outside the P-type doped layer 20a and the N-type doped layer 20b, and the silicon nitride layer 70 is disposed outside the aluminum oxide layer 60.
[0090] For example, such as Figures 9 to 14 In the illustrated embodiment, the solar cell can also be a TOPCon cell. Specifically, the silicon substrate 10 has a first surface and a second surface disposed opposite to each other, a P-type doped layer 20a is disposed on the first surface, and an N-type doped layer 20b is disposed on the second surface. The structure of the TOPCon cell varies slightly depending on the doping method.
[0091] For example, in such Figures 9 to 12 In some embodiments shown, a laser doping (SE doping) process is used to form a P-type doped layer 20a on the side of the silicon substrate 10 near the first surface. At this time, the P-type doped layer 20a is a single-crystal silicon doped layer, while the N-type doped layer 20b is formed by deposition. Therefore, there is no dielectric layer between the P-type doped layer 20a and the silicon substrate 10. Thus, the solar cell also includes a second dielectric layer 42, which is disposed between the N-type doped layer 20b and the silicon substrate 10.
[0092] In other words, the silicon substrate 10 has two opposing main surfaces, namely a first surface and a second surface. A p-type doped layer 20a is disposed on the first surface, and a first dielectric layer 41 is located between the p-type doped layer 20a and the silicon substrate 10. An n-type doped layer 20b is disposed on the second surface, and a second dielectric layer 42 is located between the n-type doped layer 20b and the silicon substrate 10. The second dielectric layer 42 is a passivation dielectric layer such as silicon oxide, silicon nitride, or silicon carbide, used to provide interface passivation and carrier tunneling transport channels.
[0093] In such Figure 9 In the embodiment shown, the first doped sublayer 22a is located inside the P-type doped layer 20a, and the second doped sublayer 22b is located inside the N-type doped layer 20b.
[0094] In the bifacial cell structure, a P-type doped layer 20a and an N-type doped layer 20b are respectively disposed on two opposite surfaces of the silicon substrate 10, forming a typical tunnel oxide passivated contact cell or bifacial cell structure. Taking the side where the P-type doped layer 20a is located as an example, the conductive portion 31 of the metal electrode 30 extends into the interior of the P-type doped layer 20a, at least partially overlapping with the depth region where the heavily doped sublayer 22 is located within the P-type doped layer 20a. That is, when the P-type doped layer 20a contains a first heavily doped sublayer 22a, the high concentration of the first heavily doped sublayer 22a forms a low-resistance ohmic contact at the metal-semiconductor interface, reducing the P-type contact resistance. The region of the P-type doped layer 20a other than the first heavily doped sublayer 22a maintains a low doping level close to the first doping concentration, with a low free carrier concentration and weak parasitic absorption of incident light or back-reflected light.
[0095] Similarly, on the side where the N-type doped layer 20b is located, the conductive portion 31 of the metal electrode 30 at least partially overlaps with the heavily doped sublayer 22 within the N-type doped layer 20b. That is, when the heavily doped sublayer 22 is disposed within the N-type doped layer 20b, in other words, when the N-type doped layer 20b has a second heavily doped sublayer 22b, the high concentration of the second heavily doped sublayer 22b provides sufficient freely moving electrons, reducing the N-type contact resistance. The region of the N-type doped layer 20b other than the heavily doped sublayer 22 maintains a low doping level, suppressing parasitic absorption.
[0096] When both the P-type doped layer 20a and the N-type doped layer 20b contain heavily doped sublayers 22, that is, when the P-type doped layer 20a contains a first heavily doped sublayer 22a and the N-type doped layer 20b contains a second heavily doped sublayer 22b, the contact resistance of both polarities can be reduced. Simultaneously, the low-concentration regions of the two doped layers 20 suppress parasitic absorption on their respective sides. Since the P-type doped layer 20a and the N-type doped layer 20b are located on opposite sides of the silicon substrate 10, the doping concentration distribution on both sides can be independently optimized. The position, peak concentration, and thickness ratio of the concentration peak can be designed according to the illumination conditions and contact requirements of each side.
[0097] Of course, this is not restrictive; Figure 10 In another embodiment shown, a TOPCon battery is also disclosed, the structure of which is similar to... Figure 9The embodiments shown are basically the same, except that the heavily doped sublayer 22 is only disposed within the P-type doped layer 20a and not within the N-type doped layer 20b. In other words, only the P-type doped layer 20a has the first heavily doped sublayer 22a. The conductive portion 31 of the metal electrode 30 extends into the P-type doped layer 20a and at least partially overlaps with the depth region where the first heavily doped sublayer 22a is located within the P-type doped layer 20a. The high concentration of the first heavily doped sublayer 22a provides sufficient freely movable holes to form a low-resistance ohmic contact at the metal-semiconductor interface, thereby reducing the P-type contact resistance.
[0098] Similarly, in such Figure 11 In another embodiment shown, its structure is similar to Figure 9 The embodiments shown are basically the same, except that the heavily doped sublayer 22 is only disposed within the N-type doped layer 20b and not within the P-type doped layer 20a. In other words, only the N-type doped layer 20b has a second heavily doped sublayer 22b. When the N-type doped layer 20b has a second heavily doped sublayer 22b, the conductive part 31 and the heavily doped sublayer 22 in the N-type doped layer 20b at least partially overlap. The high concentration of the second heavily doped sublayer 22b provides sufficient freely moving electrons to form a low-resistance ohmic contact at the metal-semiconductor interface, thereby reducing the N-type contact resistance.
[0099] Therefore, the bifacial cell structure places a P-type doped layer 20a and an N-type doped layer 20b on two opposite surfaces of the silicon substrate 10, respectively. These, along with a dielectric layer, provide interface passivation. Simultaneously, by placing a heavily doped sublayer 22 within the doped layer 20 that overlaps with the conductive portion 31, the contact resistance on both sides is reduced. The low-concentration region of the doped layer 20 suppresses parasitic absorption on each side. Combined with the low contact resistance characteristic, this improves the short-circuit current density and fill factor, thereby enhancing the photoelectric conversion efficiency of the cell.
[0100] It is understandable that the TOPCon battery structure has an aluminum oxide layer 60, a silicon nitride layer 70, a silicon oxynitride layer 80 and a silicon oxide layer 90 sequentially disposed on the outside of the P-type doped layer 20a; and a silicon nitride layer 70 disposed on the outside of the N-type doped layer 20b.
[0101] Of course, in other embodiments, the P-type doped layer 20a can also be formed by deposition, in which case, such as Figures 12 to 14In some embodiments shown, the P-type doped layer 20a is a polycrystalline silicon doped layer, while the N-type doped layer 20b is also formed by deposition. Therefore, the P-type doped layer 20a and the silicon substrate 10 can have a dielectric layer. Thus, the solar cell further includes a first dielectric layer 41 and a second dielectric layer 42. The first dielectric layer 41 is disposed below the plurality of metal electrodes 30 at intervals, located between the P-type doped layer 20a and the silicon substrate 10; the second dielectric layer 42 is disposed between the N-type doped layer 20b and the silicon substrate 10. In other words, the silicon substrate 10 has two opposing main surfaces, namely a first surface and a second surface. The P-type doped layer 20a is disposed in a local area of the first surface and corresponds one-to-one with the positions of the plurality of metal electrodes 30. The first dielectric layer 41 is disposed below the plurality of metal electrodes 30 at intervals, corresponding one-to-one with the P-type doped layer 20a, and located between the corresponding P-type doped layer 20a and the silicon substrate 10. The N-type doped layer 20b is disposed on the entire surface of the second surface, and the second dielectric layer 42 is disposed on the entire surface between the N-type doped layer 20b and the silicon substrate 10. The first dielectric layer 41 and the second dielectric layer 42 are passivation dielectric layers such as silicon oxide, silicon nitride or silicon carbide, used to provide interface passivation and carrier tunneling transport channels.
[0102] exist Figure 12 In the embodiment shown, the first doped sublayer 22a is located inside the P-type doped layer 20a, and the second doped sublayer 22b is located inside the N-type doped layer 20b.
[0103] In the bifacial cell structure, a P-type doped layer 20a and an N-type doped layer 20b are respectively disposed on two opposite surfaces of the silicon substrate 10, forming a typical tunnel oxide passivated contact cell or bifacial cell structure. Taking the side where the P-type doped layer 20a is located as an example, the conductive portion 31 of the metal electrode 30 extends into the interior of the P-type doped layer 20a, at least partially overlapping with the depth region where the heavily doped sublayer 22 is located within the P-type doped layer 20a. That is, when the P-type doped layer 20a contains a first heavily doped sublayer 22a, the high concentration of the first heavily doped sublayer 22a forms a low-resistance ohmic contact at the metal-semiconductor interface, reducing the P-type contact resistance. The region of the P-type doped layer 20a other than the first heavily doped sublayer 22a maintains a low doping level close to the first doping concentration, with a low free carrier concentration and weak parasitic absorption of incident light or back-reflected light.
[0104] Similarly, on the side where the N-type doped layer 20b is located, the conductive portion 31 of the metal electrode 30 at least partially overlaps with the heavily doped sublayer 22 within the N-type doped layer 20b. That is, when the heavily doped sublayer 22 is disposed within the N-type doped layer 20b, in other words, when the N-type doped layer 20b has a second heavily doped sublayer 22b, the high concentration of the second heavily doped sublayer 22b provides sufficient freely moving electrons, reducing the N-type contact resistance. The region of the N-type doped layer 20b other than the heavily doped sublayer 22 maintains a low doping level, suppressing parasitic absorption.
[0105] When both the P-type doped layer 20a and the N-type doped layer 20b contain heavily doped sublayers 22, that is, when the P-type doped layer 20a contains a first heavily doped sublayer 22a and the N-type doped layer 20b contains a second heavily doped sublayer 22b, the contact resistance of both polarities can be reduced. Simultaneously, the low-concentration regions of the two doped layers 20 suppress parasitic absorption on their respective sides. Since the P-type doped layer 20a and the N-type doped layer 20b are located on opposite sides of the silicon substrate 10, the doping concentration distribution on both sides can be independently optimized. The position, peak concentration, and thickness ratio of the concentration peak can be designed according to the illumination conditions and contact requirements of each side.
[0106] Of course, this is not restrictive; Figure 13 In another embodiment shown, a TOPCon battery is also disclosed, the structure of which is similar to... Figure 12 The embodiments shown are basically the same, except that the heavily doped sublayer 22 is only disposed within the P-type doped layer 20a and not within the N-type doped layer 20b. In other words, only the P-type doped layer 20a has the first heavily doped sublayer 22a. The conductive portion 31 of the metal electrode 30 extends into the P-type doped layer 20a and at least partially overlaps with the depth region where the first heavily doped sublayer 22a is located within the P-type doped layer 20a. The high concentration of the first heavily doped sublayer 22a provides sufficient freely movable holes to form a low-resistance ohmic contact at the metal-semiconductor interface, thereby reducing the P-type contact resistance.
[0107] Similarly, in such Figure 14 In another embodiment shown, its structure is similar to Figure 12 The embodiments shown are basically the same, except that the heavily doped sublayer 22 is only disposed within the N-type doped layer 20b and not within the P-type doped layer 20a. In other words, only the N-type doped layer 20b has a second heavily doped sublayer 22b. When the N-type doped layer 20b has a second heavily doped sublayer 22b, the conductive part 31 and the heavily doped sublayer 22 in the N-type doped layer 20b at least partially overlap. The high concentration of the second heavily doped sublayer 22b provides sufficient freely moving electrons to form a low-resistance ohmic contact at the metal-semiconductor interface, thereby reducing the N-type contact resistance.
[0108] Therefore, the bifacial cell structure places a P-type doped layer 20a and an N-type doped layer 20b on two opposite surfaces of the silicon substrate 10, respectively. These, along with a dielectric layer, provide interface passivation. Simultaneously, by placing a heavily doped sublayer 22 within the doped layer 20 that overlaps with the conductive portion 31, the contact resistance on both sides is reduced. The low-concentration region of the doped layer 20 suppresses parasitic absorption on each side. Combined with the low contact resistance characteristic, this improves the short-circuit current density and fill factor, thereby enhancing the photoelectric conversion efficiency of the cell.
[0109] It is understandable that the TOPCon battery structure has an aluminum oxide layer 60, a silicon nitride layer 70, a silicon oxynitride layer 80 and a silicon oxide layer 90 sequentially disposed on the outside of the P-type doped layer 20a; and a silicon nitride layer 70 disposed on the outside of the N-type doped layer 20b.
[0110] In some embodiments, the metal electrode 30 is made of at least one of aluminum, copper, silver, or nickel. Specifically, the metal electrode 30 can be a pure aluminum electrode, a pure copper electrode, a pure silver electrode, or a pure nickel electrode, or it can be an alloy electrode or composite electrode composed of two or more of the above metals. In this case, the aluminum component in the aluminum electrode or the aluminum-containing alloy electrode can diffuse into the doped layer 20 during sintering, naturally forming the conductive portion 31, without the need for additional processing steps to separately prepare the conductive portion 31.
[0111] When the metal electrode 30 contains aluminum, during the sintering process, aluminum atoms diffuse from the outer surface of the doped layer 20 into the interior or alloy with silicon, naturally forming conductive portions 31 extending into the interior of the doped layer 20. The conductive portions 31 formed by aluminum diffusion at least partially overlap with the heavily doped sublayer 22 inside the doped layer 20 in space, which is beneficial for forming low-resistance ohmic contacts. When the metal electrode 30 contains silver, copper, or nickel, these metals provide excellent conductivity, reducing the line resistance of the metal electrode 30 itself and reducing the current transmission loss in the metal electrode 30.
[0112] It should be noted that multiple conductive portions 31 can be formed during the sintering process. Since the interface between the metal electrode 30 and the doped layer 20 is not an ideal plane, the diffusion depth of metal atoms at different positions on the interface may vary, resulting in multiple conductive portions 31 formed below the metal electrode 30. The depth to which each conductive portion 31 extends from the outer surface of the doped layer 20 into the interior may differ. Multiple conductive portions 31 together constitute a metal-semiconductor contact interface, increasing the effective contact area. When the penetration depth of each conductive portion 31 differs, multiple conductive portions 31 can contact the heavily doped sublayer 22 at different depths. Even if some conductive portions 31 fail to achieve good overlap with the heavily doped sublayer 22 due to insufficient or excessive penetration depth, the remaining conductive portions 31 can still form a low-resistance ohmic contact, reducing the dependence on the penetration depth accuracy of a single conductive portion 31. When there are multiple heavily doped sublayers 22, different conductive portions 31 can contact heavily doped sublayers 22 at different depths, or the same conductive portion 31 can penetrate multiple heavily doped sublayers 22, further enriching the contact path.
[0113] The metal electrode 30 is made of a material containing at least one of aluminum, copper, silver or nickel. The conductive part 31 is naturally formed by the diffusion characteristics of aluminum during the sintering process. This simplifies the process, achieves low resistance contact with the heavily doped sublayer 22, improves the fill factor, and also takes into account the conductivity of the metal electrode 30.
[0114] In such Figures 6 to 8 as well as Figures 12 to 14 In some embodiments shown, the solar cell further includes a first inner extension layer 51. The first inner extension layer 51 is disposed on the side of the silicon substrate 10 facing the P-type doped layer 20a, the depth of the inner extension layer is less than 90 nm, and the doping concentration of the inner extension layer is 1 × 10⁻⁶. 15 cm -3 Up to 1×10 19 cm -3 .
[0115] Specifically, the first inner extension layer 51 is a doped region formed by the diffusion of dopant ions from the P-type doped layer 20a towards the silicon substrate 10 during the fabrication process. This region is located within the surface layer of the silicon substrate 10 and corresponds to the position of the P-type doped layer 20a. The depth of the first inner extension layer 51 extends from the interface between the silicon substrate 10 and the first dielectric layer 41 into the interior of the silicon substrate 10, with a depth not exceeding 90 nm and a doping concentration of 1 × 10¹. 5 cm -3 Up to 1×10 19 cm -3 It should be noted that the first inner expansion layer 51 and the first dielectric layer 41 are different structures. The first dielectric layer 41 is a dielectric layer disposed between the P-type doped layer 20a and the silicon substrate 10, while the first inner expansion layer 51 is a doped region formed by the diffusion of doped ions into the surface layer of the silicon substrate 10.
[0116] In the solar cell, the P-type doped layer 20a undergoes a high-temperature activation process during fabrication, allowing dopant ions to diffuse from the P-type doped layer 20a into the silicon substrate 10, forming a first inner extension layer 51 on the surface of the silicon substrate 10. The doping concentration of the first inner extension layer 51 is much lower than the first doping concentration of the P-type doped layer 20a and also lower than the second doping concentration of the heavily doped sublayer 22. This first inner extension layer 51 forms a region with a gradual concentration transition between the silicon substrate 10 and the P-type doped layer 20a, avoiding abrupt changes in doping concentration at the interface, reducing band bending and defect state density at the interface, and thus helping to reduce the recombination rate of carriers at the interface. Simultaneously, the depth of the first inner extension layer 51 is less than 90 nm, confining the diffusion range of dopant ions into the silicon substrate 10 to a shallower surface region, avoiding the impact of excessive diffusion on the minority carrier lifetime of the silicon substrate 10 and reducing Auger recombination.
[0117] Thus, the first inner extension layer 51 forms a concentration-gradual transition region at the interface between the silicon substrate 10 and the P-type doped layer 20a, which improves the interface passivation performance, reduces the carrier recombination rate, and limits the diffusion depth of doped ions to within 90nm, avoiding the impact on the bulk quality of the silicon substrate 10 due to excessive diffusion. While maintaining the advantages of the heavily doped structure inside the doped layer 20, it further improves the open-circuit voltage of the battery.
[0118] In other embodiments, the solar cell further includes a second inner extension layer 52, which is disposed on the side of the silicon substrate 10 facing the N-type doped layer 20b, has a depth of less than 70 nm, and has a doping concentration of 1 × 10⁻⁶. 14 cm -3 Up to 1×10 17 cm -3 .
[0119] Specifically, the second inner extension layer 52 is a doped region formed by the diffusion of dopant ions from the N-type doped layer 20b towards the silicon substrate 10 during the fabrication process. This region is located within the surface layer of the silicon substrate 10 and corresponds to the position of the N-type doped layer 20b. The depth of the second inner extension layer 52 extends from the interface between the silicon substrate 10 and the second dielectric layer 42 into the interior of the silicon substrate 10, with a depth not exceeding 70 nm and a doping concentration of 1 × 10⁻⁶. 14 cm -3 Up to 1×10 17 cm -3 It should be noted that the second inner expansion layer 52 and the second dielectric layer 42 are different structures. The second dielectric layer 42 is a dielectric layer disposed between the N-type doped layer 20b and the silicon substrate 10, while the second inner expansion layer 52 is a doped region formed by the diffusion of doped ions into the surface layer of the silicon substrate 10.
[0120] In the solar cell, the N-type doped layer 20b undergoes a high-temperature activation process during fabrication, causing dopant ions to diffuse from the N-type doped layer 20b into the silicon substrate 10, forming a second inner extension layer 52 on the surface of the silicon substrate 10. The doping concentration of the second inner extension layer 52 is much lower than the first doping concentration of the N-type doped layer 20b and also lower than the second doping concentration of the heavily doped sublayer 22. This second inner extension layer 52 forms a region with a gradual concentration transition between the silicon substrate 10 and the N-type doped layer 20b, avoiding abrupt changes in doping concentration at the interface, reducing band bending and defect state density at the interface, and thus helping to reduce the recombination rate of charge carriers at the interface.
[0121] Compared to the first inner layer 51 corresponding to the P-type doped layer 20a, the diffusion characteristics of the dopant elements in the N-type doped layer 20b are different. The diffusion coefficient of N-type dopant elements in silicon is generally greater than that of P-type dopant elements, making them more likely to diffuse into the silicon substrate 10 under the same thermal budget conditions. Therefore, the depth of the second inner layer 52 is controlled within 70 nm, which is more stringent than the 90 nm upper limit of the first inner layer 51, to limit the diffusion range of N-type dopant ions into the silicon substrate 10, avoid the impact of excessive diffusion on the minority carrier lifetime of the bulk region of the silicon substrate 10, and reduce Auger recombination. The doping concentration range of the second inner layer 52 is 1 × 10⁻⁶. 14 cm -3 Up to 1×10 17 cm -3 The doping concentration range is lower than that of the first inner layer 51 to accommodate the diffusion characteristics of N-type doped elements.
[0122] Thus, the second inner extension layer 52 forms a concentration-gradual transition region at the interface between the silicon substrate 10 and the N-type doped layer 20b, which improves the interface passivation performance, reduces the carrier recombination rate, and limits the diffusion depth of doped ions to within 70nm, avoiding the impact on the bulk quality of the silicon substrate 10 due to excessive diffusion. While maintaining the advantages of the heavily doped structure inside the N-type doped layer 20b, it further improves the open-circuit voltage of the battery.
[0123] This invention also discloses a method for preparing a solar cell, used to prepare the solar cell according to any of the above-mentioned methods, the method comprising:
[0124] A doped source layer is pre-embedded in the polycrystalline silicon layer;
[0125] The polycrystalline silicon layer with a pre-embedded doped source layer is activated at an activation temperature of 800℃ to 960℃ for 2 min to 50 min to form a doped layer 20.
[0126] Specifically, during the deposition of the polycrystalline silicon layer, a doped source layer rich in doped atoms is pre-embedded at the target depth. For the P-type doped layer 20a, the doped source layer contains group III elements such as boron or gallium; for the N-type doped layer 20b, the doped source layer contains group V elements such as phosphorus, arsenic, or antimony. The pre-embedded depth of the doped source layer in the polycrystalline silicon layer corresponds to the depth of the concentration peak subsequently formed, i.e., the depth of the heavily doped sublayer 22. After pre-embedding, the polycrystalline silicon layer undergoes high-temperature activation treatment, with an activation temperature of 800℃ to 960℃ and an activation time of 2 min to 50 min.
[0127] During fabrication, the pre-embedded doped source layer provides a localized high-concentration doped atom source region within the polysilicon layer. During high-temperature activation, doped atoms diffuse from the doped source layer to the surrounding polysilicon layer, forming a concentration peak at the location of the doped source layer and its vicinity where the doping concentration is significantly higher than the surrounding area. This concentration peak region is the heavily doped sublayer 22, and its peak concentration represents the second doping concentration. Simultaneously, doped atoms are less distributed in the polysilicon layer regions outside the pre-embedded location, forming substrate regions with doping concentrations close to the first doping concentration. Because the activation time is controlled between 2 and 50 minutes, the diffusion distance of the doped atoms is limited, and the concentration peak is confined to a limited thickness range near the pre-embedded location, preventing it from extending to the entire polysilicon layer. By setting the activation temperature between 800°C and 960°C, sufficient energy is provided for the effective diffusion of doped atoms from the doped source layer to the surrounding polysilicon layer for activation, while avoiding excessive diffusion or damage to the crystal quality of the polysilicon layer due to excessively high temperatures.
[0128] The doping concentration distribution along the depth direction of the doped layer 20 formed by the above process can be characterized by the electrochemical capacitance-voltage method to obtain an ECV curve. The horizontal axis of the curve represents the depth from the outer surface of the doped layer 20 towards the silicon substrate 10, and the vertical axis represents the doping concentration. The first doping concentration can be obtained as follows: the doping concentration at each point in the ECV curve corresponding to the thickness range of the doped layer 20 (i.e., from the outer surface of the doped layer 20 to the interface of the dielectric layer 40) is integrated to obtain the total concentration integral value. Then, the total concentration integral value is divided by the thickness D2 of the doped layer 20 to obtain the overall average concentration of the doped layer 20 along the thickness direction, which is the first doping concentration.
[0129] In the ECV curve, the first doping concentration is relatively low and stable near the surface, corresponding to the substrate region of doped layer 20. A distinct concentration peak appears at a certain depth within doped layer 20, reaching the second doping concentration, corresponding to the heavily doped sublayer 22. After the concentration peak, the doping concentration gradually decreases, dropping to the inner doping concentration range after entering the surface layer of silicon substrate 10. The ECV curve visually reflects the vertical concentration partitioning structure between the substrate region of doped layer 20 and the heavily doped sublayer 22, as well as characteristic parameters such as the depth, thickness, and peak concentration of the heavily doped sublayer 22. The thickness of the heavily doped sublayer 22 can be determined using the full width at half maximum (FWHM) of the concentration peak in the ECV curve. That is, a horizontal line is drawn with half the peak concentration as its height, and the width between the intersection points of this line and the two sides of the concentration peak is the thickness of the heavily doped sublayer 22.
[0130] It should be noted that when multiple heavily doped sublayers 22 need to be formed in the doped layer 20, multiple doped source layers can be pre-embedded at different depths during the deposition of the polysilicon layer. After high-temperature activation, each doped source layer forms a concentration peak, thereby forming multiple heavily doped sublayers 22 spaced apart along the thickness direction inside the doped layer 20.
[0131] By employing a pre-embedded doped source layer combined with a high-temperature ultrafast activation process, precise control over the depth, peak concentration, and thickness of the heavily doped sublayer 22 within the doped layer 20 is achieved through adjusting the pre-embedded depth, activation temperature, and activation time. The overall average concentration (first doping concentration) of the doped layer 20 can be adjusted by controlling the substrate doping level during the polysilicon deposition process. This process achieves the concentration peak structure within the doped layer 20 while the high-temperature ultrafast activation method avoids damage to the interface quality between the polysilicon layer and the silicon substrate 10 caused by prolonged high-temperature processing, maintaining excellent interface passivation performance Z.
[0132] It is understood that the above embodiments are merely exemplary implementations used to illustrate the principles of the present invention, and the present invention is not limited thereto. For those skilled in the art, various modifications and improvements can be made without departing from the spirit and essence of the present invention, and these modifications and improvements are also considered to be within the scope of protection of the present invention.
Claims
1. A solar cell, characterized in that, include: Silicon substrate; A doped layer is disposed on the silicon substrate. The average concentration of the doped layer is a first doping concentration. The doped layer has at least one heavily doped sublayer. The peak value of the concentration peak of the at least one heavily doped sublayer is a second doping concentration. The ratio of the second doping concentration to the first doping concentration is x and satisfies 1.2≤x≤16. A metal electrode is disposed on the side of the doped layer away from the silicon substrate, and the metal electrode has a conductive portion extending into the doped layer; The conductive portion at least partially overlaps with the depth region containing at least one of the heavily doped sublayers.
2. The solar cell according to claim 1, characterized in that, The ratio x of the second doping concentration to the first doping concentration satisfies 1.5 ≤ x ≤ 8.
3. The solar cell according to claim 2, characterized in that, The distance between the peak position of the concentration peak and the surface of the doped layer away from the silicon substrate is D1, the thickness of the doped layer is D2, and D1 / D2 satisfies 0.1≤D1 / D2≤0.
8.
4. The solar cell according to claim 3, characterized in that, The ratio of the thickness D3 of the heavily doped sublayer to the thickness D2 of the doped layer is Y and satisfies 0.01≤Y≤0.
4.
5. The solar cell according to claim 4, characterized in that, The ratio Y of the thickness D3 of the heavily doped sublayer to the thickness D2 of the doped layer satisfies 0.05≤y≤0.
2.
6. The solar cell according to claim 2, characterized in that, The maximum length of the conductive portion of the metal electrode is greater than or equal to the depth of the concentration peak.
7. The solar cell according to claim 2, characterized in that, The projection of the heavily doped sublayer onto one side of the silicon substrate at least partially overlaps with the projection of the metal electrode onto the same side of the silicon substrate.
8. The solar cell according to claim 2, characterized in that, The heavily doped sublayers are multiple.
9. The solar cell according to claim 1, characterized in that, The doped layer is a P-type doped layer.
10. The solar cell according to claim 3, characterized in that, The first doping concentration is 1×10 19 cm -3 Up to 8×10 19 cm -3 .
11. The solar cell according to claim 3, characterized in that, The first doping concentration is 1×10 19 cm -3 Up to 5×10 19 cm -3 .
12. The solar cell according to claim 3, characterized in that, The second doping concentration is 0.5 × 10⁻⁶. 20 cm -3 Up to 5×10 20 cm -3 .
13. The solar cell according to claim 1, characterized in that, The doped layer is an N-type doped layer.
14. The solar cell according to claim 3, characterized in that, The first doping concentration is 1×10 19 cm -3 Up to 1.6×10 20 cm -3 .
15. The solar cell according to claim 3, characterized in that, The first doping concentration is 1×10 19 cm -3 Up to 8×10 19 cm -3 .
16. The solar cell according to claim 3, characterized in that, The second doping concentration is 0.8 × 10⁻⁶. 20 cm -3 Up to 9×10 20 cm -3 .
17. The solar cell according to claim 1, characterized in that, The doped layer includes a P-type doped layer and an N-type doped layer, wherein the heavily doped sublayer is located within the P-type doped layer and / or the N-type doped layer.
18. The solar cell according to claim 17, characterized in that, The silicon substrate has a light-facing side and a back-light-facing side, and the P-type doped layer and the N-type doped layer are alternately disposed on the back-light-facing side. The solar cell further includes: A first dielectric layer is disposed between the P-type doped layer and the silicon substrate; A second dielectric layer is disposed between the N-type doped layer and the silicon substrate.
19. The solar cell according to claim 17, characterized in that, The silicon substrate has a first surface and a second surface disposed opposite to each other, the P-type doped layer is disposed on the first surface, and the N-type doped layer is disposed on the second surface. The solar cell further includes: The first dielectric layer is disposed below the plurality of metal electrodes at intervals, located between the P-type doped layer and the silicon substrate.
20. The solar cell according to claim 17, characterized in that, The silicon substrate has a first surface and a second surface disposed opposite to each other. The P-type doped layer is a single-crystal silicon doped layer and is disposed on the side closer to the first surface. The N-type doped layer is disposed on the second surface. The solar cell further includes: A second dielectric layer is disposed between the N-type doped layer and the silicon substrate.
21. The solar cell according to claim 1, characterized in that, The metal electrode is made of at least one of aluminum, copper, silver, or nickel.
22. The solar cell according to claim 17, characterized in that, The solar cell also includes: A first inner extension layer is disposed on the side of the silicon substrate facing the P-type doped layer. The depth of the inner extension layer is less than 90 nm, and the doping concentration of the inner extension layer is 1 × 10⁻⁶. 15 cm -3 Up to 1×10 19 cm -3 .
23. The solar cell according to claim 17, characterized in that, The solar cell also includes: A second inner extension layer is disposed on the side of the silicon substrate facing the N-type doped layer. The depth of the inner extension layer is less than 70 nm, and the doping concentration of the inner extension layer is 1 × 10⁻⁶. 14 cm -3 Up to 1×10 17 cm -3 .
24. A method for preparing a solar cell, characterized in that, The method for preparing the solar cell according to any one of claims 1 to 23 comprises: A doped source layer is pre-embedded in the polycrystalline silicon layer; The polycrystalline silicon layer with the pre-embedded doped source layer is activated at an activation temperature of 800~960℃ for 2~50min to form the doped layer.