Photodiode and optical sensor

Abstract

This application discloses a photodiode, an optical sensor, and an optical detector. The photodiode includes a p-n junction, a first electrical contact, an avalanche region, and a dielectric isolation trench extending into a second well-shaped semiconductor layer and surrounding the outer periphery of the avalanche region to prevent premature edge breakdown in the avalanche photodiode. The isolation trench is radially disposed between the first and second electrical contacts. The isolation trench includes a sheath made of dielectric material and a metal core surrounded by the dielectric sheath. The thickness of the isolation trench is greater than or equal to 9 / 10 of the thickness of the second well-shaped semiconductor layer, thus forming a deep trench isolation within the second well-shaped semiconductor layer.

Description

[0001] This application is a divisional application of the Chinese national phase application, filed on August 12, 2021, with international application number PCT / JP2019 / 032047 and entitled "Improvement of SPAD-based Photodetector". The Chinese national phase application entered the national phase on August 8, 2022, with application number 202180013087.4 and entitled "Improvement of SPAD-based Photodetector".

[0002] This application claims priority to German Patent Application No. 10 202 0 201 452.3, the disclosure of which is incorporated herein by reference. Technical Field

[0003] This application relates to the semiconductor field, and more specifically, to photodiodes and optical sensors.

[0004] A. Automatic operating parameter adjustment to avoid SPAD saturation in SPAD-based photoelectric detection components

[0005] This disclosure relates to an integrated photodetector optoelectronic semiconductor device configured to provide an output signal indicating the intensity of light illuminating the device, the device including a SPAD-based main detector configured to detect incoming photons and provide an output signal based on the detected photons. Background Technology

[0006] A. Eisele et al. presented their paper "..." at the International Symposium on Image Sensors held in Japan on June 14, 2011 (Conference proceedings, pp. 278-281) 185 MHz Count Rate, 139 dB Dynamic Range Single- Photon Avalanche Diode with Active Quenching Circuit in 130 nm CMOS Technology This article introduces a SPAD-based optoelectronic component. In the following text, this article will be referred to simply as the "Eisele article".

[0007] Eisele's article focuses on the saturation problem encountered when operating single-photon avalanche diodes (SPADs) under high light intensity conditions. Beyond a certain light intensity, the SPAD becomes overwhelmed by the high rate of incoming photons. Under these conditions, the SPAD cannot detect the relevant portions of the impacting photons. The signal provided by the SPAD becomes saturated, making accurate measurement of light intensity impossible.

[0008] To alleviate this problem, Eisele's paper proposes an improved active quenching circuit. This compact active quenching circuit reduces the dead time of SPADs. Therefore, SPADs have a higher saturation threshold, allowing them to be used for measurements at higher light intensities.

[0009] However, the solution proposed in Eisele's paper is complex and expensive. The photodetectors built on this solution include complex active quenching circuitry, making them difficult to mass-produce and costly.

[0010] Another approach to mitigating SPAD saturation relies on detailed algorithms and post-processing analysis. This method uses a theoretical model of the SPAD saturation curve to predict the behavior of the SPAD under saturation conditions. This model is then used to correct the output signal provided by the saturated SPAD.

[0011] However, this analytical method is quite complex and difficult to implement because the saturation curve of SPAD depends on many factors, especially the lighting conditions, which vary in different applications. Summary of the Invention

[0012] In view of the above, the purpose of this disclosure is to provide a photoelectric component for SPAD-based photoelectric detection that can operate reliably even under high light intensity conditions.

[0013] Preferably, the component should also be simple in design and easy to mass-produce.

[0014] Another objective is to provide a photoelectric component for SPAD-based photoelectric detection that can adapt to various lighting conditions to consistently provide accurate measurement signals, regardless of the specific application.

[0015] According to this disclosure, the above-mentioned objective is achieved by an optoelectronic component as initially defined, characterized by: a SPAD-based reference detector located near the main detector, having the same electro-optical behavior as the main detector, configured to detect incoming photons and transmit at least one reference signal based on the detected photons, and having an inlet for the incoming photons; a neutral density filter covering the inlet of the reference detector; and a controller configured to determine a nominal output signal based on at least one reference signal transmitted by the reference detector and the known optical properties of the neutral density filter, compare the nominal output signal with the output signal transmitted by the main detector, and adjust at least one operating parameter of the main detector and the reference detector if the output signal differs from the nominal output signal.

[0016] Because the filter covers the reference detector, the optoelectronic components of this disclosure include one or more SPADs that will always operate within their linear detection range (i.e., below saturation), even under high light intensity conditions. Based on the known attenuation characteristics of the filter, the associated controller can infer the expected nominal output signal from the reference signal transmitted by the reference detector. If the output signal of the main detector is inconsistent with the calculated nominal output signal, the controller concludes that one or more SPADs of the main detector are saturated. In this case, the controller adjusts at least one operating parameter of the component to bring the SPAD(s) of the main detector(s) below saturation.

[0017] Therefore, the photoelectric component of this disclosure can detect high light intensity conditions in real time and automatically adapt to those conditions. This ensures reliable operation even under strong light.

[0018] The solution of this invention is particularly simple and easy to mass-produce. In fact, the additional components required for real-time saturation correction can be implemented with standard and basic optical and electronic components (conventional SPADs, conventional neutral density filters, basic controllers).

[0019] According to a preferred embodiment, the optoelectronic component of this disclosure may include one, several, or all of the following features in all technically possible combinations: - The controller is configured to adjust at least one operating parameter only when the output signal is less than the nominal output signal; - The controller adjusts (especially reduces) the magnitude of the reverse bias voltage applied to each SPAD of the main probe and the reference probe; - The same electro-optical behavior was achieved in both the main detector and the reference detector because the same SPAD structure was implemented in both devices; -The known optical property is the fractional transmittance T of the neutral grayscale filter; - The reference detection device is configured to transmit a single reference, the neutral grayscale filter device consists of a single neutral grayscale filter, and the controller calculates the nominal output signal using the following formula: Sn=Sr / T; - Both the main detector and the reference detector include a single SPAD for detecting incoming photons; a recess with the SPAD positioned at the bottom; and readout electronics for processing the SPAD signals transmitted by the SPAD. Both the main detector and the reference detector are integrated into a single semiconductor package; -SPAD array, the first part of the SPAD array is part of the main detection device, while the rest of the SPAD array is part of the reference detection device; - The neutral grayscale filter device consists of a single neutral grayscale filter covering the remainder of the SPAD array; - The neutral grayscale filter device includes at least two independent neutral grayscale filters that cover the remainder of the SPAD array; - Filters have the same fractional transmittance T; - Each filter has a different fractional transmittance T. Attached Figure Description

[0020] Preferred embodiments of the present disclosure will now be described in more detail with reference to the accompanying drawings, in which: Figure 1 This is a cross-sectional view of a first embodiment of the photoelectric detection photoelectric component according to the present invention; Figure 2 It is shown by Figure 1 A block diagram of signal processing and automatic operating parameter adjustment performed by the photoelectric detection photoelectric component; and Figure 3a , 3b Figures 3c and 3c respectively illustrate the second, third, and fourth embodiments of the photoelectric detection photoelectric component of this disclosure.

[0021] Figure 4 This is a schematic cross-sectional view of a first embodiment of the semiconductor avalanche photodiode according to the present invention; Figure 5 yes Figure 4 A variant of the semiconductor avalanche photodiode with some additional features; Figure 6 This is a schematic cross-sectional view of a second embodiment of the semiconductor avalanche photodiode according to the present invention; Figure 7 The process steps for manufacturing a deep trench isolation system with a vertically floating field plate according to the present invention are shown; and Figure 8 This is a schematic cross-sectional view of an optical sensor with an integrated avalanche photodiode and an IC chip according to the present invention. Detailed Implementation

[0022] Figure 1 A first embodiment 100 of the integrated photodetector optoelectronic semiconductor component of this disclosure is shown. Component 100 is a stand-alone optical detector. It is a small unit, typically millimeter-scale, that can be integrated into various electronic devices, such as smartphones, wearable devices, or virtual reality headsets, to act as a light sensor.

[0023] Figure 1The photodetector 100 is particularly well-suited for applications requiring detection under bright ambient light conditions. It is also well-suited for light detection applications in environments characterized by large and varying amounts of background light.

[0024] Figure 1 The photodetector 100 can be used, for example, as an infrared light sensor for eye tracking in virtual reality glasses.

[0025] Reference Figure 1 The photoelectric detection photoelectric component 100 includes a SPAD-based main detection device 102 with a main SPAD 120a, a SPAD-based reference detection device 104 with a reference SPAD 120b, a neutral grayscale filter device 106, and a microcontroller 108.

[0026] The main detector 102 is located in the first half 110 of the semiconductor package 112, while the reference detector 104 is located in the second half 114 of the semiconductor package 112. Therefore, the reference detector 104 is arranged close to the main detector 102. Both the main detector 102 and the reference detector 104 are... Figure 1 Each is represented by a dashed polygon.

[0027] The main detection device 102 and the reference detection device 104 are positioned side-by-side. Furthermore, in this embodiment, the main detection device 102 and the reference detection device 104 are merged together. In other words, they are different parts of a single monolithic block B. Block B has a front side 116, which is the entry area for the light L detected by the photoelectric component 100. The rear side 118 of block B is located opposite the front side 116, which serves as the light entry side.

[0028] A neutral grayscale filter 106 is arranged on top of the reference detector 104. The main detector 102 does not have any neutral grayscale filter.

[0029] The neutral grayscale filter device 106 can take the form of a single material layer. Figure 1 In this embodiment, a sheet-like neutral density filter 106 is located on the front side 116 of the photoelectric component 100. The neutral density filter 106 attenuates the intensity of light of all wavelengths on an average basis. Therefore, the intensity of light emitted from the neutral density filter 106 is lower than the intensity of light incident on the neutral density filter 106. Consequently, since the neutral density filter 106 is located in front of the reference detection device 104, the intensity of light reaching the reference SPAD 120b is significantly lower than the intensity of light reaching the main SPAD 120a.

[0030] Neutral gray filter 106 is selected to have specific optical properties. Specifically, neutral gray filter 106 has a specific fractional transmittance T. Depending on the requirements that the optoelectronic component 100 must meet, the fractional transmittance T of the neutral gray filter 106 can be 10... -8 Between 0.9 and 0.9.

[0031] The microcontroller 108 is embedded in a single chip B, specifically in a semiconductor package 112.

[0032] Both the main detection device 102 and the reference detection device 104 include the following components: - A single-photon avalanche diode or SPAD 120a, 120b for detecting incoming photons; - Recesses 122a and 122b, with corresponding SPADs 120a and 120b arranged at the bottom of the recesses; and - Readout electronics 124a, 124b are used to process SPAD signals transmitted by the corresponding SPADs 120a, 120b.

[0033] Both recesses 122a and 122b are open cavities that are confined within the body of the semiconductor package 112.

[0034] In this embodiment, readout electronics 124a and 124b are embedded in semiconductor package 112. Each readout electronics 124a and 124b is preferably disposed under its corresponding SPAD 120a and 120b.

[0035] The main SPAD 120a of the main detector 102 and the reference SPAD 120b of the reference detector 104 are identical. This means they are of the same type and therefore have the same structure. For example, SPADs 120a and 120b can both be manufactured using the same manufacturing process. Therefore, the main detector 102 and the reference detector 104 have the same electro-optical behavior.

[0036] In addition, each detection device 102 and 104 also includes protective covering devices 126a and 126b. The two protective covering devices 126a and 126b are part of the entire covering layer C. The covering layer C extends over the entire front side 116. The covering layer C can be completely transparent to the entire spectrum of light radiation L covered by the optical detector 100. Alternatively, the protective layer C can act as an optical filter, such as a bandpass, shortpass, or longpass filter.

[0037] The detection devices 102 and 104 also have light inlets 128a and 128b. Each light inlet 128a and 128b corresponds to a portion of the protective cover devices 126a and 126b, such that the top of the corresponding recesses 122a and 122b are sealed.

[0038] Neutral gray filter 106 covers the light inlet 128b of reference detector 104.

[0039] Figure 2 This is a block diagram illustrating signal processing and SPAD control performed by the optoelectronic component 100. The main SPAD 120a and reference SPAD 120b, readout electronics 124, and microcontroller 108 can be distinguished. A neutral density filter 106 is also shown, which attenuates light L before reaching the reference SPAD 120b. Each SPAD 120a and 120b has power supplies 130a and 130b. Power supplies 130a and 130b are configured to apply a reverse bias voltage to their respective SPADs 120a and 120b.

[0040] exist Figure 2 In the example shown, two SPADs 120a and 120b share the same readout electronics 124. This means that an identical readout electronics first processes signals from one of the two SPADs sequentially, and then processes signals from the other SPAD. Alternatively, each SPAD 120a and 120b can have its own dedicated readout chain. In this case, there can be two parallel identical readout chains 124a and 124b (see [link to example]). Figure 1 This allows for the simultaneous reading of signals from two SPADs.

[0041] Figure 2 The readout electronics 124 shown comprises three consecutive stages: a filter and amplification stage 132, followed by a comparator or discriminator stage 134, and then an analog-to-digital converter (ADC) or counter 136. The filter and amplification stage 132 is optional. It may be omitted because the SPAD already has a built-in inherent signal gain.

[0042] The readout chain 124 has a signal input section I and a signal output section O. The signal input section I receives a signal from one of the two SPADs 120a and 120b. The signal is then processed by the three stages 132, 134, and 136 of the readout electronics 124. The result is a probe signal Sr or So at the signal output section O.

[0043] The combination of the main SPAD 120a and the readout electronics 124 serves as the main detection device 102 and transmits an output signal to indicate the intensity L of the light illuminating the photoelectric component 100. The combination of the reference SPAD 120b and the readout electronics 124 serves as the reference detection device 104 and transmits a reference signal Sr. Both the reference signal Sr and the output signal Sr are provided to the microcontroller unit 108 for further processing.

[0044] The microcontroller unit 108 is adapted to control the power supplies 130a and 130b of the two SPADs 120a and 120b. Specifically, the microcontroller unit 108 can control the two power supplies 130a and 130b to change the magnitude of the reverse bias voltage applied to each SPAD 120a and 120b.

[0045] The control processing performed by the microcontroller 108 will now be described. This control processing is automatic SPAD saturation evaluation and correction, which ensures that the photodetector 100 always operates within its linear detection range. The control processing can be repeatable, meaning it can be executed regularly in a cyclical manner.

[0046] Control processing begins with reference SPAD 120b and master SPAD 120a being biased with the same reverse voltage. The intensity of light L from the light source Q is measured by both master detector 102 and reference detector 104. The resulting signals So (output signal from master detector 102) and Sr (reference signal from reference detector 104) are both fed to microcontroller 108. Microcontroller 108 then determines the nominal output signal Sn based on the reference signal Sr and the fractional transmittance T of the neutral density filter 106. More specifically, controller 108 calculates the nominal output signal Sn using the following formula: Sn = Sr / T.

[0047] Then, the controller 108 compares the calculated nominal output signal Sn with the output signal So transmitted by the main detection device 102.

[0048] If the output signal So is less than the nominal output signal Sn, the controller concludes that the main SPAD 120a is operating in saturation. In this case, the microcontroller 108 reduces the reverse bias voltage of both SPAD 120a and 120b to remove the main SPAD 120a from saturation.

[0049] The reverse bias voltage can be reduced in specific increments (e.g., in 1V increments) until the nominal output signal Sn equals the output signal So.

[0050] When both signals Sn and So are equal, the controller 108 concludes that the main SPAD 120a is now operating within its linear detection range. The corresponding output signal So is provided by the photoelectric component 100 as an accurate indication of the intensity of light illuminating that component.

[0051] As previously mentioned, the control process can be repeated periodically. This allows for real-time monitoring of intensity changes in the light L from the light source Q, and, if necessary, allows for corresponding real-time SPAD saturation correction in the photoelectric component 100.

[0052] Referring to FIG3, three more embodiments of the optoelectronic component of this disclosure will now be described. Figure 3a , 3b The three implementations shown in 3c are all based on the entire array A of single-photon avalanche diodes (SPADs). This is consistent with... Figure 1 The implementation using two single SPADs is the opposite. Essentially, in the implementation of Figure 3, each of the two single SPADs in the first implementation is replaced by a complete set of SPADs. These different SPAD sets together form a complete SPAD array A, such as a silicon photomultiplier tube (SiPM).

[0053] exist Figure 3a In the second embodiment 200 shown, the SPAD array A is subdivided into a first portion 202 and a second remaining portion 204. The first portion 202 corresponds to the main detection device, and the remaining portion 204 corresponds to the reference detection device. The signal transmitted by the main SPAD group 202 is read out through the main output contact Z1. The signal transmitted by the reference SPAD group 204 is read out through the reference output contact Z2. In this embodiment, the neutral grayscale filter device includes a single neutral grayscale filter 206 that covers the reference portion 204 of the SPAD array A. Contacts Z1 and Z2 are both connected to readout electronics, such as... Figure 2 As shown. Based on the signal provided by contact Z1, the readout electronics generate an output signal So. Based on the signal provided by reference contact Z2, the readout electronics generate a reference signal Sr. Then, the same control processing as described above is performed to ensure that the main SPAD group 202 always operates within the linear detection range, below saturation.

[0054] exist Figure 3b In the third embodiment 250 shown, the main detection device includes two sub-sections 202.1 and 202.2 of the SPAD array A, which together form the entire main detection section. Similarly, the reference detection device includes two additional sub-sections 204.1 and 204.2 of the SPAD array A, which together form the entire reference detection section. Here, the neutral grayscale filter device includes two independent neutral grayscale filters 206.1 and 206.2, which respectively cover the reference sub-sections 204.1 and 204.2. The neutral grayscale filters 206.1 and 206.2 both have the same fractional transmittance T. Each reference sub-section 204.1 and 204.2 of the reference detection device has its own output contacts Z2 and Z3. The two signals from these two different contacts Z2 and Z3 can be averaged or considered separately. This arrangement may be advantageous in applications with non-uniform luminous flux.

[0055] exist Figure 3cIn the fourth embodiment 280 shown, the SPAD array A is divided into four quadrants, each with its own output contacts Z1 to Z4. Quadrant 202 corresponds to the main detector and has no neutral density filters. The other three quadrants 204.1, 204.2, and 204.3 correspond to the reference detector. The three quadrants used for reference detection are covered by separate neutral density filters 206.1, 206.2, and 206.3, respectively. Each filter 206.1, 206.2, and 206.3 has a different fractional transmittance T. The fractional transmittance T can decrease from one filter to the next. The signals generated by the three filters covering quadrants 204.1, 204.2, and 204.3 can be read individually, and the aforementioned control processing can be extended to all collected signals. This allows for more accurate estimation of saturation states across a wider set of application conditions.

[0056] In all three embodiments shown in Figure 3, in addition to the output contacts Z1, Z2, etc., the SPAD array A also has an additional common contact (not shown) shared by all parts or quadrants. This common contact may be located on the back of the SPAD array A.

[0057] In summary, the SPAD-based photoelectric component for photodetection disclosed herein provides a simple, economical, compact, and rapid solution for online monitoring, evaluation, and potential correction of SPAD saturation. This solution is compatible with standard CMOS technology. Furthermore, utilizing this solution, SPAD detectors can be used in a wider range of applications (particularly in the consumer sector), even for high impact photon flux. The solution is also compatible with all state-of-the-art SPAD quenching mechanisms.

[0058] This disclosure relates to the following implementation methods: §1 An integrated photoelectric semiconductor device (100) for photoelectric detection. The component is configured to transmit an output signal So, which indicates the intensity of light (L) illuminating the component (100), and The component (100) includes a SPAD-based main detection device (102) configured to detect incoming photons and transmit an output signal So based on the detected photons. The component (100) is characterized in that: -SPAD-based reference detection device (104): i) Approaching the main detection device (102); ii) It has the same electro-optical behavior as the main detection device (102); iii) configured to detect incoming photons and transmit at least one reference signal Sr based on the detected photons; and iv) It has an inlet (128b) for the entry of photons. - A neutral grayscale filter (106) covering the light inlet (128b) of the reference detector; and - Controller (108) is configured as follows: i) Determine the nominal output signal Sn based on at least one reference signal Sr transmitted by the reference detection device (104) and the known optical properties of the neutral gray filter device (106); ii) Compare the nominal output signal Sn with the output signal So transmitted by the main detection device (102); and iii) If the output signal So is different from the nominal output signal Sn, then adjust at least one operating parameter of the main detection device (102) and the reference detection device (104).

[0059] The component (100) of §2 §1, wherein the controller (108) is configured to adjust at least one operating parameter only when the output signal So is less than the nominal output signal Sn.

[0060] §3 Component (100) of any of the preceding §§, wherein step iii) above includes a controller (108) adjusting, in particular reducing, the magnitude of the reverse bias voltage applied to each SPAD (120a, 120b) of the main detection device (102) and the reference detection device (104).

[0061] §4 Component (100) of any of the preceding §§, wherein the same electro-optical behavior is achieved in the main detection device (102) and the reference detection device (104) because the same SPAD structure is achieved in both devices.

[0062] §5 Component (100) of any of the preceding §§, wherein, in step i) above, the known optical property is the fractional transmittance T of the neutral gray filter device (106).

[0063] Component (100) of §6 §5, wherein the reference detection device (104) is configured to transmit a single reference signal Sr, wherein the neutral grayscale filter device (106) consists of a single neutral grayscale filter, and wherein, in step i) above, the controller (108) calculates the nominal output signal Sn using the following formula: Sn = Sr / T.

[0064] §7 The component (100) of any of the preceding §§, wherein the main detection device (102) and the reference detection device (104) each include the following components: - A single SPAD (120a, 120b) is used to detect incoming photons; - Recesses (122a, 122b), SPADs are provided at the bottom of the recesses; and - Readout electronics (124a, 124b) are used to process SPAD signals transmitted by SPAD (120a, 120b).

[0065] §8 Component (100) of any of the preceding §§, wherein the main detection device (102) and the reference detection device (104) are both integrated into a single semiconductor package (112).

[0066] The component of any one of §§1 to 5, wherein the component includes a SPAD array (A), and wherein a first portion (202) of the SPAD array is part of the main detection device, and the remaining portion (204) of the SPAD array is part of the reference detection device.

[0067] The components of §10 §9, wherein the neutral gray filter device includes a single neutral gray filter (206) covering the remainder (204) of the SPAD array.

[0068] The component (250) of §11 §9, wherein the neutral grayscale filter device consists of at least two separate neutral grayscale filters (206.1, 206.2) covering the remainder (204.1, 204.2) of the SPAD array (A).

[0069] Components (250) of §12 §11, wherein filters (206.1, 206.2) have the same fractional transmittance T.

[0070] Components (280) of §13 §11, wherein each filter (206.1, 206.2, 206.3) has a different fractional transmittance T.

[0071] B. Metal-core avalanche photodiode with deep trenches for edge breakdown and crosstalk prevention

[0072] This invention relates to a semiconductor avalanche photodiode for photodetection, the avalanche photodiode comprising: a pn junction in the form of a first shallow intrinsic semiconductor layer having a first doping type, embedded in a second well-shaped intrinsic semiconductor layer having a second doping type opposite to the first doping type; a first electrical contact for electrically connecting the first semiconductor layer; a second electrical contact for electrically connecting the second semiconductor layer; an avalanche region located at the interface between the two semiconductor layers, adapted to undergo avalanche breakdown when triggered by light to be detected; and a dielectric isolation trench extending into the second well-shaped semiconductor layer and surrounding the outer periphery of the avalanche region to prevent premature edge breakdown in the avalanche photodiode, wherein the isolation trench is arranged radially between the first and second electrical contacts.

[0073] This avalanche photodiode was described in a paper titled "[…]" by MJ Lee et al., published in Optics Express, 18 May 2015, Vol. 23, No. 10, pp. 13200-13209. A first single-photon avalanche diode fabricated in standard SOI CMOS technology with a full characterization of the device The article was published in [the journal name]. Below, this article will be referred to as the Lee article.

[0074] The first problem with avalanche photodiodes is the risk of premature edge breakdown at the edge of the avalanche region, caused by the high electric field that needs to be maintained in the avalanche region.

[0075] A second problem arises when individual avalanche photodiodes are combined into a complete photodetector array. Adjacent photodiodes in the array are susceptible to photoelectric crosstalk, which generates noise in the array's output signal.

[0076] To address the first issue, the single-photon avalanche diode (SPAD) design known from Lee's paper includes a p-well guard ring and shallow trench isolation, referencing... Figure 1 To address the second issue, SPADs include lateral intermediate trench isolation, which prevents electrical crosstalk between adjacent SPADs.

[0077] US 2015 / 0325737 A1 demonstrates a different SPAD design (see reference). Figure 1 It also includes a structure for preventing edge breakdown and another structure for preventing crosstalk. In this design, edge breakdown is prevented by a p-well protection ring 24. Crosstalk protection is achieved through a lateral insulation region 30 having a channel blocking region 32 and a metal region 34. The metal region 34 ensures optical isolation from adjacent SPADs, and the channel blocking region 32 provides electrical insulation from adjacent SPADs.

[0078] The anti-crosstalk and edge breakdown structures present in the above designs complicate the layout and manufacturing of avalanche photodiodes. They also increase the size of the photodiode and reduce its fill factor.

[0079] Therefore, the purpose of this disclosure is to provide an avalanche photodiode that includes a simple and space-saving method for preventing edge breakdown and reducing crosstalk.

[0080] According to the present invention, this objective is achieved using an avalanche photodiode as originally defined, wherein the isolation trench comprises a sheath made of dielectric material and a metal core surrounded by the dielectric sheath, and the thickness of the isolation trench is greater than or equal to 9 / 10 of the thickness of the second well-shaped semiconductor layer, thereby forming a deep trench isolation within the second well-shaped semiconductor layer.

[0081] By significantly increasing the depth of the isolation trenches and installing the trenches with a metal core, the confinement of the electric field in the avalanche zone was improved. Simultaneously, the dielectric sheath of the deep trenches shielded against electrical crosstalk, while the metal core layer shielded against optical crosstalk.

[0082] The deep isolation trench of the present invention serves as both a crosstalk reduction structure and an edge breakdown prevention structure, thereby saving space and reducing complexity.

[0083] According to a preferred embodiment, the avalanche photodiode of this disclosure may include one, several, or all of the following features in all technically possible combinations: - Photodiodes are silicon-on-insulator (SOI) type; -The isolation trench is in direct lateral contact with the outer boundary of the first shallow semiconductor layer; - Photodiodes do not have any semiconductor protection rings to prevent edge breakdown; -The metal core includes at least one, particularly three, plate-shaped metal components; -The main longitudinal axis of each plate-shaped metal component extends along the main direction in which light enters the photodiode; - The metal core includes at least two plate-shaped metal components, which are concentrically arranged within a dielectric sheath; - The metal core includes at least two plate-shaped metal parts, each plate-shaped metal part being spaced apart from its adjacent plate-shaped metal part; - The space between the plate-shaped metal components is occupied by the dielectric material of the dielectric sheath; - The metal core is made of tungsten, nickel, or titanium, or silicides of tungsten, nickel, or titanium; - The dielectric sheath is made of silicon dioxide; - At least 2 / 5 of the width of the isolation trench is occupied by the dielectric sheath; - An additional external dielectric isolation trench located on the outer edge of the photodiode; - The thickness of the external isolation trench is equal to the thickness of the second well-shaped semiconductor layer; - The metal core is electrically insulated from the rest of the photodiode; -The photodiode is back-illuminated; - An enrichment layer embedded in the first shallow intrinsic semiconductor layer; - The inner periphery of the dielectric sheath of the outer peripheral radial contact dielectric isolation trench of the enriched layer; - The thickness of the enrichment layer is the same as the thickness of the first shallow intrinsic semiconductor layer.

[0084] This disclosure also relates to a method for manufacturing a photodiode as described above.

[0085] This disclosure also relates to an optical sensor comprising a photodiode as described above and an integrated assembly including an IC chip comprising electronic circuitry for controlling and reading out the photodiode.

[0086] This disclosure also relates to an optical detector, such as a silicon photomultiplier tube, comprising a photodiode array as described above.

[0087] Preferred embodiments of the present disclosure will now be described in more detail with reference to the accompanying drawings.

[0088] This disclosure relates to improvements in avalanche photodiodes, particularly single-photon avalanche diodes or SPADs, also known as Geiger-mode avalanche photodiodes.

[0089] Due to its high sensitivity, very fast timing response and high intrinsic gain, the SPAD of the present invention can be used in many different applications, such as time-of-flight measurement, lidar, user detection, optical identification, heart rate monitoring or functional near-infrared spectroscopy, etc.

[0090] The SPADs disclosed herein can also be arranged in arrays for use in larger imaging applications. Silicon photomultiplier tubes are a typical example of optical detectors that can be constructed using existing SPADs. Using the SPADs of this disclosure allows for detector arrays with high fill factor and high pixel density. This reduces the size of the detector, enabling better photon statistics and high-quality imaging. This is because the SPADs of this disclosure are back-illuminated SPADs. In this type of SPAD, the light being detected enters the photodiode from the back side rather than the front side.

[0091] The back-illuminated SPAD disclosed herein is preferably manufactured using silicon-on-insulator (SOI) technology and is preferably compatible with complementary metal-oxide-semiconductor (CMOS) technology.

[0092] Turn now Figure 4 A first preferred embodiment of the single-photon avalanche diode 100 according to this disclosure will be described. From bottom B to top T, Figure 4 The SPAD structure 100 shown includes: a processing layer 102, a bottom oxide layer 104, a PN junction 106, a field oxide layer 108, a cathode contact 110, and an anode contact 112.

[0093] The processing layer 102 is typically a semiconductor layer, such as an n-type layer. Strictly speaking, this n-type layer 102 is not part of the final avalanche photodiode 100. It is part of a processing wafer used in the manufacturing process and is removed during the etching process on the back of the wafer.

[0094] Figure 4 The SPAD 100 shown is manufactured using SOI technology, in which the bottom oxide layer 104 corresponds to the insulator and the PN junction 106 corresponds to the semiconductor on the insulator.

[0095] In this example, the PN junction 106 takes the form of a first shallow intrinsic semiconductor layer 114 having a first doping type, which is embedded in a second well-shaped intrinsic semiconductor layer 116 having a second doping type opposite to the first doping type.

[0096] In this example, the first shallow semiconductor layer 114 is a p+ type layer. Correspondingly, the second well-shaped semiconductor layer 116 is an n-type layer. Therefore, the PN junction 106 is made of the lower layer 116 and the upper layer 114. The thickness of the second well-shaped semiconductor layer 116 is denoted by the letter D. D typically ranges from 2 μm to 10 μm. In contrast, the p+ type layer 114 is much thinner and has a thickness, for example, between 0.1 μm and 1 μm. Therefore, the thickness of the shallow semiconductor layer 114 is typically between 5% and 10% of the thickness of the well-shaped semiconductor layer 116.

[0097] The well-shaped second semiconductor layer 116 is subdivided laterally in the Q direction into a central light-absorbing region 118, an intermediate isolation region 120, and an outer contact region 122. A shallow semiconductor layer 114 is located on top of the central light-absorbing region 118. The shallow semiconductor layer 114 is in direct contact with the lower absorption region 118 of the well-shaped semiconductor layer 116. The intermediate isolation region 120 has a dielectric isolation trench 124 integrated therein. The outer contact region 122 is provided with a local enrichment region 126, which in this example is n+ type. The local enrichment region 126 ensures good electrical contact with the cathode 110.

[0098] SPAD 100 can also be described as a multilayer stack including a bottom insulating layer 104, an adjacent intermediate semiconductor layer 106 (which corresponds to a PN junction), and a top insulating layer 108. Thus, the semiconductor layer 106 is sandwiched between the two insulating layers 104 and 108.

[0099] Both the cathode contact 110 and the anode contact 112 are implemented as discontinuities in the top field oxide / insulating layer 108. In this embodiment, the cathode contact 110 and the anode contact 112 are arranged concentrically. The cathode contact 110 surrounds the anode contact 112 in the same way that the outer contact area 122 of the well-shaped layer 116 surrounds the shallow layer 114.

[0100] The semiconductor avalanche photodiode 100 also includes an avalanche region A at the interface between the two semiconductor layers 114 and 116 (see reference). Figure 4 (The dashed rectangle in the diagram). When SPAD 100 is biased at an operating voltage higher than its breakdown voltage, avalanche region A is adapted to undergo avalanche breakdown when triggered by a photon M entering SPAD 100 from the bottom side B. Avalanche region A is electrically limited by isolation trench 124.

[0101] A dielectric isolation trench 124 extends into the second well-shaped semiconductor layer 116. It surrounds the entire outer periphery of the avalanche region A to prevent premature edge breakdown in the SPAD 100. When viewed from the top T of the SPAD 100, the isolation trench 124 can have a closed circular or polygonal shape. The depth or thickness X of the isolation trench 124 is defined as the distance from the upper surface 128 of the well-shaped layer 116 to the lower base 130 of the isolation trench 124. The isolation trench 124 is a so-called deep isolation trench. This means that the isolation trench 124 extends deeply into the well-shaped layer 116. According to the invention, the thickness X of the isolation trench 124 is greater than or equal to 9 / 10 of the thickness D of the second well-shaped semiconductor layer 116. This minimum thickness of the deep isolation trench 124 relative to the well 116 ensures sufficient confinement of the active region of the SPAD 100 by the avalanche region A. Numerical simulations confirm this. The deep isolation trench 124 is an effective edge breakdown prevention device.

[0102] It will be noted that the deep isolation trench 124 is arranged between the external cathode contact 110 and the internal anode contact 112. Therefore, when moving radially outward from the center of the SPAD 100, one will first encounter the anode contact 112, then the deep isolation trench 124, and finally the external cathode contact 110.

[0103] from Figure 4 It is evident that the width W of the deep isolation trench 124 is less than its thickness X. The width of the deep isolation trench 124 can be approximately 0.5 μm.

[0104] It will be noted that the deep isolation trench 124 is in direct lateral contact with the outer boundary 136 of the first shallow semiconductor layer 114.

[0105] According to the invention, the isolation trench 124 includes a sheath 132 made of a dielectric material and a metal core 134 surrounded by the dielectric sheath 132. The sheath 132 may be made, for example, of a semiconductor oxide such as silicon dioxide. The metal core 134 may be made, for example, of tungsten.

[0106] In this example, the metal core consists of a plate-shaped metal component 134. The principal longitudinal axis L of the plate-shaped metal component 134 extends along the principal direction M of light entering the SPAD 100 (refer to the arrow). The metal core 134 can also be considered a field plate because it confines the electric field in the PN junction 106. The barrier field plate 134 is electrically insulated from the rest of the SPAD 100. The electrical insulation is provided by the dielectric sheath 132 and the field oxide layer 108. Because the field plate 134 is electrically insulated, it is not connected to any reference voltage and therefore is not connected to a floating field plate.

[0107] It will be noted that the upper edge 135 of the metal plate 134 protrudes beyond the envelope 132 and enters the top field oxide layer 108.

[0108] At least 2 / 5 of the width W of the deep isolation trench 124 may be occupied by the dielectric sheath 132.

[0109] Figure 4 A particular advantage of the SPAD 100 shown is that it does not require any semiconductor guard rings to prevent edge breakdown as in the prior art. According to the invention, edge breakdown is prevented by the combination of the isolation trench 124, which has a considerable depth, and the metal core 134.

[0110] Most importantly, the metal core 134 acts as an optical barrier against secondary photons P emitted from the PN junction 106. These parasitic secondary photons P are a detrimental side effect that occurs during the operation of the SPAD 100. Electroluminescence in the PN junction 106 generates photons that can propagate through the SPAD 100 to the surroundings (so-called optical crosstalk). This is prevented by the metal barrier field plate 134.

[0111] In addition, the dielectric sheath 132 acts as an electrical barrier, which prevents charge carriers from propagating to the vicinity of the SPAD (so-called electrical crosstalk).

[0112] Figure 5 Showing Figure 4 A variant of the first implementation. With Figure 4 Compared to the implementation method, Figure 5 The SPAD structure 200 has two additional features: a p+ type enrichment layer 238 and an additional external dielectric isolation trench 240.

[0113] A p+ type enrichment layer 238 is embedded in a shallow semiconductor layer 214. This p+ type enrichment layer 238 ensures good electrical contact between the anode contact 212 and the shallow p+ type semiconductor layer 214. Preferably, the outer periphery of the p+ type enrichment layer 238 radially contacts the inner periphery of the dielectric sheath 232 of the internal dielectric isolation trench 224. Figure 5 In a variant not shown, the thickness of the p+ enrichment layer 238 can be the same as the thickness of the shallow layer 214. This reduces potential charging effects at the pn junction 206, which can be attributed to the fixed charge in the envelope 232. Given that the well-shaped epitaxial layer 216 is typically highly n-type doped, this optional p+ enrichment layer 238 on the upper periphery of the shallow semiconductor layer 214 is advantageous.

[0114] An external dielectric isolation trench 240 is located on the outer edge of the SPAD. It surrounds the intrinsic semiconductor well 216 of the PN junction 206. The additional external dielectric isolation trench 240 is sandwiched between the bottom oxide layer 204 and the top field oxide layer 208.

[0115] Preferably, such as Figure 5 As shown, the thickness of the external isolation trench 240 is equal to the thickness D of the second well-shaped semiconductor layer 216. When the SPAD structure 200 is used in a SPAD array, the additional external dielectric isolation trench 240 ensures complete electrical decoupling from adjacent pixels.

[0116] Turn now Figure 6 This illustrates a second embodiment 300 of the SPAD structure of this disclosure. The only difference from the first embodiment is the presence of more than one plate-shaped metal component within the dielectric sheath 332. Figure 6 In the illustrated embodiment, the enclosure 332 comprises three plate-shaped metal components 334a, 334b, and 334c. In this example, the three barrier plates 334a to 334c are concentrically arranged within the dielectric enclosure 332. The three metal plates 334a to 334c are spaced apart from each other. The space S between the metal plates 334a to 334c is occupied by the dielectric material of the dielectric enclosure 332. Therefore, the three barrier plates 334a to 334c are encapsulated within the dielectric sheath. This sheath can consist entirely of the enclosure 332. Alternatively, as... Figure 6 As shown, the sheath may consist of a combination of a cover 332 and a portion of a top field oxide layer 308.

[0117] Figure 7 It shows the manufacturing process. Figure 6 The process steps that can be performed during SPAD 300 to manufacture deep isolation trenches 324. Figure 7 A total of six process steps are shown.

[0118] In step 1, a portion E of the field oxide layer 308 is removed to expose the area of ​​the well 316. This is accomplished by photoresist deposition, followed by a photomask process, then dry etching of the field oxide layer 308, and finally removal of the photoresist.

[0119] Step 2 is dry etching of the well 316. This creates a space V in the well 316 for isolating the trench 324. In this step, the field oxide layer 308 acts as a hard mask.

[0120] In step 3, the semiconductor oxide is thermally grown within space V until space V is completely filled by the oxide layer OX. Alternatively, this filling of space V can be accomplished by deposition. This third step ends when the space-filling oxide layer OX is flush with the field oxide layer 308.

[0121] In step 4, the three cavities C1, C2, and C3 are etched into the oxide layer OX. This is accomplished by depositing photoresist, followed by a photomask process, then dry etching, and finally removing the photoresist.

[0122] In step 5, a metal such as tungsten is deposited in each cavity C1, C2, and C3. Metal deposition ends when the top of each of the three metal layers is flush with the top surface of the field oxide layer 308. The result is three field plates 334a to 334c. This step involves depositing a temporary metal barrier (e.g., made of titanium or titanium nitride) to shield the upper surface of the photodiode 300 except for the three cavities C1, C2, and C3, followed by depositing tungsten to fill cavities C1, C2, and C3, then etching away any excess tungsten, and finally etching back the temporary metal barrier.

[0123] The final step (step 6) involves depositing a supplemental semiconductor oxide to flatten the top surface of the SPAD 300 and completely enclose the metal core 334 of the isolation trench 324.

[0124] Figure 8 Show Figure 6 How the SPAD 300 is integrated with the IC chip 400 to form the optical sensor 500. Figure 8 The optical sensor 500 shown is a fully integrated solution of SOI SPAD and CMOS electronics, suitable for high-quality 3D imaging. Figure 8 The optical sensor 500 shown is part of two interconnected semiconductor wafers W1 and W2. Semiconductor wafer W1 contains an array of identical SPADs 300. Each SPAD 300 in the array represents a pixel in the entire optical detector. The next unit or pixel of the SPAD array and the corresponding CMOS electronics are... Figure 8 The dotted line on the right indicates this.

[0125] Bonding between the two wafers W1 and W2 is achieved via metal contacts 502 and a sandwich layer 504. Metal interconnects 506 can also be distinguished within the upper wafer W1. Contacts and vias 508, as well as a deposited oxide layer 510, are also shown.

[0126] Next to SPAD 300 is a through-hole portion 512. The through-hole portion 512 includes the electrical wiring necessary for power supply to IC chip 400 and signal exchange with IC chip 400.

[0127] The lower part 402 of the IC chip 400 includes pixel electronics, and the upper part 404 includes a plurality of vias and interconnects 406 embedded in the oxide layer 408.

[0128] As indicated by the wavy arrow, the optical sensor 500 is back-illuminated. This means that the light to be detected enters the SPAD 300 from the rear. The front of the SPAD 300 is used for integration with the IC chip 400, which includes the necessary readout electronics 402. Therefore, the front of each SPAD 300 is shielded by the associated IC chip 400.

[0129] In summary, when the SPAD structure is used in a SPAD array, the SPAD structure described in this disclosure features innovative deep trench isolation to prevent edge breakdown while reducing crosstalk and dark current.

[0130] In other words, in the SPAD structure disclosed herein, the deep trenches simultaneously serve two different functions: on the one hand, they prevent electrical and optical crosstalk, and on the other hand, they prevent edge breakdown. Thus, the SPAD does not require two separate components to achieve these two functions, which improves the fill factor.

[0131] The disclosed SPAD structure can be used to fabricate high-density back-illuminated SPAD arrays that operate even under high overvoltage values. The resulting SPAD arrays exhibit high photoelectric detection efficiency, low crosstalk and dark current, and high spatial resolution across the entire spectral range, from blue light to near-infrared. They also possess high fill factor and excellent electro-optical decoupling between pixels.

[0132] This semiconductor-on-insulator back-illuminated SPAD design is fully compatible with CMOS processes. The resulting SPAD array detector is suitable for high-quality 3D imaging, such as that required in time-of-flight applications (e.g., optical proximity sensing, LiDAR, etc.). Furthermore, the resulting SPAD array detector can operate even under extremely low light conditions.

Claims

1. A semiconductor avalanche photodiode (100) for photoelectric detection, the avalanche photodiode (100) comprising: - The pn junction (106) takes the form of a first shallow intrinsic semiconductor layer (114) of a first doping type, and the first shallow intrinsic semiconductor layer is embedded in a second well-shaped intrinsic semiconductor layer (116) of a second doping type opposite to the first doping type. - A first electrical contact (112) is used to electrically connect the first shallow intrinsic semiconductor layer (114). - Second electrical contact (110) for electrically connecting the second well-shaped intrinsic semiconductor layer (116). - An avalanche region (A), located at the interface between the two semiconductor layers (114, 116), is adapted to undergo avalanche breakdown when triggered by the light (M) to be detected. - A dielectric isolation trench (124) extends into the second well-shaped semiconductor layer (116) and surrounds the outer periphery of the avalanche region (A) to prevent premature edge breakdown in the avalanche photodiode. The isolation trench (124) is arranged radially between the first electrical contact (112) and the second electrical contact (110). Its features are: - The isolation trench (124) includes a sheath (132) made of dielectric material and a metal core (134) surrounded by the dielectric sheath; and - The thickness (X) of the isolation trench (124) is greater than or equal to 9 / 10 of the thickness (D) of the second well-shaped semiconductor layer (116), and the isolation trench thus forms a deep trench isolation within the second well-shaped semiconductor layer.

2. The photodiode (100) according to claim 1, wherein, The photodiode is of the silicon-on-insulator (SOI) type.

3. The photodiode (100) according to claim 1 or 2, wherein, The isolation trench (124) is in direct lateral contact with the outer boundary (136) of the first shallow semiconductor layer (114).

4. The photodiode (100) according to any one of claims 1 to 3, wherein, The photodiode has no semiconductor protection ring to prevent edge breakdown.

5. The photodiode (100) according to any one of claims 1 to 4, wherein, The metal core (134) includes at least one metal component, particularly three plate-shaped metal components.

6. The photodiode (100) according to claim 5, wherein, The main longitudinal axis (L) of each of the plate-shaped metal components (134) extends along the main direction (M) of light entering the photodiode.

7. The photodiode (300) according to claim 5 or 6, wherein, The metal core includes at least two plate-shaped metal components (334a, 334b, 334c), wherein the plate-shaped metal components are concentrically arranged within the dielectric sheath (332).

8. The photodiode (300) according to any one of claims 5 to 7, wherein, The metal core includes at least two plate-shaped metal components (334a, 334b, 334c), wherein each plate-shaped metal component is spaced apart from the adjacent plate-shaped metal component.

9. The photodiode (300) according to claim 8, wherein, The space between the plate-shaped metal components (334a, 334b, 334c) is occupied by the dielectric material of the dielectric sheath (332).

10. The photodiode (100) according to any one of claims 1 to 9, wherein, The metal core (134) is made of tungsten, nickel, titanium, tungsten silicide, nickel silicide, or titanium silicide.

11. The photodiode (100) according to any one of claims 1 to 10, wherein, The dielectric sheath (132) is made of silicon dioxide.

12. The photodiode (100) according to any one of claims 1 to 11, wherein, At least 2 / 5 of the width (W) of the isolation trench (124) is occupied by the dielectric sheath (132).

13. The photodiode (200) according to any one of claims 1 to 12, comprising an additional external dielectric isolation trench (240) located on the outer edge of the photodiode.

14. The photodiode (200) according to claim 13, wherein, The thickness of the external dielectric isolation trench (240) is equal to the thickness (D) of the second well-shaped semiconductor layer (216).

15. The photodiode (100) according to any one of claims 1 to 14, wherein, The metal core (134) is electrically insulated from the remainder of the photodiode.

16. The photodiode (100) according to any one of claims 1 to 15, wherein, The photodiode is back-illuminated.

17. The photodiode (200) according to any one of claims 1 to 16 further comprises an enrichment layer (238) embedded in the first shallow intrinsic semiconductor layer (214).

18. The photodiode (200) according to claim 17, wherein, The outer periphery of the enriched layer (238) radially contacts the inner periphery of the dielectric sheath (232) of the dielectric isolation trench (224).

19. The photodiode (200) according to claim 17 or 18, wherein, The thickness of the enrichment layer (238) is the same as the thickness of the first shallow intrinsic semiconductor layer (214).

20. An optical sensor (500) comprising an integrated assembly of a photodiode (300) according to any one of claims 1 to 19 and an IC chip (400), the IC chip (400) comprising electronic circuitry (402) for controlling and reading out the photodiode.

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