Image sensing device

Abstract

This application relates to an image sensing device. According to one embodiment of this specification, the image sensing device includes: a plurality of active pixels, each of the plurality of active pixels including a plurality of sub-active pixels; a light-shielding pixel disposed between the plurality of active pixels and including at least one sub-light-shielding pixel; and a floating diffusion region shared by the sub-light-shielding pixel and at least one of the plurality of sub-active pixels.

Description

Technical Field

[0001] This specification relates to an image sensing device. Background Technology

[0002] With the development of the information and communication industry and the digitization of electronic devices, image sensors with improved performance are being used in various fields, such as digital cameras, camcorders, mobile phones, personal communication systems (PCS), gaming devices, security cameras, and medical miniature cameras.

[0003] Typically, an image sensor has a pixel region including a photodiode and a peripheral circuit region. Each pixel includes a photodiode and a transfer transistor. The transfer transistor is positioned between the photodiode and a floating diffusion region to transfer the charge generated by the photodiode to the floating diffusion region. Summary of the Invention

[0004] Some implementations of the disclosed technology provide an image sensing device capable of correcting the black level of active pixels by including light-blocking pixels.

[0005] Some implementations of the disclosed technology provide an image sensing device capable of generating high-quality images by arranging light-blocking pixels in the effective pixel area for dark shadow correction.

[0006] Some implementations of the disclosed technology provide an image sensing device that improves resolution by arranging light-shielding pixels in the effective pixel area and arranging light-shielding pixels individually in each region of the effective pixel area.

[0007] Some implementations of the disclosed technology provide an image sensing device that can more effectively utilize the space of a pixel array substrate by allowing light-shielding pixels and peripheral effective pixels to share a floating diffusion area.

[0008] Some implementations of the disclosed technology provide an image sensing device that can drive the light-shielding pixels and peripheral effective pixels more effectively by sharing a floating diffusion region.

[0009] In one aspect, an image sensing device includes: a plurality of active pixels, each of the plurality of active pixels including a plurality of sub-active pixels; a light-shielding pixel disposed between the plurality of active pixels and including at least one sub-light-shielding pixel; and a floating diffusion region shared by the sub-light-shielding pixel and at least one of the plurality of sub-active pixels.

[0010] An image sensing device according to another embodiment of this specification includes: an effective pixel region; a dummy pixel region disposed around the effective pixel region; an active pixel disposed in the effective pixel region and including a plurality of sub-active pixels; a light-shielding pixel disposed in the effective pixel region; a first floating diffusion region shared by the plurality of sub-active pixels; and a second floating diffusion region separate from the first floating diffusion region and electrically connected to the light-shielding pixel.

[0011] According to the disclosed technology, the black level of an active pixel can be corrected by including a light-blocking pixel.

[0012] According to the implementation of the disclosed technology, a high-quality image can be generated by arranging light-blocking pixels in the effective pixel area for dark shadow correction.

[0013] According to the disclosed technology, resolution can be improved by arranging light-shielding pixels in the effective pixel area and in each area of ​​the effective pixel area.

[0014] According to the implementation of the disclosed technology, the space of the pixel array substrate portion can be used more effectively by allowing the light-shielding pixel and the effective pixels around the light-shielding pixel to share the floating diffusion area.

[0015] According to the implementation of the disclosed technology, the light-shielding pixel and the effective pixels around the light-shielding pixel can be driven more effectively by sharing the floating diffusion area.

[0016] The above effects are examples, and based on the following description, those skilled in the art to which this specification pertains will be able to clearly understand other effects not mentioned. Attached Figure Description

[0017] Figure 1 This is a block diagram illustrating an example of an image sensing device according to some implementations of the disclosed technology.

[0018] Figure 2 It is a plan view that specifically illustrates an example of a pixel array according to some implementations of the disclosed technology.

[0019] Figure 3 yes Figure 2 A magnified view of the repeating pixel units.

[0020] Figure 4 yes Figure 3 A magnified view of the second pixel group.

[0021] Figure 5This is an equivalent circuit diagram of an example of a floating diffusion region in a pixel array and components electrically connected to the floating diffusion region, according to some implementations of the disclosed technology.

[0022] Figure 6 It is along Figure 4 The cross-sectional view taken by line A-A' in the diagram.

[0023] Figure 7 It is a plan view of an example pixel array based on some implementations of the disclosed technology.

[0024] Figure 8 yes Figure 7 A circuit diagram of an example of the first active pixel.

[0025] Figure 9 yes Figure 7 A circuit diagram of an example of a light-blocking pixel.

[0026] Figure 10 It is along Figure 7 The cross-sectional view taken by line B-B' in the diagram.

[0027] Figure 11 It is a plan view of an example pixel array based on some implementations of the disclosed technology.

[0028] Figure 12 yes Figure 11 A circuit diagram of an example of a light-blocking pixel.

[0029] Figure 13 It is along Figure 11 The cross-sectional view taken from line C-C' in the diagram.

[0030] Figure 14 It is a plan view of an example pixel array based on some implementations of the disclosed technology.

[0031] Figure 15 yes Figure 14 A circuit diagram of an example of a light-blocking pixel.

[0032] Figure 16 It is along Figure 14 The cross-sectional view taken by line D-D' in the diagram.

[0033] Figure 17 It is a plan view of an example pixel array based on some implementations of the disclosed technology.

[0034] Figure 18 yes Figure 17 A circuit diagram of an example of the first active pixel.

[0035] Figure 19 yes Figure 17 A circuit diagram of an example of a light-blocking pixel.

[0036] Figure 20 It is along Figure 17 The cross-sectional view taken from line E-E' in the diagram.

[0037] Figure 21 It is a plan view of an example pixel array based on some implementations of the disclosed technology.

[0038] Figure 22 yes Figure 21 A circuit diagram of an example of a light-blocking pixel.

[0039] Figure 23 It is along Figure 21 The cross-sectional view taken by line F-F' in the diagram. Detailed Implementation

[0040] In the following description, embodiments will be described with reference to the accompanying drawings.

[0041] The same reference numerals denote the same parts. Additionally, in the drawings, the thickness, scale, and dimensions of parts are exaggerated for effective description of the technical content. The term "and / or" includes all one or more combinations that can be defined by the associated configuration.

[0042] Figure 1 This is a block diagram illustrating an image sensing device according to one embodiment.

[0043] Reference Figure 1 The image sensing device 100 may include a pixel array 110, a row driver 120, a correlated dual sampler (CDS) 130, an analog-to-digital converter (ADC) 140, an output buffer 150, a column driver 160, and a timing controller 170. Here, each component of the image sensing device 100 is merely exemplary, and at least some components may be added or omitted as needed.

[0044] The pixel array 110 may include a plurality of image pixels arranged along multiple rows and columns. The plurality of image pixels may convert optical signals into electrical signals based on pixels or groups of pixels. Each image pixel can detect incident light by generating a photocharge corresponding to the intensity (or illuminance) of the incident light and generating an electrical signal with an amplitude corresponding to the amount of photocharge generated. For ease of description, an image pixel may also be referred to as a pixel.

[0045] The row driver 120 can activate the pixel array 110 to perform specific operations on the pixels included in the corresponding row based on commands and control signals supplied by the timing controller 170.

[0046] The correlated double sampler 130 can transmit the reference signal and image signal of each column as correlated double sample signals to the ADC 140 based on the control signal from the timing controller 170.

[0047] The ADC 140 can convert the correlated double sampled signal of each column output from the correlated double sampler 130 into a digital signal and output image data.

[0048] The ADC 140 may include multiple column counters, each corresponding to a column of the pixel array 110. Each column of the pixel array 110 may be connected to each column counter, and image data can be generated by using the column counters to convert the correlated double-sampled signal corresponding to each column into a digital signal.

[0049] Output buffer 150 can temporarily store and output image data for each column provided by ADC 140. Output buffer 150 can temporarily store image data output from ADC 140 based on control signals from timing controller 170.

[0050] The column driver 160 can select the column of the output buffer 150 and control the output buffer 150 based on the control signal of the timing controller 170, so that the image data temporarily stored in the selected column of the output buffer 150 is output sequentially.

[0051] The timing controller 170 can control at least one of the row driver 120, the correlated dual sampler 130, the ADC 140, the output buffer 150, and the column driver 160.

[0052] The timing controller 170 can provide each component with various signals required to operate each component of the image sensing device 100.

[0053] Figure 2 This is a plan view specifically illustrating a pixel array according to one embodiment. Figure 3 yes Figure 2 A magnified view of the repeating pixel units. Figure 4 yes Figure 3 A magnified view of the second pixel group.

[0054] Reference Figures 2 to 4 According to one embodiment, the pixel array 110 may include an effective (or image) pixel region 111 and a dummy pixel region 115 surrounding the effective pixel region 111.

[0055] The effective pixel region 111 may include multiple active pixels (APs) and multiple light-shielding pixels (OBPs). The active pixels (APs) and light-shielding pixels (OBPs) may be repeatedly disposed in the row direction (e.g., first direction DR1) and the column direction (e.g., second direction DR2). The light-shielding pixels (OBPs) may be disposed between the active pixels (APs).

[0056] In one implementation, for example, an image pixel signal is generated by sensing incident light and converting it into an electrical signal, thereby using active pixels to capture an image projected onto an image sensing device.

[0057] Light-blocking pixels (OBPs) block incident light. An OBP refers to a pixel that is blocked from receiving light incident on the surface of an image sensing device. It is used to test and evaluate the electrical characteristics of the optical imaging device when incident light is blocked. The OBP can generate pixel signals to correct the black level (or dark level) of the active pixel AP in the absence of any incident light. When incident light is blocked, the image sensing device 100 can correct the dark current of the active pixels in the effective pixel region 111 based on the pixel signals generated by the OBPs.

[0058] Therefore, dark noise from the image sensor can be eliminated by correcting the current value corresponding to the dark current in the active pixel AP.

[0059] Since the light-shielding pixel OBP is set in the effective pixel area 111, the light-shielding pixel OBP can be set closer to the active pixel AP, thereby generating a higher quality image more smoothly through dark shadow correction.

[0060] The dummy pixel region 115 may be located outside and adjacent to the effective pixel region 111. The dummy pixel region 115 may not be able to perform photoelectric conversion of incident light.

[0061] The dummy pixel region 115 may include a plurality of dummy pixels having the same structure as the active pixels AP, and the dummy pixels may be arranged consecutively in, for example, a row direction (e.g., a first direction DR1) and a column direction (e.g., a second direction DR2). The dummy pixels included in the dummy pixel region 115 are distinguishable from the active pixels in the effective pixel region 111 in terms of operations not directly used for image formation. The dummy pixels are designed and operated to compensate for undesirable characteristics of the image sensing device 100 and improve the overall imaging operation of the image sensing device.

[0062] The effective pixel region 111 may include multiple repeating pixel units RP. A repeating pixel unit RP can refer to multiple pixel structures arranged in a repeating pattern along the column and row directions. The repeating pixel unit RP may include multiple active pixels AP and one light-shielding pixel OBP. Although Figure 2 The example shown illustrates a light-shielding pixel OBP included in a repeating pixel unit RP, but other implementations are possible. Thus, the repeating pixel unit RP may include multiple light-shielding pixels OBP.

[0063] Repeating pixel units RP can be set in the effective pixel area 111 and repeatedly set in the first direction DR1 and the second direction DR2.

[0064] The repeating pixel unit RP may include a first pixel group G1 and a second pixel group G2. The first pixel group G1 may include multiple active pixels AP, and the second pixel group G2 may include multiple active pixels AP and light-shielding pixels OBP. The first pixel group G1 may consist only of active pixels AP, and the second pixel group G2 may consist of active pixels AP and light-shielding pixels OBP.

[0065] However, the implementation of this specification is not limited thereto, and the second pixel group G2 may include a plurality of light-shielding pixels OBP.

[0066] The repeating pixel unit RP may include a plurality of first pixel groups G1 and at least one second pixel group G2. For example, the repeating pixel unit RP may include three first pixel groups G1 and one second pixel group G2, but is not limited thereto.

[0067] The first pixel group G1 may include multiple active pixels AP1, AP2, AP3, and AP4 configured to receive light of different colors. For example, the first active pixel AP1 and the fourth active pixel AP4 of the first pixel group G1 may receive green light, the second active pixel AP2 of the first pixel group G1 may receive red light, and the third active pixel AP3 of the first pixel group G1 may receive blue light. However, the embodiments described herein are not limited to this, and the color combinations of light received by the active pixels AP1, AP2, AP3, and AP4 may be different.

[0068] The multiple active pixels AP1, AP2, AP3 and AP4 set in the first pixel group G1 may respectively include multiple sub-active pixels AP11 to AP14, AP21 to AP24, AP31 to AP34 and AP41 to AP44.

[0069] For example, the first active pixel AP1 of the first pixel group G1 may include the 11th sub-active pixel AP11 to the 14th sub-active pixel AP14, the second active pixel AP2 of the first pixel group G1 may include the 21st sub-active pixel AP21 to the 24th sub-active pixel AP24, the third active pixel AP3 of the first pixel group G1 may include the 31st sub-active pixel AP31 to the 34th sub-active pixel AP34, and the fourth active pixel AP4 of the first pixel group G1 may include the 41st sub-active pixel AP41 to the 44th sub-active pixel AP44.

[0070] The sub-active pixels AP11 to AP14, AP21 to AP24, AP31 to AP34 and AP41 to AP44, which are respectively set in the first pixel group G1, AP2, AP3 and AP4, may have substantially the same configuration, but are not limited thereto.

[0071] The second pixel group G2 may include multiple active pixels AP1, AP2, AP3, and AP4 configured to receive light of different colors and a light-blocking pixel OBP that blocks external light. Sub-active pixels AP11 to AP14, AP21 to AP24, AP31 to AP34, and AP41 to AP44 are configured to generate photocharge through photoelectric conversion of incident light.

[0072] The second pixel group G2 may include multiple active pixels AP1, AP2, AP3, and AP4 that receive different colors of light. For example, the first active pixel AP1 and the fourth active pixel AP4 of the second pixel group G2 may receive green light, the second active pixel AP2 of the second pixel group G2 may receive red light, and the third active pixel AP3 of the second pixel group G2 may receive blue light. However, the embodiments described in this specification are not limited to this, and the color combinations of light received by the active pixels AP1, AP2, AP3, and AP4 may be different.

[0073] The multiple active pixels AP1, AP2, AP3 and AP4 set in the second pixel group G2 may respectively include multiple sub-active pixels AP11 to AP13, AP21 to AP23, AP31 to AP33 and AP41 to AP43.

[0074] For example, the first active pixel AP1 of the second pixel group G2 may include the 11th sub-active pixel AP11 to the 13th sub-active pixel AP13, the second active pixel AP2 of the second pixel group G2 may include the 21st sub-active pixel AP21 to the 23rd sub-active pixel AP23, the third active pixel AP3 of the second pixel group G2 may include the 31st sub-active pixel AP31 to the 33rd sub-active pixel AP33, and the fourth active pixel AP4 of the second pixel group G2 may include the 41st sub-active pixel AP41 to the 43rd sub-active pixel AP43. In this example, sub-active pixels AP11 to AP13, AP21 to AP23, AP31 to AP33, and AP41 to AP43 are described as the 11th to 13th sub-active pixels, the 21st to 23rd sub-active pixels, the 31st to 33rd sub-active pixels, and the 41st to 43rd sub-active pixels, respectively, but other implementations are possible.

[0075] The 11th sub-active pixel AP11 to the 13th sub-active pixel AP13 can have essentially the same shape and size in the planar view. The 21st sub-active pixel AP21 to the 23rd sub-active pixel AP23 can have essentially the same shape and size in the planar view. The 31st sub-active pixel AP31 to the 33rd sub-active pixel AP33 can have essentially the same shape and size in the planar view. Furthermore, the 41st sub-active pixel AP41 to the 43rd sub-active pixel AP43 can have essentially the same shape and size, but are not limited to these.

[0076] The sub-active pixels AP11 to AP13, AP21 to AP23, AP31 to AP33 and AP41 to AP43, which are respectively set in the second pixel group G2, may have substantially the same configuration as, but are not limited to, the active pixels AP1, AP2, AP3 and AP4.

[0077] The light-shielding pixel OBP, which is located in the second pixel group G2, can be located in the central area of ​​the second pixel group G2, and multiple active pixels AP1, AP2, AP3 and AP4, which are located in the second pixel group G2, can be located around the light-shielding pixel OBP.

[0078] For example, the light-shielding pixel OBP set in the second pixel group G2 can be surrounded by the sub-active pixels AP11 to AP13, AP21 to AP23, AP31 to AP33 and AP41 to AP43 set in the second pixel group G2.

[0079] The light-shielding pixel OBP set in the second pixel group G2 may include multiple sub-light-shielding pixels OBP1, OBP2, OBP3, and OBP4. For example, the light-shielding pixel OBP set in the second pixel group G2 may include a first sub-light-shielding pixel OBP1, a second sub-light-shielding pixel OBP2, a third sub-light-shielding pixel OBP3, and a fourth sub-light-shielding pixel OBP4.

[0080] Multiple sub-shielding pixels OBP1, OBP2, OBP3 and OBP4 are configured to block incident light from entering at least one sub-shielding pixel OBP1, OBP2, OBP3 and OBP4.

[0081] The pixel array 110 may also include floating diffusion regions FD (FD1, FD2, FD3, and FD4). The floating diffusion regions FD (FD1, FD2, FD3, and FD4) can accumulate transmitted photocharge. The floating diffusion regions FD (FD1, FD2, FD3, and FD4) are configured to store photocharge generated by a plurality of sub-active pixels AP11 to AP14, AP21 to AP24, AP31 to AP34, and AP41 to AP44. For example, the floating diffusion region FD may be a region doped with an impurity of a second conductivity type (e.g., N-type) on a substrate portion having a first conductivity type (e.g., P-type), and the substrate portion and the doped region may be molded as a junction capacitor.

[0082] The floating diffusion region FD may include a first floating diffusion region to a fourth floating diffusion region (FD1, FD2, FD3, and FD4). In the second pixel group G2, the floating diffusion regions FD (FD1, FD2, FD3, and FD4) may be respectively located between the active pixels AP1, AP2, AP3, and AP4 and the sub-shading pixels OBP1, OBP2, OBP3, and OBP4.

[0083] although Figure 3 The floating diffusion region FD is not shown, but it can also be set in the first pixel group G1.

[0084] The first floating diffusion region FD1 can be set between the first active pixel AP1 and the first sub-shading pixel OBP1, the second floating diffusion region FD2 can be set between the second active pixel AP2 and the second sub-shading pixel OBP2, the third floating diffusion region FD3 can be set between the third active pixel AP3 and the third sub-shading pixel OBP3, and the fourth floating diffusion region FD4 can be set between the fourth active pixel AP4 and the fourth sub-shading pixel OBP4.

[0085] The first floating diffusion region FD1 can span the 11th to 13th sub-active pixels (AP11, AP12, and AP13) and the first sub-shading pixel OBP1. The first floating diffusion region FD1 can overlap with the 11th to 13th sub-active pixels (AP11, AP12, and AP13) and the first sub-shading pixel OBP1 in the thickness direction.

[0086] The second floating diffusion region FD2 can span the 21st to 23rd sub-active pixels (AP21, AP22, and AP23) and the second sub-shading pixel OBP2. The second floating diffusion region FD2 can overlap with the 21st to 23rd sub-active pixels (AP21, AP22, and AP23) and the second sub-shading pixel OBP2 in the thickness direction.

[0087] The third floating diffusion region FD3 can span the 31st to 33rd sub-active pixels (AP31, AP32, and AP33) and the third sub-shading pixel OBP3. The third floating diffusion region FD3 can overlap with the 31st to 33rd sub-active pixels (AP31, AP32, and AP33) and the third sub-shading pixel OBP3 in the thickness direction.

[0088] The fourth floating diffusion region FD4 can span the 41st to 43rd sub-active pixels (AP41, AP42, and AP43) and the fourth sub-shading pixel OBP4. The fourth floating diffusion region FD4 can overlap with the 41st to 43rd sub-active pixels (AP41, AP42, and AP43) and the fourth sub-shading pixel OBP4 in the thickness direction.

[0089] Sub-shading pixels OBP1, OBP2, OBP3, and OBP4 may share a floating diffusion region FD (FD1, FD2, FD3, and FD4) with at least one of the sub-active pixels AP11 to AP13, AP21 to AP23, AP31 to AP33, and AP41 to AP43 of the second pixel group G2 and the surrounding sub-shading pixels OBP1, OBP2, OBP3, and OBP4.

[0090] Here, the shared floating diffusion regions FD (FD1, FD2, FD3 and FD4) can refer to the electrical connection with the floating diffusion regions FD (FD1, FD2, FD3 and FD4).

[0091] For example, the first sub-shading pixel OBP1 may share (and be electrically connected to) the first floating diffusion region FD1 with the sub-active pixels AP11, AP12 and AP13 of the first active pixel AP1 of the second pixel group G2.

[0092] The second sub-shading pixel OBP2 can share (can be electrically connected to) the second floating diffusion region FD2 with the sub-active pixels AP21, AP22 and AP23 of the second active pixel AP2 of the second pixel group G2.

[0093] The third sub-shading pixel OBP3 can share (and be electrically connected to) the third floating diffusion region FD3 with the sub-active pixels AP31, AP32 and AP33 of the third active pixel AP3 of the second pixel group G2.

[0094] The fourth sub-shading pixel OBP4 can share (can be electrically connected to) the fourth floating diffusion region FD4 with the sub-active pixels AP41, AP42 and AP43 of the fourth active pixel AP4 of the second pixel group G2.

[0095] This will refer to Figure 5 Further detailed description.

[0096] Figure 5 This is an equivalent circuit diagram of a floating diffusion region disposed in a pixel array and components electrically connected to the floating diffusion region, according to one embodiment.

[0097] Figure 5This is a circuit diagram showing the 11th to 13th sub-active pixels (AP11, AP12, and AP13) and the first sub-shading pixel OBP1 sharing the first floating diffusion region FD1. However, its description can be applied in substantially the same way to the second to fourth floating diffusion regions (FD2, FD3, and FD4), the sub-active pixels AP21 to AP23, AP31 to AP33, and AP41 to AP43 sharing the second to fourth floating diffusion regions (FD2, FD3, and FD4), and the second to fourth sub-shading pixels (OBP2, OBP3, and OBP4).

[0098] Further reference Figure 5 Each of the floating diffusion regions FD1, FD2, FD3 and FD4 can be connected to the gate electrode of the drive transistor DT, the drain electrode of the transfer transistors ATT1, ATT2, ATT3 and BTT1, and the drain electrode of the dual conversion gain (DCG) transistor DCGT.

[0099] The 11th active sub-pixel AP11 may include a first active photodetector APD1, a first active transmission transistor ATT1, a reset transistor RT, a first floating diffusion region FD1, a drive transistor DT, a select transistor ST, and a DCG transistor DCGT.

[0100] The 12th sub-active pixel AP12 may include a second active photodetector APD2, a second active transmission transistor ATT2, a reset transistor RT, a first floating diffusion region FD1, a drive transistor DT, a select transistor ST, and a DCG transistor DCGT.

[0101] The 13th active sub-pixel AP13 may include a third active photodetector APD3, a third active transmission transistor ATT3, a reset transistor RT, a first floating diffusion region FD1, a drive transistor DT, a select transistor ST, and a DCG transistor DCGT.

[0102] The first sub-shielded pixel OBP1 may include a first shielded photodetector BPD1, a first shielded transmission transistor BTT1, a reset transistor RT, a first floating diffusion region FD1, a drive transistor DT, a select transistor ST, and a DCG transistor DCGT.

[0103] The 11th to 13th sub-active pixels (AP11, AP12, and AP13) and the first sub-shading pixel OBP1 can be electrically connected to the same first floating diffusion area FD1. The 11th to 13th sub-active pixels (AP11, AP12, and AP13) and the first sub-shading pixel OBP1 can share the same first floating diffusion area FD1.

[0104] Therefore, the 11th to 13th sub-active pixels (AP11, AP12, and AP13) and the first sub-shading pixel OBP1 can be electrically connected to the same drive transistor DT, select transistor ST, and DCG transistor DCGT. In other words, the 11th to 13th sub-active pixels (AP11, AP12, and AP13) and the first sub-shading pixel OBP1 can also share the drive transistor DT, select transistor ST, and DCG transistor DCGT.

[0105] Each of the first active photodetector APD1, the second active photodetector APD2, the third active photodetector APD3, and the first light-shielding photodetector BPD1 can generate and accumulate photocharge corresponding to the intensity of the incident light.

[0106] For example, each of the first active photodetector APD1, the second active photodetector APD2, the third active photodetector APD3, and the first light-shielding photodetector BPD1 can be implemented as a photodiode, a phototransistor, a grating, a pinned photodiode, or a combination thereof. When the first active photodetector APD1, the second active photodetector APD2, the third active photodetector APD3, and the first light-shielding photodetector BPD1 can be implemented as a photodiode, they can be regions in a substrate portion having a first conductivity type (e.g., P-type) doped with impurities of a second conductivity type (e.g., N-type).

[0107] Each of the active transmission transistors ATT1, ATT2, and ATT3 and the light-shielding transmission transistor BTT1 can be connected between each of the first active photodetector APD1, the second active photodetector APD2, the third active photodetector APD3, and the first light-shielding photodetector BPD1 and the first floating diffusion region FD1.

[0108] The active transmission transistors ATT1, ATT2, and ATT3, and the light-shielding transmission transistor BTT1, can be turned on or off in response to transmission signals ATX1, ATX2, ATX3, and BTX1 applied to the gate electrode. When turned on, the active transmission transistors ATT1, ATT2, and ATT3, and the light-shielding transmission transistor BTT1 can transfer photocharge accumulated in the first to third active photodetectors (APD1, APD2, and APD3) and the first light-shielding photodetector BPD1, respectively, to the first floating diffusion region FD1. The source electrode of each of the active transmission transistors ATT1, ATT2, and ATT3, and the light-shielding transmission transistor BTT1 can be connected to one of the first to third active photodetectors (APD1, APD2, and APD3) and the first light-shielding photodetector BPD1, and its drain electrode can be connected to the first floating diffusion region FD1.

[0109] A reset transistor RT can be connected between a power supply voltage VDD and a first floating diffusion region FD1 and can reset the voltage of the first floating diffusion region FD1 to the power supply voltage VDD in response to a pixel reset signal RX applied to the gate electrode. The power supply voltage VDD can be applied to the source electrode of the reset transistor RT, and its drain electrode can be connected to the first floating diffusion region FD1.

[0110] The first floating diffusion region FD1 can accumulate photocharge transmitted from active transport transistors ATT1, ATT2, and ATT3, and light-shielding transport transistor BTT1. For example, the first floating diffusion region FD1 can be a region on a substrate portion having a first conductivity type (e.g., P-type) doped with an impurity of a second conductivity type (e.g., N-type), and the substrate portion and the doped region can be molded as a junction capacitor. The first floating diffusion region FD1 can be connected to the gate electrode of the driving transistor DT, the drain electrode of each of the active transport transistors ATT1, ATT2, ATT3, and BTT1, and the drain electrode of the DCG transistor DCGT.

[0111] The driving transistor DT can be connected between the power supply voltage VDD and the selection transistor ST, and can amplify the potential change of the first floating diffusion region FD1 that receives the photocharge accumulated in the photodetector PD and transmit the amplified potential to the selection transistor ST. The gate electrode of the driving transistor DT can be connected to the first floating diffusion region FD1, the power supply voltage VDD can be applied to the source electrode, and the drain electrode can be connected to the source electrode of the selection transistor ST.

[0112] The select transistor ST can be connected between the drive transistor DT and the output signal line VOL (or column line) and is turned on by applying a low select signal SX to the gate electrode to output the electrical signal transmitted from the drive transistor DT as the pixel signal Vout. The source electrode of the select transistor ST can be connected to the drain electrode of the drive transistor DT.

[0113] The DCG signal DCGX can be applied to the gate electrode of the DCG transistor DCGT, its source electrode can be connected to the DCG capacitor CDCG, and its drain electrode can be connected to the first floating diffusion region FD1.

[0114] like Figure 5 As shown, transistors ATT1, ATT2, ATT3, BTT1, RT, DT, DCGT, and ST can be implemented as n-channel metal-oxide-semiconductor (NMOS) transistors, but are not limited thereto, and can also be implemented as p-channel metal-oxide-semiconductor (PMOS) transistors.

[0115] The DCG transistor DCGT can be turned on or off in response to the DCG signal DCGX applied to its gate electrode. The DCG transistor DCGT can be turned off or on depending on whether it is in HCG or LCG mode. For example, in HCG mode, the DCG transistor DCGT can be turned off, while in LCG mode, the DCG transistor DCGT can be turned on.

[0116] The voltage of the first floating diffusion region FD1 can be determined by the amount of photocharge transmitted through the active transmission transistors ATT1, ATT2 and ATT3 and the light-shielding transmission transistor BTT1, and the voltage of the first floating diffusion region FD1 can decrease as the amount of photocharge increases.

[0117] Each of the active transmission transistors ATT1, ATT2, and ATT3, as well as the light-shielding transmission transistor BTT1, can be turned on at different timings.

[0118] Therefore, even when the first active photodetector APD1, the second active photodetector APD2, the third active photodetector APD3, and the first light-shielding photodetector BPD1 are all electrically connected to the first floating diffusion region FD1, photocharge can be independently transmitted from each of the first active photodetector APD1, the second active photodetector APD2, the third active photodetector APD3, and the first light-shielding photodetector BPD1 toward the first floating diffusion region FD1.

[0119] As a result, the space of the pixel array 110 can be used more effectively.

[0120] The DCG transistor DCGT can provide its own parasitic capacitance to the first floating diffusion region FD1, and the turned-on DCG transistor DCGT can also provide the capacitance of the DCG capacitor CDCG to the first floating diffusion region FD1.

[0121] Each of the transmission signal TX, pixel reset signal RX, line selection signal SX, and DCG signal DCGX can be received from the line driver 120 (see [link to relevant documentation]). Figure 1 (Supply, but not limited to)

[0122] Figure 6 It is along Figure 4 The cross-sectional view taken by line A-A' in the diagram.

[0123] Figure 6A cross-section of the 11th sub-active pixel AP11 and the first sub-shading pixel OBP1 is shown. The description of the 11th sub-active pixel AP11 can be applied in substantially the same manner to the other sub-active pixels AP12, AP13, AP21 to AP23, AP31 to AP33, and AP41 to AP43 of the second pixel group G2, and the description of the first sub-shading pixel OBP1 can be applied in substantially the same manner to the other sub-shading pixels OBP2, OBP3, and OBP4.

[0124] Further reference Figure 6 According to one embodiment, the pixel array 110 may include a circuit portion CG, a substrate portion SUB on the circuit portion CG, an anti-reflective layer ARP on the substrate portion SUB, a grid portion GR on the anti-reflective layer ARP, a color filter CF on the grid portion GR, a light-shielding structure BP, and microlenses ML on the color filter CF and the light-shielding structure BP.

[0125] The circuit portion CG may be disposed on the lower surface of the substrate portion SUB and may include circuitry such as transistors, line layers, and interlayer insulating layers. Figure 6 In the diagram, the circuit portion CG is shown as a single layer, but is not limited to this, and may be formed by multiple insulating layers and multiple conductive layers forming transistors and lines.

[0126] The circuit portion CG may include a substrate layer BS, a gate electrode ATG1 of a first active transmission transistor ATT1, and a gate electrode BTG1 of a first light-shielding transmission transistor BTT1.

[0127] The substrate layer BS may be formed of or include at least one insulating layer.

[0128] The gate electrode ATG1 of the first active transmission transistor ATT1 and the gate electrode BTG1 of the first light-shielding transmission transistor BTT1 can be disposed in the substrate layer BS. In this example, the upper surface of the substrate layer BS can be collinearly positioned with the upper surface of the gate electrode ATG1 of the first active transmission transistor ATT1 and the upper surface of the gate electrode BTG1 of the first light-shielding transmission transistor BTT1. However, other implementations are also possible and are not limited to this.

[0129] although Figure 6 Although not shown in the figure, the gate electrode ATG1 of the first active transmission transistor ATT1 can be directly contacted with and electrically connected to the first active photodetector APD1, and the gate electrode BTG1 of the first light-shielding transmission transistor BTT1 can be directly contacted with and electrically connected to the first light-shielding photodetector BPD1.

[0130] Each of the gate electrode ATG1 of the first active transmission transistor ATT1 and the gate electrode BTG1 of the first light-shielding transmission transistor BTT1 may extend further from the interior of the substrate layer BS along the third direction DR3 to directly contact the substrate portion SUB and the photodetector PD.

[0131] Each of the gate electrode ATG1 of the first active transmission transistor ATT1 and the gate electrode BTG1 of the first light-shielding transmission transistor BTT1 can partially overlap with one of the first active photodetector APD1 and the first light-shielding photodetector BPD1, thereby facilitating the transmission of photocharge generated from the first active photodetector APD1 and the first light-shielding photodetector BPD1.

[0132] The first floating diffusion region FD1 may be disposed between the circuit portion CG and the substrate portion SUB. The first floating diffusion region FD1 may be disposed on the substrate layer BS. The first floating diffusion region FD1 may be disposed on the gate electrode ATG1 of the first active transmission transistor ATT1 and the gate electrode BTG1 of the first light-shielding transmission transistor BTT1, but is not limited thereto.

[0133] The first floating diffusion region FD1 may overlap with the isolation portion DTI in the thickness direction (third direction DR3). The first floating diffusion region FD1 may overlap with the first active photodetector APD1 and the first light-shielding photodetector BPD1 in the thickness direction (third direction DR3). However, the arrangement of the first floating diffusion region FD1 is not limited to this.

[0134] The substrate portion SUB may be disposed on the circuit portion CG and the first floating diffusion region FD1. The substrate portion SUB may include silicon (Si). For example, the substrate portion SUB may have a first conductivity type (e.g., P-type). The first active photodetector APD1 and the first light-shielding photodetector BPD1 may be disposed in the substrate portion SUB and may have a second conductivity type (e.g., N-type).

[0135] Pixel array 110 may also include pixel region PA, light-blocking region BA, and non-pixel region NPA.

[0136] The pixel region PA is a region where active pixels AP are set and active photodetectors APD1, APD2 and APD3 are set, and the incident light can be converted into electrical signals to generate image pixel signals.

[0137] Within the light-shielding area BA, a light-shielding pixel OBP can be provided, along with a light-shielding photodetector BPD1 and a light-shielding structure BP on the photodetector BPD1. In the light-shielding area BA, incident light can be blocked from entering by the light-shielding structure BP. The light-shielding structure BP can cover the light-shielding pixel OBP and is configured to block incident light from entering the light-shielding pixel OBP.

[0138] The non-pixel region NPA can be positioned around the pixel region PA and the light-shielding region BA. Unlike the pixel region PA and the light-shielding region BA, the non-pixel region NPA is positioned so as not to include a photodetector. The non-pixel region NPA can be positioned between the pixel regions PA, between the pixel region PA and the light-shielding region BA, and between the light-shielding regions BA. The non-pixel region NPA can be positioned around the pixel region PA and the light-shielding region BA, but is not limited thereto. The non-pixel region NPA can be positioned between the active photodetectors APD1, APD2, and APD3 and the light-shielding photodetector BPD1. For example, the non-pixel region NPA can be positioned between each of the active photodetectors APD1, APD2, and APD3 and the light-shielding photodetector BPD1.

[0139] The isolation portion DTI can be disposed in the non-pixel region NPA, and can be formed by recessing at least a portion of the substrate portion SUB, but the embodiments described herein are not limited thereto. For example, in some implementations, the isolation portion DTI can completely penetrate the substrate portion SUB.

[0140] The isolation portion DTI can be formed using a deep trench isolation method. The isolation portion DTI can be filled with an insulating material and / or a conductive material. For example, examples of insulating materials may include hafnium oxide (HfO). x ), silicon dioxide (SiO) x ) or tantalum oxide (TaO) x At least one of the following. However, other implementations are also possible, and are not limited to this. Examples of conductive materials may include polysilicon, but embodiments described herein are not limited to this. For example, the isolation portion DTI may have a structure in which a conductive material is sandwiched between insulating materials, but embodiments described herein are not limited to this.

[0141] An anti-reflective layer (ARP) may be disposed on the upper surface of the substrate portion SUB. The anti-reflective layer ARP may include at least one insulating material and, for example, hafnium oxide (HfO). x ), silicon dioxide (SiO) x ) or tantalum oxide (TaO) x The embodiments described herein are not limited to any one of the following: An antireflective layer ARP can be used to allow light that has passed through a color filter CF to strike the substrate portion SUB without reflection.

[0142] In the non-pixel area (NPA), a grid portion (GR) may be disposed on the upper surface of the anti-reflective layer (ARP). The grid portion (GR) may absorb or reflect light incident on it. The grid portion (GR) may prevent light color mixing between adjacent pixel areas. The grid portion (GR) may include a light-absorbing material or a low-refractive-index layer. For example, when the grid portion (GR) includes a light-absorbing material, it may include a metallic material. The metallic material may include tungsten (W), but embodiments described herein are not limited thereto. For example, when the grid portion (GR) includes a low-refractive-index layer, it may include a low-refractive-index insulating material or an air structure.

[0143] A color filter CF can be disposed on the anti-reflective layer ARP and the grid portion GR. The color filter CF may include a red color filter, a green color filter, or a blue color filter. In some embodiments, the color filter CF may also include a white color filter.

[0144] The light-shielding structure BP can be set on the color filter CF. The light-shielding structure BP can be set in the light-shielding area BA. The light-shielding structure BP can cover the light-shielding photodetectors BPD1 to BPD4. The light-shielding structure BP can be in the thickness direction (third direction DR3, such as...) Figure 6 (As shown) overlaps with the light-shielding photodetectors BPD1 to BPD4.

[0145] The light-shielding structure BP may include a light-absorbing (blocking) material. For example, when the light-shielding structure BP includes a light-absorbing material, it may include a metallic material. The metallic material may include tungsten (W), but the embodiments described herein are not limited thereto.

[0146] In some other implementations, when the light-shielding structure BP is set in the light-shielding area BA, the color filter CF can be omitted from the light-shielding area BA.

[0147] A microlens ML can be disposed on a color filter CF and a light-shielding structure BP. The microlens ML can be used to receive light incident from the outside into the pixel region PA. In some implementations, the microlens ML can have an upwardly convex lens shape and can be formed of a material with a significantly different refractive index compared to external air. For example, the refractive index of the microlens ML can be in the range of about 1.5 to about 1.7, but is not limited thereto.

[0148] Other embodiments of this specification will be described below. In describing these other embodiments, the same reference numerals are used for reference. Figures 1 to 6 Components that have already been described, and may be omitted or briefly described with reference. Figures 1 to 6 The descriptions are basically the same.

[0149] Figure 7 This is a plan view of a pixel array according to yet another embodiment. Figure 8 yes Figure 7The circuit diagram of the first active pixel. Figure 9 yes Figure 7 The circuit diagram of the light-blocking pixel. Figure 10 It is along Figure 7 The cross-sectional view taken by line B-B' in the diagram.

[0150] Figure 7 This is an enlarged planar view of the second pixel group G2 of the pixel array 110_1 according to this embodiment.

[0151] Figure 8 A circuit diagram of the first active pixel AP1 of the second pixel group G2 according to this embodiment is shown, and its description can be applied to the second active pixel to the fourth active pixel (AP2, AP3 and AP4) in substantially the same manner.

[0152] Reference Figures 7 to 10 According to this embodiment, the pixel array 110_1 may include a floating diffusion region FD, and the floating diffusion region FD may also include a fifth floating diffusion region FD5 and a first floating diffusion region FD1 to a fourth floating diffusion region FD4.

[0153] The first floating diffusion region FD1 to the fourth floating diffusion region FD4 can be respectively set in the first active pixel AP1 to the fourth active pixel AP4. The first floating diffusion region FD1 to the fourth floating diffusion region FD4 can be respectively set to overlap with the first active pixel AP1 to the fourth active pixel AP4.

[0154] The fifth floating diffusion region FD5 can be set in the light-shielding pixel OBP_1. The fifth floating diffusion region FD5 can be set to overlap with the light-shielding pixel OBP_1.

[0155] The floating diffusion regions FD1 to FD4 shared by the sub-active pixels AP11 to AP14, AP21 to AP24, AP31 to AP34 and AP41 to AP44 of active pixels AP1, AP2, AP3 and AP4 can be different from the floating diffusion region FD5 shared by the sub-shielding pixels OBP1, OBP2, OBP3 and OBP4 of shielding pixel OBP_1 and can be set to be spaced apart from each other.

[0156] The 11th sub-active pixel AP11, the 12th sub-active pixel AP12, and the 13th sub-active pixel AP13 of the second pixel group G2 can share the first floating diffusion region FD1.

[0157] The 21st sub-active pixel AP21, the 22nd sub-active pixel AP22, and the 23rd sub-active pixel AP23 of the second pixel group G2 can share the second floating diffusion region FD2.

[0158] The 31st sub-active pixel AP31, the 32nd sub-active pixel AP32, and the 33rd sub-active pixel AP33 of the second pixel group G2 can share the third floating diffusion region FD3.

[0159] The 41st sub-active pixel AP41, the 42nd sub-active pixel AP42, and the 43rd sub-active pixel AP43 of the second pixel group G2 can share the fourth floating diffusion region FD4.

[0160] The first sub-shading pixel OBP1, the second sub-shading pixel OBP2, the third sub-shading pixel OBP3, and the fourth sub-shading pixel OBP4 of the second pixel group G2 can share the fifth floating diffusion area FD5.

[0161] Figure 8 The circuit diagram omits the first light-shielding photodetector BPD1 and the first light-shielding transmission transistor BTT1. Figure 5 The circuit diagram is basically the same in structure as the first light-shielding photodetector BPD1 and the first light-shielding transmission transistor BTT1, but the description of the rest is omitted. Figure 5 The descriptions are basically the same.

[0162] exist Figure 9 In this configuration, the first floating diffusion region FD5 can be connected to the gate electrode of the driving transistor BDT, the drain electrode of each of the transmission transistors BTT1, BTT2, BTT3 and BTT4, and the drain electrode of the DCG transistor BDCGT.

[0163] The first sub-shielded pixel OBP1 may include a first shielded photodetector BPD1, a first shielded transmission transistor BTT1, a reset transistor BRT, a fifth floating diffusion region FD5, a driving transistor BDT, a selection transistor BST, and a DCG transistor BDCGT.

[0164] The second sub-shielded pixel OBP2 may include a second shielded photodetector BDP2, a second shielded transmission transistor BTT2, a reset transistor BRT, a fifth floating diffusion region FD5, a drive transistor BDT, a select transistor BST, and a DCG transistor BDCGT.

[0165] The third sub-shielded pixel OBP3 may include a third shielded photodetector BDP3, a third shielded transmission transistor BTT3, a reset transistor BRT, a fifth floating diffusion region FD5, a drive transistor BDT, a select transistor BST, and a DCG transistor BDCGT.

[0166] The fourth sub-shielded pixel OBP4 may include a fourth shielded photodetector BDP4, a fourth shielded transmission transistor BTT4, a reset transistor BRT, a fifth floating diffusion region FD5, a drive transistor BDT, a select transistor BST, and a DCG transistor BDCGT.

[0167] The first sub-light-shielding pixels OBP1 to the fourth sub-light-shielding pixels OBP4 are electrically connected to the same fifth floating diffusion region FD5. The fifth floating diffusion region FD5 is electrically connected to the drain electrode of each of the first light-shielding transmission transistors BTT1 to the fourth light-shielding transmission transistors BTT4. The first sub-light-shielding pixels OBP1 to the fourth sub-light-shielding pixels OBP4 can share the same fifth floating diffusion region FD5.

[0168] Therefore, the first sub-light-shielding pixel OBP1 to the fourth sub-light-shielding pixel OBP4 can be electrically connected to the same driving transistor BDT, selection transistor BST, and DCG transistor BDCGT. In other words, the first sub-light-shielding pixel OBP1 to the fourth sub-light-shielding pixel OBP4 can also share the driving transistor BDT, selection transistor BST, and DCG transistor BDCGT.

[0169] The first light-shielding transmission transistors BTT1 to BTT4 can be turned on or off in response to the transmission signals BTX1 to BTX4 applied to the gate electrode, respectively. When turned on, the first light-shielding transmission transistors BTT1 to BTT4 can transfer the photocharge accumulated in the first light-shielding photodetectors BPD1 to BPD4 to the fifth floating diffusion region FD5.

[0170] The light-shielding structure BP can be configured to overlap with the light-shielding pixel OBP_1. The light-shielding structure BP can be configured to overlap with the first sub-light-shielding pixels OBP1 to the fourth sub-light-shielding pixels OBP4. The light-shielding structure BP can be configured to overlap with the first light-shielding photodetector BPD1 to the fourth light-shielding photodetector BPD4.

[0171] The light-shielding structure BP can be disposed within the light-shielding area BA. The light-shielding structure BP can also be disposed within the portion of the non-pixel area NPA located between the light-shielding areas BA, but is not limited thereto. For example, since the light-shielding structure BP is disposed only within the light-shielding area BA and not within the non-pixel area NPA located between the light-shielding areas BA, the light-shielding structures BP disposed in adjacent light-shielding areas BA can be separated.

[0172] Even in this case, since the light-blocking pixel OBP_1 is set in the effective pixel area 111 (see... Figure 3 This allows for smoother correction of the black level of active pixel APs and enables the generation of high-quality images through dark shadow correction.

[0173] In addition, the floating diffusion region FD5 shared by the sub-shading pixels OBP1 to OBP4 and the floating diffusion regions FD1 to FD4 shared by the sub-active pixels AP11 to AP14, AP21 to AP24, AP31 to AP34 and AP41 to AP44 respectively are separated to simultaneously read at least one of the shading pixels OBP_1 and the active pixels AP1 to AP4.

[0174] Figure 11 This is a plan view of a pixel array according to yet another embodiment. Figure 12 yes Figure 11 The circuit diagram of the light-blocking pixel. Figure 13 It is along Figure 11 The cross-sectional view taken from line C-C' in the diagram.

[0175] Figure 11 This is an enlarged planar view of the second pixel group G2 of the pixel array 110_2 according to this embodiment.

[0176] like Figures 11 to 13 The example shown is similar to... Figures 7 to 10 The difference in the illustrated implementation is that the first light-shielding photodetector BPD1 to the fourth light-shielding photodetector BPD4 share a single light-shielding transmission transistor BTT.

[0177] The first light-shielding photodetector BPD1 to the fourth light-shielding photodetector BPD4 can be electrically connected to the light-shielding transmission transistor BTT, and the light-shielding transmission transistor BTT can be electrically connected to the fifth floating diffusion region FD5. That is, the first light-shielding photodetector BPD1 to the fourth light-shielding photodetector BPD4 can be electrically connected to the fifth floating diffusion region FD5 through the light-shielding transmission transistor BTT.

[0178] The gate electrode BTG of the light-shielding transmission transistor BTT can be disposed in the substrate layer BS. The gate electrode BTG of the light-shielding transmission transistor BTT can be disposed across the first sub-light-shielding pixel OBP1 to the fourth sub-light-shielding pixel OBP4. The gate electrode BTG of the light-shielding transmission transistor BTT can be disposed across the light-shielding region BA and the non-pixel region NPA, but is not limited thereto.

[0179] Even in this case, since the light-blocking pixel OBP_2 is set in the effective pixel area 111 (see... Figure 3 This allows for smoother correction of the black level of active pixel APs and enables the generation of high-quality images through dark shadow correction.

[0180] In addition, since the first light-shielding photodetectors BPD1 to the fourth light-shielding photodetectors BPD4 of the first sub-light-shielding pixel OBP1 to the fourth sub-light-shielding pixel OBP4 are electrically connected to a light-shielding transmission transistor BTT, the number of noise events that may occur in the first light-shielding photodetectors BPD1 to the fourth light-shielding photodetectors BPD4 and the light-shielding transmission transistor BTT can be reduced.

[0181] With the reduction in the corresponding number of noise events, the correction process for the active pixel AP via the shaded pixel OBP_2 can be performed more smoothly, and the required time can be reduced.

[0182] Figure 14 This is a plan view of a pixel array according to yet another embodiment. Figure 15 yes Figure 14 The circuit diagram of the light-blocking pixel. Figure 16 It is along Figure 14 The cross-sectional view taken by line D-D' in the diagram.

[0183] Figure 14 This is an enlarged planar view of the second pixel group G2 of the pixel array 110_3 according to this embodiment.

[0184] like Figures 14 to 16 The example shown is similar to... Figures 11 to 13 The difference in the embodiment shown is that, according to this embodiment, the light-shielding pixel OBP_3 is formed integrally and is not divided into multiple sub-light-shielding pixels OBP1 to OBP4 (see...). Figure 11 ).

[0185] The light-shielding pixel OBP_3 may include a light-shielding photodetector BPD, a light-shielding transmission transistor BTT, a reset transistor RT, a fifth floating diffusion region FD5, a drive transistor DT, a select transistor ST, and a DCG transistor DCGT.

[0186] The fifth floating diffusion region FD5 can overlap with the light-shielding pixel OBP_3 in the thickness direction (third direction DR3). The fifth floating diffusion region FD5 can overlap with the light-shielding photodetector BPD in the thickness direction (third direction DR3).

[0187] The entire area of ​​the fifth floating diffusion region FD5 may overlap with the light-shielding region BA in the thickness direction (third direction DR3). The fifth floating diffusion region FD5 may be located within the light-shielding region BA. The fifth floating diffusion region FD5 may not overlap with the non-pixel region NPA, but is not limited to this.

[0188] Even in this case, since the light-blocking pixel OBP_3 is set in the effective pixel area 111 (see... Figure 3This allows for smoother correction of the black level of active pixel APs and enables the generation of high-quality images through dark shadow correction.

[0189] Additionally, since the light-shielding pixel OBP_3 does not include the first sub-light-shielding pixels OBP1 to the fourth sub-light-shielding pixels OBP4 (see... Figure 11 Furthermore, by forming them as a single unit, the number of noise events that may occur in the light-shielding photodetector (BPD) and the light-shielding transmission transistor (BTT) can be reduced.

[0190] With the reduction in the corresponding number of noise events, the correction process for the active pixel AP via the shaded pixel OBP_3 can be performed more smoothly, and the required time can be reduced.

[0191] Figure 17 This is a plan view of a pixel array according to yet another embodiment. Figure 18 yes Figure 17 The circuit diagram of the first active pixel. Figure 19 yes Figure 17 The circuit diagram of the light-blocking pixel. Figure 20 It is along Figure 17 The cross-sectional view taken from line E-E' in the diagram.

[0192] Figure 17 This is an enlarged planar view of the second pixel group G2 of the pixel array 110_4 according to this embodiment.

[0193] Figure 18 A circuit diagram of the first active pixel AP1_4 of the second pixel group G2 according to this embodiment is shown, and its description can be applied to the second active pixel to the fourth active pixel (AP2_4, AP3_4 and AP4_4) in substantially the same manner.

[0194] Figure 19 A circuit diagram of the light-shielding pixel OBP_4 according to this embodiment is shown, and it can be applied to... Figure 9 The circuit diagram of the light-shielding pixel OBP_1 is basically the same as that described.

[0195] like Figures 17 to 20 The example shown is similar to... Figures 7 to 10 The difference in the illustrated implementation is that the first active pixel AP1_4 of the second pixel group G2 further includes a 14th sub-active pixel AP14, the second active pixel AP2_4 of the second pixel group G2 further includes a 24th sub-active pixel AP24, the third active pixel AP3_4 of the second pixel group G2 further includes a 34th sub-active pixel AP34, and the fourth active pixel AP4_4 of the second pixel group G2 further includes a 44th sub-active pixel AP44.

[0196] The dimensions of the 14th sub-active pixel AP14, the 24th sub-active pixel AP24, the 34th sub-active pixel AP34, and the 44th sub-active pixel AP44 in the planar view may be smaller than, but not limited to, the dimensions of the remaining sub-active pixels AP11 to AP13, AP21 to AP23, AP31 to AP33, and AP41 to AP43 in the planar view.

[0197] For example, the size of the 14th sub-active pixel AP14 in the planar view may be smaller than the size of each of the 11th to 13th sub-active pixels AP13 in the planar view, the size of the 24th sub-active pixel AP24 in the planar view may be smaller than the size of each of the 21st to 23rd sub-active pixels AP23 in the planar view, the size of the 34th sub-active pixel AP34 in the planar view may be smaller than the size of each of the 31st to 33rd sub-active pixels AP33 in the planar view, and the size of the 44th sub-active pixel AP44 in the planar view may be smaller than the size of each of the 41st to 43rd sub-active pixels AP43 in the planar view.

[0198] The dimensions of the 14th sub-active pixel AP14, the 24th sub-active pixel AP24, the 34th sub-active pixel AP34, and the 44th sub-active pixel AP44 in the planar view may be smaller than, but not limited to, the dimensions of the remaining sub-active pixels AP11 to AP13, AP21 to AP23, AP31 to AP33, and AP41 to AP43 in the planar view.

[0199] For example, the size of the 14th sub-active pixel AP14 in the planar view may be different from the size of each of the 11th to 13th sub-active pixels AP13 in the planar view, the size of the 24th sub-active pixel AP24 in the planar view may be different from the size of each of the 21st to 23rd sub-active pixels AP23 in the planar view, the size of the 34th sub-active pixel AP34 in the planar view may be different from the size of each of the 31st to 33rd sub-active pixels AP33 in the planar view, and the size of the 44th sub-active pixel AP44 in the planar view may be different from the size of each of the 41st to 43rd sub-active pixels AP43 in the planar view.

[0200] The first active pixel AP1_4 to the fourth active pixel AP4_4 can be positioned around the light-shielding pixel OBP_4. The 14th sub-active pixel AP14, the 24th sub-active pixel AP24, the 34th sub-active pixel AP34, and the 44th sub-active pixel AP44 can be positioned around the light-shielding pixel OBP_4.

[0201] The light-shielding pixel OBP_4 can be surrounded by the 14th sub-active pixel AP14, the 24th sub-active pixel AP24, the 34th sub-active pixel AP34, and the 44th sub-active pixel AP44.

[0202] The 11th sub-active pixel AP11, the 12th sub-active pixel AP12, the 13th sub-active pixel AP13, and the 14th sub-active pixel AP14 of the second pixel group G2 can share the first floating diffusion region FD1.

[0203] The 21st sub-active pixel AP21, the 22nd sub-active pixel AP22, the 23rd sub-active pixel AP23, and the 24th sub-active pixel AP24 of the second pixel group G2 can share the second floating diffusion region FD2.

[0204] The 31st sub-active pixel AP31, the 32nd sub-active pixel AP32, the 33rd sub-active pixel AP33, and the 34th sub-active pixel AP34 of the second pixel group G2 can share the third floating diffusion region FD3.

[0205] The 41st sub-active pixel AP41, the 42nd sub-active pixel AP42, the 43rd sub-active pixel AP43, and the 44th sub-active pixel AP44 of the second pixel group G2 can share the fourth floating diffusion region FD4.

[0206] The first sub-shading pixel OBP1, the second sub-shading pixel OBP2, the third sub-shading pixel OBP3, and the fourth sub-shading pixel OBP4 of the second pixel group G2 can share the fifth floating diffusion area FD5.

[0207] The size of the light-blocking pixel OBP_4 in the planar view may be smaller than, but is not limited to, each of the first active pixels AP1_4 to the fourth active pixels AP4_4 in the second pixel group G2. The size of one of the first sub-light-blocking pixels OBP1 to the fourth sub-light-blocking pixels OBP4 of the light-blocking pixel OBP_4 in the planar view may be smaller than, but is not limited to, the size of one of the sub-active pixels AP11 to AP14, AP21 to AP24, AP31 to AP34, and AP41 to AP44 in the planar view.

[0208] The light-shielding pixel OBP_4 may overlap with the fifth floating diffusion region FD5 in the thickness direction (third direction DR3) and may not overlap with the first floating diffusion region FD1 to the fourth floating diffusion region FD4 in the thickness direction (third direction DR3).

[0209] In the plan view, the 14th sub-active pixel AP14, the 24th sub-active pixel AP24, the 34th sub-active pixel AP34 and the 44th sub-active pixel AP44 can be set between the light-shielding pixel OBP_4 and the first floating diffusion area FD1 to the fourth floating diffusion area FD4.

[0210] exist Figure 18 In the above, the 14th sub-active pixel AP14 may include a fourth active photodetector APD4, a fourth active transmission transistor ATT4, a reset transistor RT, a first floating diffusion region FD1, a drive transistor DT, a select transistor ST, and a DCG transistor DCGT.

[0211] The 11th to 14th sub-active pixels (AP11, AP12, AP13, and AP14) can be electrically connected to the same first floating diffusion region FD1. The 11th to 14th sub-active pixels (AP11, AP12, AP13, and AP14) can share the same first floating diffusion region FD1.

[0212] Therefore, the 11th to 14th sub-active pixels (AP11, AP12, AP13, and AP14) can be electrically connected to the same drive transistor DT, select transistor ST, and DCG transistor DCGT. In other words, the 11th to 14th sub-active pixels (AP11, AP12, AP13, and AP14) can also share the drive transistor DT, select transistor ST, and DCG transistor DCGT.

[0213] Each of the first active photodetector APD1, the second active photodetector APD2, the third active photodetector APD3, and the fourth active photodetector APD4 can generate and accumulate photocharge corresponding to the intensity of the incident light.

[0214] Each of the active transmission transistors ATT1, ATT2, ATT3 and ATT4 can be connected between each of the first active photodetector APD1, the second active photodetector APD2, the third active photodetector APD3 and the fourth active photodetector APD4 and the first floating diffusion region FD1.

[0215] The active transfer transistors ATT1, ATT2, ATT3 and ATT4 can be turned on or off in response to the transfer signals ATX1, ATX2, ATX3 and ATX4 applied to the gate electrode, and the active transfer transistors ATT1, ATT2, ATT3 and ATT4 can transfer the photocharge accumulated in the first active photodetector to the fourth active photodetector (APD1, APD2, APD3 and APD4) to the first floating diffusion region FD1.

[0216] exist Figure 19In the middle, the fifth floating diffusion region FD5 can be connected to the gate electrode of the driving transistor BDT, the drain electrode of each of the transmission transistors BTT1, BTT2, BTT3 and BTT4, and the drain electrode of the DCG transistor BDCGT of the light-shielding pixel OBP_5.

[0217] The first sub-light-shielding pixels OBP1 to the fourth sub-light-shielding pixels OBP4 are electrically connected to the same fifth floating diffusion region FD5. The fifth floating diffusion region FD5 is electrically connected to the drain electrode of each of the first light-shielding transmission transistors BTT1 to the fourth light-shielding transmission transistors BTT4. The first sub-light-shielding pixels OBP1 to the fourth sub-light-shielding pixels OBP4 can share the same fifth floating diffusion region FD5.

[0218] Even in this case, since the light-blocking pixel OBP_4 is set in the effective pixel area 111 (see... Figure 3 This allows for smoother correction of the black level of active pixel APs and enables the generation of high-quality images through dark shadow correction.

[0219] Furthermore, since the first active pixel AP1_4 to the fourth active pixel AP4_4 of the second pixel group G2 also includes a 14th sub-active pixel AP14, a 24th sub-active pixel AP24, a 34th sub-active pixel AP34, and a 44th sub-active pixel AP44, the pixel area PA can be further increased. Therefore, since the area where external light is incident can be increased, even when the light-shielding pixel OBP is set in the effective pixel area 111, the degradation of the image quality of the image sensing device 100 can be minimized (see...). Figure 1 ).

[0220] Figure 21 This is a plan view of a pixel array according to yet another embodiment. Figure 22 yes Figure 21 The circuit diagram of the light-blocking pixel. Figure 23 It is along Figure 21 The cross-sectional view taken by line F-F' in the diagram.

[0221] Figure 21 This is an enlarged planar view of the second pixel group G2 of the pixel array 110_5 according to this embodiment.

[0222] like Figures 21 to 23 The example shown is similar to... Figures 17 to 20 The difference in the embodiment shown is that, according to this embodiment, the light-shielding pixel OBP_5 is formed integrally and is not divided into multiple sub-light-shielding pixels OBP1 to OBP4 (see...). Figure 17 ).

[0223] The light-shielding pixel OBP_5 may include a light-shielding photodetector BPD, a light-shielding transmission transistor BTT, a reset transistor RT, a fifth floating diffusion region FD5, a drive transistor DT, a select transistor ST, and a DCG transistor DCGT.

[0224] The light-shielding transmission transistor BTT can be disposed between the light-shielding photodetector BPD and the fifth floating diffusion region FD5. The light-shielding transmission transistor BTT can electrically connect the light-shielding photodetector BPD and the fifth floating diffusion region FD5.

[0225] The fifth floating diffusion region FD5 can overlap with the light-shielding pixel OBP_5 in the thickness direction (third direction DR3). The fifth floating diffusion region FD5 can overlap with the light-shielding photodetector BPD in the thickness direction (third direction DR3).

[0226] The entire area of ​​the fifth floating diffusion region FD5 may overlap with the light-shielding region BA in the thickness direction (third direction DR3). The fifth floating diffusion region FD5 may be located within the light-shielding region BA. The fifth floating diffusion region FD5 may not overlap with the non-pixel region NPA, but is not limited to this.

[0227] Even in this case, since the light-blocking pixel OBP_5 is set in the effective pixel area 111 (see... Figure 3 This allows for smoother correction of the black level of active pixel APs and enables the generation of high-quality images through dark shadow correction.

[0228] Additionally, since the light-shielding pixel OBP_5 does not include the first sub-light-shielding pixels OBP1 to the fourth sub-light-shielding pixels OBP4 (see... Figure 11 Furthermore, by forming them as a single unit, the number of noise events that may occur in the light-shielding photodetector (BPD) and the light-shielding transmission transistor (BTT) can be reduced.

[0229] With the reduction in the corresponding number of noise events, the correction process for the active pixel AP via the shaded pixel OBP_5 can be performed more smoothly, and the required time can be reduced.

[0230] Although embodiments have been described above with reference to the accompanying drawings, those skilled in the art will understand that the above technical configurations can be implemented in other forms. Therefore, it should be understood that the above embodiments are illustrative in all respects and not restrictive, and various modifications or enhancements to the disclosed embodiments and other embodiments can be designed based on the description and / or illustrations in this patent document.

[0231] Cross-references to related applications

[0232] This patent document claims priority to Korean Patent Application No. 10-2025-0047302, filed on April 11, 2025, the entire contents of which are incorporated herein by reference for all purposes.

Claims

1. An image sensing device, the image sensing device comprising: Multiple active pixels, each of the multiple active pixels including multiple sub-active pixels; A light-shielding pixel, wherein the light-shielding pixel is disposed between the plurality of active pixels and includes at least one sub-light-shielding pixel; as well as A floating diffusion region, which is shared by at least one sub-shadowing pixel and at least one of the plurality of sub-active pixels.

2. The image sensing device according to claim 1, further comprising a light-shielding structure. in, Each of the plurality of sub-active pixels includes an active photodetector, and The at least one sub-shading pixel includes a shading photodetector.

3. The image sensing device according to claim 2, wherein, The active photodetector and the light-shielding photodetector are disposed in the substrate. The light-shielding structure is disposed on the substrate and overlaps with the light-shielding photodetector.

4. The image sensing device according to claim 3, further comprising a circuit disposed below the substrate. in, The floating diffusion region is disposed between the substrate and the circuit.

5. The image sensing device according to claim 3, wherein, The substrate is doped with impurities having a first conductivity type, and The floating diffusion region is doped with impurities having a second conductivity type different from the first conductivity type.

6. The image sensing device according to claim 2, wherein, Each of the plurality of sub-active pixels further includes an active transmission transistor, the active transmission transistor being connected between the active photodetector and the floating diffusion region, and The at least one sub-shading pixel further includes a shading transmission transistor connected between the shading photodetector and the floating diffusion region.

7. The image sensing device according to claim 1, further comprising an image pixel region and a dummy pixel region disposed around the image pixel region. in, The plurality of active pixels and the light-blocking pixels are disposed in the image pixel area.

8. The image sensing device according to claim 1, wherein, The plurality of active pixels includes the first active pixel to the fourth active pixel. The at least one sub-shading pixel includes a first sub-shading pixel to a fourth sub-shading pixel. The floating diffusion region includes the first floating diffusion region to the fourth floating diffusion region. Each of the first active pixel to the fourth active pixel includes a first sub-active pixel to a third sub-active pixel. The first sub-active pixels to the third sub-active pixels of the first active pixel and the first sub-shading pixel share the first floating diffusion region. The first to third sub-active pixels of the second active pixel and the second sub-light-shielding pixel share the second floating diffusion area. The first to third sub-active pixels and the third sub-shading pixel of the third active pixel share the third floating diffusion area, and The first to third sub-active pixels of the fourth active pixel and the fourth sub-shading pixel share the fourth floating diffusion region.

9. The image sensing device according to claim 8, wherein, The first to third sub-active pixels of each of the first to fourth active pixels are configured to surround the light-shielding pixel in a planar view.

10. An image sensing device, the image sensing device comprising: An image pixel region, the image pixel region including active pixels and light-blocking pixels, the active pixels including multiple sub-active pixels; A dummy pixel region is set around the image pixel region; A first floating diffusion region, which is shared by the plurality of sub-active pixels; as well as A second floating diffusion region is separated from the first floating diffusion region and electrically connected to the light-shielding pixel.

11. The image sensing device according to claim 10, wherein, The light-shielding pixel includes multiple sub-light-shielding pixels, and the multiple sub-light-shielding pixels share the second floating diffusion area.

12. The image sensing device according to claim 11, wherein, Each of the plurality of sub-shading pixels includes: Light-shielding photodetector; and A light-shielding transmission transistor is connected between the light-shielding photodetector and the second floating diffusion region.

13. The image sensing device according to claim 12, wherein, In the planar view, at least one of the plurality of sub-active pixels is disposed between the first floating diffusion region and the second floating diffusion region.

14. The image sensing device according to claim 11, wherein, Each of the plurality of sub-shading pixels includes a shading photodetector, and The light-shielding pixel further includes a light-shielding transmission transistor, which is shared by the light-shielding photodetector of each of the plurality of sub-light-shielding pixels.

15. The image sensing device according to claim 14, wherein, The light-shielding transmission transistor is connected between the light-shielding photodetector of each of the plurality of sub-light-shielding pixels and the second floating diffusion region.

16. The image sensing device according to claim 15, wherein, In the planar view, at least one of the plurality of sub-active pixels is disposed between the first floating diffusion region and the second floating diffusion region.

17. The image sensing device according to claim 10, wherein, The light-blocking pixels include: A light-shielding photodetector; and A light-shielding transmission transistor is connected between the light-shielding photodetector and the second floating diffusion region.

18. The image sensing apparatus according to claim 10, wherein, In a planar view, at least one of the plurality of sub-active pixels has a shape different from the remaining sub-active pixels.

19. The image sensing device according to claim 10, wherein, In a planar view, at least one of the plurality of sub-active pixels has a different size than the remaining sub-active pixels.

20. The image sensing device according to claim 10, wherein, The light-shielding pixel includes multiple sub-light-shielding pixels, and the multiple sub-light-shielding pixels share the second floating diffusion area, and The size of one of the plurality of sub-shading pixels is smaller than the size of one of the plurality of sub-active pixels.

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