A photoelectric synaptic device based on two-dimensional materials CuInP2S6 / WS2 / graphene

Abstract

This invention discloses a photoelectric synaptic device based on the two-dimensional material CuInP2S6 / WS2 / graphene. It comprises, from bottom to top, a Si / SiO2 substrate, a chromium / gold bottom electrode, two-dimensional material CuInP2S6 layers, a WS2 layer, a graphene layer, and a chromium / gold top electrode, with each layer in contact with its adjacent material. Utilizing the ion migration characteristics, tunable bandgap, high carrier mobility, and good chemical stability of two-dimensional materials, this device successfully simulates electrical synaptic plasticity under electrical pulse stimulation, achieving short-term memory functionality and optical synaptic plasticity in the visible light band. This research not only provides a novel device design approach for neuromorphic computing but also lays a solid foundation for the next step of developing efficient and scalable neuromorphic hardware.

Description

Technical Field

[0001] This invention relates to the field of two-dimensional materials and synaptic devices, specifically to a photoelectric synaptic device based on the two-dimensional material CuInP2S6 / WS2 / graphene. Background Technology

[0002] Neuromorphic computing is a novel computing paradigm that simulates the information processing mechanism of biological nervous systems. By constructing device structures similar to neurons and synapses, it achieves integrated information storage and computation, thereby effectively overcoming the data transmission bottleneck and high energy consumption problems caused by the "separation of storage and computation" in the traditional von Neumann architecture.

[0003] As core units in neuromorphic computing systems, artificial synaptic devices need to possess plasticity behaviors similar to biological synapses, such as short-term synaptic plasticity (STP), long-term synaptic plasticity (LTP), and pulse-dependent modulation characteristics. Currently, artificial synaptic devices based on resistive random access memory (RRAM), phase-change memory (PCM), and field-effect transistors (FETs) have been extensively studied. However, most of these devices rely on purely electrical signal modulation, making it difficult to achieve direct response to optical signals, thus limiting their application in vision-like systems and optoelectronic fusion neural networks. Furthermore, traditional devices generally suffer from high power consumption, complex structures, and limited scalability.

[0004] The unique physicochemical and optical properties of two-dimensional (2D) materials offer abundant opportunities for neuromorphic computing. 2D materials are not only diverse, including metals, semiconductors, and insulators, but also easily constructed into heterogeneous structures, enabling them to meet the design requirements of various neuromorphic computing devices. Furthermore, the ultrathin nature of 2D materials facilitates device miniaturization, and their excellent thermal conductivity helps improve heat dissipation efficiency. Optoelectronic synaptic devices based on 2D materials exhibit richer functionality than traditional electrical synapses because they can simultaneously respond to electrical and optical signals.

[0005] In summary, current artificial synaptic devices have the following problems:

[0006] 1) Most artificial synapses can only perform electrical modulation and lack direct optical response capability. Optical signals need to be converted into electrical signals by photodetectors first, which leads to complex system structure and increases latency and power consumption during data conversion.

[0007] 2) Existing optoelectronic synaptic devices generally suffer from high power consumption. Many optoelectronic synaptic devices rely on high bias voltage, continuous electric field drive, or complex gate control structure to obtain a significant photoresponse, resulting in high energy consumption per synaptic event. This is still far from the energy consumption level of biological synapses, which is about 10-100 femtojoules, making it unfavorable for building large-scale neural networks.

[0008] 3) Many two-dimensional ferroelectric material photoelectric synapses have limited light absorption range, which limits the application of the devices in artificial vision, image recognition, and visible light neural networks.

[0009] 4) Complex device structure hinders high-density integration. Currently, many optoelectronic synthesizers employ multi-terminal transistors, dual-gate structures, floating-gate structures, and external memory cells, which present problems such as complex fabrication processes, high manufacturing costs, low integration density, and difficulty in large-scale arraying. Summary of the Invention

[0010] Based on the above analysis, this invention proposes a photoelectric synaptic device based on two-dimensional material CuInP2S6 / WS2 / graphene. Utilizing the ion migration characteristics of CuInP2S6 and the narrow bandgap characteristics of WS2, the CuInP2S6 / WS2 / graphene device can not only operate in electrical mode, but also work in optical mode in the visible light band.

[0011] The technical solution of the present invention is as follows:

[0012] This invention discloses a photoelectric synapse device based on two-dimensional material CuInP2S6 / WS2 / graphene, which includes a Si / SiO2 substrate, a chromium / gold bottom electrode, a two-dimensional material CuInP2S6 layer, a WS2 layer, a graphene layer, and a chromium / gold top electrode stacked from bottom to top, with each material layer in contact with the adjacent material.

[0013] As a further improvement, the Si / SiO2 substrate of the present invention has a thickness between 250-300 nm, with SiO2 on top of Si, and the substrate needs to be in contact with the chromium / gold base electrode.

[0014] As a further improvement, the two-dimensional material layer described in this invention is CuInP2S6 / WS2 / graphene, with CuInP2S6, WS2, and graphene arranged from bottom to top. The graphene serves as a transparent electrode and needs to be in contact with the chromium / gold top electrode.

[0015] As a further improvement, the two-dimensional materials CuInP2S6, WS2, and graphene described in this invention are all obtained by mechanical exfoliation and then sequentially stacked on the bottom electrode by dry transfer. The transfer operation is completed on a two-dimensional material transfer platform.

[0016] As a further improvement, the thicknesses of the two-dimensional materials CuInP2S6, WS2, and graphene described in this invention are 50-100 nm, 5-10 nm, and 5-10 nm, respectively.

[0017] As a further improvement, the bottom electrode of the present invention is chromium / gold, with a chromium thickness of 5-10 nm and a gold thickness of 10-50 nm, and the gold is plated on top of the chromium to form the bottom electrode together.

[0018] As a further improvement, the top electrode of the present invention is chromium / gold, with a chromium thickness of 5-10 nm and a gold thickness of 10-50 nm. The gold is plated on top of the chromium, together forming the top electrode. The distance between the top electrode and the bottom electrode is 20-50 micrometers.

[0019] This invention provides a photoelectric synaptic device based on two-dimensional materials CuInP2S6 / WS2 / graphene. It comprises, from bottom to top, a Si / SiO2 substrate, a chromium / gold bottom electrode, two-dimensional CuInP2S6 layers, a WS2 layer, a graphene layer, and a chromium / gold top electrode, with each layer in contact with its adjacent layer. Utilizing the ion migration characteristics, tunable bandgap, high carrier mobility, and good chemical stability of two-dimensional materials, this device successfully simulates electrical synaptic plasticity under electrical pulse stimulation, achieving short-term memory functionality and optical synaptic plasticity in the visible light band. This research not only provides a novel device design approach for neuromorphic computing but also lays a solid foundation for the development of efficient and scalable neuromorphic hardware.

[0020] Compared with existing devices, the present invention has the following advantages:

[0021] 1. Utilizing the ion migration properties of CuInP2S6 and the photoconductive effect of the narrow bandgap of WS2, the CuInP2S6 / WS2 / graphene device can operate not only in electrical mode but also in optical mode within the visible light band, without the need for an additional photodetector. This device employs a vertical heterostructure of CuInP2S6 / WS2 / graphene, achieving complementary advantages of each functional material. CuInP2S6 serves as the ion control layer, dynamically adjusting the carrier concentration and interfacial barrier of WS2 through Cu⁺ ion migration, thus achieving electrical synaptic plasticity. WS2 acts as the light absorption layer, efficiently absorbing visible light and generating photogenerated carriers using its moderate bandgap. Graphene serves as the transparent conductive electrode, possessing both high transmittance and high carrier mobility, enabling rapid collection of photogenerated electrons while ensuring effective light incidence. The three components are stacked in the order of CuInP2S6 / WS2 / graphene, which not only ensures that CuInP2S6 and WS2 directly form a heterojunction to achieve synergistic coupling of ion regulation and photoconductivity, but also utilizes interface traps to achieve effective separation of photogenerated carriers and optical gain, thereby simultaneously obtaining electrical and optical synaptic plasticity. This characteristic effectively overcomes the limitation of CuInP2S6-based synaptic devices in terms of light absorption wavelength and significantly expands the optoelectronic application range of the device.

[0022] 2. The device's ultra-low current characteristics and fast pulse response performance result in energy consumption as low as femtojoules per pulse, achieving an ideal state close to the energy consumption level of biological synapses. This ultra-low energy consumption not only significantly reduces the power consumption required for device operation but also provides technical support for building efficient, low-power neuromorphic computing systems.

[0023] 3. Due to the adoption of a two-dimensional van der Waals heterostructure of CuInP2S6 / WS2 / graphene, it has advantages such as no lattice matching constraints, a thickness of only tens of nanometers, easy flexible integration, and easy three-dimensional stacking. Compared with traditional silicon devices, it is more suitable for integrating neural network arrays. Attached Figure Description

[0024] Figure 1 This is a structural diagram of the photoelectric synaptic device based on CuInP2S6 / WS2 / graphene in this invention;

[0025] In the figure, 1 is the Si / SiO2 substrate, 2 is the chromium / gold bottom electrode, 3 is the CuInP2S6 layer, 4 is the WS2 layer, 5 is the graphene layer, and 6 is the chromium / gold top electrode.

[0026] Figure 2 The image shows the IV curves of the CuInP2S6 / WS2 / graphene device under different scanning voltage ranges.

[0027] Figure 3 The multi-pulse response behavior of the CuInP2S6 / WS2 / graphene device under different pulse amplitudes is shown in the figure.

[0028] Figure 4 This is a schematic diagram of the mechanism of CuInP2S6 / WS2 / graphene electrical synapse.

[0029] Figure 5 The image shows the IV characteristics of the CuInP2S6 / WS2 / graphene device under laser irradiation at different wavelengths.

[0030] Figure 6 The time-varying graphs of the aftersynaptic current of CuInP2S6 / WS2 / graphene devices under different bias conditions;

[0031] Figure 7 This is a schematic diagram showing the effect of the optical power and bias voltage of the optical pulse on the amplitude of the synaptic current in the CuInP2S6 / WS2 / graphene device.

[0032] Figure 8 This diagram illustrates the "learning-forgetting-relearning-forgetting" process of CuInP2S6 / WS2 / graphene devices.

[0033] Figure 9This is a schematic diagram illustrating the working principle of a CuInP2S6 / WS2 / graphene optical synapse device. Detailed Implementation

[0034] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to specific embodiments and accompanying drawings.

[0035] Figure 1 This is a structural diagram of the CuInP2S6 / WS2 / graphene-based photoelectric synapse device of the present invention; it includes, from bottom to top, a Si / SiO2 substrate 1, a chromium / gold bottom electrode 2, a two-dimensional material CuInP2S6 layer 3, a WS2 layer 4, a graphene layer 5, and a chromium / gold top electrode 6, each layer of material being in contact with adjacent materials. The CuInP2S6 / WS2 / graphene photoelectric synapse device of this embodiment includes: a SiO2 / Si substrate 1, a chromium / gold bottom electrode 2, a CuInP2S6 layer 3, a WS2 layer 4, a graphene layer 5, and a chromium / gold top electrode 6. The Si / SiO2 substrate 1 has a thickness of 250-300 nm, with SiO2 on top of Si, and the substrate needs to be in contact with the chromium / gold bottom electrode 2. The two-dimensional material layer is CuInP2S6 / WS2 / graphene, arranged from bottom to top as CuInP2S6, WS2, and graphene. Graphene serves as a transparent electrode and needs to be in contact with the chromium / gold top electrode 6. All three two-dimensional materials are obtained by mechanical exfoliation and are sequentially stacked on the bottom electrode by dry transfer. The transfer operation is completed on a two-dimensional material transfer platform, with thicknesses of 50-100 nm, 5-10 nm, and 5-10 nm, respectively. The bottom electrode is chromium / gold, with chromium having a thickness of 5-10 nm and gold having a thickness of 10-50 nm. Gold is plated on top of chromium, together forming the bottom electrode. The top electrode is also chromium / gold, with chromium having a thickness of 5-10 nm and gold having a thickness of 10-50 nm. Gold is plated on top of chromium, together forming the top electrode. The distance between the top electrode and the bottom electrode is 20-50 micrometers.

[0036] In the examples provided in this invention, a prototype photoelectric synapse device was fabricated using CuInP2S6 / WS2 / graphene. This not only achieved significant short-term electrical synaptic plasticity, but also demonstrated the device's response characteristics and synaptic plasticity under visible light pulse stimulation, revealing its potential in simulating the function of biological neural synapses.

[0037] The principle of electrical synapses:

[0038] When an upward external electric field is applied, Cu +Ions migrate towards the WS2 side, thereby introducing more electrons into the WS2 layer 4. Since WS2 is an n-type semiconductor, the increased carrier concentration causes it to transition to a more conductive state. Simultaneously, the bias voltage lowers the energy barrier between CuInP2S6 and WS2. This process indicates that when the positive voltage applied to the bottom electrode exceeds the Cu... + At the threshold voltage for ion migration, a sharp increase in current occurs. Conversely, when a negative voltage is applied to the bottom electrode, Cu... + Ions migrate to the bottom electrode side, depleting the electrons in WS2 and causing WS2 to become a high-resistivity state. At the same time, the bias voltage raises the energy barrier between CuInP2S6 and WS2, so that under the same bias voltage, the device under negative bias remains in a high-resistivity state and cannot generate a turn-on current.

[0039] The principle of photosynapses:

[0040] When the incident photon energy is less than the band gap of CuInP2S6, the photon can only be absorbed by WS2. After the photon energy is absorbed, a large number of electron-hole pairs are generated in WS2 layer 4 through photoconductivity. These photogenerated carriers are rapidly separated under the drive of an external electric field. Electrons are accelerated and injected into the graphene electrode, while holes cannot easily migrate to CuInP2S6 layer 3 due to the potential barrier between CuInP2S6 and WS2. Instead, these holes are trapped in a trap state at the interface, resulting in an optical gain mechanism inside the device. The trapping effect prolongs the carrier lifetime, thereby increasing the optical gain. When the optical stimulation stops, the photogenerated carriers trapped at the interface are gradually released, causing the photocurrent to slowly decay to its initial state, thus exhibiting the memory degradation process.

[0041] Figure 2 The IV curves of the CuInP2S6 / WS2 / graphene device are shown under different scan voltage ranges (±1.0, ±1.5, ±2.0V). The scan path is 0→+Vmax→0→-Vmax→0, with a voltage interval of 0.1V and a measurement time of 200 ms for each measurement point. When the scan voltage reaches ±2.0V, the IV curve of the device exhibits significant rectification behavior. In the forward bias region, due to Cu... + Due to the ion migration effect, the current increases sharply and forms a counterclockwise hysteresis curve; while in the negative bias region, the increase in current is significantly smaller. This rectification behavior can be attributed to the asymmetric structure of the device and the interfacial barrier between CuInP2S6 and WS2.

[0042] Figure 3This study demonstrates the dynamic modulation behavior of a CuInP2S6 / WS2 / graphene device under the influence of multiple consecutive electrical pulses. The intensity of the postsynaptic current is modulated by the number of pulses, and the synaptic weight gradually increases under the influence of multiple pulses, indicating that the device can effectively simulate the short-term synaptic plasticity effect of biological neural synapses. With increasing pulse amplitude, the response amplitude of the postsynaptic current also significantly increases, suggesting that higher pulse voltages can accelerate the migration process of Cu+ ions, thereby achieving dynamic modulation of the synaptic weight.

[0043] Figure 4 The working mechanism of the CuInP2S6 / WS2 / graphene electrical synapse is illustrated using a band structure diagram. Figure 4 As shown in (a), when an upward external electric field is applied, Cu + Ions migrate towards the WS2 side, thereby introducing more electrons into the WS2 layer 4. Since WS2 is an n-type semiconductor, the increase in carrier concentration causes it to transition to a more conductive state. Simultaneously, the bias voltage lowers the energy barrier between CuInP2S6 and WS2. This process indicates that when the positive voltage applied to the bottom electrode exceeds the Cu... + When the threshold voltage for ion migration is reached, a sharp increase in current occurs. For example... Figure 4 As shown in (b), when a negative voltage is applied to the bottom electrode, Cu + Ions migrate to the bottom electrode side, depleting the electrons in WS2 and causing WS2 to become a high-resistivity state. At the same time, the bias voltage raises the energy barrier between CuInP2S6 and WS2, so that under the same bias voltage, the device under negative bias remains in a high-resistivity state and cannot generate a turn-on current.

[0044] Figure 5 The IV characteristic curves of the CuInP2S6 / WS2 / graphene device under laser illumination at wavelengths of λ = 532 nm and λ = 405 nm are shown. In the dark, the device exhibits significant rectification characteristics, i.e., no current conduction in the negative bias region. Upon illumination, the device generates a significant photocurrent in the negative bias scanning region, with the amplitude exceeding that in the positive bias region and exhibiting a counterclockwise hysteresis. (Comparison...) Figure 5(a) and (b) show that different wavelengths of laser light have different effects on the IV characteristics of the device. Laser light with a wavelength of λ = 532 nm cannot be absorbed by CuInP2S6, and the device's photoresponse originates entirely from layer 4 of WS2. Laser light with a wavelength of λ = 405 nm, however, can be directly absorbed by CuInP2S6, simultaneously generating photoconductive effects in CuInP2S6 layer 3 and WS2 layer 4. In this case, the generated photogenerated carriers are effectively separated throughout the device, allowing the photocurrent to turn on without a significant threshold voltage limitation. Furthermore, when the scan ends and the bias voltage returns to 0 V, a short-circuit current is generated in the device due to the photovoltaic effect of CuInP2S6.

[0045] Figure 6 The time-dynamics of the photoelectric response of a CuInP2S6 / WS2 / graphene device under different bias voltages and illumination with a laser of wavelength λ = 532 nm are demonstrated. With increasing illumination time, the photocurrent of the device gradually increases and does not exhibit saturation within 20 seconds, indicating the generation of an optical gain mechanism within the device during illumination. After the laser is turned off, the photocurrent does not disappear immediately but undergoes a decay process of 2-3 seconds before gradually returning to its initial state. Experimental results show that the device possesses strong time-dynamic response capability, and the photocurrent decay process exhibits a short-term memory effect.

[0046] Figure 7 The study demonstrates the postsynaptic currents generated by a CuInP2S6 / WS2 / graphene device under different power and bias voltage light pulse sequences. (Example:) Figure 7 As shown, with the increase of optical power or applied bias voltage of the light pulse, the postsynaptic current generated by the device also shows a significant enhancement after 20 light pulse irradiations. This indicates that the photosynaptic plasticity of the device is affected not only by the number of light pulses, but also by the precise adjustment of the pulse amplitude and external bias voltage.

[0047] Figure 8 This study demonstrates the dynamic behavior of a CuInP2S6 / WS2 / graphene optosynaptic device exhibiting a "learning-forgetting-relearning-forgetting" cycle. In this process, the increase in postsynaptic current induced by pulses under illumination is considered the "learning" process, while the gradual decay of the postsynaptic current under off-light conditions is considered the "forgetting" process. Figure 8As shown, during the initial learning phase, stimulation with 16 light pulses gradually increased the postsynaptic current, eventually reaching 160 pA. However, after the light stimulation was removed, the postsynaptic current rapidly decayed and returned to its initial state. After the second light-on, i.e., the relearning process, the postsynaptic current rapidly increased to 160 pA after only 5 light pulses, reaching the same level as the first learning phase. This phenomenon indicates that after one learning and forgetting cycle, the device's sensitivity to light stimulation is enhanced, making the relearning process more efficient.

[0048] Figure 9 The working mechanism of the CuInP2S6 / WS2 / graphene photoelectric synapse is illustrated using a schematic diagram of the band structure. When the device is irradiated with laser light of wavelength λ = 532 nm or 635 nm, the photon energy is less than the band gap of CuInP2S6, so the photons can only be absorbed by WS2. After the photon energy is absorbed, a large number of electron-hole pairs are generated in WS2 layer 4 through photoconductivity. These photogenerated carriers are rapidly separated under the drive of an applied electric field. Electrons are accelerated and injected into the graphene electrode, while holes cannot easily migrate to CuInP2S6 layer 3 due to the potential barrier between CuInP2S6 and WS2. Instead, these holes are trapped in a trap state at the interface, leading to an optical gain mechanism inside the device, such as... Figure 9 As shown in (b), the trapping effect prolongs the carrier lifetime, thereby increasing the optical gain. Therefore, under continuous illumination, the photocurrent increases over time due to the gradual accumulation of trapped holes at the interface. When the light stimulation stops, the photogenerated carriers trapped at the interface are gradually released, causing the photocurrent to slowly decay back to its initial state, thus exhibiting the memory degradation process. When the applied bias voltage exceeds 1.5 V, a downward built-in electric field is generated at the interface due to the continuous accumulation of holes. The direction of this built-in electric field is consistent with the direction of the applied electric field. The superposition of the two enhances the total electric field strength, and the enhanced electric field will exceed the Cu... + The threshold for ion migration will significantly reduce the voltage across CuInP2S6 layer 3.

[0049] The foregoing is a detailed description of the preferred embodiment of the present invention. However, it is obvious that those skilled in the art can make non-substantial changes in form and content based on the above steps without departing from the scope of the present invention. Therefore, the present invention is not limited to the specific forms and details described above.

Claims

1. A photoelectric synaptic device based on two-dimensional materials CuInP2S6 / WS2 / graphene, characterized in that, It includes a Si / SiO2 substrate, a chromium / gold bottom electrode, a two-dimensional material CuInP2S6 layer, a WS2 layer, a graphene layer, and a chromium / gold top electrode stacked from bottom to top, with each material layer in contact with the adjacent material.

2. The photoelectric synapse device as described in claim 1, characterized in that, The thickness of the Si / SiO2 substrate is between 250-300 nm, with SiO2 on top of Si, and the substrate needs to be in contact with the chromium / gold base electrode.

3. The photoelectric synapse device as described in claim 1 or 2, characterized in that, The two-dimensional material layer is CuInP2S6 / WS2 / graphene, with CuInP2S6, WS2, and graphene arranged from bottom to top. The graphene serves as a transparent electrode and needs to be in contact with the chromium / gold top electrode.

4. The photoelectric synapse device as described in claim 3, characterized in that, The two-dimensional materials CuInP2S6, WS2, and graphene were obtained by mechanical exfoliation and then sequentially stacked on the bottom electrode by dry transfer. The transfer operation was completed on a two-dimensional material transfer platform.

5. The photoelectric synapse device as described in claim 4, characterized in that, The thicknesses of the two-dimensional materials CuInP2S6, WS2, and graphene are 50-100 nm, 5-10 nm, and 5-10 nm, respectively.

6. The photoelectric synaptic device as described in claim 1, 2, 4, or 5, characterized in that, The bottom electrode is chromium / gold, with a chromium thickness of 5-10 nm and a gold thickness of 10-50 nm. The gold is plated on top of the chromium, together forming the bottom electrode.

7. The photoelectric synapse device as described in claim 6, characterized in that, The top electrode is chromium / gold, with a chromium thickness of 5-10 nm and a gold thickness of 10-50 nm. The gold is plated on top of the chromium, together forming the top electrode. The distance between the top electrode and the bottom electrode is 20-50 micrometers.

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