Micro light emitting chip and method for manufacturing the same

Abstract

This invention discloses a micro-light-emitting chip and its fabrication method. The fabrication method includes: bonding a display functional layer to a driving substrate; the display functional layer comprising a first semiconductor layer, a light-emitting layer, and a second semiconductor layer stacked thereon; the first semiconductor layer being disposed between the driving substrate and the light-emitting layer; etching a portion of the second semiconductor layer using a dry etching process to form a first mesa; etching the remaining second semiconductor layer, the light-emitting layer, and at least a portion of the first semiconductor layer using a wet etching process to form a second mesa; the top surface of the second mesa coincides with the bottom surface of the first mesa. This improves the performance of MicroLEDs.

Description

Technical Field

[0001] This invention relates to the field of display technology, and in particular to a micro light-emitting chip and its fabrication method. Background Technology

[0002] Micro LEDs are widely considered ideal display devices for near-eye displays, ultra-high-definition large screens, and other applications due to their advantages such as high brightness, high contrast, and low power consumption.

[0003] In existing MicroLED processes, the etching process for forming mesa is prone to introducing lattice damage and defects into the sidewalls of the mesa, leading to increased nonradiative recombination and exacerbating efficiency degradation. Furthermore, when applying a passivation layer, it is difficult to cover the right-angle steps, which can easily generate a sharp electric field, resulting in poor reliability and increased leakage current in MicroLEDs. Summary of the Invention

[0004] This invention provides a micro-light-emitting chip and its fabrication method to improve the performance of MicroLEDs.

[0005] According to one aspect of the present invention, a method for fabricating a micro light-emitting chip is provided, comprising: The display functional layer is bonded to the driving substrate; the display functional layer includes a first semiconductor layer, a light-emitting layer, and a second semiconductor layer stacked together; the first semiconductor layer is disposed between the driving substrate and the light-emitting layer; A portion of the second semiconductor layer is etched using a dry etching process to form a first mesa. A wet etching process is used to etch the remaining second semiconductor layer, the light-emitting layer, and at least a portion of the first semiconductor layer to form a second mesa; the top surface of the second mesa coincides with the bottom surface of the first mesa.

[0006] Optionally, before bonding the display functional layer to the driving substrate, the following steps are also included: An ohmic contact layer is formed on the surface of the first semiconductor layer.

[0007] Optionally, the bonding of the display function layer to the driving substrate includes: A first bonding layer is formed on the surface of the ohmic contact layer, and a second bonding layer is formed on the surface of the driving substrate; The first bonding layer and the second bonding layer are bonded together.

[0008] Optionally, when etching a portion of the first semiconductor layer using a wet etching process, after forming the second mesa, the process further includes: A passivation layer is formed on the entire surface; The passivation layer, the first semiconductor layer, the ohmic contact layer, the first bonding layer, and the second bonding layer are etched using an etching process to form the micro light-emitting chip; Alternatively, when etching all the first semiconductor layers using a wet etching process, after forming the second mesa, the process further includes: A passivation layer is formed on the entire surface; The passivation layer, the ohmic contact layer, the first bonding layer, and the second bonding layer are etched using an etching process to form the micro light-emitting chip.

[0009] Optionally, forming the micro light-emitting chip includes: Dry etching process is used for cutting.

[0010] According to another aspect of the present invention, a micro light-emitting chip is provided, formed using the micro light-emitting chip fabrication method described in any embodiment of the present invention; the micro light-emitting chip comprises: Drive substrate; A display functional layer is disposed on one side of the driving substrate and connected to the driving substrate. The display functional layer includes a first semiconductor layer, a light-emitting layer, and a second semiconductor layer stacked together. The first semiconductor layer is disposed between the driving substrate and the light-emitting layer. The display functional layer also includes a first mesa and a second mesa. The first mesa is composed of a portion of the second semiconductor layer, and the second mesa is composed of the remaining portion of the second semiconductor layer, the light-emitting layer, and at least a portion of the first semiconductor layer. The top surface of the second mesa coincides with the bottom surface of the first mesa.

[0011] Optionally, the distance from the bottom surface of the first platform to the light-emitting layer ranges from 50nm to 100nm.

[0012] Optionally, the side surface of the second countertop is perpendicular to the bottom surface of the second countertop.

[0013] Optionally, the orthographic projection of the second platform onto the driving substrate is a square.

[0014] Optionally, the micro light-emitting chip further includes: An ohmic contact layer is disposed between the first semiconductor layer and the driving substrate, and the distance from the bottom surface of the second mesa to the ohmic contact layer is less than or equal to 50 nm.

[0015] The technical solution of this invention involves forming a first mesa by etching a portion of the second semiconductor layer using a dry etching process, resulting in a beveled surface on the first mesa. When forming a passivation layer on the first mesa, the difficulty of covering the passivation layer is reduced, while avoiding the generation of a sharp electric field, thus improving the reliability of the MicroLED and reducing leakage current. Furthermore, dry etching completely avoids contact with the light-emitting layer, preventing sidewall damage and defects, thereby reducing non-radiative recombination and improving the luminous efficiency and lifespan of the MicroLED. Simultaneously, a wet etching process is used to etch the remaining second semiconductor layer, the light-emitting layer, and at least a portion of the first semiconductor layer to form a second mesa. The angle between the sidewall and bottom of the second mesa can be set according to the area requirements of the light-emitting layer, maximizing the luminous efficiency of the MicroLED. This also avoids sputtering during the formation of the second mesa, further mitigating sidewall damage and defects, further reducing non-radiative recombination, and improving the luminous efficiency and lifespan of the MicroLED.

[0016] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 A schematic flowchart illustrating a method for fabricating a micro light-emitting chip according to an embodiment of the present invention; Figure 2 This is a schematic diagram of the structure of a display function layer provided in an embodiment of the present invention; Figure 3 This is a schematic diagram of the structure after etching using a dry etching process, provided in an embodiment of the present invention. Figure 4 This is a schematic diagram of the structure after etching using a wet etching process, provided in an embodiment of the present invention. Figure 5 This is a schematic diagram of the structure after etching using another wet etching process provided in an embodiment of the present invention; Figure 6 This is a schematic diagram of the structure after etching using another wet etching process provided in an embodiment of the present invention; Figure 7 A schematic diagram of the structure of a partial micro light-emitting chip is provided as an example of the present invention; Figure 8 This is a schematic diagram of another partial micro light-emitting chip provided in an embodiment of the present invention; Figure 9 This is a schematic diagram of the structure after etching using another wet etching process provided in an embodiment of the present invention; Figure 10 A schematic flowchart illustrating another method for fabricating a micro light-emitting chip according to an embodiment of the present invention; Figure 11 This is a schematic diagram of a display function layer having a first bonding layer provided in an embodiment of the present invention; Figure 12 This is a schematic diagram of a driving substrate having a second bonding layer, provided by an embodiment of the present invention. Figure 13 This is a schematic diagram of the structure of a display functional layer bonded to a driving substrate according to an embodiment of the present invention; Figure 14 This is a schematic diagram of a substrate removal structure provided in an embodiment of the present invention; Figure 15 A schematic flowchart illustrating another method for fabricating a micro light-emitting chip according to an embodiment of the present invention; Figure 16 This is a schematic diagram of a structure for forming a passivation layer according to an embodiment of the present invention; Figure 17 This is a schematic diagram of a structure for forming a micro light-emitting chip, provided by an embodiment of the present invention; Figure 18 This is a schematic diagram of a structure for forming a micro light-emitting chip, provided by an embodiment of the present invention; Figure 19 This is a schematic diagram of a structure for forming a photoresist layer according to an embodiment of the present invention; Figure 20 This is a schematic diagram of a patterned photoresist structure provided in an embodiment of the present invention. Detailed Implementation

[0019] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0020] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0021] This invention provides a method for fabricating a micro-light-emitting chip. In the fabrication process, a dry etching process is used to etch the first mesa, giving it a beveled side. When forming a passivation layer on the first mesa, the difficulty of covering the passivation layer is reduced, and sharp electric fields are avoided, improving the reliability of the MicroLED and reducing leakage current. Furthermore, dry etching completely avoids contact with the light-emitting layer, preventing sidewall damage and defects, thereby reducing non-radiative recombination and improving the luminous efficiency and lifetime of the MicroLED. Then, a wet etching process is used to etch the second mesa, the side of which includes the side of the light-emitting layer. That is, by using a wet etching process to etch the light-emitting layer and the first semiconductor layer, the angle between the sidewall and the bottom of the second mesa can be set according to the area requirements of the light-emitting layer, maximizing the luminous efficiency of the MicroLED. When a MicroLED includes an ohmic contact layer, wet etching can reduce the probability of the ohmic contact layer sputtering onto the mesa sidewalls, thereby further improving the damage and defects of the mesa sidewalls, further reducing non-radiative recombination, and improving the luminous efficiency and lifetime of the MicroLED. For example, Figure 1 This is a schematic flowchart illustrating a method for fabricating a micro-light-emitting chip according to an embodiment of the present invention. Figure 1 As shown, the fabrication method of this micro-light-emitting chip includes: S110, the display functional layer is bonded to the driving substrate; the display functional layer includes a first semiconductor layer, a light-emitting layer and a second semiconductor layer stacked together; the first semiconductor layer is disposed between the driving substrate and the light-emitting layer.

[0022] Specifically, Figure 2 This is a schematic diagram of a display functional layer provided in an embodiment of the present invention. Figure 2As shown, the display functional layer includes a substrate 10 and an epitaxial layer 20. The epitaxial layer 20 includes a second semiconductor layer 23, a light-emitting layer 22, and a first semiconductor layer 21 sequentially stacked on the substrate 10. The first semiconductor layer 21 and the second semiconductor layer 23 are semiconductor layers of different types. For example, the first semiconductor layer 21 can be a P-type semiconductor layer, and the second semiconductor layer 23 can be an N-type semiconductor layer. Alternatively, the first semiconductor layer 21 can be an N-type semiconductor layer, and the second semiconductor layer 23 can be a P-type semiconductor layer. The light-emitting layer 22 includes a quantum well for realizing the light emission of the MicroLED. A driving circuit is provided on the driving substrate. The display functional layer and the driving substrate can be bonded by any bonding method. After the display functional layer and the driving substrate are bonded, the first semiconductor layer 21 is connected to the driving substrate through the bonding layer, so that the driving substrate can provide a driving signal to the first semiconductor layer 21.

[0023] S120. A portion of the second semiconductor layer is etched using a dry etching process to form the first mesa.

[0024] Specifically, Figure 3 This is a schematic diagram of the structure after etching using a dry etching process, as provided in an embodiment of the present invention. Figure 3 As shown, after the display functional layer is bonded to the driving substrate, the substrate 10 is removed to expose the second semiconductor layer 23. The surface of the second semiconductor layer 23 away from the light-emitting layer 22 is the light-emitting surface of the micro-light-emitting chip. At this time, a dry etching process is used to etch a portion of the second semiconductor layer 23 to form a first mesa 231. By using a dry etching process to etch the second semiconductor layer 23, the angle between the top surface and the side surface of the first mesa 231 is obtuse. When forming a passivation layer on the first mesa 231, the difficulty of covering the passivation layer can be reduced, and sharp electric fields can be avoided at the corners of the first mesa 231, improving the reliability of the MicroLED and reducing the leakage current of the MicroLED. Moreover, in the dry etching process, only a portion of the thickness of the second semiconductor layer 23 is etched. After the dry etching process is completed, a portion of the thickness of the second semiconductor layer 23 still covers the light-emitting layer 22. During the dry etching process, the second semiconductor layer 23 will not expose the light-emitting layer 22 at all, thus avoiding sidewall damage and defects to the light-emitting layer 22 during the dry etching process. This can reduce non-radiative recombination and improve the luminous efficiency and lifespan of MicroLED.

[0025] S130. The remaining second semiconductor layer, light-emitting layer and at least part of the first semiconductor layer are etched using a wet etching process to form a second mesa; the top surface of the second mesa coincides with the bottom surface of the first mesa.

[0026] Specifically, Figure 4 This is a schematic diagram of the structure after etching using a wet etching process, as provided in an embodiment of the present invention. Figure 4As shown, after forming the first mesa 231, the remaining second semiconductor layer 23, the light-emitting layer 22, and at least a portion of the first semiconductor layer 21 can be wet-etched to form the second mesa 232. During the wet etching process, the angle between the sidewall and the bottom surface of the second mesa 232 can be set according to the area requirements of the light-emitting layer 22 to maximize the luminous efficiency of the MicroLED. Simultaneously, sputtering during the formation of the second mesa 232 can be avoided, which is beneficial for further improving damage and defects to the mesa sidewalls, further reducing non-radiative recombination, and improving the luminous efficiency and lifetime of the MicroLED. For example, in the wet etching process, HCl or other etching solutions can be used.

[0027] For example, such as Figure 4 As shown, the angle between the side wall of the second platform 232 and the bottom surface is a right angle, that is, the side wall of the second platform 232 is perpendicular to the bottom surface. Figure 5 This is a schematic diagram of the structure after etching using another wet etching process provided in an embodiment of the present invention. Figure 5 As shown, the angle between the side wall and the bottom surface of the second platform 232 is an acute angle. Figure 6 This is a schematic diagram of the structure after etching using another wet etching process provided in an embodiment of the present invention. Figure 6 As shown, the angle between the sidewall and the bottom surface of the second mesa 232 is an obtuse angle. With the size of the micro-light-emitting chip remaining constant, the area of ​​the light-emitting layer 22 is maximized when the angle between the sidewall and the bottom surface of the second mesa 232 is a right angle. This improves the luminous efficiency of the micro-light-emitting chip. The size of the micro-light-emitting chip can be the size of the bottom surface of the second mesa 232. For example, Figure 7 A schematic diagram of the structure of a partial micro light-emitting chip is provided as an example of the present invention. Figure 8 This is a schematic diagram of another partial micro-light-emitting chip provided in an embodiment of the present invention. (See diagram below.) Figure 7 and Figure 8 As shown, the bottom surface dimension of the second platform 232 is 2.8 μm. Figure 7 In this process, the size of the light-emitting layer 22 is the same as the bottom surface size of the second mesa 232, both being 2.8 μm. Figure 8 In the diagram, the size of the light-emitting layer 22 at the first straight line L1 is 2.6 μm, and the size of the surface of the light-emitting layer 22 on the side away from the first semiconductor layer 21 is 2.45 μm. Therefore, it can be concluded that... Figure 7 The size of the middle luminescent layer 22 is greater than Figure 8 The size of the light-emitting layer 22 is increased, and the area of ​​the light-emitting layer 22 increases by approximately 12%. This improves the luminous efficiency of the micro-light-emitting chip.

[0028] It should be noted that, Figures 4 to 8An exemplary structure is shown in which a portion of the first semiconductor layer 21 has been etched in a wet etching process. In other embodiments, all of the first semiconductor layer 21 may also be etched in a wet etching process. Figure 9 This is a schematic diagram of the structure after etching using another wet etching process provided in an embodiment of the present invention. Figure 9 As shown, the first semiconductor layer 21 is etched to the bottom in a wet etching process.

[0029] The technical solution of this embodiment uses a dry etching process to etch a portion of the second semiconductor layer to form a first mesa, giving the first mesa a beveled side. When forming a passivation layer on the first mesa, the difficulty of covering the passivation layer is reduced, while avoiding the generation of a sharp electric field, thus improving the reliability of the MicroLED and reducing leakage current. Furthermore, dry etching completely avoids contact with the light-emitting layer, preventing sidewall damage and defects, thereby reducing non-radiative recombination and improving the luminous efficiency and lifespan of the MicroLED. Simultaneously, a wet etching process is used to etch the remaining second semiconductor layer, the light-emitting layer, and at least a portion of the first semiconductor layer to form a second mesa. The angle between the sidewall and bottom of the second mesa can be set according to the area requirements of the light-emitting layer, maximizing the luminous efficiency of the MicroLED. This also avoids sputtering during the formation of the second mesa, further improving sidewall damage and defects, further reducing non-radiative recombination, and improving the luminous efficiency and lifespan of the MicroLED.

[0030] Figure 10 This is a schematic flowchart illustrating another method for fabricating a micro-light-emitting chip according to an embodiment of the present invention. Figure 10 As shown, the fabrication method of this micro-light-emitting chip includes: S210, An ohmic contact layer is formed on the surface of the first semiconductor layer.

[0031] For details, please refer to [link / reference]. Figure 2 The display functional layer also includes an ohmic contact layer 30. The ohmic contact layer 30 can be a transparent conductive film. For example, the material of the ohmic contact layer 30 can include ITO / AZO / ZnO, etc. The ohmic contact layer 30 can be formed as a single layer. For example, the ohmic contact layer 30 can be formed by a vapor deposition process.

[0032] S220, The display functional layer is bonded to the driving substrate; the display functional layer includes a first semiconductor layer, a light-emitting layer and a second semiconductor layer stacked together; the first semiconductor layer is disposed between the driving substrate and the light-emitting layer.

[0033] S230. A portion of the second semiconductor layer is etched using a dry etching process to form the first mesa.

[0034] S240. A wet etching process is used to etch the remaining second semiconductor layer, the light-emitting layer, and at least a portion of the first semiconductor layer to form a second mesa; the top surface of the second mesa coincides with the bottom surface of the first mesa.

[0035] In some embodiments, after the ohmic contact layer is formed over the entire layer, the method further includes: Anneal the ohmic contact layer.

[0036] Specifically, after forming the ohmic contact layer 30, the ohmic contact layer 30 is annealed to form a low-resistance ohmic contact between the ohmic contact layer 30 and the first semiconductor layer 21, thereby improving the luminous efficiency of the micro light-emitting chip.

[0037] In some embodiments, the display functional layer is bonded to the driving substrate, including: A first bonding layer is formed on the surface of the ohmic contact layer, and a second bonding layer is formed on the surface of the driving substrate.

[0038] Specifically, Figure 11 This is a schematic diagram of a display functional layer having a first bonding layer, provided as an embodiment of the present invention. Figure 11 As shown, during the bonding process between the display functional layer and the driving substrate, a first bonding layer 40 can be formed on the surface of the ohmic contact layer 30. The first bonding layer 40 can be a metal. Figure 12 This is a schematic diagram of a driving substrate having a second bonding layer, provided as an embodiment of the present invention. Figure 12 As shown, a second bonding layer 60 is formed on the surface of the driving substrate 50. Exemplarily, the first bonding layer 40 and the second bonding layer 60 can be formed by a vapor deposition process.

[0039] The first bonding layer and the second bonding layer are bonded together.

[0040] Specifically, Figure 13 This is a schematic diagram illustrating the structure of a display functional layer bonded to a driving substrate, as provided in an embodiment of the present invention. Figure 13 As shown, the first bonding layer 40 and the second bonding layer 60 are bonded together, so that the display functional layer is bonded to the driving substrate.

[0041] In some embodiments, Figure 14 This is a schematic diagram of a substrate removal structure provided in an embodiment of the present invention. Figure 14 As shown, after the display functional layer and the driving substrate 50 are bonded, the substrate 10 is removed to expose the surface of the second semiconductor layer 23.

[0042] In some embodiments, a wet etching process can be used to etch a portion of the first semiconductor layer 21. In subsequent etching, the remaining first semiconductor layer 21 needs to be etched to form multiple micro-light-emitting chips. Figure 15This is a schematic flowchart illustrating another method for fabricating a micro-light-emitting chip according to an embodiment of the present invention. Figure 15 As shown, the fabrication method of this micro-light-emitting chip includes: S310, An ohmic contact layer is formed on the surface of the first semiconductor layer.

[0043] S320, A first bonding layer is formed on the surface of the ohmic contact layer, and a second bonding layer is formed on the surface of the driving substrate.

[0044] S330, Bond the first bonding layer and the second bonding layer together.

[0045] S340. A portion of the second semiconductor layer is etched using a dry etching process to form the first mesa.

[0046] S350. A wet etching process is used to etch the remaining second semiconductor layer, the light-emitting layer, and at least part of the first semiconductor layer to form a second mesa; the top surface of the second mesa coincides with the bottom surface of the first mesa.

[0047] S360, a passivation layer is formed on the entire surface.

[0048] Specifically, Figure 16 This is a schematic diagram of a structure for forming a passivation layer according to an embodiment of the present invention. Figure 16 As shown, after forming the second mesa, a passivation layer 70 is formed by vapor deposition. The material of the passivation layer 70 can be SiO2 / SiN / Al2O3, etc. For example, the passivation layer 70 can be formed by vapor deposition process.

[0049] S370 uses an etching process to etch the passivation layer, the first semiconductor layer, the ohmic contact layer, the first bonding layer, and the second bonding layer to form a micro light-emitting chip.

[0050] Specifically, Figure 17 This is a schematic diagram of a structure for forming a micro light-emitting chip, provided as an embodiment of the present invention. Figure 17 As shown, the passivation layer 70, the remaining first semiconductor layer 21, the ohmic contact layer 30, the first bonding layer 40 and the second bonding layer 60 are etched to form an independent micro light-emitting chip.

[0051] In some embodiments, a wet etching process can be used to etch all the first semiconductor layers 21. In subsequent etching, the remaining layers can be directly etched to form multiple micro-light-emitting chips. For example, Figure 18 This is a schematic diagram of a structure for forming a micro light-emitting chip, provided as an embodiment of the present invention. Figure 18 As shown, the passivation layer 70, ohmic contact layer 30, first bonding layer 40 and second bonding layer 60 are etched to form an independent micro light-emitting chip.

[0052] In some embodiments, before forming the passivation layer 70 across the entire surface, another ohmic contact layer may be formed on the second semiconductor layer 23, such that the ohmic contact layer forms a low-resistance ohmic contact with the second semiconductor layer 23, thereby improving the luminous efficiency of the micro-light-emitting chip. For example, when the luminous color of the micro-light-emitting chip is red, ITO may be formed on the second semiconductor layer 23 as an ohmic contact layer on one side of the second semiconductor layer 23.

[0053] In some embodiments, forming a micro light-emitting chip includes: Dry etching process is used for cutting.

[0054] Specifically, during the wet etching process for a portion of the first semiconductor layer 21, ion beam etching (IBE) can be used to etch the passivation layer 70, the remaining first semiconductor layer 21, the ohmic contact layer 30, the first bonding layer 40, and the second bonding layer 60, forming a micro-light-emitting chip. During the wet etching process for all of the first semiconductor layers 21, ion beam etching (IBE) can be used to etch the passivation layer 70, the ohmic contact layer 30, the first bonding layer 40, and the second bonding layer 60, forming a micro-light-emitting chip. By etching these layers without contacting the light-emitting layer 22, sidewall damage and defects in the light-emitting layer are avoided, thereby reducing non-radiative recombination and improving the luminous efficiency and lifespan of the MicroLED.

[0055] In some embodiments, forming a micro light-emitting chip includes: A photoresist layer is formed on the passivation layer.

[0056] Specifically, Figure 19 This is a schematic diagram of a structure for forming a photoresist layer, provided as an embodiment of the present invention. Figure 19 As shown, after the passivation layer 70 is formed, a photoresist layer 80 is formed on the passivation layer 70.

[0057] The photoresist layer is patterned to form multiple grooves; the grooves expose the passivation layer.

[0058] Specifically, Figure 20 This is a schematic diagram of a patterned photoresist structure provided in an embodiment of the present invention. Figure 20 As shown, after forming the photoresist layer 80, the photoresist layer 80 is patterned to create multiple grooves 81 on the photoresist layer 80. The grooves 81 expose the passivation layer 70. The grooves 81 are located between the micro-light-emitting chips.

[0059] A micro light-emitting chip is formed by etching the passivation layer, the first semiconductor layer, the ohmic contact layer, the first bonding layer, and the second bonding layer at the groove, or by etching the passivation layer, the ohmic contact layer, the first bonding layer, and the second bonding layer.

[0060] In subsequent processes, electrode formation can be performed on the etched micro-light-emitting chip. For example, the photoresist layer 80 can be removed, and the passivation layer 70 can be patterned to expose the surface of the second semiconductor layer 23. Then, an electrode layer is formed on the second semiconductor layer 23 as an electrode on one side of the second semiconductor layer 23. For example, the electrode layer can be made of ITO.

[0061] This invention also provides a micro-light-emitting chip. This micro-light-emitting chip is formed using the fabrication method for micro-light-emitting chips provided in any embodiment of this invention. (See reference...) Figure 17 and Figure 18 The micro-light-emitting chip includes a driving substrate 50 and a display functional layer. The display functional layer is disposed on one side of the driving substrate 50 and connected to the driving substrate 50; the display functional layer includes a first semiconductor layer 21, a light-emitting layer 22 and a second semiconductor layer 23 stacked together; the first semiconductor layer 21 is disposed between the driving substrate 50 and the light-emitting layer 20; the display functional layer also includes a first mesa 231 and a second mesa 232; the first mesa 231 is composed of a portion of the second semiconductor layer 23, and the second mesa 232 is composed of the remaining portion of the second semiconductor layer 23, the light-emitting layer 22 and at least a portion of the first semiconductor layer 21; the top surface of the second mesa 232 coincides with the bottom surface of the first mesa 231.

[0062] Specifically, such as Figure 17 As shown, the second mesa 232 is composed of the remaining portion of the second semiconductor layer 23, the light-emitting layer 22, and a portion of the first semiconductor layer 21. Figure 18 As shown, the second mesa 232 is composed of the remaining portion of the second semiconductor layer 23, the light-emitting layer 22, and all of the first semiconductor layers 21. The first mesa 231 is formed by etching a portion of the second semiconductor layer 23 using a dry etching process, giving the first mesa 231 a beveled side surface. When a passivation layer 70 is formed on the first mesa 231, the difficulty of covering the passivation layer 70 is reduced, while avoiding the generation of a sharp electric field, thus improving the reliability of the MicroLED and reducing leakage current. Furthermore, dry etching completely avoids contact with the light-emitting layer 22, preventing sidewall damage and defects of the light-emitting layer 22, thereby reducing non-radiative recombination and improving the luminous efficiency and lifetime of the MicroLED. Simultaneously, the remaining second semiconductor layer 23, the light-emitting layer 22, and at least a portion of the first semiconductor layer 21 are etched using a wet etching process to form the second mesa 232. The angle between the sidewall and the bottom surface of the second mesa 232 can be set according to the area requirements of the light-emitting layer 22, maximizing the luminous efficiency of the MicroLED. At the same time, it can avoid sputtering when forming the second mesa 232, which is conducive to further improving the damage and defects of the mesa sidewall, further reducing non-radiative recombination, and improving the luminous efficiency and lifespan of MicroLED.

[0063] In some embodiments, the distance from the bottom surface of the first platform 231 to the light-emitting layer 22 ranges from 50nm to 100nm.

[0064] Specifically, the distance from the bottom surface of the first mesa 231 to the light-emitting layer 22 is equal to the thickness of the remaining second semiconductor layer 23 after the dry etching process. By setting the distance from the bottom surface of the first mesa 231 to the light-emitting layer 22 to a range of 50nm-100nm, it is possible to ensure that the light-emitting layer 22 is not in contact during the dry etching process, thus avoiding sidewall damage and defects in the light-emitting layer. At the same time, the thickness of the second semiconductor layer 23 etched by dry etching can be increased as much as possible, reducing the difficulty of covering the passivation layer and the generation of the tip electric field.

[0065] In some embodiments, the side surface of the second tabletop 232 is perpendicular to the bottom surface of the second tabletop 232.

[0066] Specifically, such as Figure 4 As shown, the sidewall of the second platform 232 forms a right angle with the bottom surface. This maximizes the area of ​​the light-emitting layer 22 while keeping the size of the micro-light-emitting chip constant, thereby improving the luminous efficiency of the micro-light-emitting chip.

[0067] In some embodiments, the orthographic projection of the second mesa 232 onto the driving substrate 50 is a square, which allows for a further increase in the area of ​​the light-emitting layer 22 without changing the size of the micro-light-emitting chip, thereby further improving the luminous efficiency of the micro-light-emitting chip. For example, in... Figure 7 and Figure 8 In the middle, when Figure 7 When the provided second platform 232 is a square, Figure 7 The area of ​​the light-emitting layer 22 in the middle is relative to Figure 8 The area of ​​the middle light-emitting layer 22 is increased by about 30%, which improves the luminous efficiency of the micro light-emitting chip.

[0068] Continue to refer to Figure 17 and Figure 18 The micro-light-emitting chip also includes: An ohmic contact layer 30 is disposed between the first semiconductor layer 21 and the driving substrate 50, and the distance from the bottom surface of the second mesa 232 to the ohmic contact layer 30 is less than or equal to 50 nm.

[0069] Specifically, in the wet etching process, if the first semiconductor layer 21 is partially etched, the distance from the bottom surface of the second mesa 232 to the ohmic contact layer 30 is the thickness of the remaining first semiconductor layer 21 after the wet etching process. If the first semiconductor layer 21 is completely etched in the wet etching process, the distance from the bottom surface of the second mesa 232 to the ohmic contact layer 30 is 0. By setting the distance from the bottom surface of the second mesa 232 to the ohmic contact layer 30 to be less than or equal to 50 nm, it can be ensured that the thickness of the remaining first semiconductor layer 21 after the wet etching process is less than or equal to 50 nm, which can reduce sputtering phenomena when forming the second mesa 232 and further improve the damage and defects of the mesa sidewalls.

[0070] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0071] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A method for fabricating a micro light-emitting chip, characterized in that, include: The display functional layer will be bonded to the driving substrate; The display functional layer includes a first semiconductor layer, a light-emitting layer, and a second semiconductor layer stacked together. The first semiconductor layer is disposed between the driving substrate and the light-emitting layer; A portion of the second semiconductor layer is etched using a dry etching process to form a first mesa. A wet etching process is used to etch the remaining second semiconductor layer, the light-emitting layer, and at least a portion of the first semiconductor layer to form a second mesa; the top surface of the second mesa coincides with the bottom surface of the first mesa.

2. The method for fabricating a micro light-emitting chip according to claim 1, characterized in that, Before bonding the display functional layer to the driving substrate, the following is also included: An ohmic contact layer is formed on the surface of the first semiconductor layer.

3. The method for fabricating a micro light-emitting chip according to claim 2, characterized in that, The bonding of the display function layer to the driving substrate includes: A first bonding layer is formed on the surface of the ohmic contact layer, and a second bonding layer is formed on the surface of the driving substrate; The first bonding layer and the second bonding layer are bonded together.

4. The method for fabricating a micro light-emitting chip according to claim 3, characterized in that, When etching a portion of the first semiconductor layer using a wet etching process, after forming the second mesa, the process further includes: A passivation layer is formed on the entire surface; The passivation layer, the first semiconductor layer, the ohmic contact layer, the first bonding layer, and the second bonding layer are etched using an etching process to form the micro light-emitting chip; Alternatively, when etching all the first semiconductor layers using a wet etching process, after forming the second mesa, the process further includes: A passivation layer is formed on the entire surface; The passivation layer, the ohmic contact layer, the first bonding layer, and the second bonding layer are etched using an etching process to form the micro light-emitting chip.

5. The method for fabricating a micro light-emitting chip according to claim 4, characterized in that, The process of forming the micro-light-emitting chip includes: Dry etching process is used for cutting.

6. A micro light-emitting chip, characterized in that, The micro-light-emitting chip is formed using the fabrication method according to any one of claims 1-5; the micro-light-emitting chip comprises: Drive substrate; A display functional layer is disposed on one side of the driving substrate and connected to the driving substrate. The display functional layer includes a first semiconductor layer, a light-emitting layer, and a second semiconductor layer stacked together. The first semiconductor layer is disposed between the driving substrate and the light-emitting layer. The display functional layer also includes a first mesa and a second mesa. The first mesa is composed of a portion of the second semiconductor layer, and the second mesa is composed of the remaining portion of the second semiconductor layer, the light-emitting layer, and at least a portion of the first semiconductor layer. The top surface of the second mesa coincides with the bottom surface of the first mesa.

7. The micro light-emitting chip according to claim 6, characterized in that, The distance from the bottom surface of the first platform to the light-emitting layer ranges from 50nm to 100nm.

8. The micro light-emitting chip according to claim 6, characterized in that, The side surface of the second tabletop is perpendicular to the bottom surface of the second tabletop.

9. The micro light-emitting chip according to claim 8, characterized in that, The orthographic projection of the second platform onto the driving substrate is a square.

10. The micro light-emitting chip according to claim 6, characterized in that, The micro light-emitting chip also includes: An ohmic contact layer is disposed between the first semiconductor layer and the driving substrate, and the distance from the bottom surface of the second mesa to the ohmic contact layer is less than or equal to 50 nm.

Images