Micro-led chip

Abstract

This invention provides a microLED chip, comprising a substrate and a microLED structure. The microLED structure includes a light-emitting unit, a first electrode, and a second electrode. The light-emitting unit includes a first semiconductor layer, a light-emitting active layer, and a second semiconductor layer. The first electrode is electrically connected to the first semiconductor layer, and the second electrode is electrically connected to the second semiconductor layer. An optical isolation structure is located in the second semiconductor layer. In the radial direction of the light-emitting unit, the optical isolation structure is disposed around the outer ring of the light-emitting unit and forms a closed pattern. Along the thickness direction of the substrate, the second electrode coincides with the optical isolation structure; or, along the radial direction of the light-emitting unit, the second electrode is located in the inner ring of the optical isolation structure. A first fan-out electrode and a second fan-out electrode are also included, with the first fan-out electrode electrically connected to the first electrode and the second fan-out electrode electrically connected to the second electrode.

Description

Technical Field

[0001] This invention relates to the field of light-emitting technology, and more particularly to a microLED chip. Background Technology

[0002] In recent years, micro-LEDs (Micro-Light Emitting Diodes) have become an important development direction for next-generation optical communication and optical interconnect technologies due to their superior performance, including high brightness, high modulation bandwidth, low power consumption, and long lifespan. In applications such as inter-chip optical interconnects, optical transmission, and optical switching, micro-LEDs are widely used as light sources. Their core task is to efficiently convert electrical signals into optical signals and achieve long-distance, high-speed, and high-precision information transmission. Furthermore, in non-display fields, such as photopolymer 3D printing and light transmission, micro-LEDs are also used as high-precision exposure light sources, requiring accurate focusing and projection of images onto photosensitive areas from a certain distance, similarly demanding a small beam divergence angle. However, micro-LED chips typically emit typical Lambertian light, with light intensity uniformly scattered in all directions in space, resulting in a large beam divergence angle (usually exceeding 120°). In optical communication scenarios, a large divergence angle can cause severe optical path loss and signal crosstalk.

[0003] Specifically, when the light beam emitted by a microLED propagates in free space or a waveguide, the large divergence angle causes the light energy to diffuse rapidly along the transmission path, resulting in a significant attenuation of the light intensity reaching the receiving end, thus reducing the signal-to-noise ratio (SNR) and transmission rate. Simultaneously, in densely packed parallel optical interconnect systems, the optical signals between adjacent channels can interfere with each other due to the excessively large divergence angle, i.e., optical crosstalk, severely affecting the signal integrity and reliability of the communication system. Currently, the industry typically integrates microlenses or lens arrays externally to the microLED chip to collimate and focus the light beam. However, integrating microlenses or lens arrays faces the following problems: 1) The thickness-to-diameter ratio (width-to-height ratio) of traditional microlenses is difficult to fabricate on LED structures at the μm scale, resulting in extremely low yields; 2) The high refractive index of the optical materials used to fabricate microlenses or lens arrays usually has disadvantages such as high absorption, high dispersion, difficulty in microfabrication, and poor thermal stability. On the one hand, the fabrication process is difficult; on the other hand, the absorption or scattering of the optical materials themselves can offset the gain brought by collimation, and even lead to a significant decrease in the luminous efficiency emitted by the microLED.

[0004] Therefore, how to improve the existing microLED structure to effectively control the beam divergence angle, while taking into account high-efficiency electrical interconnection and packaging reliability, has become a problem that microLED optical communication devices and 3D printing devices need to solve. Summary of the Invention

[0005] This invention provides a microLED chip to solve the problem of the adaptability of existing microLED structures in optical communication and 3D printing device scenarios.

[0006] This invention provides a microLED chip, including a substrate and a microLED structure. The microLED structure is fixed to a first side of the substrate by an adhesive layer. The microLED structure includes a light-emitting unit, a first electrode, and a second electrode. Along the thickness direction of the substrate, the light-emitting unit includes a first semiconductor layer, a light-emitting active layer, and a second semiconductor layer. The first electrode is electrically connected to the first semiconductor layer. The second electrode is electrically connected to the second semiconductor layer. An optical isolation structure is located in the second semiconductor layer. In the radial direction of the light-emitting unit, the optical isolation structure is arranged around the outer ring of the light-emitting unit and forms a closed pattern. Along the thickness direction of the substrate, the second electrode and the optical isolation structure coincide; or, along the radial direction of the light-emitting unit, the second electrode is located in the inner ring of the optical isolation structure. A first fan-out electrode and a second fan-out electrode are also included, with the first fan-out electrode electrically connected to the first electrode and the second fan-out electrode electrically connected to the second electrode.

[0007] As an optional technical solution, the second electrode is located on the stepped surface of the second semiconductor layer facing the first semiconductor layer and is disposed around the light-emitting unit; along the radial direction of the light-emitting unit, the second electrode is located in the outer ring and the first electrode is located in the inner ring.

[0008] As an optional technical solution, the second electrode includes an injection electrode surrounding the light-emitting unit, wherein the injection electrode is a non-closed pattern having an opening; or, the injection electrode is a closed pattern.

[0009] As an optional technical solution, when the injection electrode is a non-closed pattern, the light-emitting unit defines a light-emitting pattern, and the injection electrode is arranged around the outer periphery of the light-emitting pattern, wherein the inner periphery of the injection electrode overlaps with the outer periphery of the light-emitting pattern by 80% or more.

[0010] As an optional technical solution, the distance between the inner circle of the injection electrode and the periphery of the outer circle of the light-emitting pattern is 1-5 μm.

[0011] As an optional technical solution, the closed pattern is formed as a metal ring surrounding the light-emitting unit.

[0012] As an optional technical solution, it also includes an optical isolation trench, which penetrates the second semiconductor layer and part of the buffer layer and is arranged around the light-emitting unit, and the metal ring is disposed in the optical isolation trench.

[0013] As an optional technical solution, the first semiconductor layer has a first sidewall around its periphery, the light-emitting active layer has a middle sidewall around its periphery, and the second semiconductor layer has a second sidewall around its periphery. The first sidewall, the middle sidewall, and the second sidewall together surround the periphery of the light-emitting unit as the sidewall structure of the light-emitting unit. The perimeter of the sidewall structure gradually increases from the side of the first semiconductor layer toward the side of the second semiconductor layer, so that the cross-section of the light-emitting unit is an inverted trapezoidal structure.

[0014] As an optional technical solution, along the radial direction of the light-emitting unit, the first fan-out electrode and the second fan-out electrode are respectively located on the outer ring of the optical isolation structure.

[0015] As an optional technical solution, the microLED chip can be a conventional microLED chip or a flip-chip microLED chip structure.

[0016] The microLED chip provided by this invention has at least the following beneficial effects: First, by setting a closed-pattern optical isolation structure on the second semiconductor layer and designing the sidewall of the light-emitting unit as an inverted trapezoidal structure with a gradually increasing cross-section from bottom to top, the first electrode can extend along the sidewall as a total reflection mirror, forming a fully enclosed multi-layer reflection layout in the circumference and radial direction of the light-emitting unit. The closed optical isolation structure enhances the reflection and confinement of lateral light, reflecting light that would otherwise easily escape from the sidewall back to the normal direction, thereby significantly converging the beam divergence angle, improving the collimation of emitted light and the optical coupling efficiency, and greatly improving the adaptability of the microLED chip in long-distance transmission scenarios such as optical communication and 3D printing. Second, in this invention, the second electrode is located on the stepped surface and arranged around the light-emitting unit. Its injection electrode adopts a non-closed-pattern design, so that the vertical projections of the first electrode and the second electrode do not coincide in the thickness direction. This can effectively cut off the parasitic coupling and electromagnetic interference path of high-frequency signals between the electrodes, reduce parasitic capacitance, and avoid high-frequency crosstalk. Meanwhile, the inner ring of the injection electrode overlaps with the outer ring of the light-emitting pattern by 80% or more, and the spacing is controlled within 1-5μm. While ensuring uniform current injection over a large area (quasi-vertical structure), the opening of the non-closed pattern can also reduce eddy current loss and electromagnetic shielding, improve magnetic field distribution, and significantly improve the modulation rate and signal-to-noise ratio in optical communication scenarios. Third, the first and second fan-out electrodes are located on the outer ring of the optical isolation structure, and the electrical contact points of the first and second fan-out electrodes are located on one side of the light emission direction of the microLED chip, providing a natural routing channel for the subsequent redistribution (RDL) metal layer without the need for additional slots or vias, which helps to simplify high-frequency interconnect design. At the same time, the setting of optical isolation slots and metal rings effectively blocks electrical and optical crosstalk between adjacent pixels; the spatial layout of the peripheral fan-out electrodes and the optical isolation structure avoids the stringent process requirements of deep via filling in the redistribution (RDL), improves the chip packaging yield and process compatibility, and enables the microLED chip of this invention to be used in both upright and flip-chip structures, facilitating soldering and electrical connection. Attached Figure Description

[0017] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0018] Figure 1 This is a cross-sectional schematic diagram of the light-emitting unit in the microLED structure prepared according to an embodiment of the present invention.

[0019] Figure 2 for Figure 1A top view of the second electrode.

[0020] Figure 3 This is a top view of the second electrode in another embodiment of the present invention.

[0021] Figure 4 This is a top view of the second electrode in another embodiment of the present invention.

[0022] Figure 5 In order to be in Figure 1 A schematic diagram of an ohmic contact formed on the first semiconductor layer of the light-emitting unit.

[0023] Figure 6 for Figure 5 Top view of the medium-ohm contact layer.

[0024] Figure 7 In order to be in Figure 5 A schematic diagram of the fabrication of the first electrode on the medium-ohmic contact layer.

[0025] Figure 8 In order to be in Figure 7 A schematic diagram of the etched pattern fabricated on the middle isolation layer.

[0026] Figure 9 In order to be in Figure 8 A top view of the etched pattern.

[0027] Figure 10 In order to be in Figure 8 Cross-sectional view of the metal filled with the etched pattern.

[0028] Figure 11 In order to be in Figure 8 A top view of the metal filled with etched patterns.

[0029] Figure 12 A cross-sectional view for preparing the fan-out metal layer.

[0030] Figure 13 for Figure 12 A top view of the fan-out metal layer.

[0031] Figure 14 For transfer Figure 12 A cross-sectional schematic diagram of a microLED chip fabricated using a microLED structure with a fan-out metal layer.

[0032] Figure 15 This is a schematic diagram of a microLED chip prepared in one embodiment of the present invention. Detailed Implementation

[0033] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to embodiments and accompanying drawings. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0034] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes the element.

[0035] It should be understood that when describing the structure of a component, when referring to a layer or region as being "above" or "on top of" another layer or region, it can mean that it is directly above the other layer or region, or that it contains other layers or regions between it and the other layer or region. Furthermore, if the component is flipped over, that layer or region will be located "below" or "under" the other layer or region.

[0036] This invention provides a micro-LED chip and its fabrication method. By designing the sidewall of the light-emitting unit as an inverted trapezoidal structure with a gradually decreasing cross-section from bottom to top, and setting a total reflection mirror (P electrode) on the sidewall, the light emitted laterally is constrained and reflected to the normal direction. At the same time, the closed light-isolating structure is arranged around the light-emitting unit, so that a fully enclosed reflection structure is formed around the light-emitting unit, which can more effectively constrain the beam divergence angle of the micro-LED chip.

[0037] Reference Figure 1 As shown, in the first embodiment of the present invention, a substrate 1100 is provided, on which a buffer layer 1200, a second semiconductor layer 1310, a light-emitting active layer 1320, and a first semiconductor layer 1330 are sequentially grown to form an epitaxial layer structure. The epitaxial layer structure is etched from top to bottom to form a plurality of light-emitting units 1300.

[0038] In this embodiment, the substrate 1100 is a sapphire substrate with a thickness of 300 μm. The second semiconductor layer 1310 is an N-type GaN layer with a thickness of 2.5 μm; the light-emitting active layer 1320 is a multiple quantum well (MQW), such as InxGa1-xN / GaN, where x is used to adjust the wavelength of light emission (360-650 nm), and has a thickness of 166.5 nm; the second semiconductor layer 1310 is a P-type GaN layer with a thickness of 300 nm. The first semiconductor layer 1330 includes a P-type electron blocking layer with a thickness of 20 nm, which is disposed between the multiple quantum well (MQW) and the P-type GaN layer.

[0039] It is understood that in other embodiments of the present invention, the substrate is, for example, a gallium arsenide substrate, wherein the second semiconductor layer grown on the gallium arsenide substrate is an N-type aluminum gallium indium phosphide (AGaInP), the light-emitting active layer is a multi-quantum-well structure, and the first semiconductor layer is a P-type AGaInP. Furthermore, gallium arsenide substrates are not conducive to mass transfer, so the gallium arsenide substrate is first replaced with a sapphire substrate using a wafer bonding process. Therefore, the second semiconductor layer on the replaced sapphire substrate is a P-type AGaInP, the first semiconductor layer is an N-type AGaInP, and a bonding layer is formed. The bonding layer is selected from adhesive materials such as polyimide, with a wavelength covering 200-1000 nm.

[0040] Continue to refer to Figure 1 In this embodiment, taking gallium nitride epitaxial structure as an example, the patterned epitaxial structure is formed by photolithography and ICP etching to form the step surface 1313 of the light-emitting unit 1300 and the second semiconductor layer 1310. The angle between the sidewall structure 1300a of the light-emitting unit 1300 and the plane of the substrate 1100 is between 30° and 85°.

[0041] In this embodiment, the second semiconductor layer 1310 includes an upper second semiconductor layer 1312 and a lower second semiconductor layer 1311. During the etching process of the second semiconductor layer 1310, the upper second semiconductor layer 1312 (the heavily doped region of N-type GaN) is etched to a depth of 0.1-1.2 μm. The sidewall 1312a of the upper second semiconductor layer 1312 serves as part of the sidewall structure 1300a of the light-emitting unit 1300. Meanwhile, the remaining unetched lower second semiconductor layer 1311 serves as a step surface 1313.

[0042] Reference Figure 1 and Figure 2 A second electrode 1400 is fabricated on the stepped surface 1313. In this embodiment, the second electrode 1400 is an N-electrode. The second electrode 1400 has an opening 1411.

[0043] Reference Figure 3In another embodiment of the present invention, the second electrode 1400 includes an injection electrode 1410 surrounding the light-emitting unit 1300, the injection electrode 1410 having an opening 1411. Further, a pad electrode 1420 is formed on one side of the injection electrode 1410, away from the light-emitting unit 1300.

[0044] like Figure 2 and Figure 3 As shown, the injection electrode 1410 with the opening 1411 is approximately a C-shaped ring structure. The inner ring of the C-shaped ring structure overlaps with the outer ring of the light-emitting pattern defined by the light-emitting unit 1300 by 80% or more. This can be considered as the inner ring length of the C-shaped ring structure corresponding to 80% or more of the length of the outer ring of the light-emitting pattern. The distance S between the inner ring of the injection electrode 1410 and the outer ring of the light-emitting pattern is 1-5 μm. In this embodiment, the second electrode 1400 adopts a non-closed pattern. The setting of its opening 1411 can effectively avoid parasitic capacitance and electromagnetic interference in the high-frequency modulation scenario of optical communication.

[0045] Combination Figure 2 Assuming the light-emitting pattern of the light-emitting unit 1300 is a circular pattern, then the inner circle of the C-ring structure is 4 / 5 circle or more.

[0046] like Figure 4 As shown, in other embodiments of the present invention, the second electrode 1400' may also be a closed annular pattern.

[0047] In this embodiment, the material of the second electrode 1400 is preferably a metal stack, such as a stack formed of metals like chromium, nickel, aluminum, titanium, platinum, and gold. Preferably, when the second electrode 1400 is a metal stack, the chromium layer is in contact with the N-type GaN, and the outermost layer of the metal stack is a titanium metal layer. The titanium metal layer is subsequently electrically connected to the fan-out metal layer, resulting in a more stable bond, lower resistance, and better stability. The process for fabricating the second electrode 1400 includes semiconductor processes such as vapor deposition, sputtering, photolithography, and etching.

[0048] Continue to refer to Figure 5 and Figure 6 In the first embodiment of the present invention, an ohmic contact layer 1500 is fabricated on the first semiconductor layer 1330 on top of the light-emitting unit 1300. The ohmic contact layer 1500 may adopt a metal stack structure such as ITO or Ni / Ag / Ti / Pt, and its area is smaller than the top surface area of ​​the first semiconductor layer 1330. Preferably, the ohmic contact layer 1500 is ITO and has a thickness of 100 nm.

[0049] Continue to refer to Figure 7The insulating material is then deposited on the first step surface 1313 using PECVD or ALD processes to form an insulating layer 1600. The insulating layer 1600 can be made of materials such as silicon oxide, silicon nitride, aluminum oxide, or titanium oxide. The insulating layer 1600 can be a single-layer or multi-layer film system; when it is a multi-layer film system, the insulating layer 1600 can be a Bragg reflector (DBR) structure composed of multiple films.

[0050] like Figure 7 As shown, firstly, the isolation layer 1600 above the lower second semiconductor layer 1311 simultaneously covers the second electrode 1400 and the sidewall structure 1300a and top of the light-emitting unit 1300. Secondly, through photolithography etching, the ohmic contact layer 1500 is exposed from the top surface 1610 of the etched isolation layer 1600. Then, the first electrode 1700 is fabricated through semiconductor processes such as evaporation, sputtering, photolithography, and etching. The first electrode 1700 is electrically connected to the ohmic contact layer 1500 and extends from the top of the first semiconductor layer 1330 towards the sidewall structure 1300a of the light-emitting unit 1300 (e.g., ...). Figure 1 (As shown) extends and covers the outside of the isolation layer 1600 corresponding to the sidewall structure 1300a.

[0051] Reference Figure 8 The first electrode 1700, for example a p-electrode, has an outer extension electrode 1720 extending beyond the top edge of the first semiconductor layer 1330 and covering the insulating layer 1600 outside the sidewall structure 1300a of the light-emitting unit 1300 in a top view. The outer circumference of the first electrode (p-electrode) 1700 is smaller than the inner circumference of the second electrode (n-electrode) 1400. Preferably, the first electrode 1700 is located inside the inner circumference of the injection electrode 1410 of the second electrode 1400. Furthermore, the first electrode 1700 and the injection electrode 1410 (or the second electrode 1400) do not overlap in the thickness direction of the substrate 1100.

[0052] Continue to refer to Figure 7 The second electrode 1400 and the first electrode 1700 are arranged in a near-vertical configuration on opposite sides of the isolation layer 1600, utilizing the height of the light-emitting unit 1300. Especially in high-frequency modulation scenarios in optical communication, significant parasitic capacitance and electromagnetic coupling can occur between the second electrode 1400 and the first electrode 1700, forming a "crosstalk path" for high-frequency signals. This invention addresses this by designing the second electrode 1400 as a non-closed pattern, with its opening 1411 preventing overlap in the top-view projection, thereby cutting off the interference path and improving the signal-to-noise ratio (SNR). Simultaneously, combined with... Figure 14The opening 1411 reduces the metal area of ​​the injection electrode 1410, which directly reduces the parasitic capacitance (Cpar) between the second electrode 1400 and the adjacent first electrode 1700 below. In high-frequency optical communication, reducing parasitic capacitance enables higher resonant frequencies and faster signal edge responses, thus supporting higher modulation rates.

[0053] Furthermore, in high-frequency modulation scenarios in optical communication, rapid switching can lead to induced currents (eddy currents) in the changing electromagnetic field if the second electrode 1400 is a closed ring. This eddy currents consume energy and reduce the device's quality factor (Q value). The opening 1411 of the second electrode 1400 cuts off the eddy current path, significantly reducing eddy current losses and improving the device's energy conversion efficiency at high frequencies. The opening 1411 also mitigates interference and shields the magnetic field distribution near the light-emitting unit 1300 and the first electrode 1700, avoiding self-inductance or mutual inductance in the internal circuitry and facilitating high-frequency impedance matching. Additionally, the opening 1411 adjusts the magnetic flux path, concentrating the magnetic flux in the coupling region of the active light-emitting layer 1320, reducing unnecessary edge coupling or parasitic effects, and promoting precise signal transmission suitable for high-speed optical interconnect scenarios. Finally, the opening 1411 provides a natural routing path for the subsequent fan-out metal layer to connect to the inner ring's first electrode 1700, eliminating the need for additional slots or vias and simplifying high-frequency interconnect design.

[0054] Continue to refer to Figure 7 and Figure 8 The first electrode 1700 is composed of a main electrode 1710 electrically connected to the ohmic contact layer 1500 and an external extension electrode 1720 located on the sidewall structure 1300a, wherein the main electrode 1710 and the external extension electrode 1720 are integrally formed, for example.

[0055] In this embodiment, the first electrode 1700 is made of a metal stack, such as chromium, silver, nickel, aluminum, titanium, platinum, gold, etc., preferably containing aluminum or silver as a reflective electrode layer. The first electrode 1700 serves as a reflective electrode layer, and is connected to the light-emitting unit 1300 (e.g., ...). Figure 1 The pattern shown is adapted to the microLED structure before it is transferred to form a microLED chip. It can be considered that the first electrode 1700 covers the light-emitting unit 1300 from the top. Specifically, when the microLED structure is transferred to the substrate 3000 (as shown) using mass transfer technology... Figure 13 After that, the first electrode 1700 is close to the adhesive layer 4000 and is located on the opposite side of the light emission direction of the light emission unit 1300. It can reflect the light emitted from the light emission active layer 1320 through the first electrode, thereby increasing the light emission efficiency of the light emission power supply 1300.

[0056] Furthermore, since the patterns of the first electrode 1700 and the non-light-emitting side of the light-emitting unit 1300 are matched, it is possible to fabricate a micro-LED chip (such as...). Figure 15 As shown, the light-emitting area of ​​the light-emitting unit 1300 gradually increases from the side of the first semiconductor layer 1330 toward the side of the second semiconductor layer 1310. In cross-sectional view, it is an inverted trapezoidal light-emitting structure. The light-emitting direction of the light-emitting unit 1300 is controlled by constraining the light divergence angle on the side of the light-emitting unit 1300 away from the light-emitting direction.

[0057] Reference Figures 8 to 9 An etched isolation layer 1600 and a lower second semiconductor layer 1311 are etched to form an etched pattern 1800. The etched pattern 1800 includes mutually spaced optical isolation trenches 1810, a first fan-out channel trench 1820, and a second fan-out channel trench 1830.

[0058] like Figure 9 As shown, the optical isolation groove 1810 is a continuous annular pattern, located on the outer ring of the second electrode 1400 in the radial direction of the light-emitting unit 1300. The radial distance between the inner ring of the discontinuous annular pattern and the outer ring of the injection electrode 1410 is >1 μm.

[0059] In other embodiments of the present invention, the optical isolation trench 1810 and the second electrode 1400 may also be arranged to overlap each other in the thickness direction of the substrate 1100. When the optical isolation trench 1810 and the second electrode 1400 overlap, the second electrode 1400 can be directly fanned out through the isolation metal ring in the optical isolation trench 1810.

[0060] like Figure 8 and Figure 9 As shown, the photoisolating trench 1810 in the etched pattern 1800 is a groove extending along the light emission direction of the light-emitting unit, penetrating the isolation layer 1600 and the lower second semiconductor layer 1311. The cross-section of the groove is, for example, an inverted trapezoidal shape. Preferably, the etched pattern 1800 is etched to the upper part of the buffer layer 1200, but does not penetrate the buffer layer 1200.

[0061] In this embodiment, when the optical isolation trench 1810 does not coincide with the second electrode 1400, the etching pattern 1800 forms a peripheral step surface 1210 on the buffer layer 1200. The peripheral step surface 1210 is located at the bottom of the annular optical isolation trench 1810, and the annular optical isolation trench 1810 is located on the outer ring of the step surface 1313 of the second semiconductor layer 1310. Preferably, the lateral distance between the peripheral step surface 1210 and the step surface 1313 of the second semiconductor layer 1310 is ≥1μm.

[0062] In this embodiment, on the outer step surface 1210, the inclination angle of the etched sidewall formed by the isolation layer 1600 and the lower second semiconductor layer 1311 is between 30° and 85°.

[0063] Continue to refer to Figure 9 Since the epitaxial structure of the substrate 1100 can often fabricate multiple light-emitting units 1300 at once, the etched pattern 1800 also includes a partition pattern 1900 that penetrates the isolation layer 1600, the lower second semiconductor layer 1311, and the buffer layer 1200. The partition pattern 1900 is used to separate multiple micro-LED structures. That is, multiple micro-LED structures can be cut into multiple independent micro-LED chips at the partition pattern 1900.

[0064] Reference Figure 10 An insulating layer 2000 is deposited, which at least covers the etched pattern 1800 and the first electrode 1700. In this embodiment, the insulating layer 2000 is formed using a vapor deposition (CVD) or atomic deposition (ALD) process, and is made of materials selected from silicon oxide, silicon nitride, aluminum oxide, titanium oxide, etc. The insulating layer 2000 can be a single layer or multiple layers; when it is a multiple layer, it can form a Bragg reflector (DBR). The micro-LED structure is transferred from the substrate 1100 to the substrate 3000 (…). Figure 13 When the micro-LED structure is flipped to one side, the insulating layer 2000 is composed of multiple film layers. The Bragg reflector DBR can be used to increase the light output efficiency of the micro-LED structure.

[0065] Reference Figure 10 and Figure 11 After the insulating layer 2000 process, an optical isolation structure 2100 and a fan-out metal layer 2200 are prepared by electroplating or vapor deposition. The optical isolation structure 2100 is filled in the optical isolation groove 1810 to form a metal ring around the light-emitting unit. The first fan-out metal 2210 in the fan-out metal layer 2200 is filled in the first fan-out channel 1820, and the second fan-out metal 2220 in the fan-out metal layer 2200 is filled in the second fan-out channel 1830.

[0066] In this embodiment, the optical isolation structure 2100, the first fan-out metal 2210, and the second fan-out metal 2220 are all metal stacks, and the materials of the metal stacks are, for example, multilayer composite metal films such as chromium, silver, nickel, aluminum, titanium, platinum, and gold. The metal stack is a reflective metal layer containing aluminum or silver.

[0067] In this embodiment, the optical isolation structure 2100 serves as a reflective metal ring filling the optical isolation groove 1810. Therefore, in the radial direction of the light-emitting unit 1300, light rays escaping from the opening 1411 of the second electrode 1400 in the inner ring can be reflected back to the light-emitting area through the optical isolation structure 2100 in the outer ring. This synergistic total internal reflection structure of the inner and outer rings effectively suppresses light radiation loss towards the edge, thereby significantly reducing the beam divergence angle and enabling the microLED chip to possess excellent collimated light emission characteristics, meeting the low divergence angle requirements of optical communication and 3D printing scenarios.

[0068] Reference Figure 12 and Figure 13 A second insulating layer 2300 is further prepared on one side of the first insulating layer 2000, and the second insulating layer 2300 is patterned to form a shielding portion 2310 and an opening 2320. The shielding portion 2310 is used to isolate the light-isolating structure 2310, and the first electrode 1700, the second electrode 1400, the first fan-out metal 2210, and the second fan-out metal 2220 are exposed from the opening 2320.

[0069] After the patterning of the second insulating layer 2300, a first fan-out electrode 2410 and a second fan-out electrode 2420 are fabricated on the second insulating layer 2300. The first fan-out electrode 2410 is electrically connected to the first fan-out metal 2210 and the first electrode 1700; the second fan-out electrode 2420 is electrically connected to the second fan-out metal 2220 and the second electrode 1400.

[0070] In this embodiment, after multiple micro-LED structures are fabricated on the substrate 1100, the process further includes transferring the multiple micro-LED structures to one side of the substrate 3000 using mass transfer technology to fabricate a micro-LED chip.

[0071] First, a substrate 3000 is provided to support the load, and an adhesive layer 4000 is coated on it.

[0072] Next, the prepared microLED structure with the fan-out metal layer is flip-chip transferred onto the adhesive layer 4000 using mass transfer technology, thus fixing the microLED structure in the adhesive layer 4000. The original substrate 1100 is removed by laser lift-off. The buffer layer 1200 and the thinned portion of the lower second semiconductor layer 1311 are removed by plasma etching, controlling the total thickness of the light-emitting unit (second semiconductor layer 1310, light-emitting active layer 1320, and first semiconductor layer 1320) to 0.5-3 μm, exposing the first fan-out electrode 2410 and the second fan-out electrode 2420.

[0073] like Figure 14As shown, in other embodiments of the present invention, depending on actual usage needs, a redistribution layer can be further fabricated on the exposed first fan-out electrode 2410 and second fan-out electrode 2420 side to fan out the electrodes of the micro-LED chip. In this case, since the first fan-out electrode 2410 and second fan-out electrode 2420 are distributed on both sides of the light-emitting unit 1300, and the first fan-out electrode 2410 does not pass through the area of ​​the second electrode 1400, it does not obstruct the light-emitting area, thus supporting a more flexible wiring method.

[0074] Finally, the substrate is cut along the 1900-degree interval pattern to obtain the microLED chip. The light emission direction of the microLED chip is as follows: Figure 15 As indicated by the upward arrow.

[0075] like Figure 14 and Figure 15 As shown, when the microLED structure is flip-chip transferred onto the substrate 3000, the bottom of the inverted trapezoidal groove of the optical isolation trench 1810 is flipped into the top of the upright trapezoidal groove. The top of the upright trapezoidal groove is located in the lower second semiconductor layer 1312 and / or the buffer layer 1200, so that the top of the optical isolation structure 2100 (metal ring) in the optical isolation trench 1810 is flush with or protrudes from the light-emitting surface of the light-emitting unit 1300, wherein the light-emitting surface is located on the surface of the lower second semiconductor layer 1312 away from the first semiconductor layer 1330.

[0076] Continue to refer to Figure 14 and Figure 15 The inner ring sidewall of the inverted trapezoidal groove of the optical isolation groove 1810 forms a closed outer ring inverted trapezoidal structure around the light-emitting unit 1300. In the radial direction, the outer ring inverted trapezoidal structure is located on the outer ring of the inverted trapezoidal light-emitting unit 1300. Combined with the first electrode 1700 on one side of the first semiconductor layer 1330, the microLED chip of the present invention utilizes the optical isolation structure 2100 of the outer ring inverted trapezoidal structure on the upper part (lower second semiconductor layer 1311) of the second semiconductor layer 1310, and utilizes the first electrode 1700 as the reflection structure of the inner ring inverted trapezoidal structure on the lower part (upper second semiconductor layer 1312) of the second semiconductor layer 1310. The light constraint is formed sequentially from the inside to the outside of the light-emitting unit 1300, which significantly restricts the light emission angle and forms a light-emitting structure with strong axial light intensity. Experimental results show that after the microLED structure of this application is fabricated into a microLED chip, the light output through the air side is increased by about 20%, the light output through the substrate side is increased by more than 130%, and the beam divergence angle is reduced by about 30%.

[0077] In summary, the microLED chip provided by this invention has at least the following beneficial effects: First, by setting a closed-pattern optical isolation structure on the second semiconductor layer and designing the sidewall of the light-emitting unit as an inverted trapezoidal structure with a gradually increasing cross-section from bottom to top, the first electrode can extend along the sidewall as a total reflection mirror, forming a fully enclosed multi-layer reflection layout in the circumferential and radial directions of the light-emitting unit. The closed optical isolation structure enhances the reflection and confinement of lateral light, reflecting light that would otherwise easily escape from the sidewall back to the normal direction, thereby significantly converging the beam divergence angle, improving the collimation and optical coupling efficiency, and greatly improving the adaptability of the microLED chip in long-distance transmission scenarios such as optical communication and 3D printing. Second, in this invention, the second electrode is located on the stepped surface and arranged around the light-emitting unit, and its injection electrode adopts a non-closed-pattern design, so that the vertical projections of the first electrode and the second electrode do not coincide in the substrate thickness direction. This can effectively cut off the parasitic coupling and electromagnetic interference path of high-frequency signals between the electrodes, reduce parasitic capacitance, and avoid high-frequency crosstalk. Meanwhile, the inner ring of the injection electrode overlaps with the outer ring of the light-emitting pattern by 80% or more, and the spacing is controlled within 1-5μm. While ensuring uniform current injection over a large area (quasi-vertical structure), the opening of the non-closed pattern can also reduce eddy current loss and electromagnetic shielding, improve magnetic field distribution, and significantly improve the modulation rate and signal-to-noise ratio in optical communication scenarios. Third, the first and second fan-out electrodes are located on the outer ring of the optical isolation structure, and the electrical contact points of the first and second fan-out electrodes are located on one side of the light emission direction of the microLED chip, providing a natural routing channel for the subsequent redistribution (RDL) metal layer without the need for additional slots or vias, which helps to simplify high-frequency interconnect design. At the same time, the setting of optical isolation slots and metal rings effectively blocks electrical and optical crosstalk between adjacent pixels; the spatial layout of the peripheral fan-out electrodes and the optical isolation structure avoids the stringent process requirements of deep via filling in the redistribution (RDL), improves the chip packaging yield and process compatibility, and enables the microLED chip of this invention to be used in both upright and flip-chip structures, facilitating soldering and electrical connection.

[0078] The present invention has been described by the above-described embodiments; however, these embodiments are merely examples for implementing the present invention. Furthermore, the technical features involved in the different embodiments of the present invention described above can be combined with each other as long as they do not conflict with each other. It must be pointed out that the disclosed embodiments do not limit the scope of the present invention. On the contrary, any modifications and refinements made without departing from the spirit and scope of the present invention are within the scope of patent protection of the present invention.

Claims

1. A microLED chip, comprising a substrate and a microLED structure, characterized in that, The microLED structure is fixed to the first side of the substrate by an adhesive layer, and the microLED structure includes a light-emitting unit, a first electrode, and a second electrode. Along the thickness direction of the substrate, the light-emitting unit includes a first semiconductor layer, a light-emitting active layer, and a second semiconductor layer; The first electrode is electrically connected to the first semiconductor layer; The second electrode is electrically connected to the second semiconductor layer; An optically isolating structure is located in the second semiconductor layer. In the radial direction of the light-emitting unit, the optically isolating structure is arranged around the outer ring of the light-emitting unit and forms a closed pattern. The second electrode and the optically isolating structure coincide along the thickness direction of the substrate; or, the second electrode is located in the inner ring of the optically isolating structure along the radial direction of the light-emitting unit. as well as A first fan-out electrode and a second fan-out electrode, wherein the first fan-out electrode is electrically connected to the first electrode and the second fan-out electrode is electrically connected to the second electrode.

2. The microLED chip according to claim 1, characterized in that, The second electrode is located on the stepped surface of the second semiconductor layer facing the first semiconductor layer and is disposed around the light-emitting unit; along the radial direction of the light-emitting unit, the second electrode is located in the outer ring and the first electrode is located in the inner ring.

3. The microLED chip according to claim 2, characterized in that, The second electrode includes an injection electrode surrounding the light-emitting unit, wherein the injection electrode is a non-closed pattern having an opening; or, the injection electrode is a closed pattern.

4. The microLED chip according to claim 3, characterized in that, When the injection electrode is a non-closed pattern, the light-emitting unit defines a light-emitting pattern, and the injection electrode is arranged around the outer periphery of the light-emitting pattern, wherein the inner periphery of the injection electrode overlaps with 80% or more of the outer periphery of the light-emitting pattern.

5. The microLED chip according to claim 3, characterized in that, The distance between the inner circle of the injection electrode and the outer perimeter of the light-emitting pattern is 1-5 μm.

6. The microLED chip according to claim 1, characterized in that, The closed pattern is a metal ring formed around the light-emitting unit.

7. The microLED chip according to claim 6, characterized in that, Also includes: An optical isolation trench is provided, which extends through the second semiconductor layer and part of the buffer layer and surrounds the light-emitting unit, and the metal ring is disposed in the optical isolation trench.

8. The microLED chip according to claim 1, characterized in that, The first semiconductor layer has a first sidewall around its periphery, the light-emitting active layer has a middle sidewall around its periphery, and the second semiconductor layer has a second sidewall around its periphery. The first sidewall, the middle sidewall, and the second sidewall together surround the periphery of the light-emitting unit as the sidewall structure of the light-emitting unit. The perimeter of the sidewall structure gradually increases from the side of the first semiconductor layer toward the side of the second semiconductor layer, so that the cross-section of the light-emitting unit is an inverted trapezoidal structure.

9. The microLED chip according to claim 1, characterized in that, Along the radial direction of the light-emitting unit, the first fan-out electrode and the second fan-out electrode are respectively located on the outer ring of the optical isolation structure.

10. The microLED chip according to claim 1, characterized in that, The microLED chip can be a conventional microLED chip or a flip-chip microLED chip.

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