Display panel, preparation method of display panel and display module

Abstract

This application provides a display panel, a method for fabricating the display panel, and a display module. In the display panel, a first electrode is connected to a first portion of a first semiconductor layer among a plurality of light-emitting units arranged along a first direction, and a second electrode is connected to a second semiconductor layer among a plurality of light-emitting units arranged along a second direction. A first trace connects to the first electrode, a second trace connects to the second electrode, and the first trace and the second trace connect to different bonding electrodes, which are used for bonding with a display driver chip. In the above structure, the display driver chip can provide electrical signals to the first and second electrodes to control the display of the light-emitting units on the display panel. Compared with a display panel with an array driving layer, the film structure of this application is simpler, lower in cost, and has a higher process yield, making it more conducive to its application in AR glasses terminals.

Description

Technical Field

[0001] This application relates to the field of display technology, and more specifically, to a display panel, a method for manufacturing the display panel, and a display module. Background Technology

[0002] In augmented reality (AR) display scenarios, AR glasses have high requirements for the brightness and pixel density of the display panel in order to achieve high-quality off-axis display and field of view imaging.

[0003] Although the brightness and pixel density of current light-emitting units (such as Micro LED) can well meet the needs of AR displays, there are still problems such as high price and immature manufacturing technology. Summary of the Invention

[0004] In order to overcome the technical problems mentioned in the above technical background, this application provides a display panel, a method for manufacturing the display panel, and a display module.

[0005] A first aspect of this application provides a display panel, the display panel comprising: substrate; Multiple light-emitting units are arranged in an array on the substrate. In the direction away from the substrate, each light-emitting unit includes a first semiconductor layer, a light-emitting layer and a second semiconductor layer stacked together. The first semiconductor layer includes a first portion extending relative to the light-emitting layer and the second semiconductor layer. The orthographic projections of the light-emitting layer and the second semiconductor layer on the substrate coincide. The second semiconductor layers of different light-emitting units are spaced apart from each other. The first electrode is connected to a first portion of a first semiconductor layer in a plurality of light-emitting units arranged along a first direction, and is insulated from a second semiconductor layer in the light-emitting unit. The second electrode is connected to the second semiconductor layer in a plurality of light-emitting units arranged along the second direction, wherein the first electrode and the second electrode are insulated from each other, and the first direction and the second direction intersect. A wiring layer is located on the side of the light-emitting unit away from the substrate. The wiring layer includes a first wiring, a second wiring, and a bonding electrode. The first wiring is used to connect to the first electrode, and the second wiring is used to connect to the second electrode. The first wiring and the second wiring are connected to different bonding electrodes. The bonding electrodes are used to bond with the display driver chip. In one possible embodiment of this application, the first semiconductor layers in the plurality of light-emitting units arranged along the first direction are spaced apart from each other, or the first semiconductor layers in the plurality of light-emitting units arranged along the first direction are connected together. The first electrode is directly electrically connected to the first portion, or the display panel further includes a first insulating layer that covers the light-emitting unit. The first insulating layer includes a first through-hole that exposes at least part of the first portion, and the first electrode is electrically connected to the first portion through the first through-hole. Preferably, the orthographic projection of the light-emitting unit on the substrate is square, the size of the orthographic projection of the first semiconductor layer 121 on the substrate ranges from 4 micrometers to 49 micrometers, the gap between adjacent light-emitting units ranges from 1 micrometer to 5 micrometers, and the first portion extends out of the second semiconductor layer in a length range of 1 micrometer to 5 micrometers. Preferably, the first semiconductor layer is an N-type semiconductor layer, the second semiconductor layer is a P-type semiconductor layer, and the light-emitting layer is a quantum well layer; Preferably, the first semiconductor layer comprises an N-type gallium nitride layer, and the second semiconductor layer comprises a P-type gallium nitride layer; Preferably, the bonding electrode includes a first bonding electrode and a second bonding electrode, the first trace is connected to a portion of the first bonding electrode, the second trace is connected to another portion of the first bonding electrode, and the second bonding electrode is used for bonding with the flexible circuit board.

[0006] In one possible embodiment of this application, the display panel further includes a second insulating layer covering the light-emitting unit and the first electrode, the second insulating layer including a second through-hole exposing a portion of the second semiconductor layer of the light-emitting unit; The second electrode is electrically connected to the second semiconductor layer of the light-emitting unit through the second through-hole; Preferably, the first direction and the second direction are perpendicular to each other.

[0007] In one possible embodiment of this application, the wiring layer is disposed on the same layer as the second electrode; The second insulating layer also includes a third through hole near the end side of the first electrode and exposing the first electrode, through which the first trace is electrically connected to the first electrode; The display panel includes a display area formed by the light-emitting units and a non-display area that at least partially surrounds the display area, wherein the bonding electrode is located in the non-display area.

[0008] In one possible embodiment of this application, the wiring layer is disposed on the same layer as the second electrode; The second insulating layer also includes a third through hole near the end side of the first electrode and exposing the first electrode, through which the first trace is electrically connected to the first electrode; The display panel includes a display area formed by the light-emitting units and a non-display area that at least partially surrounds the display area, wherein the bonding electrode is located in the non-display area.

[0009] In one possible embodiment of this application, the display panel further includes a third insulating layer that covers the second insulating layer and the second electrode; The third insulating layer includes a fourth through hole, which is located near the end of the second electrode and exposes the second electrode. The third insulating layer includes a fifth through hole, which is disposed near the end side of the first electrode. The second insulating layer also includes a sixth through hole, which is connected to the fifth through hole and exposes the first electrode. The first trace is connected to the first electrode through the fifth and sixth through holes, and the second trace is connected to the second electrode through the fourth through hole; Preferably, both ends of the first electrode are electrically connected to the first bonding electrode via the first trace; Preferably, the display panel includes a display area formed by the light-emitting unit, and the orthographic projections of the first trace, the second trace, the first bonding electrode, and the second bonding electrode on the substrate are all located in the display area.

[0010] A second aspect of this application also provides a method for manufacturing a display panel, the method comprising: A substrate is provided, and a first semiconductor material layer, a light-emitting material layer and a second semiconductor material layer are sequentially formed on the substrate; The second semiconductor material layer and the light-emitting material layer are patterned to form an array of second semiconductor layers and light-emitting layers, wherein the orthographic projections of the light-emitting layer and the second semiconductor layer on the substrate coincide, and different second semiconductor layers are spaced apart from each other. The first semiconductor material layer is patterned to form a first semiconductor layer, wherein the first semiconductor layer includes a first portion extending relative to the light-emitting layer and the second semiconductor layer, and the first semiconductor layer, the light-emitting layer and the second semiconductor layer are stacked to form a light-emitting unit; A first electrode is fabricated to electrically connect a first portion of a plurality of light-emitting units arranged along a first direction, wherein the first electrode is insulated from a second semiconductor layer in the light-emitting unit; A second electrode is fabricated to connect the second semiconductor layer in a plurality of light-emitting units arranged along a second direction, wherein the first electrode and the second electrode are insulated from each other, and the first direction and the second direction intersect. A wiring layer is formed on the side of the light-emitting unit away from the substrate. The wiring layer includes a first wiring, a second wiring, and a bonding electrode. The first wiring is used to connect to the first electrode, and the second wiring is used to connect to the second electrode. The first wiring and the second wiring are connected to different bonding electrodes. The bonding electrodes are used to bond with the display driver chip.

[0011] In one possible embodiment of this application, the step of fabricating a first electrode that electrically connects a first portion of a plurality of light-emitting units arranged along a first direction includes: A first conductive layer is fabricated on the entire surface, and the first conductive layer is patterned to form a first electrode that electrically connects the first part of a plurality of light-emitting units arranged along the first direction. Alternatively, the step of fabricating a first electrode that electrically connects a first portion of a plurality of light-emitting units arranged along a first direction includes: A first insulating layer is fabricated to cover the light-emitting unit, and a first through-hole is fabricated on the first insulating layer to expose the first portion; A first conductive layer is fabricated on the entire surface of the first insulating layer, and the first conductive layer is patterned to form a first electrode that electrically connects a first portion of a plurality of light-emitting units arranged along a first direction, wherein the first electrode is electrically connected to the first electrode through the first through hole.

[0012] In one possible embodiment of this application, the step of fabricating a second electrode that connects the second semiconductor layer to a plurality of light-emitting units arranged along a second direction includes: A second insulating layer is fabricated to cover the first electrode and the light-emitting unit, and a second through-hole is fabricated on the second insulating layer to expose a portion of the second semiconductor layer of the light-emitting unit; A second conductive layer is formed on the side of the second insulating layer away from the substrate, and the second conductive layer is patterned to form a second electrode that electrically connects the second semiconductor layer in a plurality of light-emitting units arranged along the second direction.

[0013] In one possible embodiment of this application, the step of fabricating a wiring layer on the side of the light-emitting unit away from the substrate includes: A third through hole is formed on the second insulating layer near the end of the first electrode to expose the first electrode; The second conductive layer is imaged and the wiring layer is also formed, wherein the first wiring is connected to the first electrode through the third via; the second wiring is connected to the second electrode in the same layer; Preferably, the bonding electrode is located outside the display area formed by the light-emitting unit.

[0014] In one possible embodiment of this application, the step of fabricating a wiring layer on the side of the light-emitting unit away from the substrate includes: A third insulating layer is fabricated on the second electrode and the second insulating layer; A fourth through hole is formed on the end side of the third insulating layer near the second electrode to expose the second electrode; A fifth through hole is formed on the end side of the third insulating layer near the first electrode, and a sixth through hole communicating with the fifth through hole is formed on the second insulating layer, wherein the fifth through hole and the sixth through hole expose the first electrode; A third conductive layer is fabricated on the third insulating layer, and the third conductive layer is patterned to form the trace layer. The first trace is connected to the first electrode through the fifth and sixth vias, and the second trace is connected to the second electrode through the fourth via.

[0015] A third aspect of this application also provides a display module, the display module comprising the display panel described in any possible embodiment of the first aspect, or the display panel prepared in any possible embodiment of the second aspect: The display module further includes a display driver chip and a flexible circuit board. The display driver chip and the flexible circuit board are bonded to the bonding electrode. The signal in the flexible circuit board is processed by the display driver chip and then provided to the first electrode and the second electrode.

[0016] This application provides a display panel, a method for fabricating the display panel, and a display module. In the display panel, a first electrode is connected to a first portion of a first semiconductor layer among a plurality of light-emitting units arranged along a first direction, and a second electrode is connected to a second semiconductor layer among a plurality of light-emitting units arranged along a second direction. A first trace connects to the first electrode, a second trace connects to the second electrode, and the first trace and the second trace connect to different bonding electrodes, which are used for bonding with a display driver chip. In the above structure, the display driver chip can provide electrical signals to the first and second electrodes to control the display of the light-emitting units on the display panel. Compared with a display panel with an array driving layer, the film structure of this application is simpler, lower in cost, and has a higher process yield, making it more conducive to its application in AR glasses terminals. Attached Figure Description

[0017] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 One of the top views of the display panel provided in this embodiment is illustrated; Figure 2 Example Figure 1 One of the schematic diagrams of the cross section along the A1-A1 direction; Figure 3 Example Figure 1 Second schematic diagram of the cross-section along the A2-A2 direction; Figure 4 A schematic diagram illustrating the positional distribution of the first electrode and the light-emitting unit is shown. Figure 5 A schematic diagram illustrating another positional distribution of the first electrode and the light-emitting unit is shown; Figure 6 Example Figure 1 A schematic diagram of a portion of the film structure along the A2-A2 direction; Figure 7 Example Figure 1 A schematic diagram showing the dimensional relationships of the light-emitting units in the middle; Figure 8 A second top view of the display panel provided in this embodiment is shown; Figure 9 Example Figure 8 A schematic diagram of the cross-section along the A3-A3 direction; Figure 10 Example Figure 8 A schematic diagram of the cross-section along the A4-A4 direction; Figure 11 Example 3 shows a top view of the display panel provided in this embodiment; Figure 12 A flowchart illustrating the method for manufacturing the display panel provided in this embodiment is shown. Figure 13A and Figure 13B Example Figure 12 Corresponding process flow chart; Figure 14 An example of implementation is provided. Figure 12 A flowchart illustrating step S14; Figure 15 An example of implementation is provided. Figure 12 A flowchart illustrating step S15. Figure 16 An example of implementation is provided. Figure 12 A flowchart illustrating step S16; Figure 17 An example of implementation is provided. Figure 12 Another flowchart for step S16; Figure 18 A top view of the display module provided in this embodiment is shown.

[0019] Main icons: 1-Display module; 10-Display panel; 11-Substrate; 12-Light-emitting unit; 121-First semiconductor layer; 1211-First part; 122-Light-emitting layer; 123-Second semiconductor layer; 13-First electrode; 14-Second electrode; 15-Way trace layer; 151-First trace; 152-Second trace; 153-Bonding electrode; 1531-First bonding electrode; 1532-Second bonding electrode; 16-First insulating layer; 17-Second insulating layer; 18-Third insulating layer; 201-First through-hole; 202-Second through-hole; 203-Third through-hole; 204-Fourth through-hole; 205-Fifth through-hole; 206-Sixth through-hole; 30-First semiconductor material layer; 50-Second semiconductor material layer; 60-Display driver chip; 70-Flexible circuit board. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0021] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0022] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0023] It should be noted that, where there is no conflict, different features in the embodiments of this application can be combined with each other.

[0024] For ease of understanding, the accompanying diagram shows the mutually orthogonal X-axis, Y-axis, and Z-axis. The direction along the X-axis is called the X-direction, the direction along the Y-axis is called the Y-direction, and the direction along the Z-axis is called the Z-direction. The Z-direction is the normal direction relative to the plane containing the X and Y directions. Furthermore, a view where various elements are observed parallel to the plane containing the X and Y directions is called a top view. Alternatively, the planes in the X and Y directions can be planes parallel to the display surface of the display panel, and the Z-direction can be a direction parallel to the thickness direction of the display panel.

[0025] It should be understood that the accompanying drawings in this application are for illustrative and descriptive purposes only and are not intended to limit the scope of protection of this application. Furthermore, it should be understood that the schematic drawings are not drawn to scale. The flowcharts used in this application illustrate operations implemented according to some embodiments of this application. It should be understood that the operations in the flowcharts may not be implemented in sequence, and steps without logical contextual relationships may be reversed or performed simultaneously. Moreover, those skilled in the art, guided by the content of this application, may add one or more other operations to the flowcharts, or remove one or more operations from the flowcharts.

[0026] In the description of this application, it should be noted that the terms "upper," "lower," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product is in use. These terms are used only for the convenience of describing this application and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. For example, for certain elements, sometimes "upper" or "above" is used when describing the position of an element located in the Z direction, and "lower" or "below" is used when describing the position of an element located in the opposite direction. Furthermore, when using terms such as "upper," "above," "lower," "below," and "relative" to define the positional relationship between two elements, this includes not only the state where the two elements are directly connected, but also the state where the two elements are separated by a gap or other elements. In addition, the terms "first," "second," etc., are only used for distinguishing descriptions and should not be construed as indicating or implying relative importance.

[0027] The inventors discovered that in related technologies, display panels drive light-emitting units based on an array driving layer (e.g., a single-crystal silicon driving backplane). Since the array driving layer is formed by patterning many film layers, there are technical problems such as complex manufacturing process, low yield, and high cost, which seriously limit the promotion and application of this type of display panel in AR glasses terminals.

[0028] To address the aforementioned technical problems, the inventors have innovatively designed the following technical solutions, which will be described in detail below with reference to the accompanying drawings. It should be noted that the deficiencies in the solutions of related technologies are the result of the inventors' practical experience and careful research. Therefore, the discovery process of the aforementioned technical problems and the solutions proposed in the embodiments of this application below should be considered contributions made by the inventors during the invention process, and should not be construed as technical content known to those skilled in the art.

[0029] Please refer to Figure 1 , Figure 2 and Figure 3 , Figure 1 A top view of the display panel provided in this embodiment is illustrated. Figure 2 Example Figure 1 A cross-sectional diagram at position A1-A1. Figure 3 Example Figure 1 A cross-sectional diagram at position A2-A2. (See below for details.) Figure 1 , Figure 2 and Figure 3 The display panel provided in this embodiment will be described.

[0030] In this embodiment, the display panel 10 includes a substrate 11, a light-emitting unit 12, a first electrode 13, a second electrode 14, and a wiring layer 15. The substrate 11 may be a single-crystal silicon substrate or a sapphire substrate.

[0031] Multiple light-emitting units 12 are arranged in an array on the substrate 11. For example, the multiple light-emitting units 12 are arranged in a row of light-emitting units along a first direction (X direction in the figure) and in a column of light-emitting units along a second direction (Y direction in the figure), wherein the first direction and the second direction intersect, and preferably, the first direction and the second direction are perpendicular to each other.

[0032] In the direction away from the substrate 11, the light-emitting unit 12 includes a first semiconductor layer 121, a light-emitting layer 122, and a second semiconductor layer 123 stacked together. The first semiconductor layer 121 and the second semiconductor layer 123 provide charge carriers of opposite polarities. The recombination of these oppositely polarized charge carriers in the light-emitting layer 122 causes it to emit light. The first semiconductor layer 121 can be an N-type semiconductor layer or a P-type semiconductor layer, and correspondingly, the second semiconductor layer 123 can be either a P-type semiconductor layer or an N-type semiconductor layer.

[0033] In this embodiment, the light-emitting unit 12 can be a light-emitting unit 12 of different colors, wherein the content of the material used to determine the emission wavelength in the light-emitting layer 122 of different light-emitting units 12 is different. For example, when the material of the light-emitting layer 122 is indium gallium nitride, the indium content in the light-emitting layer 122 of different light-emitting units 12 is different. The indium content is related to the wavelength of the light emitted by the light-emitting unit 12. For example, the longer the wavelength of the light emitted by the light-emitting unit 12, the higher the indium content in the corresponding light-emitting layer 122.

[0034] In this embodiment, the first semiconductor layer 121 includes a first portion 1211 extending relative to the light-emitting layer 122 and the second semiconductor layer 123. The orthographic projections of the light-emitting layer 122 and the second semiconductor layer 123 on the substrate 11 coincide, and the second semiconductor layers 123 of different light-emitting units 12 are spaced apart from each other, that is, the orthographic projections of the second semiconductor layers 123 of different light-emitting units 12 on the substrate 11 do not overlap with each other.

[0035] The first electrode 13 is connected to the first portion 1211 of the first semiconductor layer 121 in a plurality of light-emitting units 12 arranged along a first direction (X direction in the figure), and is insulated from the second semiconductor layer 123 in the light-emitting unit 12. In other words, the first electrode 13 connects to the first portion 1211 of each light-emitting unit 12 in the row of light-emitting units, and is used to provide electrical signals to the first semiconductor layer 121 of each light-emitting unit 12 in the same row of light-emitting units. In addition, the first electrode 13 is insulated from the second semiconductor layer 123 in the light-emitting unit 12, which can avoid short circuits caused by contact between the two, thus affecting the normal operation of the light-emitting unit 12.

[0036] The second electrode 14 is connected to the second semiconductor layer 123 of a plurality of light-emitting units 12 arranged along the second direction (Y direction in the figure). In other words, the second electrode 14 is connected to the second semiconductor layer 123 of each light-emitting unit 12 in the same light-emitting unit column, and is used to provide electrical signals to the second semiconductor layer 123 of each light-emitting unit 12 in the same light-emitting unit column.

[0037] The first electrode 13 and the second electrode 14 are insulated from each other. The first electrode 13 extends along a first direction, and a plurality of first electrodes 13 are arranged along a second direction. The second electrode 14 extends along the second direction, and a plurality of second electrodes 14 are arranged along the first direction.

[0038] The wiring layer 15 is located on the side of the light-emitting unit 12 away from the substrate 11. The wiring layer 15 includes a first wiring 151, a second wiring 152, and a bonding electrode 153. The first wiring 151 is connected to the first electrode 13, and the second wiring 152 is connected to the second electrode 14. The first wiring 151 and the second wiring 152 are respectively connected to different bonding electrodes 153. The bonding electrode 153 is also used for bonding with the display driver chip, that is, the display driver chip can provide electrical signals to the first electrode 13 through the first wiring 151 and to the second electrode 14 through the second wiring 152. For example, when it is necessary to control a certain light-emitting unit 12 in the display panel 10, it can be controlled by controlling the electrical signals on the first electrode 13 and the second electrode 14 connected to the light-emitting unit 12.

[0039] In the above structure, the display driver chip can provide electrical signals to the first electrode 13 and the second electrode 14 to control the display of the light-emitting unit 12 on the display panel 10. Compared with the display panel with an array driving layer, the film structure of this application is simpler, lower in cost, and has a higher process yield, which is more conducive to its promotion and application in AR glasses terminals.

[0040] In one possible implementation, such as Figure 4 As shown, the first semiconductor layers 121 of the plurality of light-emitting units 12 arranged along the first direction (X direction in the figure) are spaced apart from each other. That is, the orthogonal projections of the light-emitting units 12 in the same row of light-emitting units on the substrate 11 do not overlap.

[0041] In another possible implementation, such as Figure 5 As shown, the first semiconductor layers 121 of the plurality of light-emitting units 12 arranged along the first direction (X direction in the figure) are interconnected. The interconnected first semiconductor layers 121 extend along the first direction. With this design, when fabricating the first electrode 13 connected to the first portion 1211, the first electrode 13 can be disposed on the side of the first portion 1211 away from the substrate 11. Since the first semiconductor layers 121 are continuously distributed along the first direction, it is convenient for the first electrode 13 to be continuously distributed on the side of the first portion 1211 away from the substrate 11, ensuring that the first electrode 13 has a stable wiring structure and improving the process yield.

[0042] In one possible implementation, the first electrode 13 can be directly electrically connected to the first portion 1211. For example, the first electrode 13 can directly overlap the side of the first portion 1211 away from the substrate 11. In this embodiment, in order to avoid the first electrode 13 from being connected to the second semiconductor layer 123 in the light-emitting unit 12, the orthographic projection of the first electrode 13 on the substrate 11 does not overlap with the orthographic projection of the second semiconductor layer 123 on the substrate 11.

[0043] In another possible implementation, such as Figure 6 As shown, the display panel 10 also includes a first insulating layer 16, which covers the light-emitting unit 12. The first insulating layer 16 includes a first through-hole 201 that exposes at least a portion of the first portion 1211. The first electrode 13 is electrically connected to the first portion 1211 through the first through-hole 201. In this embodiment, due to the presence of the first insulating layer 16, the orthographic projection of the first electrode 13 on the substrate 11 can overlap with the orthographic projection of the second semiconductor layer 123 on the substrate 11. This design avoids short circuits between the first electrode 13 and the second semiconductor layer 123 caused by processing precision deviations, thereby improving process yield.

[0044] Optionally, in this embodiment, the first semiconductor layer 121 is an N-type semiconductor layer, the second semiconductor layer 123 is a P-type semiconductor layer, and the light-emitting layer 122 is a quantum well layer.

[0045] Specifically, the first semiconductor layer 121 includes an N-type gallium nitride layer, and the second semiconductor layer 123 includes a P-type gallium nitride layer.

[0046] In one possible implementation, please refer to Figure 7 The orthographic projection of the light-emitting unit 12 onto the substrate 11 is square, that is, the orthographic projection of each film layer in the light-emitting unit 12 onto the substrate 11 is also square.

[0047] The size d1 of the first semiconductor layer 121 projected onto the substrate 11 ranges from 4 micrometers to 49 micrometers. The size d1 of the first semiconductor layer 121 projected onto the substrate 11 can refer to the dimensions of each side in the projected image. For example, the size d1 includes 4 micrometers, 10 micrometers, 16 micrometers, 24 micrometers, 36 micrometers, 43 micrometers, or 49 micrometers, etc.

[0048] The gap d2 between adjacent light-emitting units 12 is 1 micrometer to 5 micrometers. The gap d2 can be the gap between adjacent light-emitting units 12 in the first direction (X direction in the figure) or the gap between adjacent light-emitting units 12 in the second direction (Y direction in the figure). For example, the gap d2 includes 1 micrometer, 1.4 micrometer, 2.1 micrometer, 2.8 micrometer, 3.7 micrometer, 4.5 micrometer or 5 micrometer, etc.

[0049] In this embodiment, to facilitate the fabrication of the first electrode 13 on the side of the first portion 1211 away from the substrate 11, the first portion 1211 extends outwards from the second semiconductor layer 123 by a length L ranging from 1 micrometer to 5 micrometers. For example, the extension length L includes 1 micrometer, 1.5 micrometers, 2.6 micrometers, 3.1 micrometers, 3.9 micrometers, 4.6 micrometers, or 5 micrometers, etc.

[0050] Further, please refer to Figure 1The bonding electrode 153 includes a first bonding electrode 1531 and a second bonding electrode 1532. A first trace 151 is connected to a portion of the first bonding electrode 1531, and a second trace 152 is connected to another portion of the second bonding electrode 1532. That is, the total number of the first trace 151 and the second trace 152 is equal to the number of the first bonding electrode 1531.

[0051] The second bonding electrode 1532 is used to bond with a flexible printed circuit (FPC). The flexible printed circuit can transmit signals to the display driver chip. After processing the signals, the display driver chip controls the display panel 10 through the first electrode 13 and the second electrode 14.

[0052] Further, please refer to Figure 3 , Figure 8 , Figure 9 and Figure 10 The display panel 10 also includes a second insulating layer 17, which covers the light-emitting unit 12 and the first electrode 13. The second insulating layer 17 includes a second through hole 202, which exposes part of the second semiconductor layer 123 of the light-emitting unit 12.

[0053] The second electrode 14 is located on the second insulating layer 17, and the second electrode 14 is electrically connected to the second semiconductor layer 123 of the light-emitting unit 12 through the second through hole 202.

[0054] In one possible implementation, such as Figure 8 As shown, the wiring layer 15 and the second electrode 14 are disposed on the same layer, that is, the wiring layer 15 and the second electrode 14 can be formed by patterning the same conductive layer.

[0055] In this embodiment, such as Figure 9 As shown, the second insulating layer 17 also includes a third through hole 203 near the end side of the first electrode 13 and exposing the first electrode 13. The first trace 151 is electrically connected to the first electrode 13 through the third through hole 203.

[0056] like Figure 8 As shown, the display panel 10 includes a display area AA formed by light-emitting units 12 and a non-display area NA that at least partially surrounds the display area AA. The bonding electrode 153 is located in the non-display area NA. Since the number of film layers in this embodiment is relatively small, the manufacturing process is simpler, and the manufacturing cost is lower. At the same time, the film layers have weak resistance to pressure. By placing the bonding electrode 153 in the non-display area NA, the display area AA can be avoided during the bonding of the display driver chip, preventing the light-emitting units 12 in the display area AA from being damaged during the bonding process, thus improving the process yield of the display panel.

[0057] In another possible implementation, such as Figure 2 and Figure 3 As shown, the display panel 10 also includes a third insulating layer 18, which covers the second insulating layer 17 and the second electrode 14.

[0058] The third insulating layer 18 includes a fourth through hole 204, which is close to the end side of the second electrode 14 and exposes the second electrode 14.

[0059] The third insulating layer 18 includes a fifth through hole 205, which is disposed near the end side of the first electrode 13. The second insulating layer 17 also includes a sixth through hole 206, which is connected to the fifth through hole 205 and the sixth through hole 206 and exposes the first electrode 13.

[0060] In this embodiment, the first trace 151 is connected to the first electrode 13 through the fifth through hole 205 and the sixth through hole 206, and the second trace 152 is connected to the second electrode 14 through the fourth through hole 204.

[0061] At least one end of the opposite ends of the first electrode 13 is electrically connected to the first bonding electrode 1531 via the first trace 151. Preferably, as shown in the figure... Figure 11 As shown, both ends of the first electrode 13 are electrically connected to the first bonding electrode 1531 via the first trace 151. This enhances the power supply capability of the first electrode 13, increases the brightness of the display panel, and makes it more suitable for use in AR glasses scenarios.

[0062] In this embodiment, such as Figure 11 As shown, the display panel 10 includes a display area AA formed by light-emitting units 12. The orthographic projections of the first trace 151, the second trace 152, the first bonding electrode 1531, and the second bonding electrode 1532 on the substrate 11 are all located in the display area AA. This design enables the display panel 10 to display in full screen, reducing the screen size.

[0063] Based on the same inventive concept, this embodiment also provides a method for manufacturing a display panel, please refer to... Figure 12 , Figure 13A and Figure 13B , Figure 12 A schematic flowchart illustrating the method for manufacturing the display panel provided in this embodiment is illustrated. Figure 13A and Figure 13B Example Figure 12 The corresponding process diagram is shown below. Figure 12 , Figure 13A and Figure 13B The method for manufacturing the display panel provided in this embodiment will be described in detail.

[0064] In detail, the method for manufacturing the display panel provided in this embodiment may include the following steps.

[0065] Step S11: A substrate 11 is provided, and a first semiconductor material layer 30, a light-emitting material layer and a second semiconductor material layer 50 are sequentially fabricated on the substrate 11.

[0066] In this embodiment, the substrate 11 can be a single-crystal silicon substrate or a sapphire substrate.

[0067] The first semiconductor material layer 30, the light-emitting material layer, and the second semiconductor material layer 50 can be formed sequentially by epitaxial growth. The first semiconductor material layer 30 can be made of N-type gallium nitride, and the second semiconductor material layer 50 can be made of P-type gallium nitride.

[0068] In this embodiment, based on the different emission colors of the light-emitting units formed at different locations, the content of the substance used to control the emission color in the light-emitting material layer at different locations can be adjusted during the fabrication of the light-emitting material layer. For example, when the light-emitting material layer is made of indium gallium nitride, the emission color of the light-emitting units formed at different locations can be made different by adjusting the indium content. For example, the longer the wavelength of the light emitted by the light-emitting unit, the higher the indium content in the corresponding light-emitting material layer.

[0069] Step S12: The second semiconductor material layer 50 and the light-emitting material layer are patterned to form an array of second semiconductor layer 123 and light-emitting layer.

[0070] The second semiconductor material layer 50 and the light-emitting material layer are simultaneously patterned, and the patterned second semiconductor material layer 50 forms the second semiconductor layer 123, and the patterned light-emitting material layer forms the light-emitting layer.

[0071] In this embodiment, the orthographic projections of the light-emitting layer and the second semiconductor layer 123 onto the substrate 11 coincide. Different second semiconductor layers 123 are disposed at intervals from each other.

[0072] Step S13: Pattern the first semiconductor material layer 30 to form the first semiconductor layer 121.

[0073] In this embodiment, the first semiconductor layer 121 includes a first portion 1211 extending relative to the light-emitting layer and the second semiconductor layer 123. The first semiconductor layer 121, the light-emitting layer, and the second semiconductor layer 123, which are stacked together, form a light-emitting unit.

[0074] Step S14: Fabricate a first electrode 13 to electrically connect the first portion 1211 of the plurality of light-emitting units arranged along the first direction.

[0075] In this embodiment, the first electrode 13 is insulated from the second semiconductor layer 123 in the light-emitting unit 12.

[0076] Step S15: Fabricate a second electrode 14 to connect the second semiconductor layer 123 of the plurality of light-emitting units 12 arranged along the second direction.

[0077] In this embodiment, the first electrode 13 and the second electrode 14 are insulated from each other, and the first direction and the second direction intersect. Preferably, the first direction and the second direction are perpendicular.

[0078] Step S16: Fabricate a wiring layer 15 on the side of the light-emitting unit 12 away from the substrate 11.

[0079] In this embodiment, the wiring layer 15 includes a first wiring 151, a second wiring 152, and a bonding electrode 153. The first wiring 151 is connected to the first electrode 13, and the second wiring 152 is connected to the second electrode 14. The first wiring 151 and the second wiring 152 are respectively connected to different bonding electrodes 153. The bonding electrode 153 is also used for bonding with the display driver chip, that is, the display driver chip can provide electrical signals to the first electrode 13 through the first wiring 151 and to the second electrode 14 through the second wiring 152. For example, when it is necessary to control a certain light-emitting unit 12 in the display panel 10, it can be controlled by controlling the electrical signals on the first electrode 13 and the second electrode 14 connected to the light-emitting unit 12.

[0080] The above-mentioned method for manufacturing display panels, compared with display panels having an array driving layer, has a simpler film structure, resulting in simpler processing technology, lower cost, and higher process yield, making it more conducive to its application in AR glasses terminals.

[0081] In one possible implementation, step S14 can be achieved in the following way.

[0082] The first conductive layer is fabricated on the entire surface, and the first conductive layer is patterned to form a first electrode 13 that electrically connects the first part 1211 of the plurality of light-emitting units 12 arranged along the first direction.

[0083] In this embodiment, the first electrode 13 is directly formed on the side of the first portion 1211 away from the substrate. For example... Figure 4 As shown, the first semiconductor layers 121 in the plurality of light-emitting units 12 arranged along the first direction can be spaced apart from each other. Figure 5 As shown, the first semiconductor layer 121 in the plurality of light-emitting units 12 arranged along the first direction can also be connected together to form a continuously distributed first semiconductor layer 121.

[0084] In another possible implementation, please refer to Figure 6 and Figure 14 Step S14 can also be implemented in the following ways.

[0085] Step S141: A first insulating layer 16 is made to cover the light-emitting unit 12, and a first through hole 201 is made on the first insulating layer 16 to expose the first part 1211.

[0086] Step S142: A first conductive layer is fabricated on the entire surface of the first insulating layer 16, and the first conductive layer is patterned to form a first electrode 13 that electrically connects the first portion 1211 of the plurality of light-emitting units 12 arranged along the first direction.

[0087] In this embodiment, the first electrode 13 is electrically connected to the first portion 1211 through the first through-hole 201. Due to the presence of the first insulating layer 16, the orthographic projection of the first electrode 13 on the substrate 11 can overlap with the orthographic projection of the second semiconductor layer 123 on the substrate 11. This design avoids short circuits between the first electrode 13 and the second semiconductor layer 123 caused by processing precision deviations, thereby improving process yield.

[0088] Further, please refer to Figure 3 and Figure 15 Step S15 can be achieved in the following way.

[0089] Step S151: A second insulating layer 17 is formed to cover the first electrode 13 and the light-emitting unit 12, and a second through hole 202 is formed on the second insulating layer 17 to expose part of the second semiconductor layer 123 of the light-emitting unit 12.

[0090] In step S152, a second conductive layer is formed on the side of the second insulating layer 17 away from the substrate 11, and the second conductive layer is patterned to form a second electrode 14 that electrically connects the second semiconductor layer 123 in the plurality of light-emitting units 12 arranged along the second direction.

[0091] In this embodiment, the second electrode 14 is electrically connected to the second semiconductor layer 123 in the corresponding light-emitting unit 12 through the second through-hole 202. The second electrode 14 and the first electrode 13 are insulated from each other.

[0092] In one possible implementation, please refer to Figure 8 , Figure 9 and Figure 16 Step S16 can be implemented in the following way.

[0093] In step S161, a third through hole 203 is made on the end side of the second insulating layer 17 near the first electrode 13 to expose the first electrode 13.

[0094] In this embodiment, a third through hole 203 can be made on at least one of the two ends near the first electrode 13 to expose the first electrode 13. That is, the third through hole 203 can expose at least one electrode portion near the first electrode 13.

[0095] Step S162: The second conductive layer is imaged and a wiring layer 15 is formed.

[0096] In this embodiment, as Figure 8 As shown, both the trace layer 15 and the second electrode 14 are formed by patterning the second conductive layer. The first trace 151 is connected to the first electrode 13 through the third via 203, and the second trace 152 is connected to the second electrode 14 in the same layer.

[0097] In this embodiment, the display panel 10 includes a display area AA formed by light-emitting units 12 and a non-display area NA that at least partially surrounds the display area AA. The bonding electrode 153 is located in the non-display area NA. Since the number of film layers in this embodiment is relatively small, the manufacturing process is simpler, and the manufacturing cost is lower. At the same time, the film layers have weak resistance to pressure. By placing the bonding electrode 153 in the non-display area NA, the display area AA can be avoided during the bonding of the display driver chip, preventing the light-emitting units 12 in the display area AA from being damaged during the bonding process, thus improving the process yield of the display panel.

[0098] In another possible implementation, please refer to Figure 2 , Figure 3 and Figure 17 Step S16 can be implemented in the following way.

[0099] Step S163: A third insulating layer 18 is formed on the second electrode 14 and the second insulating layer 17.

[0100] The third insulating layer 18 may cover the second electrode 14 and the second insulating layer 17.

[0101] Step S164: A fourth through hole 204 is made on the end side of the third insulating layer 18 near the second electrode 14 to expose the second electrode 14.

[0102] In step S165, a fifth through hole 205 is formed on the end side of the third insulating layer 18 near the first electrode 13, and a sixth through hole 206 communicating with the fifth through hole 205 is formed on the second insulating layer 17.

[0103] In this embodiment, the fifth through hole 205 and the sixth through hole 206 expose the first electrode 13.

[0104] Step S166: A third conductive layer is fabricated on the third insulating layer 18, and the third conductive layer is patterned to form a wiring layer 15.

[0105] In this embodiment, the first trace 151 is connected to the first electrode 13 through the fifth through hole 205 and the sixth through hole 206, and the second trace 152 is connected to the second electrode 14 through the fourth through hole 204.

[0106] In this embodiment, at least one end of the opposite ends of the first electrode 13 is electrically connected to the first bonding electrode 1531 via a first trace 151. Preferably, as shown... Figure 11 As shown, both ends of the first electrode 13 are electrically connected to the first bonding electrode 1531 via the first trace 151. This enhances the power supply capability of the first electrode 13, increases the brightness of the display panel, and makes it more suitable for use in AR glasses scenarios.

[0107] In this embodiment, the display panel 10 includes a display area AA formed by light-emitting units 12. The orthographic projections of the first trace 151, the second trace 152, the first bonding electrode 1531, and the second bonding electrode 1532 on the substrate 11 are all located in the display area AA. This design enables the display panel 10 to display in full screen, reducing the screen size.

[0108] Based on the same inventive concept, this embodiment also provides a display module, please refer to... Figure 18 The display module 1 includes the display panel 10 described in the previous embodiments or the display panel 10 prepared in the previous embodiments. The display module 1 also includes a display driver chip 60 and a flexible circuit board 70. The display driver chip 60 and the flexible circuit board 70 are bonded to the bonding electrode 153. The signals in the flexible circuit board 70 are processed by the display driver chip 60 and then provided to the first electrode 13 and the second electrode 14.

[0109] This application provides a display panel, a method for fabricating the display panel, and a display module. In the display panel, a first electrode is connected to a first portion of a first semiconductor layer among a plurality of light-emitting units arranged along a first direction, and a second electrode is connected to a second semiconductor layer among a plurality of light-emitting units arranged along a second direction. A first trace connects to the first electrode, a second trace connects to the second electrode, and the first trace and the second trace connect to different bonding electrodes, which are used for bonding with a display driver chip. In the above structure, the display driver chip can provide electrical signals to the first and second electrodes to control the display of the light-emitting units on the display panel. Compared with a display panel with an array driving layer, the film structure of this application is simpler, lower in cost, and has a higher process yield, making it more conducive to its application in AR glasses terminals.

[0110] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A display panel, characterized in that, The display panel includes: substrate; Multiple light-emitting units are arranged in an array on the substrate. In the direction away from the substrate, each light-emitting unit includes a first semiconductor layer, a light-emitting layer and a second semiconductor layer stacked together. The first semiconductor layer includes a first portion extending relative to the light-emitting layer and the second semiconductor layer. The orthographic projections of the light-emitting layer and the second semiconductor layer on the substrate coincide. The second semiconductor layers of different light-emitting units are spaced apart from each other. The first electrode is connected to a first portion of a first semiconductor layer in a plurality of light-emitting units arranged along a first direction, and is insulated from a second semiconductor layer in the light-emitting unit. The second electrode is connected to the second semiconductor layer in a plurality of light-emitting units arranged along the second direction, wherein the first electrode and the second electrode are insulated from each other, and the first direction and the second direction intersect. A wiring layer is located on the side of the light-emitting unit away from the substrate. The wiring layer includes a first wiring, a second wiring, and a bonding electrode. The first wiring is used to connect to the first electrode, and the second wiring is used to connect to the second electrode. The first wiring and the second wiring are connected to different bonding electrodes. The bonding electrodes are used to bond with the display driver chip.

2. The display panel as described in claim 1, characterized in that, The first semiconductor layers in the plurality of light-emitting units arranged along the first direction are spaced apart from each other, or the first semiconductor layers in the plurality of light-emitting units arranged along the first direction are connected together. The first electrode is directly electrically connected to the first portion, or the display panel further includes a first insulating layer that covers the light-emitting unit. The first insulating layer includes a first through-hole that exposes at least part of the first portion, and the first electrode is electrically connected to the first portion through the first through-hole. Preferably, the orthographic projection of the light-emitting unit on the substrate is square, the size of the orthographic projection of the first semiconductor layer on the substrate ranges from 4 micrometers to 49 micrometers, the gap between adjacent light-emitting units ranges from 1 micrometer to 5 micrometers, and the first portion extends outward from the second semiconductor layer in a length range of 1 micrometer to 5 micrometers. Preferably, the first semiconductor layer is an N-type semiconductor layer, the second semiconductor layer is a P-type semiconductor layer, and the light-emitting layer is a quantum well layer; Preferably, the first semiconductor layer comprises an N-type gallium nitride layer, and the second semiconductor layer comprises a P-type gallium nitride layer; Preferably, the bonding electrode includes a first bonding electrode and a second bonding electrode, the first trace is connected to a portion of the first bonding electrode, the second trace is connected to another portion of the first bonding electrode, and the second bonding electrode is used for bonding with the flexible circuit board.

3. The display panel as described in claim 2, characterized in that, The display panel further includes a second insulating layer, which covers the light-emitting unit and the first electrode. The second insulating layer includes a second through-hole that exposes a portion of the second semiconductor layer of the light-emitting unit. The second electrode is electrically connected to the second semiconductor layer of the light-emitting unit through the second through-hole.

4. The display panel as described in claim 3, characterized in that, The wiring layer is disposed on the same layer as the second electrode; The second insulating layer also includes a third through hole near the end side of the first electrode and exposing the first electrode, through which the first trace is electrically connected to the first electrode; The display panel includes a display area formed by the light-emitting units and a non-display area that at least partially surrounds the display area, wherein the bonding electrode is located in the non-display area.

5. The display panel as described in claim 3, characterized in that, The display panel further includes a third insulating layer, which covers the second insulating layer and the second electrode; The third insulating layer includes a fourth through hole, which is located near the end of the second electrode and exposes the second electrode. The third insulating layer includes a fifth through hole, which is disposed near the end side of the first electrode. The second insulating layer also includes a sixth through hole, which is connected to the fifth through hole and exposes the first electrode. The first trace is connected to the first electrode through the fifth and sixth through holes, and the second trace is connected to the second electrode through the fourth through hole; Preferably, both ends of the first electrode are electrically connected to the first bonding electrode via the first trace; Preferably, the display panel includes a display area formed by the light-emitting unit, and the orthographic projections of the first trace, the second trace, the first bonding electrode, and the second bonding electrode on the substrate are all located in the display area.

6. A method for manufacturing a display panel, characterized in that, The method includes: A substrate is provided, and a first semiconductor material layer, a light-emitting material layer and a second semiconductor material layer are sequentially formed on the substrate; The second semiconductor material layer and the light-emitting material layer are patterned to form an array of second semiconductor layers and light-emitting layers, wherein the orthographic projections of the light-emitting layer and the second semiconductor layer on the substrate coincide, and different second semiconductor layers are spaced apart from each other. The first semiconductor material layer is patterned to form a first semiconductor layer, wherein the first semiconductor layer includes a first portion extending relative to the light-emitting layer and the second semiconductor layer, and the first semiconductor layer, the light-emitting layer and the second semiconductor layer are stacked to form a light-emitting unit; A first electrode is fabricated to electrically connect a first portion of a plurality of light-emitting units arranged along a first direction, wherein the first electrode is insulated from a second semiconductor layer in the light-emitting unit; A second electrode is fabricated to connect the second semiconductor layer in a plurality of light-emitting units arranged along a second direction, wherein the first electrode and the second electrode are insulated from each other, and the first direction and the second direction intersect. A wiring layer is formed on the side of the light-emitting unit away from the substrate. The wiring layer includes a first wiring, a second wiring, and a bonding electrode. The first wiring is used to connect to the first electrode, and the second wiring is used to connect to the second electrode. The first wiring and the second wiring are connected to different bonding electrodes. The bonding electrodes are used to bond with the display driver chip.

7. The method for manufacturing a display panel as described in claim 6, characterized in that, The step of fabricating a first electrode that electrically connects a first portion of a plurality of light-emitting units arranged along a first direction includes: A first conductive layer is fabricated on the entire surface, and the first conductive layer is patterned to form a first electrode that electrically connects the first part of a plurality of light-emitting units arranged along the first direction. Alternatively, the step of fabricating a first electrode that electrically connects a first portion of a plurality of light-emitting units arranged along a first direction includes: A first insulating layer is made to cover the light-emitting unit, and a first through hole is made on the first insulating layer to expose the first part; A first conductive layer is fabricated on the entire surface of the first insulating layer, and the first conductive layer is patterned to form a first electrode that electrically connects a first portion of a plurality of light-emitting units arranged along a first direction, wherein the first electrode is electrically connected to the first electrode through the first through hole.

8. The method for manufacturing a display panel as described in claim 7, characterized in that, The step of fabricating a second electrode that connects the second semiconductor layer in a plurality of light-emitting units arranged along the second direction includes: A second insulating layer is fabricated to cover the first electrode and the light-emitting unit, and a second through-hole is fabricated on the second insulating layer to expose a portion of the second semiconductor layer of the light-emitting unit; A second conductive layer is formed on the side of the second insulating layer away from the substrate, and the second conductive layer is patterned to form a second electrode that electrically connects the second semiconductor layer in a plurality of light-emitting units arranged along the second direction.

9. The method for manufacturing a display panel as described in claim 8, characterized in that, The step of fabricating a wiring layer on the side of the light-emitting unit away from the substrate includes: A third through hole is formed on the end side of the second insulating layer near the first electrode to expose the first electrode; The second conductive layer is imaged and the wiring layer is also formed, wherein the first wiring is connected to the first electrode through the third via; the second wiring is connected to the second electrode in the same layer; Preferably, the bonding electrode is located outside the display area formed by the light-emitting unit.

10. The method for manufacturing a display panel as described in claim 8, characterized in that, The step of fabricating a wiring layer on the side of the light-emitting unit away from the substrate includes: A third insulating layer is fabricated on the second electrode and the second insulating layer; A fourth through hole is formed on the end side of the third insulating layer near the second electrode to expose the second electrode; A fifth through hole is formed on the end side of the third insulating layer near the first electrode, and a sixth through hole communicating with the fifth through hole is formed on the second insulating layer, wherein the fifth through hole and the sixth through hole expose the first electrode; A third conductive layer is fabricated on the third insulating layer, and the third conductive layer is patterned to form the trace layer. The first trace is connected to the first electrode through the fifth and sixth vias, and the second trace is connected to the second electrode through the fourth via.

11. A display module, characterized in that, The display module includes the display panel as described in any one of claims 1-5, or the display panel prepared by the method of preparing the display panel as described in any one of claims 6-10; The display module further includes a display driver chip and a flexible circuit board. The display driver chip and the flexible circuit board are bonded to the bonding electrode. The signal in the flexible circuit board is processed by the display driver chip and then provided to the first electrode and the second electrode.

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