Display device and electronic device
Patent Information
- Application Number
- CN202610451362.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2025-04-10
- Filing Date
- 2026-04-08
- Publication Date
- 2026-10-20
AI Technical Summary
因此,其可能包含不形成公众已知的现有技术的信息
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Abstract
Description
[0001] Cross-references to related applications
[0002] This application claims priority to Korean Patent Application No. 10-2025-0046472, filed on April 10, 2025, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field
[0003] Some embodiments of this disclosure relate to display devices, electronic devices, and methods for manufacturing display devices, and more specifically, to display devices, electronic devices, and methods for manufacturing display devices having improved display quality and luminous efficiency. Background Technology
[0004] Display technology has become a core component in various electronic devices, such as smartphones, tablet PCs, televisions, and wearable devices, and is rapidly evolving in response to the demand for high definition, low power consumption, and lightweight construction. Specifically, displays based on light-emitting diodes (such as organic light-emitting diodes (OLEDs)) utilize their self-emission properties to provide excellent contrast and color reproduction, and thus occupy a prominent position in the next-generation display market.
[0005] A tandem structure allows multiple light-emitting units to be connected in series, resulting in higher luminous efficiency and longer lifespan within the same display area. Furthermore, vacuum deposition technology allows for the formation of high-quality thin films, enabling precise control over the device's characteristics.
[0006] The information disclosed in this Background section was known or derived by the inventors before or during the process of implementing the embodiments of this application, or is technical information obtained in the process of implementing these embodiments. Therefore, it may contain information that does not form prior art known to the public. Summary of the Invention
[0007] According to some embodiments of this disclosure, a display device with improved display quality and luminous efficiency can be provided.
[0008] According to some embodiments of this disclosure, electronic devices with improved display quality and luminous efficiency can be provided.
[0009] According to some embodiments of this disclosure, a method for manufacturing a display device having improved display quality and luminous efficiency can be provided.
[0010] According to some embodiments of the present disclosure, a display device may include: a substrate; a circuit layer on the substrate; a first electrode on the circuit layer and connected to the circuit layer; a dam between the first electrodes; a first functional layer on the first electrodes and at least partially in contact with the dam; a pixel defining film on the first functional layer, wherein the pixel defining film defines a light-emitting region, and the first electrode is at least partially in the light-emitting region; a light-emitting layer on the first functional layer; a second functional layer on the light-emitting layer; and a second electrode on the second functional layer, wherein the first functional layer has a first thickness in a first light-emitting region within the light-emitting region, and has a second thickness different from the first thickness in a second light-emitting region within the light-emitting region.
[0011] According to some embodiments of this disclosure, a groove is defined by a portion of a pixel defining film and a first functional layer that contacts a dam, and the groove is between the pixel defining film and the portion of the first functional layer, wherein a portion of a second functional layer is in the groove.
[0012] According to some embodiments of this disclosure, the first functional layer is in contact with the circuit layer.
[0013] According to some embodiments of this disclosure, the first functional layer is on the entire upper surface of at least one of the first electrodes.
[0014] According to some embodiments of the present disclosure, non-light-emitting regions are defined between light-emitting regions, and wherein, in the direction from the light-emitting regions toward the non-light-emitting regions, a first functional layer is located between the pixel defining film and the embankment.
[0015] According to some embodiments of this disclosure, the first functional layer is in contact with the circuit layer, the first electrode, the embankment, the pixel defining film, and the light-emitting layer.
[0016] According to some embodiments of this disclosure, the first functional layer includes at least one of a hole injection layer and a hole transport layer.
[0017] According to some embodiments of the present disclosure, the display device may further include: a light-emitting stack between the second electrode and the second functional layer; and a charge-generating layer between the second functional layer and the light-emitting stack, wherein the light-emitting stack includes: at least one stacked hole functional layer; at least one stacked light-emitting layer; and at least one stacked electron functional layer.
[0018] According to some embodiments of this disclosure, a first distance between the top surface of the embankment and the substrate is greater than a second distance between the top surface of the pixel defining film and the substrate.
[0019] According to some embodiments of this disclosure, the embankment is on at least one of the first electrodes.
[0020] According to some embodiments of this disclosure, the pixel-defining film extends throughout the upper portion of the embankment.
[0021] According to some embodiments of this disclosure, non-light-emitting regions are located between light-emitting regions, and wherein a pixel defining film is located on a portion of a first functional layer, the portion of the first functional layer overlapping the non-light-emitting regions in a plan view.
[0022] According to some embodiments of this disclosure, non-light-emitting regions are located between light-emitting regions, and a portion of the first functional layer that overlaps with the non-light-emitting regions in a plan view is exposed between the pixel-defining film and the embankment.
[0023] According to some embodiments of the present disclosure, the display device further includes: an encapsulation layer on the second electrode; and a color conversion layer on the encapsulation layer.
[0024] According to some embodiments of the present disclosure, the display device further includes: an encapsulation layer on the second electrode; and a color filter layer on the encapsulation layer.
[0025] According to some embodiments of this disclosure, the embankment includes a hydrophobic material.
[0026] According to some embodiments of this disclosure, the embankment includes a colored light-blocking material, and wherein the pixel defining film includes a transparent or translucent insulating film.
[0027] According to some embodiments of the present disclosure, a method for manufacturing a display device may include: providing a circuit layer on a substrate; disposing a first electrode on the circuit layer; disposing a dam between the first electrodes; disposing a first functional layer on the first electrodes, and the first functional layer being at least partially in contact with the dam; disposing a pixel defining film on the first functional layer; disposing a light-emitting layer on the first functional layer; disposing a second functional layer on the light-emitting layer; and disposing a second electrode on the second functional layer, wherein the pixel defining film defines a light-emitting region, and the first electrode is at least partially located in the light-emitting region, and wherein the first functional layer has a first thickness in the first light-emitting region of the light-emitting region, and has a second thickness different from the first thickness in the second light-emitting region of the light-emitting region.
[0028] According to some embodiments of the present disclosure, an electronic device may include a display device, the display device comprising: a substrate; a circuit layer on the substrate; a first electrode on the circuit layer and connected to the circuit layer; a dam between the first electrodes; a first functional layer on the first electrodes and at least partially in contact with the dam; a pixel defining film on the first functional layer, wherein the pixel defining film defines a light-emitting region, and the first electrode is at least partially in the light-emitting region; a light-emitting layer on the first functional layer; a second functional layer on the light-emitting layer; and a second electrode on the second functional layer, wherein the first functional layer has a first thickness in a first light-emitting region within the light-emitting region, and has a second thickness different from the first thickness in a second light-emitting region within the light-emitting region.
[0029] According to some embodiments of this disclosure, the electronic device further includes: a processor configured to control a display device; a memory storing data for operation of the display device or the processor; and a power converter configured to generate or provide power. Attached Figure Description
[0030] These and / or other features will become apparent and more readily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which: Figure 1 This is a schematic plan view of a display device according to an embodiment of the present disclosure; Figure 2 This is a schematic cross-sectional view of a display device according to an embodiment; Figure 3 This is a schematic cross-sectional view of a light-emitting diode according to an embodiment; Figure 4 This is a schematic cross-sectional view of the light-emitting stack according to an embodiment; Figure 5 It is shown Figure 2 A magnified view of region AA; Figure 6 This is a cross-sectional view showing a portion of the display device according to the comparative example.
[0031] Figure 7 This is a cross-sectional view showing a portion of the display device according to an embodiment; Figure 8 This is a cross-sectional view showing a portion of the display device according to an embodiment; Figure 9 This is a cross-sectional view showing a portion of the display device according to an embodiment; Figure 10 This is a cross-sectional view showing a portion of the display device according to an embodiment; Figure 11This is a cross-sectional view showing a portion of the display device according to an embodiment; Figure 12 This is a cross-sectional view showing a portion of the display device according to an embodiment; Figure 13 This is a flowchart illustrating a method for manufacturing a display device according to an embodiment of the present disclosure; Figure 14A , Figure 14B , Figure 14C , Figure 14D and Figure 14E This is a schematic cross-sectional view showing a portion of the manufacturing steps of the display device according to an embodiment; Figure 15 It is a block diagram of an electronic device according to an embodiment; and Figure 16 , Figure 17 and Figure 18 These are schematic diagrams of electronic devices according to various embodiments. Detailed Implementation
[0032] In the following description, numerous specific details are set forth for purposes of explanation to provide a thorough understanding of various embodiments or implementations of this disclosure. As used herein, “implementation” and “method” are interchangeable terms and are non-limiting examples of the apparatus and / or methods of this disclosure. However, it will be apparent that various embodiments of this disclosure may be practiced without these specific details or with one or more equivalent arrangements. These various embodiments of this disclosure are not necessarily exclusive nor are they intended to limit the disclosure. For example, particular shapes, configurations, and characteristics of embodiments of this disclosure may be used or implemented in another embodiment of this disclosure.
[0033] Unless otherwise stated, the described and illustrated embodiments are to be understood as non-limiting exemplary embodiments. Therefore, unless otherwise stated, features, components, modules, layers, films, panels, regions and / or aspects (hereinafter individually or collectively referred to as “elements”) of various embodiments of this disclosure may be combined, separated, interchanged and / or rearranged without departing from this disclosure.
[0034] The use of crosshairs and / or shading in the accompanying drawings is generally to clarify the boundaries between adjacent elements. Therefore, unless otherwise stated, the presence or absence of crosshairs or shading does not convey or indicate any preference or requirement for particular materials, material properties, dimensions, scale, commonalities between illustrated elements, and / or any other characteristics, properties, or characteristics of the elements. Furthermore, in the accompanying drawings, the dimensions and relative dimensions of elements may be exaggerated for clarity and / or descriptive purposes. When embodiments can be implemented differently, the specific order of processes may be performed differently than the order described. For example, two consecutively described processes may be performed substantially simultaneously, or in the reverse order of their description. Furthermore, the same reference numerals and / or designations denote the same elements.
[0035] When an element or layer is referred to as being “on,” “connected to,” or “linked to” another element or layer, it may be directly on, directly connected to, or directly linked to the other element or layer, or there may be an intervening element or layer. However, when an element or layer is referred to as being “directly on,” “directly connected to,” or “directly linked to” another element or layer, there is no intervening element or layer. Therefore, the term “connection” can refer to a physical connection, electrical connection, and / or fluid connection, with or without an intervening element. Furthermore, the DR1 axis, DR2 axis, and DR3 axis are not limited to the three axes of a Cartesian coordinate system (such as the x-axis, y-axis, and z-axis) and can be interpreted in a broader sense. For example, the DR1 axis, DR2 axis, and DR3 axis can be perpendicular to each other, or can represent different directions that are not perpendicular to each other. For the purposes of this disclosure, “at least one of A and B” can be interpreted as only A, only B, or any combination of A and B. Furthermore, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" can be interpreted as X only, Y only, Z only, or any combination of two or more of X, Y, and Z. As used herein, the term "and / or" includes any and all combinations of one or more of the relevant listed items.
[0036] Similar or identical reference numerals denote similar or identical elements. Furthermore, the thickness, scale, and dimensions of elements in the drawings may not be precise scales but may be exaggerated for the purpose of effectively interpreting the technical features associated with these elements. Therefore, this disclosure should not be limited to the thickness, scale, dimensions, etc., shown in the drawings. The term "and / or" should include a combination of the listed items or any one of the listed items that can be defined by the relevant elements.
[0037] Although the terms “first,” “second,” etc., may be used herein to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another. Therefore, without departing from the teachings of this disclosure, the first element discussed below may be referred to as the second element.
[0038] Spatial relative terms such as “beneath,” “below,” “under,” “lower,” “above,” “upper,” “over,” “higher,” and “side” (e.g., as in “sidewall”) may be used herein for descriptive purposes and therefore to describe the relationship of one element to another(s) as shown in the accompanying drawings. In addition to the orientations depicted in the drawings, spatial relative terms are intended to cover different orientations of the device in use, operation, and / or manufacture. For example, if the device in the drawings is flipped, an element described as “below” or “under” other elements or features will then be oriented “above” other elements or features. Thus, the term “below” can cover both above and below orientations. Furthermore, the device may be oriented in other ways (e.g., rotated 90 degrees or in other orientations), and thus the spatial relative descriptive terms used herein shall be interpreted accordingly.
[0039] The term “overlap” may include “layering,” “stacking,” “facing,” “extending,” “covering,” “partially covering,” or any other suitable term as will be understood and appreciated by one of ordinary skill in the art.
[0040] The terminology used herein is for the purpose of describing non-limiting exemplary embodiments and is not intended to be limiting. Unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “the” are intended to include the plural forms as well, as used herein. Furthermore, when used in this specification, the terms “comprising,” “including,” “comprise,” and / or “including” indicate the presence of stated features, integrals, steps, operations, elements, components, and / or groups thereof, but do not preclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof. It should also be noted that, as used herein, the terms “substantially,” “about,” and other similar terms are used as approximate terms rather than as terms of degree, and are therefore used to allow for inherent deviations in measurements, calculated values, and / or provided values that will be recognized by those skilled in the art.
[0041] Various embodiments are described herein with reference to cross-sectional and / or exploded views, which are schematic diagrams of exemplary embodiments and / or intermediate structures. Therefore, deviations from the illustrated shapes due to, for example, manufacturing techniques and / or tolerances are expected. Consequently, the embodiments described herein should not necessarily be construed as limited to the specific shapes of the regions shown, but will include deviations in shape due to, for example, manufacturing processes. In this way, the regions shown in the figures may be schematic in nature, and the shapes of these regions may not reflect the actual shapes of the areas of the device, and are therefore not intended to be limiting.
[0042] Figure 1 This is a schematic plan view of a display device according to an embodiment of the present disclosure. (See reference) Figure 1 According to embodiments of the present disclosure, the display device DD may include a display area DA and a non-display area NDA, wherein the non-display area NDA is disposed on at least one side of the display area DA, for example, a first direction DR1 and / or a second direction DR2 intersecting the first direction DR1. According to some embodiments, the display device DD may face a third direction DR3 intersecting the first direction DR1 and the second direction DR2.
[0043] The display area DA is the area where an image is displayed, and multiple pixels PX can be arranged within it. The display area DA can have various shapes, such as circular, elliptical, polygonal, or other geometric shapes. Multiple pixels PX, including light-emitting diodes (e.g., organic light-emitting diodes), can be arranged in the display area DA. Each pixel PX can include a transistor configured to control the light-emitting diode. A single pixel PX can include at least one transistor.
[0044] Various wirings configured to transmit electrical signals to the display area DA can be arranged in the non-display area NDA. The non-display area NDA may also include transistors, which may be part of a circuit unit configured to control the electrical signals applied to the display area DA.
[0045] In the following description, the display device DD according to embodiments of the present disclosure will be described primarily in the case of an organic light-emitting display device by way of example. However, the display device according to embodiments of the present disclosure is not limited thereto. In other embodiments, the display device DD may be an inorganic light-emitting display device or a quantum dot light-emitting display device. For example, the light-emitting layer of the display element included in the display device DD may include organic materials, inorganic materials, quantum dots, a combination of organic materials and quantum dots, or a combination of inorganic materials and quantum dots.
[0046] Figure 2 This is a schematic cross-sectional view of a display device according to an embodiment. Figure 3This is a schematic cross-sectional view of a light-emitting diode according to an embodiment. Figure 4 This is a schematic cross-sectional view of the light-emitting stack according to an embodiment.
[0047] refer to Figure 2 The display device DD according to the embodiment may include a substrate BL, a circuit layer CL, a display layer DL, an optical layer PL, and a base substrate BS.
[0048] The substrate BL can be used as the base surface on which the circuit layer CL is disposed. The substrate BL can be a glass substrate, a metal substrate, a plastic substrate, etc. However, the embodiments of this disclosure are not limited to this, and the substrate BL can also be formed of an inorganic layer, an organic layer, or a composite material layer.
[0049] In this implementation, the circuit layer CL may be disposed on the substrate BL and may include multiple transistors. Each transistor may include a control electrode, an input electrode, and an output electrode. For example, the circuit layer CL may include a switching transistor and a driving transistor to drive the first light-emitting diode ED1, the second light-emitting diode ED2, and the third light-emitting diode ED3 of the display layer DL.
[0050] In an implementation, the display layer DL can be disposed on the circuit layer CL and may include light-emitting diodes (e.g., a first light-emitting diode ED1, a second light-emitting diode ED2, and a third light-emitting diode ED3), a dam BK, a pixel defining film PDL, and an encapsulation layer TFE.
[0051] According to the embodiment, the first light-emitting diode ED1, the second light-emitting diode ED2, and the third light-emitting diode ED3 may each have, as described later, as shown in the following description. Figure 3 The structure of the light-emitting diode ED is shown. According to an embodiment, the first light-emitting stack portions ST1a, ST1b, and ST1c respectively disposed in the first light-emitting diode ED1, the second light-emitting diode ED2, and the third light-emitting diode ED3 may each have, as described later, as shown in the following description. Figure 3 The structure of the first light-emitting stack ST1 is shown.
[0052] refer to Figure 3 and Figure 4According to embodiments of the present disclosure, a light-emitting diode (ED) can have a series structure, including a first electrode EL1, a second electrode EL2, and a plurality of light-emitting stacks (e.g., a first light-emitting stack ST1, a second light-emitting stack ST2, a third light-emitting stack ST3, a fourth light-emitting stack ST4, and a fifth light-emitting stack ST5) disposed between the first electrode EL1 and the second electrode EL2. Each of the light-emitting stacks (e.g., the first light-emitting stack ST1, the second light-emitting stack ST2, the third light-emitting stack ST3, the fourth light-emitting stack ST4, and the fifth light-emitting stack ST5) can have Figure 4 The structure of the light-emitting stack ST shown.
[0053] although Figure 3 An example of a light-emitting diode (ED) including five light-emitting stacks (e.g., a first light-emitting stack ST1, a second light-emitting stack ST2, a third light-emitting stack ST3, a fourth light-emitting stack ST4, and a fifth light-emitting stack ST5) is shown, but embodiments of this disclosure are not limited thereto. The number of light-emitting stacks included in the ED can be adjusted to one or more.
[0054] Multiple charge generation layers (e.g., a first charge generation layer CGL1, a second charge generation layer CGL2, a third charge generation layer CGL3, and a fourth charge generation layer CGL4) can be disposed between light-emitting stacks (e.g., a first light-emitting stack ST1, a second light-emitting stack ST2, a third light-emitting stack ST3, a fourth light-emitting stack ST4, and a fifth light-emitting stack ST5). A light-emitting diode (ED) according to an embodiment may include a first charge generation layer CGL1 disposed between the first light-emitting stack ST1 and the second light-emitting stack ST2, a second charge generation layer CGL2 disposed between the second light-emitting stack ST2 and the third light-emitting stack ST3, a third charge generation layer CGL3 disposed between the third light-emitting stack ST3 and the fourth light-emitting stack ST4, and a fourth charge generation layer CGL4 disposed between the fourth light-emitting stack ST4 and the fifth light-emitting stack ST5.
[0055] When a voltage is applied to a light-emitting diode (ED), the charge generation layers (e.g., the first charge generation layer CGL1, the second charge generation layer CGL2, the third charge generation layer CGL3, and the fourth charge generation layer CGL4) can generate charges (electrons and holes) via redox reactions. Each charge generation layer can provide the generated charges to adjacent light-emitting stacks (e.g., the first light-emitting stack ST1, the second light-emitting stack ST2, the third light-emitting stack ST3, the fourth light-emitting stack ST4, and the fifth light-emitting stack ST5). The charge generation layers (e.g., the first charge generation layer CGL1, the second charge generation layer CGL2, the third charge generation layer CGL3, and the fourth charge generation layer CGL4) can enhance the current efficiency in adjacent light-emitting stacks (e.g., the first light-emitting stack ST1, the second light-emitting stack ST2, the third light-emitting stack ST3, the fourth light-emitting stack ST4, and the fifth light-emitting stack ST5) and maintain the charge balance between adjacent light-emitting stacks (e.g., the first light-emitting stack ST1, the second light-emitting stack ST2, the third light-emitting stack ST3, the fourth light-emitting stack ST4, and the fifth light-emitting stack ST5).
[0056] Each charge generation layer (e.g., a first charge generation layer CGL1, a second charge generation layer CGL2, a third charge generation layer CGL3, and a fourth charge generation layer CGL4) may have a layer structure formed by junctions between n-type charge generation layers n-CGL1, n-CGL2, n-CGL3, n-CGL4 and p-type charge generation layers p-CGL1, p-CGL2, p-CGL3, p-CGL4. The first charge generation layer CGL1 may be formed by a junction between the n-type charge generation layer n-CGL1 (first n-type charge generation layer) and the p-type charge generation layer p-CGL1 (first p-type charge generation layer). The second charge generation layer CGL2 may be formed by a junction between the n-type charge generation layer n-CGL2 (second n-type charge generation layer) and the p-type charge generation layer p-CGL2 (second p-type charge generation layer). The third charge generation layer CGL3 can be formed by a junction of an n-type charge generation layer n-CGL3 (the third n-type charge generation layer) and a p-type charge generation layer p-CGL3 (the third p-type charge generation layer). The fourth charge generation layer CGL4 can be formed by a junction of an n-type charge generation layer n-CGL4 (the fourth n-type charge generation layer) and a p-type charge generation layer p-CGL4 (the fourth p-type charge generation layer).
[0057] The n-type charge generation layers n-CGL1, n-CGL2, n-CGL3, and n-CGL4 can be configured to provide electrons to adjacent light-emitting stacks, and can be doped with n-type dopants in their substrate material. The p-type charge generation layers p-CGL1, p-CGL2, p-CGL3, and p-CGL4 can be configured to provide holes to adjacent light-emitting stacks. According to some embodiments, a buffer layer can be further disposed between the n-type charge generation layers n-CGL1, n-CGL2, n-CGL3, and n-CGL4 and the p-type charge generation layers p-CGL1, p-CGL2, p-CGL3, and p-CGL4.
[0058] Each charge-generating layer (e.g., the first charge-generating layer CGL1, the second charge-generating layer CGL2, the third charge-generating layer CGL3, and the fourth charge-generating layer CGL4) may comprise an n-type arylamine-based material or a p-type metal oxide. For example, each of the charge-generating layers (e.g., the first charge-generating layer CGL1, the second charge-generating layer CGL2, the third charge-generating layer CGL3, and the fourth charge-generating layer CGL4) may comprise a charge-generating compound made of an organic arylamine compound, a metal, a metal oxide, a carbide, a fluoride, or a mixture thereof.
[0059] Examples of arylamine compounds may include α-NPD (2,2'-dimethyl-N,N'-bis[(1-naphthyl)-N,N'-diphenyl]-1,1'-biphenyl-4,4'-diamine), 2-TNATA (4,4',4"-tris{N,N-(2-naphthyl)-N-phenylamino}-triphenylamine), TDATA (4,4',4"-tris(N,N-diphenylamino)triphenylamine), MTDATA (4,4',4"-[tris(3-methylphenyl)phenylamino]triphenylamine), spiro-TAD (spiro- 1,3,5-Tris(diphenylamino)benzene or spiro-NPB (spiro-N,N'-di(naphthyl-1-yl)-N,N'-diphenyl-benzidine). Examples of metals may include cesium (Cs), molybdenum (Mo), vanadium (V), titanium (Ti), tungsten (W), barium (Ba), or lithium (Li). Examples of metal oxides, carbides, and fluorides may include Re2O7, MoO3, V2O5, WO3, TiO2, Cs2CO3, BaF, LiF, or CsF. The light-emitting stack ST according to the embodiment may include a hole transport region HTR and a light-emitting layer. The EML and the Electron Transport Region (ETR). The Hole Transport Region (HTR) can be configured to transfer holes from the first electrode EL1 or the charge generation layers (e.g., the first charge generation layer CGL1, the second charge generation layer CGL2, the third charge generation layer CGL3, and the fourth charge generation layer CGL4) to the EML. The Electron Transport Region (ETR) can be configured to transfer electrons from the second electrode EL2 or the charge generation layers (e.g., the first charge generation layer CGL1, the second charge generation layer CGL2, the third charge generation layer CGL3, and the fourth charge generation layer CGL4) to the EML.
[0060] In one embodiment, based on the direction of light emission from the first electrode EL1 toward the second electrode EL2, the light-emitting diode (ED) may have a structure in which the hole transport region HTR is disposed below the light-emitting layer EML and the electron transport region ETR is disposed above the light-emitting layer EML. However, the embodiments of this disclosure are not limited to this structure, and an inverted structure is also possible, wherein the electron transport region ETR is disposed below the light-emitting layer EML and the hole transport region HTR is disposed above the light-emitting layer EML.
[0061] The hole transport region (HTR) may include a hole injection layer (HIL) and a hole transport layer (HTL) disposed on the hole injection layer (HIL) (see [link]). Figure 2The hole transport layer HTL1 can be in contact with the lower surface of the light-emitting layer EML. However, embodiments of this disclosure are not limited thereto, and the hole transport region HTR can also include a hole-side auxiliary layer disposed on the hole transport layer HTL. The hole-side auxiliary layer can include at least one of a hole buffer layer, a light-emitting auxiliary layer, and an electron blocking layer. The hole buffer layer can be configured to enhance the luminous efficiency of the display device DD by compensating the resonant distance based on the wavelength of light emitted from the light-emitting layer EML. The electron blocking layer can be configured to prevent electrons from being injected from the electron transport region ETR into the hole transport region HTR.
[0062] The electron transport region (ETR) may include an electron transport layer (ETL) and may further include an electron injection layer (EIL) disposed on the ETL. The ETR may also include an electron-side auxiliary layer disposed between the ETL and the emissive layer (EML). The electron-side auxiliary layer may include at least one of an electron buffer layer and a hole blocking layer. The electron buffer layer may be configured to enhance the luminous efficiency of the display device (DD) by compensating for the resonant distance based on the wavelength of light emitted from the EML. The hole blocking layer may be configured to prevent holes from being injected from the hole transport region (HTR) into the ETR.
[0063] Refer again Figure 2 The first electrode EL1 of the light-emitting diodes (e.g., first light-emitting diode ED1, second light-emitting diode ED2, and third light-emitting diode ED3) can be disposed on the circuit layer CL. Each of the first electrodes EL1 can be electrically connected to a plurality of transistors disposed in the circuit layer CL, and can be configured to receive electrical signals for driving the light-emitting diodes (e.g., first light-emitting diode ED1, second light-emitting diode ED2, and third light-emitting diode ED3).
[0064] The dam section BK can be disposed between the first electrodes EL1. The dam section BK can define the hole injection layers HILa, HILb, HILc or the first functional layers FL1a, FL1b, FL1c to be formed therein (see...). Figure 12 The area of the embankment BK. Specifically, in an embodiment, the embankment BK may include a hydrophobic material, and components formed via an inkjet process may be formed in the space between portions of the embankment BK.
[0065] According to the implementation method, the hole injection layers HILa, HILb, and HILc can be collectively referred to as the hole injection layer or the first functional layer.
[0066] In one embodiment, the embankment BK may include a hydrophobic material. In another embodiment, the embankment BK may include a colored light-blocking material.
[0067] In an embodiment, a pixel-defining film (PDL) may be disposed on at least a portion of hole injection layers HILa, HILb, and HILc, and may define multiple light-emitting regions therein (e.g., first light-emitting regions PXA-R, second light-emitting regions PXA-G, and third light-emitting regions PXA-B). In this disclosure, "defining" in this context may mean establishing its boundaries. For example, the pixel-defining film (PDL) may define the light-emitting regions by establishing the boundaries of the light-emitting regions. For example, the light-emitting regions may correspond to holes in the pixel-defining film (PDL), respectively.
[0068] In this embodiment, the hole injection layers HILa, HILb, and HILc can be disposed on the first electrode EL1 and can at least partially contact the embankment BK.
[0069] In the implementation, the hole injection layer HILa can have a first thickness T1 in the first light-emitting region PXA-R; the hole injection layer HILb can have a second thickness T2 in the second light-emitting region PXA-G; and the hole injection layer HILc can have a third thickness T3 in the third light-emitting region PXA-B.
[0070] In one embodiment, the first thickness T1 and the second thickness T2 may be different from each other. In another embodiment, the second thickness T2 and the third thickness T3 may be different from each other. In yet another embodiment, the first thickness T1, the second thickness T2, and the third thickness T3 may all be different from each other.
[0071] According to an embodiment, hole injection layers HILa, HILb, and HILc can be disposed between the pixel defining film PDL and the dam portion BK in a direction from the light-emitting regions (e.g., the first light-emitting regions PXA-R, the second light-emitting regions PXA-G, and the third light-emitting regions PXA-B) toward the non-light-emitting region NPXA. As described later in the method of manufacturing the display device DD, this structure can be formed by forming the pixel defining film PDL after forming the hole injection layers HILa, HILb, and HILc, and then disposing the pixel defining film PDL on a portion of the hole injection layers HILa, HILb, and HILc adjacent to the dam portion BK.
[0072] In one embodiment, each of the hole injection layers HILa, HILb, and HILc can contact (e.g., directly contact) the circuit layer CL, the first electrode EL1, the embankment BK, and the pixel defining film PDL. In another embodiment, if the hole transport layer HTL1 is not provided on the hole injection layers HILa, HILb, and HILc, each of the hole injection layers HILa, HILb, and HILc can also contact (e.g., directly contact) the corresponding light-emitting layers EMLa, EMLb, and EMLc.
[0073] According to the embodiment, the second distance D2 between the top surface of the embankment BK and the top surface of the substrate BL can be greater than the first distance D1 between the top surface of the pixel defining film PDL and the top surface of the substrate BL. For example, the height of the top surface of the pixel defining film PDL can be lower than the height of the top surface of the embankment BK. In this case, the pixel defining film PDL and the embankment BK can form a stepped structure, thereby allowing the components disposed thereon to be formed in a stable manner. In addition, due to the thickness of the pixel defining film PDL, the first electrode EL1 and the second electrode EL2 can be spaced apart, such that the light-emitting diodes (e.g., the first light-emitting diode ED1, the second light-emitting diode ED2, and the third light-emitting diode ED3) operate in the light-emitting regions (e.g., the first light-emitting regions PXA-R, the second light-emitting regions PXA-G, and the third light-emitting regions PXA-B), but not in the non-light-emitting region NPXA.
[0074] The encapsulation layer TFE can be disposed on the second electrode EL2. The encapsulation layer TFE can be configured to prevent or minimize the formation of a path through which moisture or oxygen from the outside can penetrate into the light-emitting diodes (e.g., the first light-emitting diode ED1, the second light-emitting diode ED2, and the third light-emitting diode ED3).
[0075] The encapsulation layer TFE may include at least one inorganic encapsulation layer and at least one organic encapsulation layer.
[0076] The inorganic encapsulation layer may include at least one inorganic material. The inorganic encapsulation layer may include ceramics, metal oxides, metal nitrides, metal carbides, metal oxynitrides, indium oxide (In₂O₃), tin oxide (SnO₂), indium tin oxide (ITO), silicon oxide, silicon nitride, and / or silicon oxynitride, etc. The inorganic encapsulation layer may be configured as a single layer or multiple layers.
[0077] The organic encapsulation layer may include one or more materials selected from the group consisting of acrylic acid, methacrylic acid, polyester, polyethylene, polypropylene, polyethylene terephthalate (PET), polyethylene naphthalate, polycarbonate, polyimide, polyethylene sulfonate, polyoxymethylene, polyarylate, and hexamethyldisiloxane.
[0078] The display device DD may include an optical layer PL disposed on the display layer DL. The optical layer PL may be configured to control reflected light caused by external light. The optical layer PL may include, for example, a polarizing layer or a color filter layer. However, according to some embodiments, the optical layer PL may be omitted from the display device DD.
[0079] A base substrate BS can be disposed on an optical layer PL. The base substrate BS can serve as a substrate surface on which the optical layer PL is disposed. The base substrate BS can be a glass substrate, a metal substrate, or a plastic substrate. However, embodiments of this disclosure are not limited thereto, and the base substrate BS can be formed of an inorganic layer, an organic layer, or a composite material layer. Furthermore, according to some embodiments, the base substrate BS can be omitted from the display device DD.
[0080] In the display device DD according to embodiments of the present disclosure, light-emitting diodes (e.g., first light-emitting diode ED1, second light-emitting diode ED2, and third light-emitting diode ED3) may each have different thicknesses to enhance luminous efficiency in vacuum for each pixel. In embodiments, the thickness of each light-emitting diode (e.g., first light-emitting diode ED1, second light-emitting diode ED2, and third light-emitting diode ED3) can be adjusted by adjusting the thickness of the hole injection layer included in each light-emitting diode (e.g., first light-emitting diode ED1, second light-emitting diode ED2, and third light-emitting diode ED3). Therefore, the display device DD can have a resonant distance optimized for each pixel and exhibit improved luminous efficiency.
[0081] Figure 5 It is shown Figure 2 A magnified view of region AA. Figure 6 This is a cross-sectional view showing a portion of the display device according to the comparative example.
[0082] refer to Figure 5 In embodiments of this disclosure, the hole injection layer HILa may include a first portion P1 in the first light-emitting region PXA-R, a third portion P3 between the embankment BK and the pixel-defining film PDL, and a second portion P2 connecting the first portion P1 and the third portion P3. In embodiments of this disclosure, the pixel-defining film PDL may be disposed on a portion of the hole injection layer HILa, and the thickness of the hole injection layer HILa in the entire portion of the first light-emitting region PXA-R (e.g., the first portion P1) may be uniform. Therefore, the first light-emitting diode ED1 can exhibit uniform display quality in the first light-emitting region PXA-R defined by the pixel-defining film PDL. According to some embodiments, the pixel-defining film PDL may also be disposed on portions of other hole injection layers (e.g., hole injection layers HILb and HILc), and the other hole injection layers (e.g., hole injection layers HILb and HILc) may also have uniform thickness in the entire portion of their respective light-emitting regions (e.g., the second light-emitting region PXA-G and the third light-emitting region PXA-B).
[0083] In embodiments of this disclosure, the hole injection layer HILa (and / or hole injection layers HILb and HILc) can be formed by an inkjet process. In this case, the dam BK may include a hydrophobic component, such that the hole injection layer HILa (and / or hole injection layers HILb and HILc) is formed within the internal space surrounded by the dam BK.
[0084] refer to Figure 6 The comparative example display device 100 includes a hole injection layer 105 and a pixel defining film 201 disposed on a portion of a first electrode 106. A hole transport layer 107 is disposed on the hole injection layer 105, and a light-emitting layer 108 is disposed on the hole transport layer 107. A plurality of light-emitting stacks 110 are disposed on the light-emitting layer 108, and a second electrode 111 is disposed on the light-emitting stacks 110. An encapsulation layer 112 is disposed on the second electrode 111, and an optical layer 113 is disposed on the encapsulation layer 112. In the comparative example display device 100, the hole injection layer 105 is formed within the embankment 202 via an inkjet process.
[0085] In the light-emitting region 101 defined by the pixel-defining film 201, the thickness of the hole injection layer 105 in the comparative display device 100 is generally non-uniform. As a result, the display device 100 includes a first region 102 that emits light in the normal wavelength band and a second region 103 that emits light in the abnormal wavelength band, wherein the first region 102 and the second region 103 are surrounded by a non-light-emitting region 104. A display device including a structure with a non-uniform thickness of the hole injection layer 105 (e.g., in the second region 103) may exhibit visible smudges on the screen and degrade display quality. Furthermore, the area of the first region 102 that emits light in the normal wavelength band is limited by the second region 103, thereby limiting the usable area for emitting light in the normal wavelength band.
[0086] Conversely, in embodiments of this disclosure, the display device DD has a hole injection layer HILa (and / or hole injection layers HILb and HILc) of uniform thickness in a first light-emitting region PXA-R (and / or a second light-emitting region PXA-G and a third light-emitting region PXA-B) defined by a pixel-defining film PDL. As a result, the display device DD can provide improved display quality, ensure a wider light-emitting area, and achieve enhanced luminous efficiency.
[0087] Figure 7 This is a cross-sectional view showing a portion of a display device according to an embodiment. (Reference) Figure 7 The display device DD1 may further include a fill layer FML and a color control layer CCL. In an embodiment, the display device DD1 may further include a color filter layer CFL.
[0088] The fill layer (FML) can fill the space between the display layer (DL) and the color control layer (CCL). The fill layer (FML) can be disposed on the encapsulation layer (TFE) and can be in contact with the encapsulation layer (TFE) (e.g., in direct contact).
[0089] The filler layer FML can serve as a buffer between the display layer DL and the color control layer CCL. In an embodiment, the filler layer FML can have damping properties and can be configured to enhance the mechanical strength of the display device DD1. The filler layer FML can be formed from a filler resin comprising a polymer resin. For example, the filler layer FML can be formed from a resin comprising acrylic resin or epoxy resin.
[0090] The color control layer CCL may include a plurality of barrier layers BR spaced apart from each other, and color control portions disposed between the barrier layers BR (e.g., a first color control portion CCP-R, a second color control portion CCP-G, and a third color control portion CCP-B). Each barrier layer BR may be formed of a polymer resin and a hydrophobic additive. The barrier layer BR may also include a light-absorbing material, pigment, or dye. For example, the barrier layer BR may include a black pigment or a black dye to achieve a black barrier layer. Carbon black may be used as a black pigment or dye when forming a black barrier layer, but embodiments of this disclosure are not limited thereto.
[0091] The color control layer (CCL) may include a first color control portion (CCP-R) configured to transmit a first color light, a second color control portion (CCP-G) including quantum dots for converting the first color light into a second color light, and a third color control portion (CCP-B) including quantum dots for converting the first color light into a third color light. The second color light may be in a wavelength range longer than the wavelength range of the third color light, and the first color light may be in a wavelength range longer than the wavelength ranges of both the second and third color lights. For example, the first color light may be red, the second color light may be green, and the third color light may be blue.
[0092] A color filter layer CFL may include a light-shielding portion BM and a color filter portion CF. The color filter portion CF may include multiple filters (e.g., a first filter CF-R, a second filter CF-G, and a third filter CF-B). That is, the color filter layer CFL may include a first filter CF-R configured to transmit a first color of light, a second filter CF-G configured to transmit a second color of light, and a third filter CF-B configured to transmit a third color of light. For example, the first filter CF-R may be a red color filter, the second filter CF-G may be a green color filter, and the third filter CF-B may be a blue color filter.
[0093] Each of the filters (e.g., a first filter CF-R, a second filter CF-G, and a third filter CF-B) may include a photosensitive polymer resin and a pigment or dye. The first filter CF-R may include a red pigment or dye, the second filter CF-G may include a green pigment or dye, and the third filter CF-B may include a blue pigment or dye. However, embodiments of this disclosure are not limited thereto, and the third filter CF-B may not include a pigment or dye. The third filter CF-B may include a photosensitive polymer resin and may be transparent. The third filter CF-B may be formed of a transparent photosensitive resin.
[0094] The light-shielding portion BM can be a black matrix. The light-shielding portion BM can include organic or inorganic light-shielding materials containing black pigments or dyes. The light-shielding portion BM can be configured to prevent light leakage and can define the boundaries between adjacent filters (e.g., first filter CF-R, second filter CF-G, and third filter CF-B).
[0095] The color filter layer CFL may also include a buffer layer BFL. The buffer layer BFL can serve as a protective layer for filters (e.g., a first filter CF-R, a second filter CF-G, and a third filter CF-B). The buffer layer BFL can be an inorganic layer comprising at least one inorganic material such as silicon nitride, silicon oxide, and silicon oxynitride. The buffer layer BFL can be formed as a single layer or a multilayer structure.
[0096] According to Figure 7 In the display device DD1 of the illustrated embodiment, the third filter CF-B of the color filter layer CFL is depicted as overlapping with the second filter CF-G and the first filter CF-R; however, the embodiments of this disclosure are not limited to this. For example, the first filter CF-R, the second filter CF-G, and the third filter CF-B may be separated by the light-shielding portion BM, and may not overlap in a plan view. In the embodiment, the first filter CF-R, the second filter CF-G, and the third filter CF-B may be configured to correspond to the first light-emitting region PXA-R, the second light-emitting region PXA-G, and the third light-emitting region PXA-B, respectively.
[0097] Figure 8 This is a cross-sectional view showing a portion of a display device according to an embodiment. (Reference) Figure 8 In the display device DD2 according to the embodiment, the pixel defining film PDL1 can extend throughout the embankment BK and can cover the embankment BK. In the display device DD2 with this structure, the components provided on the embankment BK are positioned on the pixel defining film PDL1 and do not directly contact the embankment BK, so that the components provided on the embankment BK can be formed to have enhanced structural stability.
[0098] Figure 9 This is a cross-sectional view showing a portion of a display device according to an embodiment. (Reference) Figure 9 In the display device DD3 according to an embodiment, the first electrode EL1' extends in a direction parallel to the extension direction of the substrate BL, and a dam portion BK may be disposed on at least a portion of the first electrode EL1'. In other words, the dam portion BK in this embodiment may cover one side of the first electrode EL1'. Hole injection layers HILa1, HILb1, and HILc1 may be disposed on at least a portion of the first electrode EL1' and at least partially contact the dam portion BK, and a pixel defining film PDL may be disposed on a portion of the hole injection layers HILa1, HILb1, and HILc1. In the display device DD3 with this structure, the first electrode EL1' can be formed planarly in the light-emitting regions (e.g., the first light-emitting regions PXA-R, the second light-emitting regions PXA-G, and the third light-emitting regions PXA-B). Therefore, the hole injection layers HILa1, HILb1, and HILc1 disposed on the first electrode EL1' can also be formed substantially planarly in the light-emitting regions (e.g., the first light-emitting regions PXA-R, the second light-emitting regions PXA-G, and the third light-emitting regions PXA-B), and can be formed to have enhanced stability. Furthermore, the thickness control of the hole injection layers HILa1, HILb1, and HILc1, used to adjust the optical cavity length of each light-emitting diode (e.g., the first light-emitting diode ED1, the second light-emitting diode ED2, and the third light-emitting diode ED3), is facilitated.
[0099] Figure 10 This is a cross-sectional view showing a portion of a display device according to an embodiment. (Reference) Figure 10In the display device DD4 according to an embodiment, the first electrode EL1' can extend in a direction parallel to the extension direction of the substrate BL, and the embankment BK can be disposed on at least a portion of the first electrode EL1'. Furthermore, the pixel defining film PDL2 in this embodiment can extend throughout the embankment BK and can cover the embankment BK. In the display device DD4 having this structure, the components disposed on the embankment BK can be formed on the pixel defining film PDL2 without directly contacting the embankment BK. As a result, the components disposed above the embankment BK can be formed with improved structural stability. Furthermore, the first electrode EL1' can be formed planarly in the light-emitting regions (e.g., the first light-emitting region PXA-R, the second light-emitting region PXA-G, and the third light-emitting region PXA-B), and therefore, the hole injection layers HILa1, HILb1, and HILc1 disposed on the first electrode EL1' can also be formed substantially planarly in the light-emitting regions (e.g., the first light-emitting region PXA-R, the second light-emitting region PXA-G, and the third light-emitting region PXA-B), and can also be formed more stably. The thickness of the hole injection layers HILa1, HILb1, and HILc1 can be easily controlled to adjust the optical cavity length of the corresponding light-emitting diodes (e.g., the first light-emitting diode ED1, the second light-emitting diode ED2, and the third light-emitting diode ED3).
[0100] Figure 11 This is a cross-sectional view showing a portion of a display device according to an embodiment. (Reference) Figure 11 In the display device DD5 according to an embodiment, a pixel defining film PDL3 can be disposed on a portion of the hole injection layers HILa1, HILb1, and HILc1, and a groove GR can be formed with the portions of the hole injection layers HILa1, HILb1, and HILc1 that contact the embankment BK. A portion of the hole transport layer HTL1 and a portion of the electron transport region ETR can be disposed in the groove GR. The presence of this groove GR under the stacked structure can prevent current flow in the non-light-emitting region NPXA, thereby reducing lateral leakage. As a result, the luminous efficiency of the light-emitting diodes (e.g., the first light-emitting diode ED1, the second light-emitting diode ED2, and the third light-emitting diode ED3) can be improved.
[0101] Figure 12 This is a cross-sectional view showing a portion of a display device according to an embodiment. (Reference) Figure 12 In the display device DD6 according to an embodiment, a first functional layer FL1a may be disposed on a first electrode EL1 and may at least partially contact the embankment BK. A pixel defining film PDL may be disposed on at least a portion of the first functional layer FL1a.
[0102] According to an implementation, the first functional layers FL1a, FL1b, and FL1c can be hole functional layers including a hole injection layer and a hole transport layer. According to an implementation, the hole transport region HTR (or its hole transport layer HTL and / or hole injection layer HIL) (see...) Figure 4 Examples of the first functional layers FL1a, FL1b, and FL1c are possible. However, embodiments of this disclosure are not limited thereto, and when the display device DD6 employs an inverted device structure, the first functional layers FL1a, FL1b, and FL1c can be electronic functional layers including an electron injection layer and / or an electron transport layer. Similarly, the above references... Figures 2 to 11 The description of the hole injection layer is not limited to the hole injection layer. For example, in an inverted structure, an electron injection layer can be used in the above reference. Figures 2 to 11 The corresponding locations of the described hole injection layers. According to the implementation, the first functional layers FL1a, FL1b, and FL1c can be collectively referred to as the first functional layer.
[0103] According to the implementation method, the embankment BK can define the area where the first functional layers FL1a, FL1b, and FL1c are formed.
[0104] According to the embodiment, the first functional layers FL1a, FL1b, and FL1c can be disposed on the first electrode EL1 and partially contact the embankment BK.
[0105] According to the implementation method, the first functional layers FL1a, FL1b, and FL1c may have different thicknesses in the first light-emitting region PXA-R, the second light-emitting region PXA-G, and the third light-emitting region PXA-B, respectively.
[0106] According to an embodiment, in a direction (e.g., horizontal direction) from the light-emitting regions (e.g., the first light-emitting regions PXA-R, the second light-emitting regions PXA-G, and the third light-emitting regions PXA-B) toward the non-light-emitting region NPXA, the first functional layers FL1a, FL1b, and FL1c can be disposed between the pixel-defining film PDL and the embankment BK. This structure can be formed by forming the pixel-defining film PDL after forming the first functional layers FL1a, FL1b, and FL1c, and then disposing the pixel-defining film PDL on a portion of the first functional layers FL1a, FL1b, and FL1c adjacent to the embankment BK.
[0107] According to the implementation, the first functional layers FL1a, FL1b, and FL1c can each contact the circuit layer CL, the first electrode EL1, the embankment BK, the pixel limiting film PDL, and the corresponding light-emitting layers EMLa, EMLb, and EMLc.
[0108] According to the embodiments, the pixel-defining film PDL can be disposed on at least a portion of the first functional layers FL1a, FL1b, and FL1c, and the pixel-defining film PDL can define a plurality of light-emitting regions therein (e.g., a first light-emitting region PXA-R, a second light-emitting region PXA-G, and a third light-emitting region PXA-B).
[0109] As described above, in order to enhance the optical emission efficiency in vacuum for each pixel, the display device DD6 may have light-emitting diodes (LEDs) each with different thicknesses (e.g., first LED ED1, second LED ED2, and third LED ED3). In an embodiment, the thickness of each LED (e.g., first LED ED1, second LED ED2, and third LED ED3) can be adjusted by adjusting the thickness of the corresponding first functional layers FL1a, FL1b, and FL1c. Therefore, the display device DD6 according to the embodiment can have a resonant distance optimized for each pixel and exhibits improved luminous efficiency.
[0110] Figure 13 This is a flowchart illustrating a method for manufacturing a display device according to an embodiment of the present disclosure. Figures 14A to 14E This is a cross-sectional view schematically showing a portion of the manufacturing steps of the display device according to an embodiment.
[0111] refer to Figure 13 The method for manufacturing a display device according to the embodiments may include preparing a substrate (operation S100), forming a circuit layer (operation S110), forming a first electrode (operation S120), forming a dam (operation S130), forming a first functional layer (operation S140), forming a pixel defining film (operation S150), forming a light-emitting layer (operation S160), forming a second functional layer (operation S170), and forming a second electrode (operation S180).
[0112] refer to Figure 13 and Figure 14A In the method for manufacturing a display device according to the embodiment, a substrate BL can be prepared in operation S100, a circuit layer CL can be formed on the substrate BL in operation S110, and a plurality of first electrodes EL1 can be formed on the circuit layer CL in operation S120.
[0113] refer to Figure 13 and Figure 14B In operation S130, a dam BK can be formed between the first electrodes EL1. Figure 14BIn the diagram, the embankment BK is shown as being disposed between the first electrodes EL1 without contacting the first electrodes EL1. However, embodiments of this disclosure are not limited thereto. In another embodiment, the embankment BK may be disposed on at least a portion of the first electrodes EL1 and may cover one side of the first electrodes EL1.
[0114] refer to Figure 13 and Figure 14C In operation S140, the first functional layers FL1a, FL1b, and FL1c can be formed on the first electrode EL1 and at least partially contact the embankment BK. Each of the first functional layers FL1a, FL1b, and FL1c can be a hole injection layer or a hole functional layer including a hole injection layer and a hole transport layer. However, embodiments of this disclosure are not limited thereto. In an embodiment where the display device DD has an inverted device structure, each of the first functional layers FL1a, FL1b, and FL1c can be an electron injection layer or an electron functional layer including an electron injection layer and an electron transport layer.
[0115] In this implementation, the first functional layers FL1a, FL1b, and FL1c can be formed by an inkjet process and can be bonded to a pixel-defined film PDL (see [link to implementation details]). Figure 14D Each of the light-emitting regions defined by the light source has a different thickness.
[0116] refer to Figure 13 and Figure 14D In operation S150, a pixel-defining film (PDL) can be formed on at least a portion of the first functional layers FL1a, FL1b, and FL1c. Multiple light-emitting regions (e.g., first light-emitting region PXA-R, second light-emitting region PXA-G, and third light-emitting region PXA-B) can be defined by the pixel-defining film (PDL).
[0117] refer to Figure 13 and Figure 14E In operation S160, light-emitting layers EMLa, EMLb, and EMLc can be formed on a portion of the pixel-defining film PDL and the first functional layers FL1a, FL1b, and FL1c. In operation S170, second functional layers FL2a, FL2b, and FL2c can be formed on the first functional layers FL1a, FL1b, and FL1c, the pixel-defining film PDL, and the embankment BK. According to the embodiment, the electron transport region ETR (or its electron transport layer ETL and / or electron injection layer EIL) (see...) Figure 4 Examples of second functional layers FL2a, FL2b, and FL2c are as follows. According to the implementation, the light-emitting layers EMLa, EMLb, and EMLc can be collectively referred to as light-emitting layers, and the second functional layers FL2a, FL2b, and FL2c can be collectively referred to as second functional layers.
[0118] In an embodiment, the first functional layers FL1a, FL1b, and FL1c can be configured as hole injection layers. In this case, the method may further include: between operation S150 and operation S160, forming first auxiliary layers SB1a, SB1b, and SB1c on the pixel defining film PDL and the first functional layers FL1a, FL1b, and FL1c. The first auxiliary layers SB1a, SB1b, and SB1c may include hole transport layers. According to an embodiment, the first auxiliary layers SB1a, SB1b, and SB1c may be collectively referred to as the first auxiliary layer.
[0119] In one embodiment, the first functional layers FL1a, FL1b, and FL1c can be configured as electron injection layers. In this case, the method may further include forming first auxiliary layers SB1a, SB1b, and SB1c on the pixel defining film PDL and the first functional layers FL1a, FL1b, and FL1c between operations S150 and S160. The first auxiliary layers SB1a, SB1b, and SB1c may include electron transport layers.
[0120] In this embodiment, a second light-emitting stack ST2, a third light-emitting stack ST3, a fourth light-emitting stack ST4, and a fifth light-emitting stack ST5 can then be formed on the first light-emitting stack ST1a, ST1b, and ST1c, thereby forming a series structure. In operation S180, a second electrode EL2 can be formed on the fifth light-emitting stack ST5. Thereafter, an encapsulation layer TFE, an optical layer PL, and a base substrate BS can be formed on the second electrode EL2.
[0121] In the method for manufacturing a display device according to embodiments of the present disclosure, after forming a first electrode and a diaphragm, a first functional layer can be formed on the first electrode and the diaphragm via an inkjet process. The first functional layer can have a different thickness in each light-emitting region, allowing the vacuum distance of each light-emitting device (e.g., a light-emitting diode) to be adjusted. Furthermore, the first functional layer can have a uniform thickness in each light-emitting region, thereby allowing the light-emitting devices to exhibit uniform display quality in the light-emitting region. Therefore, the display device can have improved display quality and a wider light-emitting region, thereby achieving enhanced luminous efficiency.
[0122] The display device according to the embodiments of this disclosure can be applied to various electronic devices. The electronic device according to the embodiments may include the display device described above (e.g., display device DD, and display devices DD1 to DD6), and may also include other modules or devices that provide additional functions in addition to the display device.
[0123] In an embodiment, the electronic device may include a display device, and may further include a processor configured to control the display device, a memory storing data for operating the display device or the processor, and a power conversion module configured to generate or supply power.
[0124] Figure 15 This is a block diagram of an electronic device according to embodiments of the present disclosure. (See reference...) Figure 15 The electronic device 10 according to the embodiments may include a display module 11, a processor 12, a memory 13, and a power module 14. The electronic device 10 may also include an input module 15, an output module (e.g., a non-image output module) 16, and / or a communication module 17.
[0125] Electronic device 10 can be configured to output various information in the form of images via display module 11. When processor 12 executes an application stored in memory 13, the image information provided by the application can be presented to the user via display module 11. Power module 14 may include: a power supply module (e.g., a power source), such as a power adapter or battery device; and a power conversion module (e.g., a power converter) configured to convert the power provided by the power supply module into the power required for the operation of electronic device 10. Input module 15 can be configured to provide input information to processor 12 and / or display module 11. Output module 16 can be configured to receive and provide non-image information transmitted from processor 12, such as audio, haptic feedback, or light emission, to the user. Communication module 17 can be responsible for transmitting and receiving information between electronic device 10 and external devices, and may include a receiver and a transmitter.
[0126] At least one of the components of the electronic device 10 described above may be included in the display device according to the embodiments described above. Additionally, some of the discrete modules functionally included in a single module may be included within the display device, while other discrete modules may be provided separately from the display device. For example, the display device may include a display module 11, while the processor 12, memory 13, and power module 14 may be provided as components of another device within the electronic device 10 but not within the display device.
[0127] Figures 16 to 18 This is a schematic diagram of an electronic device according to various embodiments of the present disclosure. Figures 16 to 18 Examples of various electronic devices that can be incorporated into a display device according to an embodiment are shown.
[0128] exist Figure 16 Examples of electronic devices shown are a smartphone 10_1a, a tablet PC 10_1b, a laptop computer 10_1c, a television (TV) 10_1d, and a tabletop display 10_1e.
[0129] In addition to the display module, the smartphone 10_1a may also include an input module such as a touch sensor and a communication module. The smartphone 10_1a can be configured to process information received through the communication module or another input module and display that information via the display module of the display device.
[0130] Tablet PC 10_1b, laptop computer 10_1c, TV 10_1d, and desktop display 10_1e can similarly include a display module and an input module, and may additionally include a communication module, depending on the implementation.
[0131] Figure 17 An example is shown where an electronic device, including a display module, is incorporated into a wearable electronic device. The wearable electronic device may be a pair of smart glasses 10_2a, a head-mounted display 10_2b, or a smartwatch 10_2c.
[0132] The smart glasses 10_2a and the head-mounted display 10_2b may include a display module configured to emit a display image and a reflector configured to reflect the emitted display image to the user's eyes, thereby providing the user with virtual reality or augmented reality images.
[0133] The smartwatch 10_2c may include a biometric sensor as an input device and may be configured to provide the user with biometric information detected by the biometric sensor via a display module.
[0134] Figure 18 An example is shown of an electronic device, including a display module, integrated into a vehicle. For example, the electronic device 10_3 can be applied to the vehicle's dashboard or central instrument panel, or it can be applied to a central information display (CID) mounted on the dashboard or an interior mirror display that replaces the side mirrors.
[0135] While specific, non-limiting exemplary embodiments of this disclosure have been described above with reference to the accompanying drawings, those skilled in the art to which this disclosure pertains will understand that various modifications and substitutions can be made to the embodiments of this disclosure without departing from the spirit and scope of this disclosure. Furthermore, it should be understood that the described embodiments are not intended to limit this disclosure, and modifications and substitutions to the embodiments of this disclosure, as well as equivalents to aspects of the embodiments of this disclosure, are included within the spirit and scope of this disclosure.
Claims
1. A display device, comprising: Substrate; Circuit layer, on the substrate; The first electrode is on the circuit layer and connected to the circuit layer; The embankment is located between the first electrodes; A first functional layer is formed on the first electrode and is at least partially in contact with the embankment. A pixel defining film on the first functional layer, wherein the pixel defining film defines a light-emitting region, and the first electrode is at least partially located in the light-emitting region; A light-emitting layer is located on the first functional layer; A second functional layer is disposed on the light-emitting layer; and The second electrode is located on the second functional layer. The first functional layer has a first thickness in the first light-emitting region of the light-emitting region, and has a second thickness in the second light-emitting region of the light-emitting region that is different from the first thickness.
2. The display device according to claim 1, wherein, A groove is defined by the portion of the pixel defining film and the first functional layer that contacts the embankment, and the groove is between the portion of the pixel defining film and the first functional layer. A portion of the second functional layer is located within the groove.
3. The display device according to claim 1, wherein, The first functional layer is in contact with the circuit layer.
4. The display device according to claim 1, wherein, The first functional layer is on the entire upper surface of at least one of the first electrodes.
5. The display device according to claim 1, wherein, The non-luminescent area is defined between the luminescent areas, and Wherein, in the direction from the light-emitting area toward the non-light-emitting area, the first functional layer is located between the pixel defining film and the embankment.
6. The display device according to claim 1, wherein, The first functional layer is in contact with the circuit layer, the first electrode, the embankment, the pixel defining film, and the light-emitting layer.
7. The display device according to claim 1, wherein, The first functional layer includes at least one of a hole injection layer and a hole transport layer.
8. The display device according to claim 1, further comprising: A light-emitting stack is located between the second electrode and the second functional layer; as well as A charge generation layer is located between the second functional layer and the light-emitting stack. The light-emitting stack includes: At least one stacked hole function layer; At least one stacked light-emitting layer; and At least one stacked electronic functional layer.
9. The display device according to claim 1, wherein, The first distance between the top surface of the embankment and the substrate is greater than the second distance between the top surface of the pixel defining film and the substrate.
10. The display device according to claim 1, wherein, The embankment is on at least one of the first electrodes.
11. The display device according to claim 1, wherein, The pixel-defining film extends over the upper portion of the embankment.
12. The display device according to claim 11, wherein, The non-luminescent areas are between the luminescent areas, and The pixel defining film is located on a portion of the first functional layer, and the portion of the first functional layer overlaps with the non-light-emitting area in a planar view.
13. The display device according to claim 1, wherein, The non-luminescent areas are between the luminescent areas, and In this configuration, the portion of the first functional layer that overlaps with the non-light-emitting area in the plan view is exposed between the pixel-defining film and the embankment.
14. Electronic devices, including: The display device includes: Substrate; Circuit layer, on the substrate; The first electrode is on the circuit layer and connected to the circuit layer; The embankment is located between the first electrodes; A first functional layer is formed on the first electrode and is at least partially in contact with the embankment. A pixel defining film on the first functional layer, wherein the pixel defining film defines a light-emitting region, and the first electrode is at least partially located in the light-emitting region; A light-emitting layer is located on the first functional layer; A second functional layer is disposed on the light-emitting layer; and The second electrode is located on the second functional layer. The first functional layer has a first thickness in the first light-emitting region of the light-emitting region, and has a second thickness in the second light-emitting region of the light-emitting region that is different from the first thickness.
15. The electronic device of claim 14, further comprising: A processor configured to control the display device; A memory that stores data for the operation of the display device or the processor; as well as A power converter configured to generate or supply power.
Citation Information
Patent Citations
Interference source identification device and methods for identifying interference sources performed in the device
KR1020250046472A