Silicon wafer etch cleaning method, apparatus, medium, and product
Patent Information
- Application Number
- CN202611134142.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-07-29
- Publication Date
- 2026-10-20
AI Technical Summary
[0005]本申请的一个目的是提供一种硅片腐蚀清除方法、设备、介质及产品,至少用以解决现有技术中改善硅片腐蚀过程中局部流场不足、药液残留和金属离子残留不易同步控制的问题
[0017]与相关技术相比,本申请实施例提供的方案中,通过在腐蚀前对半导体硅片进行表面活化预处理,利用参数优化模型生成初始腐蚀工艺参数,并在腐蚀过程中结合复合腐蚀液、复合流场以及流场状态和残留状态反馈调节腐蚀工艺参数,同时在腐蚀后进行等离子体原位残留清除和补偿清除判断,可以使腐蚀处理、过程控残和后处理清除形成连续配合,有利于降低硅片表面的药液残留和金属离子沉积,并提高腐蚀处理后的表面洁净度。
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Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor technology, and in particular to a method, apparatus, medium, and product for removing silicon wafer etching. Background Technology
[0002] Semiconductor silicon wafers typically undergo etching during manufacturing to remove material, transfer patterns, or adjust surface morphology. During etching, the etching solution reacts with the silicon wafer surface, producing metal ions, reaction byproducts, and adsorbed reagent residues. If these residues are not controlled or removed promptly, they can negatively impact the cleanliness of the silicon wafer surface, the uniformity of etching, and the stability of subsequent processing steps.
[0003] In related technologies, silicon wafer etching processes typically focus on controlling the etching rate, etching depth, or reagent formulation, with insufficient consideration given to the interaction between the flow field distribution on the silicon wafer surface, the state of residual reagents, and in-situ removal after etching. Especially in silicon wafers with trenches or high aspect ratio patterns, the flow displacement capacity of the etching solution in local areas is insufficient, easily forming flow stagnation areas, which increases the amount of residual reagents and metal ion deposition.
[0004] Furthermore, the process parameters during etching often rely on preset values or adjustments based on a single monitoring quantity, making it difficult to dynamically match them according to silicon wafer characteristics, surface activation state, flow field state, and residual state. Therefore, a silicon wafer etching and removal scheme that can provide continuous control before, during, and after etching is needed. Summary of the Invention
[0005] One objective of this application is to provide a silicon wafer etching and removal method, equipment, medium, and product, which at least solves the problems of insufficient local flow field, difficulty in simultaneously controlling chemical residue and metal ion residue during silicon wafer etching in the prior art.
[0006] To achieve the above objectives, some embodiments of this application provide the following aspects:
[0007] In a first aspect, some embodiments of this application provide a method for removing etching from a silicon wafer, the method comprising:
[0008] Surface activation pretreatment is performed on the semiconductor silicon wafer to be etched;
[0009] The silicon wafer characteristic data and surface activation pretreatment data of the semiconductor silicon wafer are input into the parameter optimization model to obtain the initial etching process parameters;
[0010] The semiconductor silicon wafer is etched using a composite etching solution containing a main etchant, a surface modifier, and a chelating agent, according to the initial etching process parameters.
[0011] During the etching process, a composite flow field is formed on the surface of the semiconductor silicon wafer through pulse jetting and silicon wafer attitude adjustment;
[0012] The flow field state and residual state on the surface of the semiconductor silicon wafer are obtained, and the etching process parameters are adjusted according to the flow field state and the residual state.
[0013] After the etching process is completed, the semiconductor silicon wafer is subjected to in-situ plasma residue removal.
[0014] Secondly, some embodiments of this application also provide an electronic device, the electronic device comprising: one or more processors; and a memory storing computer program instructions, which, when executed, cause the processor to perform the steps of the method described above.
[0015] Thirdly, some embodiments of this application also provide a computer-readable medium having computer program instructions stored thereon, which can be executed by a processor to implement the method described above.
[0016] Fourthly, some embodiments of this application also provide a computer program product, including a computer program / instructions that, when executed by a processor, implement the steps of the method described above.
[0017] Compared with related technologies, the solution provided in this application pre-treats the semiconductor silicon wafer with surface activation before etching, generates initial etching process parameters using a parameter optimization model, and adjusts the etching process parameters by combining composite etching liquid, composite flow field, and feedback of flow field state and residual state during the etching process. At the same time, plasma in-situ residue removal and compensation removal judgment are performed after etching. This allows the etching treatment, process residue control and post-treatment removal to form a continuous coordination, which is beneficial to reduce chemical residue and metal ion deposition on the silicon wafer surface and improve the surface cleanliness after etching treatment. Attached Figure Description
[0018] One or more embodiments are illustrated by way of example with reference numerals in the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Elements with the same reference numerals in the drawings are denoted as similar elements. Unless otherwise stated, the figures in the drawings are not to be limited by scale.
[0019] Figure 1 An exemplary flowchart of a silicon wafer etching removal method provided in some embodiments of this application;
[0020] Figure 2 An exemplary structural diagram of the electronic device provided for some embodiments of this application. Detailed Implementation
[0021] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0022] Figure 1 This is an exemplary flowchart illustrating a silicon wafer etching and removal method provided in some embodiments of this application. The method can be used in a wet etching process for semiconductor silicon wafers, and removes residues from the silicon wafer surface in situ after etching. The method includes the following steps.
[0023] S101. Perform surface activation pretreatment on the semiconductor silicon wafer to be etched.
[0024] Specifically, the semiconductor silicon wafer to be etched can be a silicon wafer that has undergone preliminary cleaning. Surface activation pretreatment is used to improve the hydrophilicity and reaction uniformity of the semiconductor silicon wafer surface, enabling the subsequent composite etching solution to spread more evenly and penetrate into the microstructure regions of the silicon wafer surface. Surface activation pretreatment can employ plasma activation, chemical activation, or other treatment methods that can improve the coverage of active groups on the silicon wafer surface.
[0025] In one embodiment, the cleaned semiconductor silicon wafer can be transported into the etching chamber, and its surface can be activated before the etching process begins. The activated semiconductor silicon wafer surface has a better wettability, which can reduce the probability of the etching solution forming droplets or uneven contact in local areas.
[0026] S102. Input the silicon wafer characteristic data and surface activation pretreatment data of the semiconductor silicon wafer into the parameter optimization model to obtain the initial etching process parameters.
[0027] Specifically, silicon wafer characteristic data is used to characterize the material and structural properties of the semiconductor silicon wafer to be etched, such as wafer material, thickness, pattern aspect ratio, and distribution of the area to be etched. Surface activation pretreatment data is used to characterize the state of the silicon wafer after surface activation, such as activation method, activation time, and surface hydrophilicity evaluation data. The parameter optimization model is used to generate initial etching process parameters adapted to the current semiconductor silicon wafer based on the above data.
[0028] In one embodiment, the initial etching process parameters may include at least one of etching temperature, jetting pressure, rotational speed, and etching time. By generating initial etching process parameters before etching, subsequent etching processes can be set in conjunction with the silicon wafer structure and surface activation state, rather than relying solely on fixed empirical parameters.
[0029] S103. Using a composite etching solution containing a main etchant, a surface modifier, and a chelating agent, the semiconductor silicon wafer is etched according to the initial etching process parameters.
[0030] Specifically, the main etchant is used to etch the semiconductor silicon wafer; the surface modifier is used to improve the wetting and spreading state between the composite etchant and the surface of the semiconductor silicon wafer; and the chelating agent is used to complex the metal ions generated or precipitated during the etching process, thereby reducing the deposition of metal ions on the surface of the semiconductor silicon wafer. The composite etchant can be supplied to the etching chamber by an etchant supply device and comes into contact with the semiconductor silicon wafer under temperature control conditions.
[0031] In one embodiment, etching according to initial etching process parameters may include controlling the temperature of the composite etchant according to the initial etching temperature, supplying the composite etchant to the surface of the semiconductor silicon wafer according to the initial spray pressure, controlling the rotation of the semiconductor silicon wafer according to the initial rotation speed, and performing etching according to the initial etching time. These parameters can be further adjusted during the etching process based on monitoring data.
[0032] S104. During the etching process, a composite flow field is formed on the surface of the semiconductor silicon wafer by pulse jetting and silicon wafer attitude adjustment.
[0033] Specifically, pulse jetting is used to apply the composite etchant to the surface of a semiconductor silicon wafer in a periodic or intermittent manner to enhance localized liquid disturbance and displacement capabilities. Wafer attitude adjustment can include wafer rotation, tilt adjustment, or a combination of both, to alter the flow path of the composite etchant on the wafer surface. The composite flow field is a fluid interaction state resulting from the combined impact of pulse jetting and the shearing action generated by wafer attitude adjustment.
[0034] In one embodiment, the pulse jet can be adjusted based on the location of the area to be etched, the silicon wafer pattern structure, or model output parameters. Silicon wafer attitude adjustment can be used to change the residence state of the composite etchant in trenches, edges, or other localized areas, ensuring good flow and renewal capabilities of the etchant on the semiconductor silicon wafer surface.
[0035] S105. Obtain the flow field state and residual state on the surface of the semiconductor silicon wafer, and adjust the etching process parameters according to the flow field state and the residual state.
[0036] Specifically, the flow field state characterizes the flow of the composite etchant on the surface of the semiconductor silicon wafer during the etching process, such as flow velocity distribution, local flow velocity, or flow field uniformity. The residue state characterizes the state related to residues during the etching process, such as the amount of etchant residue on the silicon wafer surface, the concentration of metal ions in the composite etchant, or the accumulation of reaction byproducts. By simultaneously considering the flow field state and the residue state, the flow control of the etchant and the residue control can be linked.
[0037] In one embodiment, when the flow field indicates insufficient flow of the composite etching solution in a localized area, or the residual state indicates an increase in the amount of residual solution or the concentration of metal ions, at least one of the following can be adjusted: spray pressure, spray frequency, etching temperature, silicon wafer tilt angle, or chelating agent replenishment amount. For example, the local spraying effect can be increased to improve liquid displacement, the etching temperature can be decreased to slow down residue accumulation, and chelating agent can be added to enhance the complexation and removal capacity of metal ions.
[0038] S106. After the etching process is completed, the semiconductor silicon wafer is subjected to in-situ plasma residue removal.
[0039] Specifically, plasma in-situ residue removal is used to remove adsorbed chemical residues, organic residues, or some reaction byproducts from the surface of semiconductor silicon wafers after etching. In-situ residue removal can be performed in the etching-related chamber or in a linked processing area to reduce the introduction of new contamination into the silicon wafer during transfer or to allow residues to dry and solidify.
[0040] In one embodiment, after in-situ plasma residue removal is completed, the amount of residue on the surface of the semiconductor silicon wafer can be detected. When the residue detection result meets preset residue control conditions, the removal process ends; when the residue detection result does not meet the preset residue control conditions, a compensatory removal process can be performed. The compensatory removal process may include extending the plasma treatment time, performing pulse cleaning, or a combination of both, to further reduce residue on the silicon wafer surface.
[0041] In this embodiment, by performing surface activation pretreatment before etching and generating initial etching process parameters based on silicon wafer characteristic data and surface activation pretreatment data, the etching process can be matched with the surface state of the silicon wafer. By forming a composite flow field through composite etching liquid, pulse jetting, and silicon wafer attitude adjustment, and by dynamically adjusting the etching process parameters in combination with the flow field state and residual state, the local etching liquid retention and residual accumulation can be improved. By judging the in-situ plasma residue removal and compensation removal after etching, the adsorbed residue on the silicon wafer surface can be further removed, thereby improving the surface cleanliness and etching uniformity of the silicon wafer after etching.
[0042] In one embodiment, obtaining the flow field state and residual state on the surface of the semiconductor silicon wafer, and adjusting the etching process parameters according to the flow field state and the residual state, includes:
[0043] The flow velocity distribution, residual amount of chemical solution, and concentration of metal ions in the composite etching solution on the surface of the semiconductor silicon wafer are acquired in real time.
[0044] When the local flow velocity in the flow field velocity distribution is lower than the preset flow velocity threshold, the residual amount of the drug solution reaches the first residual threshold, or the metal ion concentration reaches the first concentration threshold, the flow field velocity distribution, the residual amount of the drug solution, and the metal ion concentration are input into the parameter optimization model;
[0045] The parameter optimization model outputs parameter update results, and at least one of the following is adjusted based on the parameter update results: injection pressure, injection frequency, etching temperature, silicon wafer tilt angle, and chelating agent replenishment amount.
[0046] Specifically, during the etching process, the flow field velocity distribution on the surface of the semiconductor silicon wafer can be acquired in real time using a flow field sensor. The flow field sensor can detect the flow of the composite etching solution on the silicon wafer surface using particle image velocimetry, with a sampling frequency of at least 15Hz. This detection method can obtain local flow velocity changes in the central, edge, and trench regions of the silicon wafer, and identify areas with locally low flow velocities.
[0047] In one embodiment, the minimum flow velocity on the silicon wafer surface can be set as a preset flow velocity threshold, for example, 1.5 m / s. When the flow field velocity distribution indicates that the local flow velocity in a certain area is lower than 1.5 m / s, it indicates that the flow displacement capacity of the composite etching solution in that area is insufficient, which can easily lead to solution retention or accumulation of reaction byproducts. In this case, the flow field velocity distribution can be input into the parameter optimization model, which can then determine the corresponding injection pressure adjustment or silicon wafer tilt angle adjustment.
[0048] Furthermore, the parameter optimization model can determine the areas requiring enhanced spraying based on locations where local flow velocities fall below a preset velocity threshold. For example, when the local flow velocity in the central region is below the preset velocity threshold, the spraying pressure in the corresponding spraying area of the central region can be increased; when the local flow velocity in the edge region is below the preset velocity threshold, the spraying pressure in the corresponding spraying area of the edge region can be increased; when the local flow velocity in the trench region is below the preset velocity threshold, the spraying pressure and wafer tilt angle can be adjusted in conjunction with the trench pattern. As a specific implementation, the parameter optimization model can increase the spraying pressure in the corresponding region by 0.05 MPa, or adjust the wafer tilt angle, so that the composite etching solution forms a stronger displacement effect in that region.
[0049] During the etching process, the amount of residual chemical solution on the surface of the semiconductor silicon wafer can be obtained in real time through a residue detection module. The residue detection module can use a surface plasmon resonance sensor for detection, achieving a detection accuracy of 1×10⁻⁶. 8 atoms / cm 2 By using a surface plasmon resonance sensor, the amount of residual pharmaceutical solution on the surface of a semiconductor silicon wafer can be monitored online, and the amount of residual pharmaceutical solution can be considered as part of the residual state.
[0050] Furthermore, during the etching process, the concentration of metal ions in the composite etching solution can be detected using an online ion chromatography monitor. The metal ion concentration reflects the precipitation, complexation, and accumulation of metal ions during etching. When the metal ion concentration increases and reaches the first concentration threshold, it indicates that the accumulation of metal ions in the composite etching solution may affect the cleanliness of the silicon wafer surface, or that it is necessary to supplement with a chelating agent to enhance the complexation and carry-out ability.
[0051] In one embodiment, the first residual threshold can be set to 3 × 10 9 atoms / cm 2 When the surface plasmon resonance sensor detects that the residual amount of the drug solution on the surface of the semiconductor silicon wafer is close to or reaches 3×10⁻⁶, 9 atoms / cm 2 At that time, the currently detected residual amount of pesticide solution is input into the parameter optimization model. The parameter optimization model can output updated parameters to reduce the corrosion rate and enhance the flow field displacement based on the changing trend of the residual amount of pesticide solution and the flow field velocity distribution.
[0052] Specifically, the parameter update results output by the parameter optimization model may include at least one of reducing the etching temperature, increasing the spraying frequency, and replenishing the chelating agent. As a specific implementation, when the residual amount of the etching solution reaches a first residual threshold or the metal ion concentration reaches a first concentration threshold, the etching rate can be reduced by lowering the temperature by 0.5℃ to 1℃, the agitation and displacement of the composite etching solution on the silicon wafer surface can be enhanced by increasing the spraying frequency by 5Hz, and fresh chelating agent can be replenished at a flow rate of 0.1L / min to 0.2L / min to promote the complexation and removal of metal ions.
[0053] Furthermore, the parameter optimization model can jointly process the flow field velocity distribution, residual chemical solution amount, and metal ion concentration. For example, when the local flow velocity in a certain area is lower than a preset flow velocity threshold, and the residual chemical solution amount increases, the parameter optimization model can prioritize adjusting the injection pressure and injection frequency in that area; when the residual chemical solution amount increases but the flow field velocity distribution is relatively uniform, the parameter optimization model can prioritize reducing the corrosion temperature or adding chelating agent; when the metal ion concentration reaches the first concentration threshold, the parameter optimization model can prioritize increasing the amount of chelating agent added, and determine whether to simultaneously adjust the injection frequency or silicon wafer tilt angle based on the flow field velocity distribution.
[0054] In one embodiment, the parameter optimization model can determine the influence of the flow field state on the residual state based on the following relationship between the flow field and the residual state:
[0055] v s =k×P×f×sinθ;
[0056] Among them, v s Let denot , where k represents the flow velocity on the silicon wafer surface, P represents the injection pressure, f represents the injection frequency, and θ represents the silicon wafer tilt angle. Therefore, the parameter optimization model can adjust the injection pressure, injection frequency, and silicon wafer tilt angle in a coordinated manner based on the target flow velocity and the current flow field velocity distribution. This formula can be used to illustrate the combined influence of injection pressure, injection frequency, and silicon wafer tilt angle on the silicon wafer surface flow velocity and provide a basis for generating parameter update results.
[0057] Furthermore, during a single corrosion treatment process, the parameter optimization model can receive flow velocity distribution, residual chemical solution volume, and metal ion concentration multiple times, and output different parameter update results based on the state data at different time points. This allows the corrosion process parameters to be dynamically adjusted as the corrosion process status changes, rather than being fixed before corrosion begins.
[0058] In this embodiment, by acquiring the flow velocity distribution, residual amount of chemical solution, and metal ion concentration in the composite etching solution on the surface of the semiconductor silicon wafer in real time, and inputting the parameter optimization model when the local flow velocity, residual amount of chemical solution, or metal ion concentration reaches the corresponding conditions, the parameter optimization model can simultaneously consider flow displacement, surface residue, and metal ion accumulation factors. By adjusting the spray pressure, spray frequency, etching temperature, silicon wafer tilt angle, and chelating agent replenishment amount according to the parameter update results, the insufficient local flow field, increased chemical solution residue, and metal ion accumulation can be addressed in a coordinated manner during the etching process. This helps to reduce chemical solution residue and metal ion deposition on the silicon wafer surface and improve the stability of the etching process.
[0059] In one embodiment, the parameter optimization model is a CNN-LSTM fusion network model, the silicon wafer feature data includes silicon wafer material, thickness and pattern aspect ratio, and the initial etching process parameters include etching temperature, spray pressure, rotation speed and etching time.
[0060] Specifically, the parameter optimization model can be used to output initial etching process parameters based on the basic characteristics of the semiconductor silicon wafer to be etched and the results of surface activation pretreatment before the etching process begins, and to update the parameters during the etching process by combining the flow field state and the residual state. The parameter optimization model adopts a CNN-LSTM fusion network model, where the CNN part is used to extract the silicon wafer structure, pattern region distribution, and spatial features of the etching region, and the LSTM part is used to process the state data that changes over time during the etching process to obtain the temporal relationship between the etching parameters and the flow field state and the residual state.
[0061] In one embodiment, the silicon wafer feature data may include the silicon wafer material, silicon wafer thickness, and pattern aspect ratio. The silicon wafer material can be used to characterize the reactivity of the object to be etched; the silicon wafer thickness can be used to determine the etching time and etching rate control range; the pattern aspect ratio can be used to determine the presence of trench regions or high aspect ratio patterns, in order to determine whether enhanced pulse jetting and flow displacement of the trench regions are needed. Furthermore, the silicon wafer feature data may also include information such as the location of the area to be etched, the distribution of the pattern structure, or the depth of the etching target.
[0062] Specifically, surface activation pretreatment data may include at least one of the following: surface activation method, activation time, activation power, and surface hydrophilicity evaluation data. For example, when plasma activation is used for surface activation pretreatment, the surface activation pretreatment data may include the type of plasma gas, activation power, processing time, and the coverage of hydroxyl groups on the surface after activation. The parameter optimization model can determine the wetting and spreading state of the composite etching solution on the silicon wafer surface based on the surface activation pretreatment data, and accordingly determine parameters such as initial etching temperature, spray pressure, and etching time.
[0063] In one embodiment, the parameter optimization model can be trained using historical corrosion data. This historical corrosion data may include information such as flow field conditions, residual reagent levels, metal ion concentrations, corrosion uniformity, and surface roughness under different silicon wafer materials, patterns, and corrosion parameters. After training with this historical corrosion data, the parameter optimization model can establish the correspondence between silicon wafer characteristic data, surface activation pretreatment data, corrosion process parameters, and corrosion results.
[0064] Furthermore, the CNN-LSTM fusion network model can use the silicon wafer's pattern structure or the distribution of the area to be etched as spatial feature input, and the flow field velocity distribution, residual chemical solution amount, and metal ion concentration collected during the etching process as temporal state input, and output the corresponding parameter update results. Thus, the model can identify the corrosion differences in different spatial regions such as the central region, edge region, and trench region, and also identify the trend of residual state changes over time during the etching process.
[0065] Specifically, the initial etching process parameters may include etching temperature, spray pressure, rotation speed, and etching time. Etching temperature affects the etching reaction rate; spray pressure affects the impact and displacement capacity of the composite etching solution on the silicon wafer surface; rotation speed affects the shearing and discharge state of the liquid on the silicon wafer surface; and etching time controls the duration of the etching process. As a specific implementation, the parameter optimization model can output etching temperature T, spray pressure P, rotation speed v, and etching time t adapted to the current silicon wafer based on the silicon wafer material, thickness, pattern aspect ratio, and surface activation pretreatment data.
[0066] Furthermore, the parameter optimization model can be connected to a surface plasmon resonance sensor, an online ion chromatography monitor, and a flow field sensor. After the etching process begins, the flow field velocity distribution acquired by the flow field sensor, the residual amount of reagent acquired by the surface plasmon resonance sensor, and the metal ion concentration acquired by the online ion chromatography monitor can be input into the parameter optimization model. The parameter optimization model outputs parameter update results based on the above state data, and the parameter update results may include at least one of the following: injection pressure, injection frequency, etching temperature, silicon wafer tilt angle, and chelating agent replenishment amount.
[0067] In one embodiment, the parameter optimization model can perform two types of processing based on the initial input before etching and the real-time state input during etching. Before etching, the parameter optimization model outputs initial etching process parameters based on silicon wafer characteristic data and surface activation pretreatment data; during etching, the parameter optimization model outputs updated parameter results based on the flow field state and residual state. Through these two types of processing, the etching process can have both initial parameter adaptation capability and process state feedback adjustment capability.
[0068] In this embodiment, by using a CNN-LSTM fusion network model as the parameter optimization model and taking silicon wafer material, thickness, aspect ratio, and surface activation preprocessing data as initial inputs, the etching parameters can be matched with the silicon wafer's own structure and surface state. By training the model using historical etching data and continuing to input the flow field state and residual state during the etching process, the parameter optimization model can output parameter update results based on spatial distribution characteristics and temporal change trends, thereby improving the targeting and stability of etching process parameter adjustment.
[0069] Furthermore, in one embodiment, after the etching process is completed, the semiconductor silicon wafer can be removed from the composite etching solution, and the in-situ residue removal module can be activated to perform plasma in-situ residue removal on the surface of the semiconductor silicon wafer. The in-situ residue removal module may include a low-temperature plasma generating unit, an inert gas protection unit, and a residue feedback detection unit. The low-temperature plasma generating unit is used to generate low-temperature plasma under a set atmosphere, the inert gas protection unit is used to introduce protective gas into the processing area, and the residue feedback detection unit is used to detect the residue state after the removal process.
[0070] In one embodiment, an Ar / N2 mixed gas can be introduced into the in-situ residue removal module to generate low-temperature plasma under the Ar / N2 mixed gas atmosphere. As a specific implementation, the volume ratio of the Ar / N2 mixed gas can be 3:1, and the gas purity can be no less than 99.999%. The low-temperature plasma generating unit can be an inductively coupled plasma generator, with a power set to 80W–150W. With the aforementioned atmosphere and power range, plasma can act on the surface residues of the semiconductor silicon wafer without significantly increasing the thermal load on the silicon wafer.
[0071] Specifically, the treatment of semiconductor silicon wafer surfaces using low-temperature plasma can include plasma bombardment, reactive particle reaction, and inert gas purging. High-energy electrons and Ar atoms generated in the low-temperature plasma... + N2 + Active particles can act on adsorbed drug residues and reaction byproducts on the silicon wafer surface, weakening the bond between the residues and the silicon wafer surface. Simultaneously, the flow of inert gas can carry away the desorbed residues, thus achieving in-situ removal. When the composite etching solution contains surface modifiers, some organic residues may remain on the semiconductor silicon wafer surface. The active particles in the low-temperature plasma can further activate or decompose these organic residues, making them easier to remove through purging or subsequent cleaning.
[0072] In one embodiment, the processing time for in-situ low-temperature plasma residue removal can be 10s to 30s. As a specific implementation, an Ar / N2 mixed gas can be introduced after the etching process, and low-temperature plasma can be excited at a power of 120W to treat the semiconductor silicon wafer surface for 15s to 25s. In-situ plasma residue removal can be performed within the etching chamber or in a processing area connected to the etching chamber, allowing for residue removal of the semiconductor silicon wafer without long-distance transfer after the etching process, thereby reducing the probability of surface residue drying, re-adsorption, or secondary contamination during transfer.
[0073] In one embodiment, the method further includes:
[0074] Residual detection is performed on semiconductor silicon wafers after in-situ plasma residue removal, and compensation removal is performed when the residue detection results do not meet the preset residue control conditions.
[0075] The compensation and cleaning process includes extending the treatment time of the low-temperature plasma and / or using deionized water containing chelating agents for secondary pulse cleaning.
[0076] Specifically, after in-situ plasma residue removal is completed, the amount of residue on the surface of the semiconductor silicon wafer can be detected by a residue feedback detection unit. This unit can employ a surface plasmon resonance sensor. The residue removal process can end when the detection result indicates that the amount of residue on the semiconductor silicon wafer surface is less than or equal to a preset residue control value. As one specific implementation, the preset residue control value can be 1 × 10⁻⁶. 9 atoms / cm 2 .
[0077] Furthermore, when the residue detection results do not meet the preset residue control conditions, compensatory removal processing can be performed. For example, when the residue level is still higher than 1×10⁻⁶. 9 atoms / cm 2 In some cases, the low-temperature plasma treatment time can be extended by 5 to 10 seconds to increase the time for the plasma to act on the adsorbed residues. Alternatively, if further removal of residues is still required after extending the low-temperature plasma treatment time, or if the type of residue is more suitable for liquid phase carry-out, a secondary pulse cleaning can be performed using deionized water containing a trace amount of chelating agent. The pressure of the secondary pulse cleaning can be 0.2 MPa.
[0078] Furthermore, after each extended low-temperature plasma treatment or secondary pulse cleaning, the residual amount on the surface of the semiconductor silicon wafer can be detected again, and the determination of whether to end the cleaning process is based on the results of the second detection. This avoids over-treatment while ensuring that the residual amount on the surface of the semiconductor silicon wafer meets the preset requirements.
[0079] In this embodiment, by performing residual detection after in-situ plasma residue removal, and by extending the plasma treatment time and / or performing secondary pulse cleaning when the residual detection result does not meet the preset residual control conditions, the removal process can have feedback compensation capability, which is beneficial to further reduce the residual drug solution and reaction by-product residue on the surface of the semiconductor silicon wafer.
[0080] In one embodiment, when the aspect ratio of the semiconductor silicon wafer is greater than or equal to a preset aspect ratio threshold, pulse jetting corresponding to the trench region is enabled, and the jetting pressure is reduced and the jetting frequency is increased to promote the flow and displacement of the composite etching solution in the trench.
[0081] Specifically, the aspect ratio of a pattern can be used to characterize the ratio between the depth and the width of the opening of trenches, holes, or other recessed patterns on the surface of a semiconductor silicon wafer. For silicon wafers with a large aspect ratio, it becomes more difficult for the composite etching solution to enter the bottom of the trench and exit from the inside of the trench, easily forming flow field stagnation areas at the bottom or near the sidewalls of the trench, causing reaction byproducts, solution residues, or metal ions to accumulate in localized areas. Therefore, the decision to enable pulse jetting corresponding to the trench area can be determined based on the aspect ratio of the semiconductor silicon wafer.
[0082] In one embodiment, the preset aspect ratio threshold can be 10:1. When the aspect ratio of the semiconductor silicon wafer is greater than or equal to 10:1, a dedicated trench spraying zone is enabled. The dedicated trench spraying zone can be part of a multi-dimensional spraying array, and its spraying direction, spraying frequency, and spraying pressure are configured to adapt to the liquid displacement requirements of the trench area.
[0083] Specifically, the pulse jetting in the trench area employs a low-pressure, high-frequency jetting method. Low pressure is used to reduce the instantaneous impact of the composite etchant on the trench sidewalls and pattern structure, thereby reducing the risk of pattern collapse or sidewall damage; high frequency is used to enhance the periodic disturbance of the liquid inside the trench, making it easier for old etchant, reaction byproducts, and metal ion complexes to be carried out.
[0084] As one specific implementation, when the aspect ratio of the pattern is greater than or equal to 10:1, the spraying pressure of the dedicated spraying zone for the trench can be set to 0.1 MPa, and the pulse spraying frequency can be set to 30 Hz. This spraying method can be used in conjunction with the rotation and tilt adjustment of the semiconductor silicon wafer, so that the composite etching solution in the trench undergoes flow displacement under the combined action of pulse disturbance and rotational shear.
[0085] Furthermore, if the local flow velocity in the trench area is detected to be lower than the preset flow velocity threshold during the etching process, or if the residual amount of the chemical solution in the corresponding trench area increases, the spraying frequency, spraying pressure, or silicon wafer tilt angle in the dedicated spraying zone of the trench can be further adjusted through a parameter optimization model. For example, the pulse spraying frequency can be increased first, or the silicon wafer tilt angle can be adjusted while limiting the increase in spraying pressure, in order to enhance the liquid discharge capacity in the trench.
[0086] Furthermore, pulse jetting in the trench area can be combined with surface modifiers and chelating agents in the composite etching solution. Surface modifiers help improve the wetting ability of the composite etching solution to enter the trench, chelating agents help to complex metal ions generated or accumulated in the trench, and pulse jetting promotes the discharge of liquid containing reaction byproducts and metal ion complexes from the trench.
[0087] In this embodiment, by enabling pulse jetting corresponding to the trench area when the aspect ratio of the graphic is greater than or equal to a preset aspect ratio threshold, and by reducing the jetting pressure and increasing the jetting frequency to promote the flow and displacement of the composite corrosion liquid in the trench, the problem of insufficient liquid renewal in the high aspect ratio graphic area can be improved. At the same time, the adverse effects of jetting impact on the trench graphic structure can be reduced, thereby helping to reduce the residue of the chemical solution and the deposition of metal ions in the trench area.
[0088] In one embodiment, the formation of a composite flow field acting on the surface of the semiconductor silicon wafer through pulse jetting and silicon wafer attitude adjustment includes:
[0089] Pulse jetting is applied to the central region, edge region, and trench region of the semiconductor silicon wafer, and the rotation and tilt angle of the semiconductor silicon wafer are controlled to form a composite flow field with the combined action of pulse impact and rotational shearing.
[0090] Specifically, different areas on the surface of a semiconductor silicon wafer have different flow requirements during the etching process. The central area typically requires uniform spreading of the etchant, while the edge areas are prone to excessively rapid fluid discharge or edge residue, and the trench areas are prone to insufficient fluid replacement. Therefore, the pulse jetting area can be divided into a central area, an edge area, and a trench area, and the jetting parameters of each area can be controlled separately to ensure that the composite etchant forms a suitable flow state in different areas.
[0091] In one embodiment, a multi-dimensional jetting array can be used to perform zoned pulse jetting on the surface of a semiconductor silicon wafer. The multi-dimensional jetting array may include a central jetting region, an edge jetting region, and a trench-specific jetting region. The central jetting region supplies composite etchant to the center of the semiconductor silicon wafer, the edge jetting region regulates the liquid flow and discharge at the wafer edges, and the trench-specific jetting region improves the replacement of composite etchant in trenches or high aspect ratio patterned areas.
[0092] Specifically, pulse jetting can employ a jetting frequency of 10Hz to 30Hz and a jetting pressure of 0.1MPa to 0.3MPa, with a nozzle outlet flow velocity of 2m / s to 5m / s. Through pulse jetting, the composite etchant can periodically act on the surface of the semiconductor silicon wafer, thereby enhancing local liquid disturbance and reducing the formation of stable boundary layers and flow field stagnation regions.
[0093] As a specific implementation method, during the corrosion treatment process, the spraying frequency in the central area can be set to 20Hz, the spraying frequency in the edge area to 25Hz, and the spraying frequency in the trench-specific area to 30Hz. By setting the spraying frequency in the trench-specific area to be higher than that in the central and edge areas, the liquid exchange capacity of the trench area can be enhanced. The above frequency settings can be adjusted based on the parameter update results output by the parameter optimization model.
[0094] Furthermore, silicon wafer attitude adjustment can include controlling the rotation and tilt angle of the semiconductor silicon wafer. Rotation of the semiconductor silicon wafer causes the composite etchant to exert a rotational shearing effect on the wafer surface, while tilt angle adjustment can change the flow direction and drainage path of the composite etchant on the wafer surface. Through rotation and tilt angle adjustment, the composite etchant can act on the semiconductor silicon wafer surface in different directions, reducing the possibility of persistent stagnation in localized areas.
[0095] In one embodiment, the semiconductor silicon wafer can be controlled to rotate at a uniform speed of 360°, with a rotation speed of 5 rpm to 15 rpm; simultaneously, the tilt angle of the semiconductor silicon wafer can be controlled within a range of ±5°. As a specific implementation, the semiconductor silicon wafer can be controlled to rotate at 10 rpm while maintaining a 3° tilt angle, causing the composite etching solution to form a composite flow field on the silicon wafer surface where pulse impact and rotational shearing work together.
[0096] Furthermore, pulse jetting and silicon wafer attitude adjustment can be linked and adjusted according to the flow field conditions. For example, when the flow field velocity distribution indicates insufficient flow velocity in the edge region of the silicon wafer, the jetting frequency or jetting pressure in the edge jetting area can be increased; when the flow velocity in the trench region is insufficient, the jetting frequency in the trench-specific jetting area can be increased, and tilt angle adjustment can be combined to enhance liquid discharge in the trench; when the liquid disturbance in the central region is insufficient, the jetting pressure in the central jetting area can be increased or the silicon wafer rotation speed can be adjusted.
[0097] Specifically, the flow velocity distribution on the surface of a semiconductor silicon wafer can be monitored in real time using particle image velocimetry, and the composite flow field can be judged based on the flow velocity distribution to determine whether it meets the requirements. When the flow velocity in a local area is lower than a preset flow velocity threshold, the parameter optimization model can output updated parameters such as injection pressure, injection frequency, or silicon wafer tilt angle to enhance the fluid action in the corresponding area. Thus, the composite flow field can be dynamically adjusted according to the real-time status of the corrosion process.
[0098] Furthermore, the composite flow field can work synergistically with the composition of the composite etching solution. Surface modifiers can improve the wetting and spreading of the composite etching solution on the silicon wafer surface, chelating agents can complex metal ions, and zoned pulse spraying and silicon wafer attitude adjustment can promote the drainage of liquid containing reaction byproducts and metal ion complexes from the silicon wafer surface. Through the above combination, the liquid displacement efficiency during the etching process can be improved.
[0099] In this embodiment, by pulse jetting the central region, edge region, and trench region of the semiconductor silicon wafer, and controlling the rotation and tilt angle adjustment of the semiconductor silicon wafer, a composite flow field with the combined action of pulse impact and rotational shear can be formed. This composite flow field can provide differentiated fluid action for different regions of the silicon wafer and can be dynamically adjusted in combination with the flow field velocity distribution, thereby helping to reduce local flow field stagnation, improve the replacement efficiency of composite etching solution, and reduce the residue of reagent and the deposition of metal ions during the etching process.
[0100] In one embodiment, the main corrosive agent in the composite etching solution is an HF / HNO3 mixture or a KOH solution, the surface modifier is a fluorinated polyether nonionic surfactant, the chelating agent is an aminophosphoric acid derivative, and the interfacial tension of the composite etching solution is controlled at 15mN / m to 25mN / m.
[0101] Specifically, the composite etching solution can employ a ternary system of a main etchant, a surface modifier, and a chelating agent. The main etchant is used to etch the semiconductor silicon wafer; the surface modifier is used to reduce the interfacial interaction between the composite etching solution and the surface of the semiconductor silicon wafer, making it easier for the composite etching solution to wet the surface of the silicon wafer and its microstructure regions; the chelating agent is used to form soluble complexes with the metal ions generated or released during the etching process, thereby promoting the removal of metal ions with the composite etching solution.
[0102] In one embodiment, the primary etchant can be an HF / HNO3 mixture. The HF / HNO3 system can be used to etch the surface of a silicon wafer. As a specific implementation, the volume ratio of the HF / HNO3 mixture can be 1:3 to 1:5, and 0.1 wt% to 0.3 wt% of a surface modifier and 0.05 wt% to 0.1 wt% of a chelating agent can be added to the system. The surface modifier can be a fluorinated polyether nonionic surfactant, and the chelating agent can be an aminophosphate derivative.
[0103] In another embodiment, the main etchant can be a KOH solution. As a specific implementation, the concentration of the KOH solution can be 20wt% to 40wt%, and 0.2wt% to 0.4wt% of a surface modifier and 0.08wt% to 0.12wt% of a chelating agent can be added to the system. By adding surface modifiers and chelating agents to the KOH system, the wetting state of the etchant on the silicon wafer surface can be improved, and the deposition of metal ions or reaction byproducts on the silicon wafer surface during the etching process can be reduced.
[0104] Specifically, a composite etchant supply device can be used to prepare the composite etchant, and a temperature control system can be used to stabilize the temperature of the composite etchant at the target corrosion temperature. The target corrosion temperature can be determined based on the initial corrosion process parameters output by the parameter optimization model. As a specific implementation, the corrosion treatment temperature can be controlled within the range of 20℃ to 40℃, with a temperature control accuracy of ±0.1℃. In a specific example, the temperature of the composite etchant can be stabilized at 25℃.
[0105] Furthermore, the interfacial tension of the composite etchant can be controlled within the range of 15 mN / m to 25 mN / m. By controlling the interfacial tension within this range, the contact angle of the composite etchant on the semiconductor silicon wafer surface can be reduced, and the spreading state of the composite etchant on the silicon wafer surface, edge regions, and trench regions can be improved. As a specific embodiment, the composite etchant can achieve a contact angle of less than or equal to 30° on the semiconductor silicon wafer surface, thereby helping to reduce local droplet retention and interfacial adsorption.
[0106] In one embodiment, a fluorinated polyether nonionic surfactant can reduce the interfacial tension of the composite etching solution, making it easier for the solution to penetrate trenches, holes, or other recessed patterned areas. Aminophosphate derivatives can form soluble complexes with metal ions released during etching. Through the combination of surface modifiers and chelating agents, the adsorption and retention of the etching solution on the silicon wafer surface can be reduced, while the deposition of metal ions or reaction byproducts can be minimized.
[0107] Furthermore, the composite etching solution can be used in conjunction with surface activation pretreatment. Surface activation pretreatment can improve the hydrophilicity and active group coverage of the semiconductor silicon wafer surface, while the surface modifier in the composite etching solution further reduces interfacial tension, thereby improving the continuous spreading and flow displacement effect of the composite etching solution on the silicon wafer surface. The chelating agent in the composite etching solution can be used in conjunction with pulse jetting and silicon wafer attitude adjustment to carry out the formed metal ion complexes from the silicon wafer surface.
[0108] Furthermore, the composition of the composite etching solution can be selected based on the material, pattern structure, and etching target of the semiconductor silicon wafer. When an acidic etching system is required, an HF / HNO3 mixture can be selected as the main etchant; when an alkaline etching system is required, a KOH solution can be selected as the main etchant. Regardless of which main etchant is used, a composite etching solution with residue control capability can be formed by adding surface modifiers and chelating agents.
[0109] In this embodiment, a composite etching solution is composed of a main etchant, a fluorinated polyether nonionic surfactant, and an aminophosphate derivative chelating agent. The interfacial tension of the composite etching solution is controlled at 15 mN / m to 25 mN / m, which can improve the wetting and spreading state of the composite etching solution on the surface of the semiconductor silicon wafer. At the same time, the chelating agent can form a soluble complex with the metal ions generated during the etching process and be carried out with the etching solution under the action of the composite flow field, thereby helping to reduce the residue of the etching solution, the deposition of metal ions, and the retention of reaction by-products on the surface of the silicon wafer.
[0110] Furthermore, in one specific embodiment, after the cleaned semiconductor silicon wafer is transported into the etching chamber, it can undergo surface activation pretreatment. Specifically, an Ar / O2 mixed gas can be used to perform plasma activation treatment on the semiconductor silicon wafer, with a plasma activation power of 50W to 100W. In a specific example, the plasma activation power is 70W, and the treatment time is 20s, resulting in a hydroxyl coverage rate of over 92% on the surface of the semiconductor silicon wafer. Through the above-mentioned surface activation pretreatment, the hydrophilicity of the semiconductor silicon wafer surface can be improved, making it easier for the composite etching solution to spread to the wafer surface and trench areas during subsequent etching processes.
[0111] Furthermore, before the etching process, the flow field sensor can be calibrated, and the minimum flow velocity threshold on the semiconductor silicon wafer surface can be set to 1.5 m / s. After the etching process begins, the silicon wafer material, thickness, pattern aspect ratio, and surface activation pretreatment data are input into the parameter optimization model, which outputs the etching temperature, spray pressure, rotation speed, and etching time. After the semiconductor silicon wafer enters the composite etching solution, the spray frequency in the central area can be set to 20 Hz, the spray frequency in the edge area to 25 Hz, and the spray frequency in the trench area to 30 Hz. The semiconductor silicon wafer is controlled to rotate at 10 rpm and maintain a 3° tilt angle to form a composite flow field acting on the surface of the semiconductor silicon wafer.
[0112] Furthermore, in this embodiment, when the flow field sensor detects a local flow velocity below 1.5 m / s, the parameter optimization model can update the output parameters based on the location of the local low-velocity region, for example, by increasing the injection pressure in the corresponding region by 0.05 MPa, or adjusting the tilt angle of the semiconductor silicon wafer. When the surface plasmon resonance sensor detects that the residual amount of the drug solution is close to 3 × 10⁻⁶ m / s... 9 atoms / cm 2When the online ion chromatography monitor detects that the metal ion concentration has reached the first concentration threshold, the parameter optimization model can output updated parameters to reduce the corrosion temperature by 0.5℃ to 1℃, increase the spray frequency by 5Hz, and / or replenish fresh chelating agent at a flow rate of 0.1L / min to 0.2L / min. Therefore, during the corrosion treatment process, spraying, temperature, and chelating agent replenishment can be coordinated and adjusted based on local flow rate, residual agent concentration, and metal ion concentration.
[0113] Furthermore, in this embodiment, after the etching process is completed, the semiconductor silicon wafer undergoes in-situ plasma residue removal and necessary compensation removal. After the removal process is completed, the semiconductor silicon wafer can be subjected to final inspection, which may include the presence of residual metal ions, etching uniformity, and surface roughness on the semiconductor silicon wafer surface. As a specific implementation, when the residual metal ions on the semiconductor silicon wafer surface are less than or equal to 1×10⁻⁶... 9 atoms / cm 2 When the corrosion uniformity error is less than or equal to ±2% and the surface roughness Ra is less than or equal to 0.3nm, the corrosion removal treatment result of the semiconductor silicon wafer can be judged to meet the requirements.
[0114] Furthermore, in this embodiment, if at least one of the final test results fails to meet the corresponding requirements, corresponding compensation processing can be selected based on the test item for which the requirements are not met. For example, if the metal ion residue does not meet the requirements, a secondary pulse cleaning with a chelating agent can be performed first; if the chemical residue does not meet the requirements, the low-temperature plasma treatment time can be extended; if the corrosion uniformity does not meet the requirements, the flow field velocity distribution and zoned spray parameters can be reviewed, and the subsequent corrosion process parameters of the semiconductor silicon wafer can be adjusted.
[0115] In this embodiment, by performing surface activation pretreatment and flow field detection calibration before etching, and by adjusting the etching process parameters in conjunction with local flow rate, residual amount of reagent and metal ion concentration during etching, and by combining metal ion residue, etching uniformity and surface roughness for final detection and judgment after etching and removal, the silicon wafer etching and removal process can form a continuous process chain from pretreatment, process control to result judgment, which is beneficial to improving the cleanliness, uniformity and surface quality of semiconductor silicon wafers after etching.
[0116] Through the above embodiments, the silicon wafer etching and removal method can reduce the residue of chemicals, metal ion deposition, and retention of reaction byproducts on the surface of semiconductor silicon wafers by combining interfacial adsorption suppression, process flow field control, and in-situ residue removal.
[0117] Specifically, interfacial adsorption suppression can be achieved through a combination of surface activation pretreatment and composite etching solution. Surface activation pretreatment enhances the hydrophilicity of the semiconductor silicon wafer surface and increases the coverage of active groups on the silicon wafer surface, making it easier for the composite etching solution to spread continuously on the silicon wafer surface. The surface modifier in the composite etching solution can reduce the interfacial tension between the etching solution and the silicon wafer surface, making the contact angle of the solution on the silicon wafer surface less than or equal to 30°, thereby reducing the probability of droplet retention or adsorption layers forming in local areas.
[0118] Furthermore, the chelating agent in the composite etching solution can form soluble complexes with metal ions generated or released during the etching process. These soluble complexes can be carried away from the silicon wafer surface by the flow of the composite etching solution, reducing the probability of metal ions depositing on the silicon wafer surface or in the trench area. Thus, the surface modifier mainly improves the wetting and spreading of the etching solution, while the chelating agent mainly promotes the complexation and removal of metal ions. Combined with surface activation pretreatment, both can inhibit the deposition of etching solution residues and reaction byproducts from both interfacial wetting and ion complexation perspectives.
[0119] Furthermore, process flow field control can be achieved through a combination of zoned pulse jetting, silicon wafer rotation, and silicon wafer tilt angle adjustment. During the etching process, zoned pulse jetting is used to create fluid disturbances of different intensities and frequencies in the central, edge, and trench areas of the silicon wafer; silicon wafer rotation is used to create rotational shearing; and silicon wafer tilt angle adjustment is used to change the discharge path of the etching solution on the silicon wafer surface. Through these operations, the flow field stagnation area on the silicon wafer surface can be reduced, making it easier for liquids containing reaction byproducts, reagent residues, and metal ion complexes to be carried away from the silicon wafer surface.
[0120] Furthermore, the residual flow control effect can be evaluated by considering the flow field velocity distribution, residual reagent concentration, and metal ion concentration. When the flow field velocity distribution in a local area indicates insufficient liquid replacement, or when the residual reagent concentration or metal ion concentration is elevated, at least one of the following can be adjusted: injection pressure, injection frequency, corrosion temperature, silicon wafer tilt angle, and chelating agent replenishment amount, to match the fluid replacement, corrosion rate, and metal ion complexation capacity. The relevant model calculation and parameter update process can be referred to the aforementioned parameter optimization model implementation example, and will not be repeated here.
[0121] Furthermore, in-situ removal of residues can be achieved through a combination of cryogenic plasma and inert gas purging. The high-energy electrons generated by the cryogenic plasma and N2... + Ar + Active particles such as O radicals can act on adsorbed drug residues and reaction byproducts on the surface of semiconductor silicon wafers. On the one hand, high-energy electrons and active particles can weaken the physical adsorption or chemical bonding between drug residues and the silicon wafer surface; on the other hand, active particles can activate or oxidize organic residues, making them easier to remove by purging or subsequent cleaning.
[0122] Furthermore, inert gas purging can remove residues that have been desorbed or loosened by low-temperature plasma from the silicon wafer surface. For organic residues introduced by surface modifiers in the composite etching solution system, low-temperature plasma can improve the desorption or decomposition efficiency of such residues; for residues containing metal ions, the chelating agent has already promoted the complexation and removal of metal ions during the etching process, and in-situ plasma removal can further treat the residues still adsorbed on the silicon wafer surface.
[0123] In this embodiment, by combining interfacial adsorption inhibition, process flow field control, and in-situ residue removal, residues can be controlled from three levels: wetting and complexation of the etching solution, liquid displacement and parameter adjustment during the etching process, and desorption of adsorbed residues after etching. These multiple mechanisms work in sequence before, during, and after etching, thereby helping to reduce chemical residues, metal ion deposition, and the retention of reaction byproducts on the semiconductor silicon wafer surface, and improving surface cleanliness after etching.
[0124] The steps of the various methods described above are only for clarity. In practice, they can be combined into one step or some steps can be split into multiple steps. As long as they include the same logical relationship, they are all within the scope of protection of this application. Adding insignificant modifications or introducing insignificant designs to the algorithm or process, but without changing the core design of the algorithm and process, are also within the scope of protection of this application.
[0125] Furthermore, in one embodiment, a silicon wafer etching and removal system for implementing the silicon wafer etching and removal method is also provided. The system may include a surface characteristic etching module, a dynamic flow field module, an intelligent control module, and an in-situ residue removal module.
[0126] Specifically, the surface characteristic etching module may include a composite etchant supply unit, a temperature control unit, and a silicon wafer pretreatment unit. The composite etchant supply unit is used to configure and deliver a composite etchant containing a main etchant, a surface modifier, and a chelating agent to the etching chamber. The temperature control unit is used to control the temperature of the composite etchant based on initial etching process parameters or parameter update results, for example, controlling the composite etchant within the range of 20℃ to 40℃, and achieving a temperature control accuracy of ±0.1℃. The silicon wafer pretreatment unit is used to perform surface activation pretreatment on the semiconductor silicon wafer before etching, for example, using an Ar / O2 mixed gas to perform plasma activation on the semiconductor silicon wafer.
[0127] Furthermore, the dynamic flow field module may include a multi-dimensional jetting unit, a silicon wafer attitude adjustment unit, and a flow field detection unit. The multi-dimensional jetting unit may include a central region jetting area, an edge region jetting area, and a trench region jetting area, respectively used for pulse jetting of the central region, edge region, and trench region of the semiconductor silicon wafer. The silicon wafer attitude adjustment unit is used to control the rotation and tilt adjustment of the semiconductor silicon wafer, for example, to achieve 360° uniform rotation and tilt adjustment within a range of ±5°. The flow field detection unit is used to acquire the flow field velocity distribution on the surface of the semiconductor silicon wafer, for example, using particle image velocimetry, with a sampling frequency of not less than 15Hz.
[0128] Furthermore, the intelligent control module may include a parameter optimization unit, a residue detection unit, an ion concentration detection unit, and a parameter execution unit. The parameter optimization unit can run a CNN-LSTM fusion network model to output initial etching process parameters based on silicon wafer feature data and surface activation pretreatment data, and update the parameters based on the flow field state and residue state during the etching process. The residue detection unit is used to detect the amount of residual reagent on the semiconductor silicon wafer surface; for example, a surface plasmon resonance sensor can be used, with a detection accuracy of 1×10⁻⁶. 8 atoms / cm 2 The ion concentration detection unit is used to detect the concentration of metal ions in the composite etching solution, for example, an online ion chromatograph can be used. The parameter execution unit is used to adjust at least one of the following based on the parameter update results output by the parameter optimization unit: injection pressure, injection frequency, etching temperature, silicon wafer tilt angle, and chelating agent replenishment amount.
[0129] Furthermore, the in-situ residue removal module may include a low-temperature plasma generation unit, an inert gas protection unit, and a residue feedback detection unit. The low-temperature plasma generation unit may employ an inductively coupled plasma generator to generate low-temperature plasma in an Ar / N2 mixed gas atmosphere. The inert gas protection unit is used to introduce an Ar / N2 mixed gas into the in-situ residue removal area; the volume ratio of the Ar / N2 mixed gas may be 3:1, and the gas purity may be no less than 99.999%. The residue feedback detection unit is used to detect the amount of residue on the surface of the semiconductor silicon wafer after in-situ plasma residue removal and, based on the detection results, determine whether to extend the low-temperature plasma treatment time or initiate a secondary pulse cleaning.
[0130] In one embodiment, after surface activation by the silicon wafer pretreatment unit, the semiconductor silicon wafer is sent into the etching chamber. The composite etching solution supply unit supplies composite etching solution to the etching chamber, and the dynamic flow field module forms a composite flow field through the multi-dimensional spraying unit and the silicon wafer attitude adjustment unit. The intelligent control module receives data output from the flow field detection unit, the residue detection unit, and the ion concentration detection unit in real time and generates parameter update results. The parameter execution unit adjusts the spraying pressure, spraying frequency, etching temperature, silicon wafer tilt angle, and chelating agent replenishment amount according to the parameter update results. After the etching treatment is completed, the in-situ residue removal module performs plasma in-situ residue removal on the semiconductor silicon wafer and performs compensation removal treatment according to the detection results of the residue feedback detection unit.
[0131] In this embodiment, the cooperation between the surface characteristic etching module, the dynamic flow field module, the intelligent control module, and the in-situ residue removal module enables the continuous execution of composite etching solution preparation, surface activation, zoned pulse spraying, flow field monitoring, residue monitoring, parameter updating, and in-situ removal. This helps to improve the automation level, parameter adjustment accuracy, and residue control effect of the silicon wafer etching and removal process.
[0132] Furthermore, some embodiments of this application also provide an electronic device. The electronic device can be various forms of digital computer, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, etc. The electronic device can also be various forms of mobile devices, such as cellular phones, smartphones, wearable devices, and other similar computing devices.
[0133] The electronic device includes: one or more processors; and a memory storing computer program instructions that, when executed, cause the processor to perform the steps of the methods provided in any one or more of the above embodiments. Figure 2An exemplary structural diagram of the electronic device is disclosed. The electronic device includes one or more processors 1101, a memory 1102, and interfaces for connecting the various components, including high-speed interfaces and low-speed interfaces. The various components are interconnected via different buses and can be mounted on a common motherboard or otherwise installed as needed. The processors can process instructions executed within the electronic device, including instructions stored in or on memory to display graphical information of a GUI on an external input / output device (such as a display device coupled to the interface). In some other embodiments, multiple processors and / or multiple buses can be used with multiple memories and multiple memory modules, if desired. Similarly, multiple electronic devices can be connected, each providing some of the necessary operations. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present application described and / or claimed herein.
[0134] The electronic device may further include an input device 1103 and an output device 1104. The processor 1101, memory 1102, input device 1103 and output device 1104 may be connected by a bus or other means, as shown in the figure, which is connected by a bus.
[0135] Input device 1103 can receive input numerical or character information, and generate key signal inputs related to user settings and function control of the electronic device, such as a touch screen, keypad, mouse, trackpad, touchpad, joystick, one or more mouse buttons, trackball, joystick, etc. Output device 1104 may include a display device, auxiliary lighting device (e.g., LED), and haptic feedback device (e.g., vibration motor). The display device may include, but is not limited to, a liquid crystal display, a light-emitting diode display, and a plasma display. In some embodiments, the display device may be a touch screen.
[0136] To provide interaction with the user, the electronic device can be a computer. The computer has: a display device (e.g., a cathode ray tube or LCD monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse) through which the user provides input to the computer. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback); and input from the user can be received in any form (e.g., voice input or tactile input).
[0137] In this embodiment, a computer-readable medium stores a computer program / instructions that, when executed by a processor, implement the steps of the methods provided in any one or more of the above embodiments. This computer-readable medium may be included in the electronic device described in the above embodiments; or it may exist independently and not assembled into that device. The aforementioned computer-readable medium carries one or more computer-readable instructions.
[0138] The memory 1102 can serve as a non-transitory computer-readable storage medium, used to store non-transitory software programs, non-transitory computer-executable programs, and modules. The processor 1101 executes various functional applications and data processing of the server by running the non-transitory software programs, instructions, and modules stored in the memory 1102, thereby implementing the program instructions / modules corresponding to the methods provided in any one or more of the embodiments described above in this application.
[0139] The memory 1102 may include a program storage area and a data storage area. The program storage area may store the operating system and applications required for at least one function; the data storage area may store data created based on the use of the electronic device. Furthermore, the memory 1102 may include high-speed random access memory and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some embodiments, the memory 1102 may optionally include memory remotely located relative to the processor 1101, and these remote memories can be connected to the electronic device via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof.
[0140] It should be noted that the computer-readable medium described in this application can be a computer-readable signal medium or a computer-readable storage medium, or any combination thereof. Computer-readable media can be, for example, but not limited to, electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatuses, or devices, or any combination thereof. More specific examples of computer-readable storage media may include, but are not limited to, electrical connections having one or more wires, portable computer disks, hard disks, random access memory, read-only memory, erasable programmable read-only memory, optical fibers, portable compact disk read-only memory, optical storage devices, magnetic storage devices, or any suitable combination thereof. In this application, a computer-readable medium can be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, apparatus, or device.
[0141] Computer-readable media include permanent and non-permanent, removable and non-removable media, which can store information by any method or technology. Information can be computer-readable instructions, data structures, program modules, or other data. Examples of computer storage media include, but are not limited to, phase-change memory, static random access memory, dynamic random access memory, other types of random access memory, read-only memory, electrically erasable programmable read-only memory, flash memory or other memory technologies, read-only optical discs, digital versatile optical discs or other optical storage, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other non-transfer medium that can be used to store information accessible by a computing device.
[0142] Computer program code for performing the operations of this application can be written in one or more programming languages or a combination thereof, including object-oriented programming languages such as Java, Smalltalk, and C++, and conventional procedural programming languages such as C or similar languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network—including local area networks (LANs) or wide area networks (WANs), or it can be connected to an external computer (e.g., via the Internet using an Internet service provider).
[0143] In the above embodiments, all or part of the implementation can be achieved through software, hardware, firmware, or any combination thereof. For example, it can be implemented using an application-specific integrated circuit (ASIC), a general-purpose computer, or any other similar hardware device. In some embodiments, the software program of this application can be executed by a processor to implement the above steps or functions. Similarly, the software program of this application (including related data structures) can be stored in a computer-readable recording medium, such as RAM memory, magnetic or optical drives, floppy disks, and similar devices. In addition, some steps or functions of this application can be implemented in hardware, for example, as circuitry that cooperates with a processor to perform the various steps or functions.
[0144] The computer program product provided in this application includes one or more computer programs / instructions. When executed by a processor, these computer programs / instructions generate, in whole or in part, the processes or functions described in this application. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium may be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available medium may be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., solid-state drive), etc.
[0145] The flowcharts or block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of devices, methods, and computer program products according to various embodiments of this application. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented using a dedicated hardware-specific system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.
[0146] The scope of this application is defined by the appended claims rather than the foregoing description, and is therefore intended to encompass all variations falling within the meaning and scope of equivalents of the claims. No reference numerals in the claims should be construed as limiting the scope of the claims. Furthermore, it is clear that the word "comprising" does not exclude other units or steps, and the singular does not exclude the plural. Multiple units or devices recited in a device claim may also be implemented by a single unit or device in software or hardware. Terms such as "first," "second," etc., are used only for distinguishing descriptions and do not indicate any particular order, nor should they be construed as indicating or implying relative importance.
[0147] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily made by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims, and the above embodiments should be regarded as exemplary and non-limiting.
Claims
1. A method for removing etching from silicon wafers, characterized in that, The method includes: Surface activation pretreatment is performed on the semiconductor silicon wafer to be etched; The silicon wafer characteristic data and surface activation pretreatment data of the semiconductor silicon wafer are input into the parameter optimization model to obtain the initial etching process parameters; The semiconductor silicon wafer is etched using a composite etching solution containing a main etchant, a surface modifier, and a chelating agent, according to the initial etching process parameters. During the etching process, a composite flow field is formed on the surface of the semiconductor silicon wafer through pulse jetting and silicon wafer attitude adjustment; The flow field state and residual state on the surface of the semiconductor silicon wafer are obtained, and the etching process parameters are adjusted according to the flow field state and the residual state. After the etching process is completed, the semiconductor silicon wafer is subjected to in-situ plasma residue removal.
2. The method as described in claim 1, characterized in that, Acquiring the flow field state and residual state on the surface of the semiconductor silicon wafer, and adjusting the etching process parameters according to the flow field state and the residual state, including: The flow velocity distribution, residual amount of chemical solution, and concentration of metal ions in the composite etching solution on the surface of the semiconductor silicon wafer are acquired in real time. When the local flow velocity in the flow field velocity distribution is lower than the preset flow velocity threshold, the residual amount of the drug solution reaches the first residual threshold, or the metal ion concentration reaches the first concentration threshold, the flow field velocity distribution, the residual amount of the drug solution, and the metal ion concentration are input into the parameter optimization model; The parameter optimization model outputs parameter update results, and at least one of the following is adjusted based on the parameter update results: injection pressure, injection frequency, etching temperature, silicon wafer tilt angle, and chelating agent replenishment amount.
3. The method as described in claim 1, characterized in that, The parameter optimization model is a CNN-LSTM fusion network model. The silicon wafer feature data includes silicon wafer material, thickness and pattern aspect ratio. The initial etching process parameters include etching temperature, spray pressure, rotation speed and etching time.
4. The silicon wafer etching removal method as described in claim 1, characterized in that, The method further includes: The semiconductor silicon wafer after plasma in-situ residue removal is subjected to residue detection, and compensation removal is performed when the residue detection result does not meet the preset residue control conditions. The compensation and cleaning process includes extending the treatment time of the low-temperature plasma and / or using deionized water containing chelating agents for secondary pulse cleaning.
5. The method as described in claim 1, characterized in that, When the aspect ratio of the semiconductor silicon wafer is greater than or equal to a preset aspect ratio threshold, pulse jetting corresponding to the trench region is activated, and the jetting pressure is reduced and the jetting frequency is increased to promote the flow and displacement of the composite etching solution in the trench.
6. The method as described in claim 1, characterized in that, The composite flow field acting on the surface of the semiconductor silicon wafer is formed through pulse jetting and silicon wafer attitude adjustment, including: Pulse jetting is applied to the central region, edge region, and trench region of the semiconductor silicon wafer, and the rotation and tilt angle of the semiconductor silicon wafer are controlled to form a composite flow field with the combined action of pulse impact and rotational shearing.
7. The method as described in claim 1, characterized in that, The main corrosive agent in the composite etching solution is a mixture of HF / HNO3 or KOH solution, the surface modifier is a fluorinated polyether nonionic surfactant, the chelating agent is an aminophosphoric acid derivative, and the interfacial tension of the composite etching solution is controlled at 15mN / m to 25mN / m.
8. An electronic device, characterized in that, The electronic device includes: One or more processors; and A memory storing computer program instructions, which, when executed, cause the processor to perform the steps of the method as described in any one of claims 1 to 7.
9. A computer-readable medium having a computer program / instructions stored thereon, characterized in that, When the computer program / instructions are executed by the processor, they implement the steps of the method according to any one of claims 1 to 7.
10. A computer program product comprising a computer program / instructions, characterized in that, When the computer program / instructions are executed by the processor, they implement the steps of the method according to any one of claims 1 to 7.