Deep trench isolation structure and method of manufacturing the same

Abstract

This invention discloses a deep trench isolation structure, comprising: a semiconductor substrate; a deep trench formed within the semiconductor substrate, the deep trench including two segmented trenches, the ends of which are located next to the high-voltage junction of a high-voltage device; an isolation dielectric layer, including a dielectric layer formed at the bottom and sidewalls of the deep trench and an isolation oxide formed by oxidizing the substrate material contained in the semiconductor substrate between the adjacent ends of the two segmented trenches; and polysilicon filling the deep trench after the isolation dielectric layer is formed. In this invention, the substrate material next to the high-voltage junction of the high-voltage device is not etched during the formation of the deep trench. The remaining substrate material is completely oxidized into an isolation oxide before filling with polysilicon. This ensures that the area next to the high-voltage junction is occupied by the isolation oxide, preventing the formation of ring-shaped polysilicon within the DTI. Consequently, when high voltage is applied to the device within the deep trench, the oxide layer pre-placed on the N-P junction will not generate a high-voltage induced potential, and the breakdown voltage of the high-voltage junction will not be affected, ensuring that the BV characteristics of the high-voltage device are not affected.

Description

Technical Field

[0001] This invention relates to the structural design of semiconductor devices, specifically to a deep trench isolation structure and its manufacturing method. Background Technology

[0002] Trench isolation is a widely used isolation technique for preventing crosstalk between integrated circuit devices. Compared to PN junction isolation and LOCOS isolation, trench isolation can significantly reduce the size and area of ​​the isolation structure while achieving better isolation performance.

[0003] In applications such as high-voltage or power devices, deep trench isolation structures with large aspect ratios are required to achieve higher withstand voltage and isolation capabilities. Due to the large aspect ratio, complete filling of the deep trench isolation (DTI) structure becomes a critical process challenge. Currently, traditional deep trench isolation structures require etching a ring-shaped deep trench with a large aspect ratio within a semiconductor substrate (such as a silicon substrate) 101, then growing an isolation dielectric layer 102 (such as an isolation oxide layer) on the inner surface of the ring-shaped deep trench, and finally filling it with polysilicon 103 to completely fill the entire DTI structure. Figure 1 , Figure 2 As shown.

[0004] like Figure 1 , Figure 2 As shown, since the DTI structure is toroidal, the final DTI structure will form a toroidal polysilicon 103 after filling.

[0005] Because the DTI structure forms a ring-shaped polysilicon ring after filling, when a high voltage is applied to the drain of a high-voltage device, such as Figure 3 As shown, when a high voltage is applied to N+ or P+, a high induced potential is generated in the polysilicon of the DTI structure near the drain terminal due to the capacitor plate effect. The induced potential generated in the polysilicon of the DTI structure will cause an inductive effect in the PN junction near the polysilicon of the DTI structure, resulting in a lower breakdown voltage (BV), which will ultimately affect the BV of high-voltage devices. Summary of the Invention

[0006] The technical problem to be solved by the present invention is to provide a deep trench isolation structure and its manufacturing method, which can solve the problem that in the existing deep trench isolation structure, the annular polycrystalline silicon generates an induced potential when a high voltage is applied to the drain of the adjacent high voltage device, which leads to a lower breakdown voltage of the nearby PN junction and affects the breakdown voltage of the high voltage device.

[0007] To address the above problems, the present invention provides a deep trench isolation structure comprising: Semiconductor substrate; A deep trench is formed within the semiconductor substrate, the deep trench comprising two segmented trenches, the ends of which are located adjacent to the high-voltage junction of the high-voltage device; The isolation dielectric layer includes a dielectric layer formed at the bottom and sidewalls of the deep trench, and an isolation oxide formed by oxidizing the substrate material contained in the semiconductor substrate between adjacent ends of the two segmented trenches. Polycrystalline silicon is used to fill the interior of the deep trench after the isolation dielectric layer is formed.

[0008] Furthermore, the segmented trenches are in the shape of "[" and "]".

[0009] Furthermore, the polysilicon comprises two segmented polysilicon sections, and the segmented polysilicon sections are not formed next to the high-voltage junction of the high-voltage device.

[0010] Furthermore, the isolation oxide is located next to the high-voltage junction of the high-voltage device.

[0011] Furthermore, the insulating oxide is connected to the dielectric layer formed at the bottom and sidewalls of the deep trench.

[0012] Meanwhile, the present invention also provides a method for manufacturing a deep trench isolation structure, comprising: Step 1: Deep trench etching is performed on the semiconductor substrate, and the etching of the deep trench stops next to the high voltage junction of the high voltage device, forming two segmented trenches; the ends of the segmented trenches are located next to the high voltage junction of the high voltage device, and the adjacent ends of the segmented trenches are separated by the substrate material contained in the semiconductor substrate. Step 2: Perform thermal oxidation to form a dielectric layer on the sidewalls and bottom of the segmented trenches, while the unetched substrate material between adjacent ends of the segmented trenches is fully thermally oxidized to form an isolation oxide. Step 3: Deposit polycrystalline silicon in the deep trench to fill the remaining gaps in the deep trench.

[0013] Furthermore, after step three, the filled polysilicon is planarized until the isolation dielectric layer and the isolation oxide formed on the sidewalls and bottom of the deep trench are exposed.

[0014] Furthermore, the high-voltage junction of the high-voltage device is adjacent to an isolation oxide formed by fully oxidizing the unetched substrate material between the adjacent ends of the segmented trench.

[0015] Furthermore, polysilicon is filled into the two segmented trenches to form two segmented polysilicon sections.

[0016] Furthermore, the distance between adjacent ends of the segmented polysilicon is greater than the length of the unetched substrate material between adjacent ends of the segmented trench.

[0017] This invention optimizes the ring-shaped polysilicon structure in existing annular deep trench isolation structures. When etching the semiconductor substrate to form the deep trench, the substrate material adjacent to the high-voltage junction of the high-voltage device is left unetched, thus forming a non-ring-shaped deep trench. Furthermore, during thermal oxidation, the substrate material adjacent to the high-voltage junction is completely oxidized into an isolation oxide. This ensures that the polysilicon filled in the deep trench isolation structure is a non-ring-shaped structure. The deep trench isolation structure of this invention ensures that there is no polysilicon adjacent to the high-voltage junction, but rather that it is occupied by an isolation oxide, preventing the formation of ring-shaped polysilicon within the DTI. Consequently, when high voltage is applied to the device within the deep trench, the oxide layer pre-placed on the NP junction will not generate a high-voltage induced potential, and the breakdown voltage of the high-voltage junction will not be affected, ensuring that the BV characteristics of the high-voltage device remain unaffected. Attached Figure Description

[0018] Figure 1 A top view of the existing deep trench isolation structure; Figure 2 A cross-sectional view of an existing deep trench isolation structure; Figure 3 This is a top view of the high-voltage device containing the existing deep trench device structure. Figure 4 This is a top view of the deep trench isolation structure of the present invention after the trench has been formed; Figure 5 This is a top view of the deep trench isolation structure of the present invention after it has been formed; Figure 6 A top view of a high-voltage device including the deep trench isolation structure of the present invention; Figure 7 This is a flowchart of the manufacturing method of the deep trench isolation structure of the present invention. Detailed Implementation

[0019] The embodiments of the present invention are described below with reference to the accompanying drawings and specific examples. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. Specific details are set forth in the following description to provide a thorough understanding of the present invention; however, the present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be based on different viewpoints and applications. Those skilled in the art can make various similar extensions and substitutions without departing from the spirit of the present invention.

[0020] Most existing high-voltage devices use a ring-shaped deep trench isolation structure (DTI). This isolation structure forms a ring-shaped polysilicon filling. When a high voltage is applied to the source end of the high-voltage device, it will cause an induced potential in the polysilicon in the adjacent DTI. The induced potential generated by the polysilicon in the DTI will cause the PN junction BV to decrease, ultimately affecting the BV characteristics of the high-voltage device.

[0021] To avoid the aforementioned drawbacks, the present invention provides a deep trench isolation structure, such as... Figure 5 , Figure 6 As shown, it includes: Semiconductor substrate 101; A deep trench 104 is formed within the semiconductor substrate 101. The deep trench 104 includes two segmented trenches, the ends of which are located next to the high-voltage junction of the high-voltage device. The isolation dielectric layer 102 includes a dielectric layer formed at the bottom and sidewalls of the deep trench 104, and an isolation oxide formed by oxidizing the substrate material contained in the semiconductor substrate 101 between adjacent ends of the two segmented trenches. Polycrystalline silicon 103 fills the interior of the deep trench 104 formed after the isolation dielectric layer 102 is formed.

[0022] The deep trench isolation structure in this embodiment of the invention is characterized in that the etching of the semiconductor substrate 101 to form the deep trench 104 stops next to the high-voltage junction of the high-voltage device. That is, the substrate material next to the high-voltage junction of the high-voltage device is left unetched, thereby forming a non-circular deep trench 104. Figure 4 As shown. Then, during the thermal oxidation process, the substrate material remaining next to the high-voltage junction of the high-voltage device is completely oxidized into an isolation oxide. Thus, after polysilicon filling, the polysilicon in the deep trench isolation structure is not a closed ring structure, but a non-ring structure broken next to the high-voltage junction, as shown. Figure 5 As shown, this means that the high-voltage junction is not filled with polysilicon, but is occupied by an isolation oxide. This way, when a high voltage is applied to the source of the high-voltage device, the polysilicon will not generate a high-voltage induced potential.

[0023] In this embodiment, as Figure 4 As shown, the segmented trenches are in the shape of "[" and "]", and the adjacent ends of the two segmented trenches are located next to the high voltage junction of the high voltage device, thereby ensuring that the substrate material next to the high voltage junction is preserved and not etched.

[0024] Furthermore, the polysilicon 103 comprises two segmented polysilicon units, and the segmented polysilicon units are not formed next to the high-voltage junction of the high-voltage device.

[0025] Furthermore, the isolation oxide is located next to the high-voltage junction of the high-voltage device.

[0026] Furthermore, the insulating oxide is connected to the dielectric layer formed at the bottom and sidewalls of the deep trench.

[0027] In some embodiments, the semiconductor substrate 101 is a silicon substrate, and correspondingly, the retained substrate material is a silicon material portion, and the isolation oxide formed by oxidizing the retained substrate material is silicon oxide.

[0028] In some embodiments, the insulating dielectric layer 103 mainly comprises silicon dioxide. Silicon dioxide not only has good insulating properties, but its formation process is also mature and stable, and it has good compatibility with other materials and process steps in semiconductor manufacturing.

[0029] In some embodiments, after the polysilicon in the deep trench is filled, it is planarized by methods such as chemical mechanical polishing.

[0030] like Figure 7 As shown, this embodiment also provides a method for manufacturing the aforementioned deep trench isolation structure, including: Step one: Etching of a deep trench 104 is performed on the semiconductor substrate 101, and the etching of the deep trench stops next to the high-voltage junction of the high-voltage device, forming a trench as shown in the figure. Figure 4 The structure shown includes a deep trench 104 formed by etching, comprising two segmented trenches; the ends of the segmented trenches are located next to the high-voltage junction of the high-voltage device, and the adjacent ends of the segmented trenches are separated by a substrate material contained in the semiconductor substrate. Step 2: Perform thermal oxidation to form a dielectric layer on the sidewalls and bottom of the segmented trench. At the same time, the unetched substrate material between adjacent ends of the segmented trench is fully thermally oxidized to form an isolation oxide. The isolation oxide is connected to the dielectric layer to form an isolation dielectric layer 102. Step 3: Deposit polysilicon 103 in the deep trench to fill the remaining gaps in the deep trench.

[0031] Furthermore, after step three, the filled polysilicon 103 is planarized until the isolation dielectric layer and the isolation oxide formed on the sidewalls and bottom of the deep trench are exposed.

[0032] In this embodiment, the high-voltage junction of the high-voltage device is surrounded by an isolation oxide formed by fully oxidizing the unetched substrate material between adjacent ends of the segmented trench. Thus, instead of filling the area around the high-voltage junction with polysilicon, the isolation oxide occupies the space, preventing the generation of a high-voltage induced potential in polysilicon when a high voltage is applied to the source of the high-voltage device.

[0033] Furthermore, the distance between adjacent ends of the segmented polysilicon is greater than the length of the unetched substrate material between adjacent ends of the segmented trench. For example, as Figure 4 As shown, during the etching process to form the deep trench of the DTI, substrate material of the semiconductor substrate is retained next to the high-voltage junction. The length of the retained substrate material (such as silicon) is 0.6 μm. During the thermal oxidation process to form the isolation dielectric layer, the retained substrate material is fully oxidized into an isolation oxide with a length of 1.3 μm. This means that the distance between adjacent ends of the filled polysilicon is 1.3 μm. Figure 5 As shown.

[0034] In this embodiment, the deep trench isolation structure does not have polysilicon next to the high voltage junction, but is occupied by isolation oxide. In this way, when a high voltage is applied to the source of the high voltage device, the polysilicon will not generate a high voltage induced potential. Therefore, the breakdown voltage BV of the high voltage junction will not be affected, thus ensuring that the BV characteristics of the high voltage device are not affected.

[0035] The present invention has been described in detail above through specific embodiments. These embodiments are merely preferred embodiments of the present invention, and the present invention is not limited to the above-described implementation methods. Equivalent substitutions and improvements made by those skilled in the art without departing from the principles of the present invention should be considered within the scope of the technology protected by the present invention.

Claims

1. A deep trench isolation structure, characterized in that, include: Semiconductor substrate; A deep trench is formed within the semiconductor substrate, the deep trench comprising two segmented trenches, the ends of which are located adjacent to the high-voltage junction of the high-voltage device; The isolation dielectric layer includes a dielectric layer formed at the bottom and sidewalls of the deep trench, and an isolation oxide formed by oxidizing the substrate material contained in the semiconductor substrate between adjacent ends of the two segmented trenches. Polycrystalline silicon is used to fill the interior of the deep trench after the isolation dielectric layer is formed.

2. The deep trench isolation structure according to claim 1, characterized in that, The segmented trenches are in the shape of "[" and "]".

3. The deep trench isolation structure according to claim 1, characterized in that, The polysilicon comprises two segmented polysilicon sections, and the segmented polysilicon sections are not formed next to the high-voltage junction of the high-voltage device.

4. The deep trench isolation structure according to claim 1, characterized in that, The isolation oxide is located next to the high-voltage junction of the high-voltage device.

5. The deep trench isolation structure according to claim 1, characterized in that, The insulating oxide is connected to the dielectric layer formed at the bottom and sidewalls of the deep trench.

6. A method for manufacturing a deep trench isolation structure, characterized in that, include: Step 1: Deep trench etching is performed on the semiconductor substrate, and the etching of the deep trench stops next to the high voltage junction of the high voltage device, forming two segmented trenches. The end of the segmented trench is located next to the high-voltage junction of the high-voltage device, and the adjacent ends of the segmented trench are separated by substrate material contained in the semiconductor substrate. Step 2: Perform thermal oxidation to form a dielectric layer on the sidewalls and bottom of the segmented trenches, while the unetched substrate material between adjacent ends of the segmented trenches is fully thermally oxidized to form an isolation oxide. Step 3: Deposit polycrystalline silicon in the deep trench to fill the remaining gaps in the deep trench.

7. The method for manufacturing the deep trench isolation structure according to claim 6, characterized in that, Step three is followed by planarization of the filled polysilicon until the isolation dielectric layer and the isolation oxide formed on the sidewalls and bottom of the deep trench are exposed.

8. The method for manufacturing the deep trench isolation structure according to claim 6, characterized in that, The high-voltage junction of the high-voltage device is adjacent to an isolation oxide formed by the full oxidation of the unetched substrate material between the adjacent ends of the segmented trench.

9. The method for manufacturing the deep trench isolation structure according to claim 6, characterized in that, Two segmented polycrystalline silicon sections are formed by filling the two segmented trenches with polycrystalline silicon.

10. The method for manufacturing the deep trench isolation structure according to claim 9, characterized in that, The distance between adjacent ends of the segmented polysilicon is greater than the length of the unetched substrate material between adjacent ends of the segmented trench.

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