Fabrication method of aluminum interconnect structure

Abstract

This invention provides a method for fabricating an aluminum interconnect structure. Before forming the aluminum material layer, a pattern of aluminum pads is formed using photolithography and etching processes. Then, an aluminum material layer is deposited and chemical mechanical polishing is performed to form the aluminum pads. By moving the aluminum deposition process after the photolithography process, the adverse effects of aluminum deposition on photolithography are resolved, photolithography alignment failure is avoided, and photolithography registration error is reduced. Furthermore, during the formation of the aluminum pad pattern, the first opening is filled with a dielectric layer to prevent etching damage to the bottom of the first opening when the third opening is formed. In addition, the top surface of the aluminum pad and the substrate are flush, which is more favorable for the next photolithography process and avoids photoresist collapse and photolithography alignment failure in the next photolithography process.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor technology and relates to a method for fabricating an aluminum interconnect structure. Background Technology

[0002] In the fabrication of semiconductor devices, chip electrodes are led out through metal layers, and aluminum pads are formed on the topmost metal layer. These aluminum pads are then used to interconnect with external circuits.

[0003] Existing aluminum interconnect processes include the following steps: (i) such as Figure 1 As shown, deposited aluminum metal layer 01; (II) as Figures 2 to 3 As shown, photoresist layer 02 is covered, exposed, and developed; (III) As Figure 4 As shown, excess aluminum and photoresist are selectively removed by etching to form the required aluminum pad 03; (iv) as Figure 5 As shown, a passivation layer 04 is formed.

[0004] The existing aluminum interconnect process has the following defects: (i) It is easily affected by the aluminum target material. In the later stage of the target material's lifespan, the thickness and uniformity of the aluminum deposition will deteriorate, which will affect the thickness and uniformity of the photoresist layer 02, and thus affect the light propagation and exposure effect during the photolithography process, resulting in increased overlay error. In particular, the uneven thickness in the alignment mark area will affect the photolithography machine's recognition of the alignment mark and the alignment accuracy, resulting in increased overlay error; (ii) During photolithography alignment, the surface roughness and reflectivity of the aluminum will easily cause alignment failure; (iii) The photoresist has poor adhesion to aluminum and is prone to collapse; (iv) The formed aluminum pad 03 is much higher than the oxide layer, forming a step difference on the wafer surface, which causes a step difference in the passivation layer 04, which easily causes the alignment failure of the next photolithography process.

[0005] Therefore, how to provide a method for fabricating aluminum interconnect structures to avoid photolithographic alignment failures and reduce overlay errors has become a technical problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0006] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a method for fabricating an aluminum interconnect structure to solve the problems of photolithography alignment failure and increased overlay error caused by aluminum deposition in the prior art.

[0007] To achieve the above and other related objectives, the present invention provides a method for manufacturing an aluminum interconnect structure, comprising the following steps:

[0008] A substrate is provided, wherein a first opening is formed in the substrate;

[0009] A dielectric layer of a predetermined thickness is formed in the first opening;

[0010] A photoresist layer is formed and patterned on the substrate to form a second opening in the photoresist layer, wherein the second opening exposes the first opening, and the size of the second opening is larger than the size of the first opening;

[0011] Using the patterned photoresist layer as a mask, the substrate is etched to form a third opening in the substrate, wherein the third opening is connected to the first opening;

[0012] Remove the dielectric layer and form an aluminum material layer on the substrate, wherein the aluminum material layer fills the first opening and the third opening;

[0013] The structure after the formation of the aluminum material layer is subjected to chemical mechanical polishing to remove the aluminum material layer located above the substrate, wherein the aluminum material layer in the first opening and the third opening constitutes an aluminum pad.

[0014] Optionally, after forming the aluminum pads, the method further includes the following steps:

[0015] A passivation layer is formed on the substrate, the passivation layer covering the aluminum pad;

[0016] A photoresist layer is formed on the passivation layer, and the photoresist layer is patterned to form a fourth opening, wherein the fourth opening overlaps with the aluminum pad in the projection direction of the substrate;

[0017] Using the patterned photoresist layer as a mask, the passivation layer is etched to form a fifth opening in the passivation layer, which exposes the aluminum pad.

[0018] Optionally, in the substrate, the bottom of the first opening is a copper metal layer, the side of the first opening is an insulating layer, and before forming the aluminum material layer on the substrate, the step of forming a barrier layer on the bottom and sidewall of the first opening and the bottom and sidewall of the third opening is further included.

[0019] Optionally, the barrier layer may be made of TaN.

[0020] Optionally, the step of forming the dielectric layer in the first opening includes:

[0021] A dielectric material layer is formed on the substrate and the dielectric material layer is filled into the first opening;

[0022] The dielectric material layer is etched, and the dielectric material layer retained in the first opening constitutes the dielectric layer.

[0023] Optionally, the dielectric layer is a bottom anti-reflective layer.

[0024] The present invention also provides a method for fabricating an aluminum interconnect structure, comprising the following steps:

[0025] A substrate is provided, wherein a first opening is formed in the substrate;

[0026] A first aluminum material layer is formed on the substrate and fills the first opening. The first aluminum material layer on the substrate is removed by chemical mechanical polishing. The first aluminum material layer in the first opening constitutes a first aluminum pad.

[0027] An insulating dielectric layer is formed on the substrate, the insulating dielectric layer covering the first aluminum pad;

[0028] A photoresist layer is formed and patterned on the insulating dielectric layer to form a second opening in the photoresist layer, wherein the second opening overlaps with the first opening in the projection direction of the substrate, and the size of the second opening is larger than the size of the first opening;

[0029] Using the patterned photoresist layer as a mask, the insulating dielectric layer is etched to form a third opening in the insulating dielectric layer, wherein the third opening is connected to the first opening;

[0030] A second aluminum material layer is formed on the insulating dielectric layer and fills the third opening. The second aluminum material layer on the insulating dielectric layer is removed by chemical mechanical polishing, and the second aluminum material layer in the third opening constitutes the second aluminum pad.

[0031] Optionally, after forming the second aluminum pad, the following steps are also included:

[0032] A passivation layer is formed on the insulating dielectric layer, and the passivation layer covers the second aluminum pad;

[0033] A photoresist layer is formed on the passivation layer, and the photoresist layer is patterned to form a fourth opening, wherein the fourth opening overlaps with the second aluminum pad in the projection direction of the substrate;

[0034] Using the patterned photoresist layer as a mask, the passivation layer is etched to form a fifth opening in the passivation layer, the fifth opening exposing the second aluminum pad.

[0035] Optionally, in the substrate, the bottom of the first opening is a copper metal layer, the side of the first opening is an insulating layer, and before forming the first aluminum material layer on the substrate, the step of forming a barrier layer at the bottom and sidewall of the first opening is further included.

[0036] Optionally, the barrier layer may be made of TaN.

[0037] As described above, in the method for fabricating the aluminum interconnect structure of the present invention, before forming the aluminum material layer, a pattern of aluminum pads is formed by photolithography and etching processes. Then, the aluminum material layer is deposited and chemical mechanical polishing is performed to form the aluminum pads. By moving the aluminum deposition process after the photolithography process, the adverse effects of aluminum deposition on photolithography are solved, photolithography alignment failure is avoided, and photolithography registration error is reduced. Furthermore, during the formation of the aluminum pad pattern, the first opening is filled with a dielectric layer to avoid etching damage to the bottom of the first opening when the third opening is formed. In addition, the top surface of the aluminum pad and the substrate are flush, which is more favorable for the next photolithography process and avoids photoresist collapse and photolithography alignment failure in the next photolithography process. Attached Figure Description

[0038] Figures 1 to 5 The diagram shows a cross-sectional structure of each step in the existing aluminum interconnect process.

[0039] Figure 6 The diagram shown is a flowchart of the method for manufacturing the aluminum interconnect structure in Embodiment 1 of the present invention.

[0040] Figures 7 to 18 The diagram shows the cross-sectional structure of each step in Embodiment 1 of the present invention.

[0041] Figure 19 The diagram shown is a flowchart of the method for manufacturing the aluminum interconnect structure in Embodiment 2 of the present invention.

[0042] Figures 20 to 31 The diagram shows the cross-sectional structure of each step in Embodiment 2 of the present invention.

[0043] Component designation explanation

[0044] 01 Aluminum metal layer

[0045] 02 Photoresist layer

[0046] 03 Aluminum solder pads

[0047] 04 Passivation layer

[0048] 1. Base

[0049] 100 copper metal layers

[0050] 101 First silicon oxide layer

[0051] 102 Silicon nitride layer

[0052] 103 Second silicon oxide layer

[0053] 2 First opening

[0054] 3. Dielectric material layer

[0055] 4. Dielectric layer

[0056] 5. Photoresist layer

[0057] 6. Second opening

[0058] 7. Third opening

[0059] 8 Aluminum Material Layer

[0060] 9. Barrier layer

[0061] 10 aluminum pads

[0062] 11. Passivation layer

[0063] 1100 First passivation layer

[0064] 1101 Second passivation layer

[0065] 12 Photoresist layer

[0066] 13 Fourth opening

[0067] 14 The Fifth Opening

[0068] 15 First aluminum material layer

[0069] 16 Barrier Layers

[0070] 17 First aluminum pad

[0071] 18 Insulating dielectric layer

[0072] 1800 First insulating dielectric layer

[0073] 1801 Second insulating dielectric layer

[0074] 19 Photoresist layers

[0075] 20 Second opening

[0076] 21 Third opening

[0077] 22 Second aluminum material layer

[0078] 23 Second aluminum pad

[0079] 24 Passivation layer

[0080] 2400 First passivation layer

[0081] 2401 Second passivation layer

[0082] 25 Photoresist layer

[0083] 26. Fourth opening

[0084] 27 The Fifth Opening

[0085] Steps S1 to S6 Detailed Implementation

[0086] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0087] Please see Figures 6 to 31 It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the drawings only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0088] Example 1

[0089] This embodiment provides a method for fabricating an aluminum interconnect structure. Please refer to [link / reference]. Figure 6 This includes the following steps:

[0090] S1: Provide a substrate in which a first opening is formed;

[0091] S2: A dielectric layer of a predetermined thickness is formed in the first opening;

[0092] S3: A photoresist layer is formed and patterned on the substrate to form a second opening in the photoresist layer, wherein the second opening exposes the first opening, and the size of the second opening is larger than the size of the first opening;

[0093] S4: Using the patterned photoresist layer as a mask, etch the substrate to form a third opening in the substrate, wherein the third opening is connected to the first opening;

[0094] S5: Remove the dielectric layer and form an aluminum material layer on the substrate, wherein the aluminum material layer fills the first opening and the third opening;

[0095] S6: Perform chemical mechanical polishing on the structure after the formation of the aluminum material layer to remove the aluminum material layer located above the substrate, wherein the aluminum material layer in the first opening and the third opening constitutes an aluminum pad.

[0096] The fabrication method of the aluminum interconnect structure in this embodiment will be described in detail below with reference to the specific accompanying drawings.

[0097] First, please refer to Figure 7 Step S1: Provide a substrate 1, in which a first opening 2 is formed.

[0098] As an example, this embodiment is a semiconductor back-end process, and the substrate 1 is a structure that has completed the front-end process.

[0099] As an example, in the substrate 1, the bottom of the first opening 2 is a copper metal layer 100, and the side of the first opening 2 is an insulating layer. In this embodiment, the substrate 1 only shows a stacked first silicon oxide layer 101, a silicon nitride layer 102, and a second silicon oxide layer 103, wherein the copper metal layer 100 is the top metal layer of the front-end process, the copper metal layer 100 is located in the first silicon oxide layer 101, the second silicon oxide layer 103 serves as an interlayer dielectric layer, and the first opening 2 penetrates the second silicon oxide layer 103 and the silicon nitride layer 102 to expose the copper metal layer 100.

[0100] As an example, the size of the first opening 2 is slightly larger than the size of the copper metal layer 100, that is, the first opening 2 also exposes the first silicon oxide layer 101 on both sides of the copper metal layer 100.

[0101] Next, please refer to Figure 8 and Figure 9 Step S2: A dielectric layer 4 of a preset thickness is formed in the first opening 2.

[0102] As an example, such as Figure 8 As shown, a dielectric material layer 3 is formed on the substrate 1, and the dielectric material layer 3 fills the first opening 2; as Figure 9 As shown, the dielectric material layer 3 is etched, and the dielectric material layer 3 retained in the first opening 2 constitutes the dielectric layer 4.

[0103] As an example, the dielectric layer 4 may not completely fill the first opening 2, or the dielectric layer 4 may completely fill the first opening 2, depending on the requirements; specifically, in this embodiment, the dielectric layer 4 does not completely fill the first opening 2.

[0104] As an example, the dielectric layer 4 is used to form a third opening 7 as an etching barrier layer during subsequent etching to avoid etching damage to the bottom of the first opening 2 (see...). Figure 12 Preferably, in this embodiment, the dielectric layer 4 is a bottom anti-reflection layer, which can protect the bottom of the first opening 2 on the one hand, and improve the exposure accuracy of the photolithography process on the other hand.

[0105] As an example, the dielectric layer 4 can be an inorganic bottom antireflective layer or an organic bottom antireflective layer, whichever is required; specifically, in this embodiment, the dielectric layer 4 is a spin-on carbon layer (SOC), whose main component is a polymer with high C content.

[0106] Next, please refer to Figures 10 to 11 Step S3: A photoresist layer 5 is formed and patterned on the substrate 1 to form a second opening 6 in the photoresist layer 5, wherein the second opening 6 exposes the first opening 2, and the size of the second opening 6 is larger than the size of the first opening 2.

[0107] As an example, such as Figure 10 As shown, the photoresist layer 5 is formed on the substrate 1. Since the dielectric layer 4 does not completely fill the first opening 2, the photoresist layer 5 extends into the first opening 2.

[0108] As an example, such as Figure 11 As shown, the photoresist layer 5 is exposed and developed to form a second opening 6 in the photoresist layer 5.

[0109] Next, please refer to Figure 12 Step S4: Using the patterned photoresist layer 5 as a mask, etch the substrate 1 to form a third opening 7 in the substrate 1, wherein the third opening 7 is connected to the first opening 2.

[0110] As an example, the third opening 7 is located in the second silicon oxide layer 103, and the third opening 7 and the first opening 2 are connected to form a "T" shaped structure.

[0111] As an example, during the formation of the third opening 7, the dielectric layer 4 can act as an etching barrier layer to prevent etching damage to the copper metal layer 100 and the first silicon oxide layer 101 on both sides of the copper metal layer 100.

[0112] As an example, the third opening 7 can be formed using either a dry etching process or a wet etching process, depending on the requirements.

[0113] Next, please refer to Figure 13 and Figure 14 Step S5: Remove the dielectric layer 4 and form an aluminum material layer 8 on the substrate 1, wherein the aluminum material layer 8 fills the first opening 2 and the third opening 7.

[0114] As an example, such as Figure 13 As shown, after the third opening 7 is formed, the remaining photoresist layer 5 and dielectric layer 4 are removed.

[0115] As an example, such as Figure 14 As shown, the aluminum material layer 8 is formed using a deposition process; specifically, in this embodiment, the aluminum material layer 8 is formed using a magnetron sputtering process.

[0116] As an example, before forming the aluminum material layer 8, the method further includes forming a barrier layer 9 on the sidewalls and bottom of the first opening 2 and the sidewalls and bottom of the third opening 7. The barrier layer 9 can prevent the aluminum material layer 8 from diffusing into the copper metal layer 100, the first silicon oxide layer 101, the silicon nitride layer 102, and the second silicon oxide layer 103. Specifically, in this embodiment, the barrier layer 9 is a TaN layer.

[0117] As an example, the barrier layer 9 is also formed on the upper surface of the second silicon oxide layer 103.

[0118] Next, please refer to Figure 15 Step S6: Perform chemical mechanical polishing on the structure after the formation of the aluminum material layer 8 to remove the aluminum material layer 8 located above the substrate 1. The aluminum material layers in the first opening 2 and the third opening 7 constitute the aluminum pad 10.

[0119] As an example, using the substrate 1 as the grinding stop layer, the aluminum material layer 8 located above the substrate 1 is removed by chemical mechanical polishing (CMP). After CMP, the aluminum pad 10 is flush with the top surface of the substrate 1.

[0120] As an example, the aluminum pad 10 has a "T" shaped structure.

[0121] In this embodiment, before forming the aluminum material layer 8, the pattern of the aluminum pad 10 is formed using photolithography and etching processes. Then, the aluminum material layer 8 is deposited and chemical mechanical polishing is performed to form the aluminum pad 10. By moving the aluminum deposition process after the photolithography process, the adverse effects of aluminum deposition on photolithography are resolved, photolithography alignment failure is avoided, and photolithography registration error is reduced. Furthermore, during the formation of the pattern of the aluminum pad 10, the first opening 2 is filled with the dielectric layer 4, preventing etching damage to the bottom of the first opening 2 when the third opening 7 is formed. In addition, the aluminum pad 10 is flush with the top surface of the substrate 1, which is more favorable for the next photolithography process and avoids photoresist collapse and photolithography alignment failure in the next photolithography process.

[0122] For example, please refer to Figures 16 to 18 After forming the aluminum pad 10, the process further includes the following steps:

[0123] (a) such as Figure 16As shown, a passivation layer 11 is formed on the substrate 1, and the passivation layer 11 covers the aluminum pad 10. Since the top surface of the aluminum pad 10 and the top surface of the substrate 1 are flush, the top surface of the passivation layer 11 is also flush. Specifically, in this embodiment, the passivation layer 11 adopts a first passivation layer 1100 and a second passivation layer 1101 stacked from bottom to top, wherein the first passivation layer 1100 is a silicon oxide layer and the second passivation layer 1101 is a silicon nitride layer.

[0124] (ii) Figure 17 As shown, a photoresist layer 12 is formed on the passivation layer 11. The photoresist layer 12 is exposed and developed to form a fourth opening 13. In the projection direction of the substrate 1, the fourth opening 13 overlaps with the aluminum pad 10. The fourth opening 13 defines the position where the passivation layer 11 needs to be opened.

[0125] (III) Figure 18 As shown, using the patterned photoresist layer 12 as a mask, the passivation layer 11 is etched to form a fifth opening 14, which exposes the aluminum pad 10 so that the aluminum pad 10 can be connected to an external circuit. Since the top surface of the passivation layer 11 is flat, a flat and uniformly thick photoresist layer 12 can be formed, avoiding photoresist collapse. Furthermore, the photoresist layer 12 can be accurately aligned during exposure, reducing overlay errors.

[0126] As described above, in the method for fabricating the aluminum interconnect structure in this embodiment, before forming the aluminum material layer, a pattern of aluminum pads is formed using photolithography and etching processes. Then, the aluminum material layer is deposited and chemical mechanical polishing is performed to form the aluminum pads. By moving the aluminum deposition process after the photolithography process, the adverse effects of aluminum deposition on photolithography are resolved, photolithography alignment failure is avoided, and photolithography registration errors are reduced. Furthermore, during the formation of the aluminum pad pattern, the first opening is filled with a dielectric layer to prevent etching damage to the bottom of the first opening when the third opening is formed. In addition, the top surface of the aluminum pads is flush with the top surface of the substrate, which is more favorable for the next photolithography process and avoids photoresist collapse and photolithography alignment failure in the next photolithography process.

[0127] Example 2

[0128] This embodiment provides a method for fabricating an aluminum interconnect structure. Please refer to [link / reference]. Figure 19 This includes the following steps:

[0129] S1: Provide a substrate in which a first opening is formed;

[0130] S2: A first aluminum material layer is formed on the substrate and the first aluminum material layer is filled into the first opening, wherein the first aluminum material layer on the substrate is removed by chemical mechanical polishing and the first aluminum material layer in the first opening constitutes a first aluminum pad.

[0131] S3: An insulating dielectric layer is formed on the substrate, the insulating dielectric layer covering the first aluminum pad;

[0132] S4: A photoresist layer is formed and patterned on the insulating dielectric layer to form a second opening in the photoresist, wherein the second opening overlaps with the first opening in the projection direction of the substrate, and the size of the second opening is larger than the size of the first opening;

[0133] S5: Using the patterned photoresist layer as a mask, etch the insulating dielectric layer to form a third opening in the insulating dielectric layer, wherein the third opening is connected to the first opening;

[0134] S6: A second aluminum material layer is formed on the insulating dielectric layer and the second aluminum material layer is filled into the third opening, wherein the second aluminum material layer on the insulating dielectric layer is removed by chemical mechanical polishing, and the second aluminum material layer in the third opening constitutes the second aluminum pad.

[0135] The fabrication method of the aluminum interconnect structure in this embodiment will be described in detail below with reference to the specific accompanying drawings.

[0136] First, please refer to Figure 20 Step S1: Provide a substrate 1, in which a first opening 2 is formed.

[0137] As an example, this embodiment is a semiconductor back-end process, and the substrate 1 is a structure that has completed the front-end process.

[0138] As an example, in the substrate 1, the bottom of the first opening 2 is a copper metal layer 100, and the side of the first opening 2 is an insulating layer. In this embodiment, the substrate 1 only shows a stacked first silicon oxide layer 101, a silicon nitride layer 102, and a second silicon oxide layer 103, wherein the copper metal layer 100 is the top metal layer of the front-end process, the copper metal layer 100 is located in the first silicon oxide layer 101, the second silicon oxide layer 103 serves as an interlayer dielectric layer, and the first opening 2 penetrates the second silicon oxide layer 103 and the silicon nitride layer 102 to expose the copper metal layer 100.

[0139] As an example, the size of the first opening 2 is slightly larger than the size of the copper metal layer 100, that is, the first opening 2 also exposes the first silicon oxide layer 101 on both sides of the copper metal layer 100.

[0140] Next, please refer to Figures 21 to 22 Step S2: A first aluminum material layer 15 is formed on the substrate 1 and the first aluminum material layer 15 is filled into the first opening 2. The first aluminum material layer 15 on the substrate 1 is removed by chemical mechanical polishing. The first aluminum material layer 15 in the first opening 2 constitutes the first aluminum pad 17.

[0141] As an example, such as Figure 21 As shown, the first aluminum material layer 15 is formed using a deposition process; specifically, in this embodiment, the first aluminum material layer 15 is formed using a magnetron sputtering process. Before forming the first aluminum material layer 15, a barrier layer 16 is formed on the sidewalls and bottom of the first opening 2 and on the upper surface of the substrate 1. The barrier layer 16 prevents the first aluminum material layer 15 from diffusing into the copper metal layer 100, the first silicon oxide layer 101, the silicon nitride layer 102, and the second silicon oxide layer 103. Specifically, in this embodiment, the barrier layer 16 is a TaN layer.

[0142] As an example, such as Figure 22 As shown, after chemical mechanical polishing, the top surface of the first aluminum pad 17 is flush with the top surface of the substrate 1. When performing chemical mechanical polishing on the first aluminum material layer 15, the substrate 1 is used as the polishing stop layer, or the substrate 1 of a preset thickness is polished simultaneously, depending on the requirements.

[0143] Next, please refer to Figure 23 Step S3: An insulating dielectric layer 18 is formed on the substrate 1, and the insulating dielectric layer 18 covers the first aluminum pad 17.

[0144] As an example, the insulating dielectric layer 18 includes a first insulating dielectric layer 1800 and a second insulating dielectric layer 1801 stacked from bottom to top, wherein the first insulating dielectric layer 1800 is a silicon nitride layer and the second insulating dielectric layer 1801 is a silicon oxide layer; in other embodiments, the insulating dielectric layer 18 may also be made of only a silicon nitride layer, or only a silicon oxide layer, or may be made of stacked insulating dielectric layers of more layers, depending on the requirements.

[0145] As an example, since the top surface of the first aluminum pad 17 is flush with the top surface of the substrate 1, the insulating dielectric layer 18 with a flat surface and uniform thickness can be formed.

[0146] Next, please refer to Figures 24 to 25 Step S4: A photoresist layer 19 is formed and patterned on the insulating dielectric layer 18 to form a second opening 20 in the photoresist layer 19, wherein the second opening 20 overlaps with the first opening 2 in the projection direction of the substrate 1, and the size of the second opening 20 is larger than the size of the first opening 2.

[0147] As an example, because the surface of the insulating dielectric layer 18 is flat, a flat and uniformly thick photoresist layer 19 can be formed, preventing the photoresist layer 19 from collapsing and avoiding alignment failure when exposing the photoresist layer 19, thus reducing overlay error.

[0148] Next, please refer to Figure 26 Step S5: Using the patterned photoresist layer 19 as a mask, etch the insulating dielectric layer 18 to form a third opening 21 in the insulating dielectric layer 18, wherein the third opening 21 is connected to the first opening 2.

[0149] As an example, the insulating dielectric layer 18 is etched using a dry etching process or a wet etching process to form the third opening 21, wherein the third opening 21 and the first opening 2 are connected to form a "T" shaped structure.

[0150] As an example, after forming the third opening 21, the remaining photoresist layer 19 is also removed.

[0151] Next, please refer to Figures 27 to 28 Step S6: A second aluminum material layer 22 is formed on the insulating dielectric layer 18 and the second aluminum material layer 22 is filled into the third opening 21. The second aluminum material layer 22 on the insulating dielectric layer 18 is removed by chemical mechanical polishing. The second aluminum material layer 22 in the third opening 21 constitutes the second aluminum pad 23.

[0152] As an example, the second aluminum material layer 22 is formed using a deposition process; specifically, in this embodiment, the second aluminum material layer 22 is formed using a magnetron sputtering process.

[0153] As an example, before forming the second aluminum material layer 22, the step of forming a barrier layer on the surface of the insulating dielectric layer 18 and the inner wall of the third opening 21 is included to prevent the second aluminum material layer 22 from diffusing into the insulating dielectric layer 18.

[0154] As an example, after chemical mechanical polishing, the top surface of the second aluminum pad 23 and the insulating dielectric layer 18 are flush.

[0155] As an example, the second aluminum pad 23 and the first aluminum pad 17 together constitute an aluminum pad, which has a "T" shaped structure.

[0156] In this embodiment, the first opening 2 is formed using photolithography and etching processes. Then, the first aluminum material layer 15 is deposited and chemically mechanically polished to form the first aluminum pad 17. Next, the third opening 21 is formed using photolithography and etching processes. Then, the second aluminum material layer 22 is deposited and chemically mechanically polished to form the second aluminum pad 23. The second aluminum pad 23 and the first aluminum pad 17 constitute the device aluminum pad, thus solving the adverse effects of aluminum deposition on the photolithography process, avoiding photolithography alignment failures, and reducing photolithography overlay errors. Furthermore, the second aluminum pad 23 is flush with the top surface of the insulating dielectric layer 18, which is more favorable for the next photolithography process, avoiding photoresist collapse and photolithography alignment failures in the next photolithography process.

[0157] For example, please refer to Figures 29 to 31 After forming the second aluminum pad 23, the following steps are also included:

[0158] (a) such as Figure 29 As shown, a passivation layer 24 is formed on the insulating dielectric layer 18, and the passivation layer 24 covers the second aluminum pad 23. Since the top surface of the second aluminum pad 23 and the top surface of the insulating dielectric layer 18 are flush, the top surface of the passivation layer 24 is also flush. Specifically, in this embodiment, the passivation layer 24 adopts a first passivation layer 2400 and a second passivation layer 2401 stacked from bottom to top, wherein the first passivation layer 2400 is a silicon oxide layer and the second passivation layer 2401 is a silicon nitride layer.

[0159] (ii) Figure 30 As shown, a photoresist layer 25 is formed on the passivation layer 24. The photoresist layer 25 is exposed and developed to form a fourth opening 26. In the projection direction of the substrate 1, the fourth opening 26 overlaps with the second aluminum pad 23. The fourth opening 26 defines the position where the passivation layer 24 needs to be opened.

[0160] (III) Figure 31 As shown, using the patterned photoresist layer 25 as a mask, the passivation layer 24 is etched to form a fifth opening 27, which exposes the second aluminum pad 23 so that the aluminum pad can be connected to an external circuit. Since the top surface of the passivation layer 24 is flat, a flat and uniformly thick photoresist layer 25 can be formed, avoiding photoresist collapse. Furthermore, the photoresist layer 25 can be accurately aligned during exposure, reducing overlay errors.

[0161] In summary, in the method for fabricating the aluminum interconnect structure of the present invention, before forming the aluminum material layer, a pattern of aluminum pads is formed using photolithography and etching processes. Then, the aluminum material layer is deposited and chemical mechanical polishing is performed to form the aluminum pads. By moving the aluminum deposition process after the photolithography process, the adverse effects of aluminum deposition on photolithography are resolved, photolithography alignment failure is avoided, and photolithography registration errors are reduced. Furthermore, during the formation of the aluminum pad pattern, the first opening is filled with a dielectric layer, preventing etching damage to the bottom of the first opening when the third opening is formed. In addition, the top surfaces of the aluminum pads and the substrate are flush, which is more favorable for the next photolithography process and avoids photoresist collapse and photolithography alignment failure in the next photolithography process. Therefore, the present invention effectively overcomes the various shortcomings of the prior art and has high industrial applicability.

[0162] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A method for fabricating an aluminum interconnect structure, characterized in that, Includes the following steps: A substrate is provided, wherein a first opening is formed in the substrate; A dielectric layer of a predetermined thickness is formed in the first opening; A photoresist layer is formed and patterned on the substrate to form a second opening in the photoresist layer, wherein the second opening exposes the first opening, and the size of the second opening is larger than the size of the first opening; Using the patterned photoresist layer as a mask, the substrate is etched to form a third opening in the substrate, wherein the third opening is connected to the first opening; Remove the dielectric layer and form an aluminum material layer on the substrate, wherein the aluminum material layer fills the first opening and the third opening; The structure after the formation of the aluminum material layer is subjected to chemical mechanical polishing to remove the aluminum material layer located above the substrate, wherein the aluminum material layer in the first opening and the third opening constitutes an aluminum pad.

2. The method for fabricating the aluminum interconnect structure according to claim 1, characterized in that, After forming the aluminum pads, the method further includes the following steps: A passivation layer is formed on the substrate, the passivation layer covering the aluminum pad; A photoresist layer is formed on the passivation layer, and the photoresist layer is patterned to form a fourth opening, wherein the fourth opening overlaps with the aluminum pad in the projection direction of the substrate; Using the patterned photoresist layer as a mask, the passivation layer is etched to form a fifth opening in the passivation layer, which exposes the aluminum pad.

3. The method for fabricating the aluminum interconnect structure according to claim 1, characterized in that: In the substrate, the bottom of the first opening is a copper metal layer, the side of the first opening is an insulating layer, and before the aluminum material layer is formed on the substrate, the step of forming a barrier layer on the bottom and sidewall of the first opening and the bottom and sidewall of the third opening is further included.

4. The method for fabricating the aluminum interconnect structure according to claim 3, characterized in that: The material of the barrier layer includes TaN.

5. The method for fabricating the aluminum interconnect structure according to claim 1, characterized in that: The step of forming the dielectric layer in the first opening includes: A dielectric material layer is formed on the substrate and the dielectric material layer is filled into the first opening; The dielectric material layer is etched, and the dielectric material layer retained in the first opening constitutes the dielectric layer.

6. The method for fabricating the aluminum interconnect structure according to claim 1, characterized in that: The dielectric layer is a bottom anti-reflective layer.

7. A method for fabricating an aluminum interconnect structure, characterized in that, Includes the following steps: A substrate is provided, wherein a first opening is formed in the substrate; A first aluminum material layer is formed on the substrate and fills the first opening. The first aluminum material layer on the substrate is removed by chemical mechanical polishing. The first aluminum material layer in the first opening constitutes a first aluminum pad. An insulating dielectric layer is formed on the substrate, the insulating dielectric layer covering the first aluminum pad; A photoresist layer is formed and patterned on the insulating dielectric layer to form a second opening in the photoresist layer, wherein the second opening overlaps with the first opening in the projection direction of the substrate, and the size of the second opening is larger than the size of the first opening; Using the patterned photoresist layer as a mask, the insulating dielectric layer is etched to form a third opening in the insulating dielectric layer, wherein the third opening is connected to the first opening; A second aluminum material layer is formed on the insulating dielectric layer and fills the third opening. The second aluminum material layer on the insulating dielectric layer is removed by chemical mechanical polishing, and the second aluminum material layer in the third opening constitutes the second aluminum pad.

8. The method for fabricating the aluminum interconnect structure according to claim 7, characterized in that: After forming the second aluminum pad, the following steps are also included: A passivation layer is formed on the insulating dielectric layer, and the passivation layer covers the second aluminum pad; A photoresist layer is formed on the passivation layer, and the photoresist layer is patterned to form a fourth opening, wherein the fourth opening overlaps with the second aluminum pad in the projection direction of the substrate; Using the patterned photoresist layer as a mask, the passivation layer is etched to form a fifth opening in the passivation layer, the fifth opening exposing the second aluminum pad.

9. The method for fabricating the aluminum interconnect structure according to claim 7, characterized in that: In the substrate, the bottom of the first opening is a copper metal layer, the side of the first opening is an insulating layer, and before the first aluminum material layer is formed on the substrate, the step of forming a barrier layer at the bottom and sidewall of the first opening is further included.

10. The method for fabricating the aluminum interconnect structure according to claim 9, characterized in that: The material of the barrier layer includes TaN.

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