Chip on film package structure

Abstract

This invention provides a thin-film flip-chip package structure, including a flexible circuit board and a chip. The flexible circuit board has multiple pins, including multiple first inner pins and multiple second inner pins. The chip includes multiple first bumps, multiple second bumps, and multiple third bumps. The second bumps are located on opposite sides of the third bumps. Each first bump corresponds to at least one third bump. Each first inner pin engages one of the first bumps with its corresponding at least one third bump. The second inner pins engage the second bumps respectively. Any two adjacent first bumps in any of the two outermost sets of first bumps have a first spacing. Any two adjacent second bumps adjacent to the outermost sets of first bumps have a second spacing equal to the first spacing.

Description

Technical Field

[0001] This invention relates to a packaging structure, and more particularly to a thin-film flip-chip packaging structure. Background Technology

[0002] Chip-on-Film (COF) packaging is a packaging technology that uses conductive bumps to bond a chip to leads on a flexible circuit board. Due to the high density and fine pitch of the inner leads (or inner pins) of the flexible circuit board used to electrically connect the conductive bumps, to ensure accurate alignment and bonding between the inner pins and the conductive bumps, a detection device typically captures images of the inner pins and conductive bumps at the corners of the chip for alignment and interpretation during and after the inner pin bonding process. However, when the conductive bumps are far from the chip edge, it becomes more difficult for the detection device to capture images of the inner pins and conductive bumps, making it difficult to observe whether the inner pins and conductive bumps are properly aligned and bonded during and after the inner pin bonding process. In addition, the conductive bumps far from the chip edge also increase the length of the internal pins that connect to the conductive bumps extending into the chip mounting area. Since the internal pins have a long cantilever section in the chip mounting area, they are very easy to bend down and contact the sealring located at the chip edge without support, which can lead to an electrical abnormal edge touch problem and reduce the yield of the product. Summary of the Invention

[0003] This invention relates to a thin-film flip-chip packaging structure, in which the bump configuration helps to confirm alignment and bonding, and also reduces the risk of internal pins bending down and contacting the chip edge, thereby improving product yield and reliability.

[0004] According to an embodiment of the present invention, a thin-film flip-chip package structure includes a flexible circuit carrier and a chip. The flexible circuit carrier includes a flexible substrate and a plurality of pins. The flexible substrate has a chip mounting area. The chip mounting area has opposing first and second boundaries. The pins are disposed on the flexible substrate and include a plurality of first inner pins and a plurality of second inner pins. The first and second inner pins extend through the first boundary and into the chip mounting area. The first and second inner pins are arranged adjacent to each other along the first boundary. The second inner pins are located on opposite sides of the first inner pins. The chip is disposed on the flexible circuit carrier and located within the chip mounting area. The chip has opposing first and second long sides and includes a plurality of first bumps, a plurality of second bumps, and a plurality of third bumps. The first and second long sides correspond to the first and second boundaries, respectively. The second and third bumps are adjacent to and arranged adjacent to each other along the first long side. The second bumps are located on opposite sides of the third bumps. Each first bump corresponds to at least one third bump and is farther from the first long side than the corresponding at least one third bump. Each of these first inner pins engages one of these first bumps with at least one corresponding third bump. The second inner pins engage the second bumps respectively. The first bumps have two sets of outermost first bumps on opposite sides. Any two adjacent first bumps in any set of the two sets of outermost first bumps have a first spacing. Any two adjacent second bumps adjacent to this set of outermost first bumps have a second spacing. The second spacing is equal to the first spacing.

[0005] In the thin-film flip-chip packaging structure according to an embodiment of the present invention, the number of the first bumps in any one of the two outermost sets of the above-mentioned first bumps is at least three.

[0006] In the thin-film flip-chip packaging structure according to an embodiment of the present invention, the number of the second bumps in any one of the two adjacent outermost groups of the first bumps is not less than three.

[0007] In the thin-film flip-chip packaging structure according to an embodiment of the present invention, the chip has two first corners located at opposite ends of a first long side, and the second bumps are located at the two first corners.

[0008] In the thin-film flip-chip packaging structure according to an embodiment of the present invention, the chip has a centerline perpendicular to the first long side, and the first bumps and the first internal pins are arranged in a mirror image on both sides of the centerline.

[0009] In the thin-film flip-chip packaging structure according to an embodiment of the present invention, the aforementioned first bumps located on one side of the center line are arranged in at least one row along a direction parallel to the first oblique line. The first oblique line is inclined to the first long side.

[0010] In the thin-film flip-chip packaging structure according to an embodiment of the present invention, each of the aforementioned first bumps has a first distance perpendicular to the first long side. These first distances of the first bumps gradually increase from the center line in a direction away from the center line.

[0011] In the thin-film flip-chip packaging structure according to an embodiment of the present invention, each of the aforementioned first bumps has a second distance perpendicular to the second long side. Some of these first distances of the first bumps are greater than these second distances.

[0012] In the thin-film flip-chip package structure according to an embodiment of the present invention, the aforementioned first bumps are electrically connected to the first internal pins.

[0013] In the thin-film flip-chip packaging structure according to an embodiment of the present invention, the thin-film flip-chip packaging structure further includes an encapsulating colloid, which at least fills the space between the chip and the flexible circuit carrier and covers the chip mounting area, the first bumps, the second bumps and the third bumps.

[0014] Based on the above, in the design of the thin-film flip-chip packaging structure of the present invention, by setting a second bump and a second inner pin at the corner of the chip to simulate the configuration of the outermost first inner pin and the first bump, the detection device or operator can not only determine whether the electrically connected first inner pin and the first bump are accurately aligned during pin bonding, but also confirm whether the actual bonding state of the first inner pin and the first bump has shifted after pin bonding, thus ensuring that the inner pin and the bump are accurately connected and reducing the risk of electrical abnormalities or failures in the thin-film flip-chip packaging structure of the present invention. By setting a third bump corresponding to the first bump at the long side adjacent to the chip, support for the first inner pin can be provided, preventing the first inner pin from bending down and contacting the chip edge, thereby improving the product yield of the thin-film flip-chip packaging structure of the present invention. Attached Figure Description

[0015] Figure 1 This is a top view schematic diagram of a thin-film flip-chip packaging structure according to an embodiment of the present invention;

[0016] Figure 2 yes Figure 1 A magnified perspective view of the chip placement area on a flexible circuit board;

[0017] Figure 3 It is along Figure 1 A schematic cross-sectional view of line II.

[0018] Explanation of icon numbers

[0019] 100: Thin-film flip-chip packaging structure;

[0020] 110: Flexible circuit board;

[0021] 112: Flexible substrate;

[0022] 113: Chip settings area;

[0023] 114: Pin;

[0024] 115: First internal pin;

[0025] 117: Second internal pin;

[0026] 118: Solder resist layer;

[0027] 120: Chip;

[0028] 122, 122e: First convex block;

[0029] 124: Second bump;

[0030] 126: Third convex block;

[0031] 130: Encapsulating colloid;

[0032] B1: First boundary;

[0033] B2: Second boundary;

[0034] C: First corner;

[0035] D1: First spacing;

[0036] D2: Second spacing;

[0037] D3: Third spacing;

[0038] E1: First distance;

[0039] E2: Second distance;

[0040] L: Centerline;

[0041] R1, R2: Rows;

[0042] S1: The first longest side;

[0043] S2: The second longest side;

[0044] T1: First diagonal line. Detailed Implementation

[0045] Reference will now be made in detail to exemplary embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same element references are used in the drawings and description to denote the same or similar parts.

[0046] The invention is illustrated more fully with reference to the accompanying drawings of this embodiment. However, the invention may be embodied in various different forms and should not be limited to the embodiments described herein. The thickness, dimensions, or size of layers or regions in the drawings are enlarged for clarity.

[0047] Figure 1 This is a top view schematic diagram of a thin-film flip-chip packaging structure according to an embodiment of the present invention. Figure 2 yes Figure 1 An enlarged perspective view of the chip placement area of ​​the flexible circuit carrier. Figure 3 It is along Figure 1 A schematic cross-sectional view of line II. Figure 1 The pins covered by the solder mask are not shown; only the pin layout is schematically indicated. The chip and encapsulant are shown in perspective and no bumps are shown.

[0048] Please also refer to Figure 1 , Figure 2 and Figure 3In this embodiment, the thin-film flip-chip package structure 100 includes a flexible circuit carrier 110 and a chip 120. The flexible circuit carrier 110 includes a flexible substrate 112 and a plurality of pins 114. The flexible substrate 112 has a chip placement area 113. The chip placement area 113 has opposing first boundaries B1 and second boundaries B2. The pins 114 are disposed on the flexible substrate 112 and include a plurality of first inner pins 115 and a plurality of second inner pins 117. The first inner pins 115 and the second inner pins 117 extend through the first boundary B1 into the chip placement area 113. The first inner pins 115 and the second inner pins 117 are arranged adjacent to each other along the first boundary B1. The second inner pins 117 are located on opposite sides of the first inner pins 115. The chip 120 is disposed on the flexible circuit carrier 110 and located within the chip placement area 113. Chip 120 has opposing first long sides S1 and second long sides S2 and includes a plurality of first bumps 122, a plurality of second bumps 124, and a plurality of third bumps 126. The first long side S1 and the second long side S2 correspond to a first boundary B1 and a second boundary B2, respectively. The second bumps 124 and the third bumps 126 are adjacent to and arranged along the first long side S1. The second bumps 124 are located on opposite sides of the third bumps 126. Each first bump 122 corresponds to at least one third bump 126 and is further away from the first long side S1 than the corresponding at least one third bump 126. Each first internal pin 115 engages one of the first bumps 122 with the corresponding at least one third bump 126. In this embodiment, each first bump 122 corresponds to one third bump 126, and each first internal pin 115 engages one first bump 122 with one corresponding third bump 126, but this is not a limitation. These second inner pins 117 respectively engage with these second bumps 124. These first bumps 122 have two sets of outermost first bumps 122e on opposite sides. Any two adjacent first bumps 122e in any set of the two sets of outermost first bumps 122e have a first spacing D1. Any two adjacent second bumps 124 adjacent to these sets of outermost first bumps 122e have a second spacing D2. The second spacing D2 is equal to the first spacing D1. The first spacing D1 is the shortest distance between the midlines of two adjacent first bumps 122e, and the second spacing D2 is the shortest distance between the midlines of two adjacent second bumps 124. These second bumps 124 may be dummy bumps, and these second inner pins 117 may be dummy leads, meaning that the second bumps 124 and the second inner pins 117 do not have electrical transmission functionality, but this invention does not limit this.

[0049] In detail, in this embodiment, the flexible substrate 112 of the flexible circuit board 110 may be made of, for example, polyethylene terephthalate, polyimide, polyethersulfone, polycarbonate, or other suitable flexible materials. Furthermore, the flexible circuit board 110 of this embodiment also includes a solder resist layer 118, disposed on the flexible substrate 112 and partially covering the pins 114 to prevent damage to the pins 114 or bridging short circuits due to foreign matter. The solder resist layer 118 has openings exposing the chip placement area 113. The portions of the pins 114 exposed by the solder resist layer 118 can be used for electrical connection to the chip 120 or external components.

[0050] Please refer to the following at the same time: Figure 2 and Figure 3In this embodiment, the chip 120 is disposed in the chip mounting area 113 in a flip-chip manner, with the active surface of the chip 120 having first bumps 122, second bumps 124, and third bumps 126 facing the flexible circuit carrier 110. These first bumps 122 are electrically connected to the first internal pins 115; that is, the chip 120 is electrically connected to the first internal pins 115 located in the chip mounting area 113 via the first bumps 122. In one embodiment, the chip 120 has a center line L perpendicular to the first long side S1, and the first bumps 122 and the first internal pins 115 are arranged in a mirror image on both sides of the center line L. In another embodiment, the first bumps 122 located on one side of the center line L are arranged in at least one row along a direction parallel to the first oblique line T1, wherein the first oblique line T1 is inclined to the first long side S1. In this embodiment, the first protrusions 122 located on one side (e.g., the left side) of the center line L are arranged in two rows R1 and R2 along a direction parallel to the first oblique line T1, and these first protrusions 122 in these two rows R1 and R2 are staggered, but not limited thereto. In one embodiment, the arrangement of these first protrusions 122 (e.g., the number of rows) can be arranged in a single row or multiple rows depending on the needs and space allowance. Each of these first protrusions 122 has a first distance E1 perpendicular to the first long side S1. The first distance E1 mentioned here is the shortest distance from the center position of the first protrusion 122 to the first long side S1. These first distances E1 of the first protrusions 122 gradually increase from the center line L in the direction away from the center line L, that is, the first distance E1 is the smallest near the center line L, and gradually increases as it moves away from the center line L. Each of these first protrusions 122 has a second distance E2 perpendicular to the second long side S2, and some of these first protrusions 122 have first distances E1 greater than these second distances E2. The second distance E2 described herein is the shortest distance from the center of the first protrusion 122 to the second long side S2. In other words, the first protrusions 122 are closer to the first long side S1 near the center line L, and closer to the second long side S2 the further away from the center line L, i.e., these first protrusions 122 are arranged in an inclined manner.

[0051] Please refer to this again. Figure 2In one embodiment, the number of first bumps 122e in any one of the two sets of outermost first bumps 122e is at least three. The number of second bumps 124 in any one of the two sets of outermost first bumps 122e is not less than three. The chip 120 has two first corners C located at opposite ends of the first long side S1, and the second bumps 124 are located at the two first corners C. Since the first bumps 122 used by the chip 120 for electrical connection with the flexible circuit board 110 are far from the first long side S1 of the chip 120, it is not easy to observe whether the first internal pins 115 and the first bumps 122 are aligned and engaged when the internal pins are engaged with the bumps and after engagement. Therefore, in this embodiment, second bumps 124 and second internal pins 117 are provided at the two first corners C of the first long side S1 of the chip 120 as alignment marks when the internal pins are engaged with the bumps. Furthermore, the second distance D2 between any two adjacent second bumps 124 is equal to the first distance D1 between any two adjacent first bumps 122e in a group of adjacent outermost first bumps 122e. That is, the configuration of the outermost first inner pin 115 and the first bump 122e is simulated by the second bump 124 and the second inner pin 117 located at the first corner C. Therefore, by identifying the alignment and engagement of the second bump 124 and the second inner pin 117 located at the first corner C, the detection device or operator can determine whether the first inner pin 115 and the first bump 122 are accurately aligned when the inner pin engages with the bump, and confirm whether the actual engagement of the first inner pin 115 and the first bump 122 has shifted after the inner pin engages with the bump. This ensures that the inner pin and the bump are accurately connected, avoids electrical abnormalities or failures in the thin-film flip-chip package structure 100, and improves the reliability of the thin-film flip-chip package structure 100.

[0052] Furthermore, because the first bump 122 is far from the first long side S1 of the chip 120, the length of the first inner pin 115 extending into the chip mounting area 113 connected to the first bump 122 increases. This results in a longer cantilever section (i.e., the portion from the rear end of the first bump 122 to the first boundary B1) within the chip mounting area 113, which could potentially bend downwards and contact the protective ring located at the edge of the chip 120, thus posing a risk of edge contact. Therefore, in this embodiment, a third bump 126 corresponding to the first bump 122 is provided near the first long side S1 of the chip 120 to support the first inner pin 115, preventing it from contacting the edge of the chip 120 and improving the yield of the thin-film flip-chip package structure 100. In short, the third bump 126 can be considered a support bump, without electrical function, serving only as a support structure. These third bumps 126 can be arranged in at least one row along the first long side S1. In this embodiment, the third bumps 126 are arranged in two rows along the first long side S1, and these three rows of third bumps 126 are staggered, but not limited thereto. Furthermore, to ensure pin support and bonding quality, the third spacing D3 between two adjacent third bumps 126 is equal to the first spacing D1. The third spacing D3 mentioned here is the distance between the centerlines of two adjacent third bumps 126.

[0053] Additionally, please refer to Figure 1 and Figure 3 The thin-film flip-chip packaging structure 100 of this embodiment may further include an encapsulating colloid 130, which fills at least between the chip 120 and the flexible circuit carrier 110 and covers the chip mounting area 113, the first bumps 122, the second bumps 124, and the third bumps 126 to protect the electrical contacts between the chip 120 and the flexible circuit carrier 110. In this embodiment, the encapsulating colloid 130 is, for example, an underfill, but is not limited thereto.

[0054] In summary, in the design of the thin-film flip-chip packaging structure of the present invention, by setting a second bump and a second inner pin at the corner of the chip to simulate the configuration of the outermost first inner pin and the first bump, the detection device or operator can not only determine whether the electrically connected first inner pin and the first bump are accurately aligned during pin bonding, but also confirm whether the actual bonding state of the first inner pin and the first bump has shifted after pin bonding, thus ensuring accurate connection between the inner pin and the bump and reducing the risk of electrical abnormalities or failures in the thin-film flip-chip packaging structure of the present invention. By setting a third bump corresponding to the first bump at the long side adjacent to the chip, support for the first inner pin can be provided, preventing the first inner pin from bending downwards and contacting the chip edge, thereby improving the product yield of the thin-film flip-chip packaging structure of the present invention.

[0055] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A thin-film flip-chip packaging structure, characterized in that, include: Flexible circuit board, including: A flexible substrate having a chip placement area, the chip placement area having opposing first and second boundaries; and A plurality of pins are disposed on the flexible substrate and include a plurality of first inner pins and a plurality of second inner pins. The plurality of first inner pins and the plurality of second inner pins extend through a first boundary into the chip mounting area. The plurality of first inner pins and the plurality of second inner pins are arranged adjacent to each other along the first boundary, and the plurality of second inner pins are located on opposite sides of the plurality of first inner pins. A chip is disposed on the flexible circuit board and located within the chip placement area. The chip has opposing first and second long sides and includes a plurality of first bumps, a plurality of second bumps, and a plurality of third bumps. The first and second long sides correspond to the first boundary and the second boundary, respectively. The plurality of second bumps and the plurality of third bumps are adjacent to the first long side and arranged adjacently along the first long side. The plurality of second bumps are located on opposite sides of the plurality of third bumps. Each of the plurality of first bumps corresponds to at least one of the plurality of third bumps and is farther away from the first long side than the corresponding at least one third bump. Each of the plurality of first inner pins engages one of the plurality of first bumps and the corresponding at least one third bump. The plurality of second inner pins engage the plurality of second bumps. The plurality of first protrusions have two sets of outermost first protrusions on opposite sides. Any two adjacent first protrusions in any set of the two sets of outermost first protrusions have a first spacing, and any two adjacent second protrusions adjacent to the set of outermost first protrusions have a second spacing, and the second spacing is equal to the first spacing.

2. The thin-film flip-chip packaging structure according to claim 1, characterized in that, The number of the plurality of first bumps in any one of the two outermost groups of the plurality of first bumps is at least three.

3. The thin-film flip-chip packaging structure according to claim 2, characterized in that, The number of the plurality of second bumps in any group of the plurality of first bumps adjacent to the outermost of the two groups is not less than three.

4. The thin-film flip-chip packaging structure according to claim 1, characterized in that, The chip has two first corners located at opposite ends of the first long side, and the plurality of second bumps are located at the two first corners.

5. The thin-film flip-chip packaging structure according to claim 1, characterized in that, The chip has a center line perpendicular to the first long side, and the plurality of first bumps and the plurality of first internal pins are arranged in a mirror image on both sides of the center line.

6. The thin-film flip-chip packaging structure according to claim 5, characterized in that, The plurality of first protrusions located on one side of the center line are arranged in at least one row along a direction parallel to the first oblique line, wherein the first oblique line is inclined to the first long side.

7. The thin-film flip-chip packaging structure according to claim 5, characterized in that, Each of the plurality of first protrusions has a first distance perpendicular to the first long side, and the plurality of first distances of the plurality of first protrusions gradually increase from the center line in a direction away from the center line.

8. The thin-film flip-chip packaging structure according to claim 7, characterized in that, Each of the plurality of first protrusions has a second distance perpendicular to the second long side, and some of the plurality of first protrusions have a plurality of first distances greater than a plurality of second distances.

9. The thin-film flip-chip packaging structure according to claim 1, characterized in that, The plurality of first bumps are electrically connected to the plurality of first internal pins.

10. The thin-film flip-chip packaging structure according to claim 1, characterized in that, Also includes: An encapsulating colloid is used to fill at least the space between the chip and the flexible circuit board and to cover the chip mounting area, the plurality of first bumps, the plurality of second bumps, and the plurality of third bumps.

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