Drive system comprising a first component, a second component and a communication link, and method for operating such a drive system

Abstract

A drive system comprising a first component, a second component, and a communication link, wherein, when using asynchronous serial data transmission between the first component and the second component, message data is transmitted via the communication link in the form of an asynchronous serial data stream, and wherein the message data includes valid data to be transmitted, and start bits and / or stop bits for synchronizing the message data within the asynchronous serial data stream, characterized in that the message data is transmitted multiple times and directly and sequentially in time, wherein the message data includes an additional synchronization mechanism, and wherein the duration required for error-free transmission of valid data, i.e., the data transmission time, is minimized.

Description

Technical Field

[0001] The present invention relates to a drive system comprising a first component, a second component, and a communication link, and a method for operating such a drive system. Background Technology

[0002] As is well known, effective data transmission is achieved through asynchronous serial data transmission.

[0003] As the closest prior art, a technique for correcting time parameters is known from DE 10 2019 112 699 A1.

[0004] An optical interface is known from DE 43 36 524 A1.

[0005] A high-speed protocol for distributed control systems is known from EP 3 849 145 A2.

[0006] A method for fault monitoring during asynchronous message transmission is known from DE 29 45 147 A1.

[0007] A method for preparing tricyclic compounds is known from DE 40 28 666 A1.

[0008] A data transmission method is known from DE 198 48 211 A1.

[0009] A means of serial data transmission is known from US 6,266,710 B1. Summary of the Invention

[0010] The purpose of this invention is to ensure reliable and fast asynchronous serial transmission of valid data, especially to achieve fault-tolerant data transmission with a constantly shortened maximum cycle time.

[0011] In this invention, the objective is achieved by supplementing the valid data to be transmitted with additional synchronization markers and additional identification markers as an additional synchronization mechanism, and by sending multiple times and sequentially in time a combination consisting of valid data, additional synchronization markers and additional identification markers.

[0012] According to the present invention, the objective is achieved by a drive system according to the features described in claim 1 and a method for operating the drive system according to the features described in claim 13, 14 or 16.

[0013] According to the present invention, a drive system comprising a first component, a second component, and a communication link is provided, wherein, when using asynchronous serial data transmission between the first component and the second component, message data D is transmitted via the communication link in the form of an asynchronous serial data stream.x_y And among them, message data D x_y Includes the valid data N to be transmitted x_y and for processing message data D within an asynchronous serial data stream x_y The start and / or stop bits for synchronization are an important feature of this drive system, and the message data D is also important. x_y It is transmitted multiple times and directly and sequentially in time, wherein message data D x_y Includes an additional synchronization mechanism, and in which, valid data N x_y The time required for error-free transmission, i.e., the data transmission time t. dtt_x It has been shortened to the minimum.

[0014] A drive system, as used herein, refers to a structural unit that converts electrical energy into kinetic energy through energy conversion. A drive system is typically divided into different components and sub-components that interact and / or communicate with each other. A drive system typically consists of a motor powered by a frequency converter, and usually includes at least one additional component, which comprises sensor elements, actuator elements, and / or data storage elements, such as, for example, rotary encoders, plug-in encoders, temperature sensors, vibration sensors, built-in attitude sensors, gyroscope sensors, GPS receivers, gravity sensors, Hall effect sensors, electronically readable nameplates, and / or one or more electronic brakes. The drive system may also include a speed reducer, which is directly mechanically connected to the motor and configured to optimally match the motor's torque or speed to the requirements of the industrial application. It is also conceivable that the structural unit includes the frequency converter, allowing the drive system to be implemented very compactly.

[0015] A communication link should be understood as a technical device through which multiple components exchange message data with each other. x_y Then, exchange the valid data N contained therein. x_y Here, message data is mostly transmitted between components in the form of physical quantities (e.g., electrical signals, optical signals, or electromagnetic waves) using established standard data transmission protocols. x_y .

[0016] Message Data D x_y This should be understood as a container, which includes the actual valid data N to be transmitted. x_y And additional information necessary for data transmission, such as start bits and / or stop bits.

[0017] Valid data Nx_y should be understood as information that must be available in the application in a timely manner and therefore must be processed within the component within the specified time window, which is particularly crucial when controlling, regulating, and / or monitoring processes within the drive system.

[0018] Asynchronous serial data transmission should be understood as a method in which message data D is transmitted sequentially in a time-staggered manner (that is, asynchronously and independently of the clock signal). x_y Advantageously, data transmission can be achieved via a reduced number of physical lines. To synchronize the data transmitted within a serial data stream, one or more start bits and / or stop bits are typically added to the data as a synchronization mechanism to identify the start and end of segments within the data stream.

[0019] The additional synchronization mechanism should be understood here as an additional mechanism that allows for synchronization of message data D within an asynchronous serial data stream without using the start and / or stop bits normally used for synchronization. x_y Synchronize.

[0020] Error-free transmission should be understood as data transmission in which, despite interference and resulting transmission errors, the message data is ultimately transmitted unchanged from the sender to the receiver. Here, transmission errors are understood to be errors that may arise from electronic or thermal noise, electromagnetic interference radiation, capacitive coupling, or cosmic radiation, and that cause data distortion due to mistransmitted characters. Mistransmitted characters (components of synchronization markers in asynchronous data transmission, such as mistransmitted start and / or stop bits) mostly lead to synchronization errors, which frequently cause the transmitted message data D to be distorted. x_y Lost, thus resulting in the loss of N valid data to be transmitted. x_y Lost.

[0021] Advantageously, by transmitting the same message data D in a redundant and directly following manner. x_y This improves the accuracy of at least one error-free transmission of message data. x_y The probability of this is high. Furthermore, the additional synchronization mechanism improves the reliability of identifying message data within the data stream even if the start bit and / or stop bit transmission is incorrect. x_y The probability of this, so as to prevent message data D x_y Complete loss. By minimizing the transmission time via a actually faulty communication link. tdtt_x This also improves the efficiency of multiple, time-series transmissions of message data D. x_yThe probability of at least one error-free transmission in the data. Therefore, even under worst-case conditions, that is, given a certain number of permissible and tolerable transmission errors, it is possible to achieve the desired transmission within the data transmission time t. dtt_x Then ensure valid data N x_y The transmission of N data is thus ensured. x_y It must be available in a timely manner so that valid data can be processed within the receiving component within the specified time window, which is particularly crucial when controlling, regulating, and / or monitoring processes within drive systems.

[0022] In another advantageous design, based on the message data D to be transmitted multiple times and sequentially in time... x_y Quantity n, data transmission time t dtt_x D consisting of n identical message data being sent. x_1 ... D x_n Sending time t s The sum, travel time delay t pd And the test time is used to determine this.

[0023] Sending time t s (where t) s > 0 time units) should be understood as the component acting as the sender transmitting message data D. x_y The required duration.

[0024] Travel time delay t pd (where t) pd > 0 time units) should be understood as the time required for a signal to travel from the sender to the receiver in the propagation medium of the communication link, derived from the physical characteristics of the communication link.

[0025] Inspection time t chk (where t) chk > 0 time units) should be understood as the component acting as the receiver checking the received message data D x_y The valid data N contained in it x_y The time required for its effectiveness.

[0026] In another advantageous design, based on the message data D to be transmitted multiple times and sequentially in time... x_y Quantity n, data transmission time t dtt_x D consisting of n identical message data being sent. x_1 ... D x_n Sending time t s The sum, travel time delay t pd Inspection time t chk The sum, and the waiting time t wait The conclusion is as follows.

[0027] Waiting time t wait This should be understood as, until the corresponding component can process the received valid data N. x_y The time elapsed during the validity test.

[0028] In another advantageous design, the transmission time t s From a single message data D x_y Data length DL and transmitted message data D x_y The data transfer rate DR is used as the quotient.

[0029] The data length DL (where DL > 0 information units) should be understood as the number of valid data N transmitted. x_y Required component message data D x_y The number of all information units (especially characters or bits).

[0030] The data transmission rate DR (where DR > 0 information units / time unit) should be understood as the transmission rate of message data D over a communication link within a time interval. x_y The transmission speed used by information units.

[0031] Advantageously, message data D can be transmitted directly and sequentially in time. x_y The appropriate number of repetitions n is used to optimize data transmission time t. dtt_x .

[0032] In another advantageous design, this number n is derived from the data length DL, data transfer rate DR, and maximum error rate FR.

[0033] Error rate FR (where FR > 0 interference events / time unit) should be understood here as the number of message data errors caused by interference events. x_y The probability of being received incorrectly.

[0034] Advantageously, under a preset maximum tolerable error rate FR, the message data D required for this, to be transmitted multiple times and directly and sequentially in time, can be determined. x_y The number n is used to achieve the desired robustness relative to the effects of disturbances.

[0035] [6] In another advantageous design, the quantity n is derived from the following mathematical relationship:

[0036]

[0037] Advantageously, this will result in the effective data N x_y The transmission time is shortened to the shortest technically feasible time, ensuring that the data transmission time t is completed no later than the specified time. dtt_x Then complete it.

[0038] In another advantageous design, the drive system has a maximum communication cycle time t. cct The communication cycle includes the following process: the first component transmits valid data N... 1_y The data is transmitted to the second component, and the second component then transmits the valid data N. 2_y Send to the first component, wherein the communication cycle time is t. cct The processing time t of the first component pt_1 Data transmission time t dtt_1 The processing time t of the second component pt_2 and data transmission time t dtt_2 composition.

[0039] Communication cycle time t cct This refers to the time elapsed during repeated communication, from the creation of the sender's request until the receiver receives the request and processes the receiver's response. For controlling, regulating, and / or monitoring the drive system, it is necessary to ensure that within the maximum time interval, i.e., the communication cycle time t... cct The components of the internal drive system exchange specific internal process data.

[0040] Processing time t pt This should be understood as the time required for a component to perform all the steps required to process the tasks assigned to it. These tasks include, for example, extracting information from received and / or measured signals, or preparing information for data transmission from a component acting as an information source to another component acting as an information consumer.

[0041] Advantageously, by having the maximum communication cycle time t cct Minimize the data transmission time t between the two data transmissions within the communication cycle. dtt_1 and t dtt_2 This can maximize the overall available processing time t. pt , where t pt（max） = t cct - (t) dtt_1（min） + t dtt_2（min） Here, the processing time t is maximized. pt It can be freely allocated between the first component and the second component, that is, t pt（max） = t pt_1 + t pt_2 This allows, in particular, a component to have more processing time, enabling it to perform, for example, more complex calculations per communication cycle. It is also conceivable to use a slower and therefore more cost-effective computing unit within said component, thereby at least reducing the manufacturing cost of that component.

[0042] In another advantageous design, once valid data N is received as a response to a previously made request... 2_y Not within the maximum communication cycle time t cct The system is waiting for the valid data N. 2_y If the error occurs at the location of the waiting component, then the waiting component reports a communication error F to the drive system.

[0043] Advantageously, it monitors whether the exchange of valid data adheres to the maximum allowed duration, i.e., the maximum communication cycle time t. cct Therefore, it is essential to ensure that critical process data is transmitted within the required maximum communication cycle time t. cct The internal transmission is reliable, or the driving system exceeds the maximum communication cycle time t. cct Execute fault responses in a timely manner to prevent damage, especially personal injury or death, environmental pollution and / or loss of equipment or production.

[0044] In another advantageous design, the additional synchronization mechanism includes at least one synchronization flag, wherein the first and / or second components are configured to transmit message data D multiple times and sequentially in time. x_y Merged into transmission message D seq_x Among them, message data D x_y Including protected valid data N S_x_y and at least one synchronization tag, wherein the protected valid data N S_x_y N is the actual valid data to be transmitted x_y And with the help of effective data N x_y The generated checksum CRC x_ y is generated.

[0045] Transmit message D seq_x This should be understood as two components exchanging data via a standard data transmission protocol as a "black channel." A black channel here refers to a communication link that is unprotected or incompatible with the application. The integrity of this link is continuously monitored using an overlay data transmission protocol to identify and control transmission errors (such as duplication, loss, out-of-order delivery, distortion, etc.). This is achieved through an overlay data transmission protocol (including additional synchronization markers, redundant transmission of valid data N). x_y And the checksum CRC for redundant transmission x_y This significantly improves the reliability of data transmission when using "black channels".

[0046] Synchronization markers should be understood as distinct sequences of signals clearly identifiable within the transmitted data stream. Using synchronization markers as markers, the transmitted data stream can be subdivided into smaller segments. Therefore, for example, it is possible to synchronize the start and / or end of specific portions of the transmitted data within the data stream, but this is not the only possibility. The design and location of the synchronization markers within the data stream must be known to both components, or must be negotiated and determined when data transmission begins between the two communicating components.

[0047] Checksum CRC x_y This should be understood as something that can be used to verify valid data N. x_y The value of integrity. When using calculation rules, based on valid data N. x_y Or valid data N x_y For a single segment, calculate the number of valid data N. x_y Or it belongs to valid data N x_y The corresponding checksum and CRC of a single segment x_y With the help of this checksum CRC x_y This can reveal the transmission of the valid data N. x_y Specific errors during the process.

[0048] Advantageously, a redundant synchronization mechanism is extended for asynchronous data transmission by adding an additional synchronization marker. This redundant synchronization mechanism is able to achieve the desired result even if the start bit and / or stop bit (which are typically used as a synchronization means during data transmission) are mistransmitted, thus affecting the actual valid data N within the received data stream for the message data Dx_y. x_y Synchronization is performed. This is done by transmitting message D. seq_x Multiple transmissions of the same message data within the same internal system (D x_1 D x_2 , …, D x_y It also improves the ability to receive valid data at least once even if there are transmission errors (N). x_1 , N x_2 , …, N x_y The probability of ). This is achieved by using the protected valid data N. S_x_y Includes checksum and CRC x_y It can also verify the actual valid data N x_y The integrity of the transmission is ensured. Therefore, by using appropriate error correction methods, transmission errors can be revealed and corrected. Furthermore, this is in contrast to sending message data multiple times in independent, consecutive communication cycles. x_y In contrast, sending the same message data multiple times in quick succession (D) x_1 D x_2 …), which can avoid pauses caused by data transmission, thereby further reducing data transmission time t. dtt_xTherefore, through all these measures, improved fault tolerance is achieved while using standard data transmission protocols, while minimizing the total communication cycle time t required for transmission. cct .

[0049] In another advantageous design, the additional synchronization mechanism includes an identification tag, wherein the first and second components are configured to transmit the protected valid data N. S_x_y Subdivided into z protected valid data segments of the same size N S_x_y_z Where, for each protected valid data segment N S_x_y_z Supplementary identification marker, wherein the character length of the synchronization marker is equal to that of a protected valid data segment N, including the identification marker. S_x_y_z The characters have the same length, where N is the protected valid data segment. S_x_y_z The combination of identification tags and synchronization tags is always distinct from the synchronization tags, wherein each protected valid data segment N including the identification tag is... S_x_y_z Each synchronization marker constitutes a data character to be transmitted via asynchronous serial data transmission.

[0050] The identification marker here should be understood as a separate special signal sequence, designed to allow for the protection of potentially valid data segments N. S_x_y_z Any combination of identification markers will never result in a specific signal sequence for synchronization markers. The design of the identification markers and their position within the data characters must be known to both components, or must be negotiated and determined between the two communicating components at the start of data transmission.

[0051] A data character here should be understood as information transmitted within a data frame (usually consisting of a leading start bit and one or more trailing stop bits) during asynchronous serial data transmission. Typically, a data character consists of 5 to 9 individual data bits, but is not limited to this number in principle.

[0052] Advantageously, therefore, within the received data stream, the synchronization marker can be explicitly linked to the protected valid data segment N. S_x_y_z Distinguish them, and with the valid data N to be transmitted. x_y The content is irrelevant.

[0053] In another advantageous design, the first and second components are configured to add identification markers to each individual protected valid data segment N at arbitrary but always constant locations. S_x_y_z In particular, when added in a forward manner, the first and second components are also configured to insert a synchronization marker at least once into the protected valid data N at any arbitrary but always constant location. S_x_yIn each of the , the identification tag consists of one or more logic 0 bits and the synchronization tag consists of only logic 1 bits, or the identification tag consists of one or more logic 1 bits and the synchronization tag S consists of only logic 0 bits.

[0054] Advantageously, in the received transmission message D seq_x Within this region, the synchronization marker is easily detected because it represents the longest and most immutable area of ​​signal state—in other words, a "forced" data interval. This allows the receiver to reconnect with the transmitted message D. seq_x Message data D x_y Start-point synchronization. Ideally, in asynchronous serial data transmission using a logic 0 bit as the start bit, the synchronization marker is formed by only a logic 1 bit, while the optional stop bit is also composed of a logic 1 bit. Correspondingly, when using a logic 1 bit as the start bit, the synchronization marker is formed by only a logic 0 bit, while the optional stop bit is also composed of a logic 0 bit.

[0055] Another advantage here is that, in the multiple direct and closely following transmission of message data D x_y At the same time, synchronization tags are also used to mark each individual message data D. x_y In transmitting message D seq_x The location within is recorded. Therefore, even if the transmission message D is received under interference and / or incorrectly, seq_x Alternatively, it can be located using at least one correctly identified synchronization marker. Ideally, based on the position of the synchronization marker, it can also detect at least the transmission of message D. seq_x The message data D corresponding to the synchronization mark. x_y The starting point and / or ending point, and thus reconstruct the valid data N. x_y itself.

[0056] In another advantageous design, the first and second components are configured to, at least once, protect the valid data N. S_x_y Previously and / or at least once in protected valid data N S_x_y Then insert a synchronization marker.

[0057] Advantageously, this improves the receiver's ability to correctly identify messages in transmission D. seq_x Next message data D x_y The initial probability.

[0058] According to the method for operating a drive system of the present invention, the drive system includes a first component, a second component, and a communication link, wherein, when using asynchronous serial data transmission between the first component and the second component, message data D is transmitted via the communication link in the form of an asynchronous serial data stream. x_yAnd among them, message data D x_y Includes the valid data N to be transmitted x_y and for processing message data D within an asynchronous serial data stream x_y The method involves synchronizing start and / or stop bits. An important feature of this method is that the first and / or second components are valid data N. x_y The sender, wherein, in the first step, the sender obtains data from valid data N. x_y The checksum CRC calculated in x_y Add to valid data N x_y Generate protected valid data N from the middle S_x_y In the second step, the sender transmits protected valid data N. S_x_y To generate protected valid data segments N, the data is divided into z equal segments. S_x_y_z In the third step, the sender uses each protected valid data segment N... S_x_y_z In particular, at least one identification marker is added at any location that remains constant to generate an identifiable, protected, and valid data segment N. SE_x_y_z In the fourth step, the sender, especially at any but always constant location, is in a position comprised of all identifiable protected valid data segments N. SE_x_y_z The data block consists of data segments that precede and / or follow and / or are two immediately adjacent, identifiable, protected valid data segments N. SE_x_y_z Add at least one synchronization flag between them to generate message data D. x_y In the fifth step, the sender transmits n message data D directly and sequentially over time via the communication link, meaning at least two message data transmissions in total. x_y To generate transmission message D seq_x .

[0059] The sender should be understood here as a component that requests data from the second component via the communication link and receives the second component's response via the same communication link. The actual valid data N is simplified by adding additional items with the same structure (i.e., synchronization and identification tags E). x_y Extend additional synchronization mechanisms.

[0060] According to another advantageous design of the method for operating a drive system according to the invention, the drive system includes a first component, a second component, and a communication link, wherein, when using asynchronous serial data transmission between the first component and the second component, message data D is transmitted via the communication link in the form of an asynchronous serial data stream. x_y And among them, message data D x_y Includes the valid data N to be transmitted x_yAnd for processing message data D within an asynchronous serial data stream x_y The start and / or stop bits are used for synchronization. In this design, the first and / or second components are used to transmit message D. seq_x The receiver, wherein, in the first step, receives via a communication link a message containing at least one transmission message D. seq_x The data stream, and the location of these n individual message data D based on the synchronization marker. x_y D x_（y+1） , …, D x_n And separate them from each other, wherein, in the second step, the receiver selects the first message data D. x_y That is, especially the specific choice D. x_1 As the current message data D A In the third step, the receiver removes the current message data D. A The synchronization marker, wherein, in the fourth step, the receiver removes the current message data D. A The z currently protected valid data segments N SA_z The identification markers, wherein, in the fifth step, the receiver identifies all z currently protected valid data segments N. SA_1 , …, N SA_z Merge into currently protected valid data N SA In the sixth step, the receiver obtains the currently protected valid data N. SA Extract the currently valid data N A and the current checksum CRC A In the seventh step, the receiver determines the current checksum and CRC. A Check the current valid data N A The integrity of the data, and, if the verification passes, the currently valid data N is released. A For further use and to discard all subsequently received and duplicate message data D A+1 , …, D x_n Alternatively, if the verification fails, the receiver may discard the currently valid data N. A And if the current message data D A Not the last received message data D x_n Then proceed to the third step, in which the receiver uses the next message data D. A+1 As the current message data D A If the current message data D A It is the last received message data D x_n If this occurs, the driver system will report a communication error.

[0061] The receiver should be understood here as a component that receives a data request from the first component via a communication link, processes the data request, and sends a response back to the first component via the same communication link.

[0062] Communication errors should be understood as all errors that occur during data transmission between two components, where the error (mostly caused by electromagnetic interference radiation) results in the loss of valid data N. x_y The content changes, thus affecting the checksum and CRC of the subordinate. x_y For valid data N x_y The test revealed an error.

[0063] Advantageously, this enables the use of standard data transmission protocols, and consequently, standard data communication interfaces, because the synchronization marker is integrated into the transmitted message D to some extent as quasi-additional "valid data". seq_x Therefore, every standard data transmission protocol can be used as a "black channel." Thus, there are no special requirements for the hardware of the communication interface. Under error-free transmission conditions, only the first message data D is evaluated here. x_1 And discard all redundant subsequent message data D. x_2 , …, D x_y By transmitting each message D seq_x Internally, additionally, and thus redundantly, the message data D is transmitted. x_y Occasional transmission errors can be controlled. Therefore, a constant data transmission time t, reduced to a technically feasible minimum, is achieved. dtt_x To enable data transmission.

[0064] In another advantageous embodiment of the method according to the invention, multiple transmission messages D are sent sequentially in time during a communication cycle. seq_x (That is to say, D) seq_1 D seq_2 , …, D seq_x ).

[0065] Advantageously, this allows for the transmission of a different set of valid data N during a single communication cycle. 1_y , N 2_y , …,N x_y Within this group, valid data differs in priority or importance within the driving system. It is reasonable to send the highest-priority valid data first. Similarly, valid data requiring very time-consuming processing should also be assigned high priority.

[0066] In the method for operating the drive system (1) comprising the first component (2), the second component (3), and the communication link (4), it is important that the communication link (4) is configured to utilize asynchronous serial data transmission, particularly with a constant data transmission time t shortened to a technically feasible minimum. dtt_x Transmit message data D between the first component (2) and the second component (3) x_y ,

[0067] Among them, message data D x_y The asynchronous serial data stream includes the valid data N to be transmitted. x_y ,

[0068] Among them, each message data D x_y It is transmitted two or more times sequentially in time.

[0069] Among them, each message data D x_y It has at least one synchronization mark S, followed by one or more protected valid data segments N, each containing a preceding identification mark E. S_x_y_z ,

[0070] In particular, the protected valid data segment N S_x_y_z Each of the N in the data is the actual valid data to be transmitted. x_y And with the help of effective data N x_y The generated checksum CRC x_y constitute,

[0071] Among them, each protected valid data segment N S_x_y_z The duration of the corresponding preceding identification marker E is always equal to and / or equivalent to the corresponding message data D. x_y The duration of the synchronization marker S.

[0072] The advantage here is that it ensures reliable and fast asynchronous serial transmission of valid data, in which fault-tolerant data transmission with a constant, shortened maximum cycle time can be achieved.

[0073] Further advantages are given by the dependent claims. The invention is not limited to the combination of features of the claims. For those skilled in the art, particularly for purposes proposed and / or proposed by comparison with the prior art, other reasonable combinations of features of the claims and / or individual claims and / or description features and / or drawings are possible. Attached Figure Description

[0074] The invention will now be described in detail with reference to the schematic diagram: Detailed Implementation

[0075] Figure 1An exemplary embodiment illustrates a communication cycle for asynchronous serial data transmission according to the present invention, in which valid data N is exchanged between a first component (2) and a second component (3) via a communication link (4) within the drive system (1). x_y Here, a single valid data point N is labeled with "x". x The index is labeled with "y" to indicate the same single valid data N. x An index of the possible number of repetitions.

[0076] This figure shows exactly one communication cycle, in which the first component (2) first transmits the first valid data N. 1_y (Especially including data requests) sent to the second component (3). As a response to the first valid data N 1_y In response, the second component (3) reacts, and in particular, as a data response to the received data request, sends the second valid data N. 2_y Send back to the first component (2). Here, the duration required for one communication cycle, that is, the communication cycle time t, is... cct It can be divided into: the processing time t of the first component (2) pt_1 Especially for generating the first valid data N 1_y Data transmission time t dtt_1 Especially for the first valid data N 1_y Transfer from the first component (2) to the second component (3); the processing time t of the second component (3) pt_2 Especially for processing the first valid data N 1_y and the data used to generate the second valid data N 2_y ; and data transmission time t dtt_2 Especially for transferring valid data N 2_y Transfer from the second component (3) to the first component (2).

[0077] Similarly, it is conceivable that the second component (3) will transfer the first valid data N 1_y (In particular, including data requests) are sent to the first component (2), and as a response to the first valid data N 1_y In response, the first component (2) reacts to this, and in particular, as a data response to the received data request, sends the second valid data N. 2_y Send back to the second component (3).

[0078] exist Figure 2In this example, as a feasible prior art, an exemplary time process of exactly one communication cycle is shown, wherein the time process proceeds from top to bottom. A drive system (1) is depicted, comprising a first component (2), a second component (3), and a communication link (4), wherein the first component (2) and the second component (3) exchange valid data N without interference via the communication link (4). x_y Here, each of components (2) or (3) has only one fixed time period t. dtt_1 or t dtt_2 It can be used to transmit valid data N 1_1 or N 2_1 In order to transmit valid data, a request-response method or a request-reply method may be conceived here, in which the first component (2) and the second component (3) communicate with each other bidirectionally, wherein, exemplary, the first component (2), as the sender, first requests data with valid data N. 1_1 The data is transmitted to the second component (3) in the form of a data request, and the second component (3), as the receiver, processes the data request and, in response to the data request from the first component (2), sends the desired valid data N. 2_1 The receiver typically generates and sends a transmission acknowledgment to the sender, informing them whether the transmission was successful (Ack) or unsuccessful (nAck).

[0079] It is conceivable that for valid data N x_y Asynchronous serial transmission is performed, in which a start bit and at least one stop bit are used to enable the receiver to select the valid data N to be transmitted. x_y Synchronization is performed on individual transmission segments. Here, most of the valid data N... x_y The data is further subdivided into smaller segments, known as valid data segments. Here, the start bit and stop bit typically always have the same, but distinct, logic levels. Typically, the start bit is sent before the valid data segment to be transmitted, while the stop bit is sent immediately after it.

[0080] Asynchronous serial communication can also be envisioned, in which the effective data N x_y The sending and receiving are staggered in time and occur without any blocking of communication processes (such as blocking due to waiting for a reply from the data requester). Here, the response time t r(That is, the time elapsed from generating a data request until receiving a response) is variable. The problem here is that erroneous and therefore unrecognized start and / or stop bits may cause synchronization errors, thus the relevant valid data segments transmitted can no longer be reconstructed, and thus the first component (2) will fail at the periodic time t. cct No valid response was received. Data can only be retransmitted in the next cycle; therefore, the valid data N is [missing information]. x_y The total time for complete and error-free transmission has increased significantly.

[0081] Below, in Figure 3 The diagram illustrates a feasible prior art in which, during a communication cycle, not only the first valid data N from the first component (2) to the second component (3) is transmitted... 1_y The transmission, and the second valid data N from the second component (3) to the first component (2). 2_y The transmission is initially erroneous. Possible causes of data transmission errors include electromagnetic interference radiation, capacitive and / or inductive coupling on the communication link (4), burst pulses, surge pulses, and / or soft errors. The received corresponding valid data N is then processed. x_y The component first checks the integrity of the valid data (ChkOK?), and then sends back valid data N to the sending component. x_y Whether it has been received correctly, i.e., received (Ack) or not received (nAck). Subsequently, in the received valid data N... x_y In case of an error, the transmitting component is required to retransmit valid data N. x_y .

[0082] For simplicity, the time taken for valid data to be sent from the first component (2) to the second component (3) will be denoted as t. dq The time taken for the second component (3) to feed back the integrity (Ack or nAck) to the first component (2) is denoted as t. dqa The time taken to send valid data from the second component (3) to the first component (2) is marked as t. dr The time taken to feed back the integrity (ChkOK or ChkNOK) from the first component (2) to the second component (3) is denoted as t. dra .

[0083] Based on Figure 3 The example shown contains valid data N, which was transmitted erroneously twice. 1_1 and N 1_2 The communication cycle is used to determine the duration t. dtt_1 for:

[0084] .

[0085] Additionally, here we also see two instances of erroneously transmitted valid data N. 2_1 and N 2_2 From this, the duration t is obtained. dtt_2 for:

[0086] .

[0087] also, Figure 3 This shows that it is necessary to implement the request phase t of data communication. dtt_1 Or response phase t dtt_2 Within the system, an acknowledgment (Ack or nAck) can also be sent back. This means that, especially in the case of a shared communication medium (i.e., when the same communication link (4) is used for both sending and receiving), the direction of transmission can be switched. Furthermore, the component receiving the acknowledgment must also be able to process the acknowledgment so that it can promptly retransmit erroneous valid data if necessary. This method proves particularly disadvantageous in systems where a direct response to received messages is not possible, because received messages can only be processed at specific points in time (e.g., in systems employing a time-slot method).

[0088] Figure 4 The communication cycle of two components (2) and (3) of the drive system (1) according to the present invention is shown, with Figure 2 In contrast, the data transmission strategy during this communication cycle includes transmitting the valid data N... x_y They are concatenated directly and in a manner that is repeated at least once. Here, from the representative valid data N... x_y The sending component transmits the valid data N. x_y The transmission of another component at the receiving end is carried out in such a way that the receiving end does not transmit valid data N to the sending end. x_y A confirmation of receipt or a receipt sent. Figure 4 The example illustrates an error-free communication cycle in which the first component (2) transmits valid data N directly and sequentially a total of three times. 1_y Transmitted to the second component (3), specifically as valid data N 1_1 N 1_2 and N 1_3 In the form of. Here, in the reception check of the second component (3), the first valid data N 1_1 It was identified as error-free (ChkOK). Immediately afterwards, the second component (3) directly began processing the valid data N. 1_1 Other valid data N transmitted redundantly 1_2 and N 1_3 Although it was accepted, it was discarded because valid data N already existed. 1_1 .

[0089] The processing time t of the second component (3) pt_2 Then, the second component again directly and sequentially transmits three valid data points N in time. 2_1 N 2_2 and N 2_3 The data is sent back to the first component (2) as a reply. As another variation of the data transmission according to the invention, the first component (2) now first receives all three transmitted valid data N. 2_1 N 2_2 and N 2_3 And after a certain waiting time t wait Next, it checks whether one of the received valid data points is usable. Figure 4 In the current example, the first valid data N 2_1 It is already available. Therefore, the response to the first component (2) is now available for further processing.

[0090] Figure 5 The communication cycle of two components (2) and (3) of the drive system (1) according to the present invention is shown, which adopts the same as Figure 4 The same strategy is shown, however, interference occurred on the communication link (4) during this communication cycle. The first component (2) directly and successively transmits the valid data N three times in time. 1_y Transmitted to the second component (3). Figure 5 In the example, valid data N 1_1 and N 1_2 The transmission was incorrect. This was identified by the second component (3) (ChkNOK), and subsequently, valid data N was lost. 1_1 and N 1_2 Deprecated. Finally, the third valid data N can be received without errors. 1_3 This is recognized by the second component (3) (ChkOK), and then the valid data N is used on the second component (3). 1_3 Subsequent processing begins under these conditions. At processing time t... pt_2 Subsequently, the second component (3) will again reply with valid data N three times in a direct sequence in time. 2_y It is sent back to the first component (2) in the form of... Figure 5 In the current example, the valid data N 2_1 and N 2_2 There is an error again. The first component (2) identifies (ChkNOK) N. 2_1 and N 2_2 The transmission was erroneous and was discarded. Valid data N 2_3 It can be identified as error-free (ChkOK) and ultimately used in the reply.

[0091] Figure 5 It shows the relationship with Figure 3 A direct comparison. It can be clearly seen that, using the data transmission according to the present invention, time t... dtt_1 and t dtt_2 This significantly shortens, and consequently increases, the processing time t for the second component (3). pt_2 An additional advantage is that, with Figure 3 Different, in t dtt_1 and t dtt_2 During the time process, the communication direction no longer needs to be switched. Therefore, for N data points that can only be processed at fixed points in time... x_y For the system, Figure 5 The method shown has proven to be advantageous.

[0092] Figure 6 This shows how to improve the effective data N x_y Availability (that is, error-free transmission of valid data N) x_y The first step is performed based on the probability of the specific valid data N to be sent. x_y First, by using appropriate mathematical calculation rules, from the effective data N x_y Calculate the checksum CRC x_y Here, the valid data N to be sent is... x_y With the calculated checksum CRC x_y Together they constitute protected valid data N S_x_y In the next step, the protected valid data N will be... S_x_y Subdivided into z protected valid data segments of the same size N S_x_y_z .

[0093] like Figure 7 As illustrated in the example, in the latter step, for each individual protected valid data segment N S_x_y_z Supplement at least one identification marker E. Here, each protected valid data segment N S_x_y_z Combined with at least one identification tag E, it forms an identifiable protected valid data segment N. SE_x_y_z . For example Figure 7 As shown, the identification tag E can be placed in the protected valid data segment N. SE_x_y_z Previously. However, in principle, the location of the identification marker E is not limited to this possibility. More precisely, the identification marker E can also be integrated into the protected valid data segment N. S_x_y_z Subsequently, it may be integrated into the protected valid data segment N. S_x_y_z The synchronization marker S can be located at any position within the protected data segment N, and multiple combinations are allowed. However, it must be ensured that the synchronization marker S always has a character length equivalent to the protected valid data segment N. S_x_y_zThe character length is the sum of the character lengths of all inserted identification tags E. Ideally, identification tag E consists of one or more logic 0 bits, and synchronization tag S consists of only logic 1 bits. An implementation where identification tag E consists of one or more logic 1 bits, and synchronization tag S consists of only logic 0 bits, is also conceivable. Therefore, in the received transmission message D... seq_x The synchronization marker S is easily detected because the synchronization marker is the longest region and the signal state cannot be changed.

[0094] exist Figure 8 This illustrates one possible implementation of data transmission according to the present invention. Here, by means of a data sequence (transmission message D) seq_x To send the valid data N to be transmitted. x_y In the current situation, valid data N is transmitted directly and sequentially twice. x_y The valid data is packaged into two identical message data Ds. x_1 and D x_2 Inside. Here, the corresponding message data D x_y The representative has valid data N extended with the additional synchronization mechanism according to the present invention. x_y Here, message data D x_y Each of these consists of at least one synchronization marker S and a protected valid data segment N. S_x_y_z This consists of all inserted identification tags E. Later, all protected valid data segments N will be... S_x_y_z Merge into protected valid data N S_x_y By protecting valid data N S_x_y Split into actual valid data N x_y Checksum and CRC x_y And by using checksums and CRC x_y Valid data N x_y The integrity of the data allows for the reconstruction of the actual valid data N. x_y If message data D is transmitted during data transmission... x_y If one of the distortions makes it impossible to reconstruct it accurately, then the valid data N contained within it is lost. x_y It also contains errors and is therefore usually discarded. Only when all message data D is transmitted... x_y (according to Figure 8 Specifically, it refers to two message data D. x_1 and D x_2 ) cannot reconstruct valid data N x_y (according to Figure 8 It is specific, valid data N x_1 and N x_2 When ), the drive system (1) reports a communication error F.

[0095] Figure 9 Another design scheme for data transmission according to the present invention is shown. Figure 8 The difference lies in the data D of each message. x_y Multiple synchronization markers S are used. Here, not only in the first protected valid data segment N... S_x_y_1 Previously, and directly in the last protected valid data segment N S_x_y_z Afterwards, a synchronization marker S is inserted. Furthermore, each synchronization marker S is directly repeated at least once. Therefore, reliable communication with message data D is improved even when the communication link (4) is severely interfered with. x_y The probability of synchronization is increased, thereby further improving the overall effectiveness of N data. x_y Availability at the receiving end.

[0096] Figure 10 This illustrates another design scheme for data transmission according to the present invention, in which message data D x_ y is repeated three times, where, in all three message data D x_1 D x_2 and D x_3 In all cases, it is only directly in the last protected valid data segment N. S_x_1_z N S_x_2_z or N S_x_y_z Then insert a synchronization marker S in each case.

[0097] exist Figure 11 Finally, a drive system (1) in which data transmission according to the invention is applied multiple times is shown. Here, the exemplary drive system (1) includes a frequency converter (5) on one hand and a drive unit (6) on the other, which exchange valid data bidirectionally, especially via coaxial cable, optical waveguide or radio connection, by means of their communication devices (7) and (8) via an external communication link (11). The frequency converter (5) itself has a first component (2a), which acts as a master component and uses valid data N itself. a_1_y A request is sent to the slave component. As a first component (2a), for example, a monitoring unit, especially a safety-oriented monitoring unit, can be envisioned. The drive unit (6) itself has a second component (3b), which, for example, acts as a slave component and uses valid data N. b_1_y Send back a response N to the request to the master component. b_2_y The first component ultimately serves as valid data N. a_2_yThe reply is received. As a second component (3b), for example, a sensor unit for detecting at least one physical variable, especially a safety-oriented sensor unit, can be envisioned. Here, the first component (2a) first communicates with the second component (3a) located in the frequency converter by means of data transmission according to the invention. The second component (3a) organizes the received valid data N. a And, by means of an internal communication link (9), the received data is forwarded to the communication device (7). The communication device (7) first collects the valid data from multiple internal components (in Figure 11 Specifically, the valid data N to be transmitted is collected from components (3a) and (12). a and N c The valid data stream is then transmitted to the communication device (8) of the drive unit (6) via synchronous time-division multiplexing. From there, the received valid data stream is re-divided into individual valid data N components by appropriate demultiplexing processing. a or N c (Now referred to as valid data N) b or N d Next, using the internal communication link (10) of the drive unit (6), the valid data N is transmitted. b Forwarded to the first component (2b), so that it can be transmitted from there to the second component (3b) of the drive unit (6), the actual SLAVE component, via a communication link (4b) according to another data transmission according to the invention. Figure 11 In this case, for example, the valid data N d Forwarded to another component (13) for further processing. The transmission of the reply from the second component (3b) and (if present) the reply from component (13) uses the same transmission path, but in reverse order.

[0098] The time-division multiplexing method should be understood here as a method in which, within a fixed time period, valid data of different components (3a), (2b), (12) and (13) are transmitted via a common communication link (11), which in the current case is valid data N. a N b N c and N d .

[0099] In the synchronous time-division multiplexing method, a fixed time period is allocated to each component by a multiplexer for transmitting its valid data. This has the advantage that each component can exchange valid data at a constant data transmission rate. However, the valid data to be transmitted must be known early enough by the communication device (7) or (8) to be transmitted within the time window set for it. Otherwise, either the next time window must be waited for, or the valid data must be discarded. With the synchronous time-division multiplexing method, the valid data of a component can be identified by its position within the valid data stream transmitted on the communication link (11), which has the advantage of reducing the complexity of demultiplexing the valid data stream.

[0100] Furthermore, it is conceivable to combine synchronous time-division multiplexing (TDM) with asynchronous TDM. In asynchronous TDM, a multiplexer allocates the next idle time slot for transmitting valid data to each component. This has the advantage of optimizing the data transmission rate of the communication link. Therefore, for example, a specific time slot can always be fixedly allocated to only one component, with the remaining time slots allocated to the other components. This has the advantage that the component with the fixed allocated time slot can exchange its time-critical valid data at a guaranteed and constant data transmission rate, while optimizing the data transmission rate of the remaining components.

[0101] Furthermore, it is conceivable that the second component (3a) of the inverter (5) and the communication device (7) of the inverter (5), or the first component (2b) of the drive unit (6) and the communication device (8) of the drive unit (6), are integrated into a single electronic component, particularly implemented in a single FPGA. Furthermore, it is conceivable that the first component (2a) of the inverter (5) can be plugged into and connected to the inverter (5), and / or the second component (3b) of the drive unit (6) can be plugged into and connected to the drive unit (6). Therefore, different variations of the first component (2a) and / or the second component (3b) can be manufactured and combined with each other, thereby realizing a modular system of the drive system (1).

[0102] Through such Figure 11 The data transmission according to the invention, as exemplarily shown, is used in both the inverter (5) and the drive unit (6). In this case, the data transmission between the master component and the slave component can be optimized such that the time savings obtained by minimizing the data transmission time between the first component (2a) and the second component (3a) and by minimizing the data transmission time between the first component (2b) and the second component (3b) are used to improve the availability of the communication link (11) by appropriate measures (especially by message duplication).

[0103] exist Figure 12 The diagram illustrates another design for data transmission according to the present invention, wherein the drive system (1) includes a first component (2), a second component (3), a communication link (4), and another component (14). Here, the first component (2) first requests its data via the communication link (4) with specific valid data N. 1_y The data is sent to the second component (3) in the form of N. At this time, the other component (14) is also capable of receiving the transmitted valid data N. 1_y Redundancy assessment is performed on it. In addition, the other component (14) is capable of exchanging information with the second component (3) via a separate communication link.

[0104] Now, if the second component (3) and the other component (14) receive valid data N 1_y Then these two components (3) and (14) first independently evaluate the valid data N. 1_y Furthermore, each of the two components (3) and (14) generates an independent data response, or at least a portion thereof. Then, the other component (14) transmits its calculated data response or a portion thereof to the second component (3). Subsequently, the second component (3) compares the data response or a portion thereof transmitted by the other component (14) with its own calculated data response and performs a validity check. If the two data responses are consistent, the second component (3) forms valid data N from the combination of the two data responses. 2_y The data is then sent back to the first component (2) as a response. If there is a discrepancy between the calculated data responses from the second component (3) and another component (14), the transmission of valid data N is prohibited. 2_y As a further result, the driving system (1) reports a communication error F because the first component (2) did not receive any valid data N as a reply within the expected time window. 2_y .

[0105] The following list of reference numerals is included in the specification:

[0106] List of reference numerals

[0107] 1 Drive System

[0108] 2 First component

[0109] 3 Second Component

[0110] 4 Communication Links

[0111] 5 frequency converters

[0112] 6 drive units

[0113] 7. External communication device inside the frequency converter

[0114] External communication device within the 8 drive unit

[0115] Internal communication link in 9 frequency converters

[0116] Internal communication link in the 10 drive unit

[0117] 11. External communication link between the frequency converter and the drive unit

[0118] Other components of the 12 frequency converter

[0119] Other components of the 13 drive unit

[0120] 14 Other components

[0121] Ack confirms that the received data is valid and correct.

[0122] ChkNOK rejects received valid data.

[0123] ChkOK confirms that the data has been received correctly.

[0124] CRC A Current checksum

[0125] CRC x_y Checksum

[0126] D A Current message data

[0127] D A+1 Next current message data

[0128] Data length of one of the DL message data

[0129] DR data transfer rate

[0130] D seq_x Transmitting messages

[0131] D x D x_y Message data

[0132] D x_n Transmit message D seq_x The last message data D x_y

[0133] D x_（y+1） Next message data

[0134] E Identification Mark

[0135] F Communication Error

[0136] FR error rate

[0137] N A Current valid data

[0138] N a N b N c N d Valid data for specific components

[0139] N a_x_y Valid data on the communication link (4a) within the frequency converter

[0140] N b_x_y Valid data on the communication link (4b) within the drive unit

[0141] N SA Currently protected valid data

[0142] N SA_z Currently protected valid data segment

[0143] N S_x_y Protected valid data

[0144] N S_x_y_z Protected valid data segment

[0145] N SE_x_y_z Identifiable protected valid data segment

[0146] N x N x_y Valid data

[0147] n is the number of message data repeated multiple times within the transmitted message.

[0148] nAck confirmed a message indicating that valid data was received incorrectly.

[0149] S Synchronization Mark

[0150] t a_dtt_x t b_dtt_x Data transmission time of specific components

[0151] t cct Communication cycle time (communication cycle time)

[0152] t chk_x Inspection time (inspection time)

[0153] t dq Request transfer time (data query time)

[0154] t dqa Request confirmation of transmission time (data query confirmation time)

[0155] t drResponse transmission time (data response time)

[0156] t dra Response confirmation transmission time (data response confirmation time)

[0157] t dtt_x t dtt_1 t dtt_2 Data transmission time (data transmission duration)

[0158] t pd Travel time delay (travel time delay)

[0159] t pt t pt_x t pt_1 t pt_2 Processing time

[0160] t r Response time

[0161] t s Sending time (Sending time)

[0162] t wait Waiting time (waiting time)

[0163] x is used to index a single valid data N x variables

[0164] y is used to index the same single valid data N x Or message data D x The variable of possible repetitions

[0165] z is used to index a single protected valid data segment N. S variables

[0166] The mathematical floor function, where

[0167]

Claims

1. A drive system (1) comprising a first component (2), a second component (3), and a communication link (4), wherein the drive system (1) is configured to, In the case of using asynchronous serial data transmission between the first component (2) and the second component (3), message data D is transmitted via communication link (4) in the form of an asynchronous serial data stream. x_y , Furthermore, message data D x_y Includes the valid data N to be transmitted x_y and for processing message data D within an asynchronous serial data stream x_y Start and / or stop bits for synchronization. Its features are, Message Data D x_y It was transmitted multiple times and directly and sequentially in time. Among them, message data D x_y Including additional synchronization mechanisms, and Among them, the effective data N x_y The time required for error-free transmission, i.e., the data transmission time t. dtt_x It has been shortened to the minimum.

2. The drive system (1) according to claim 1, wherein, According to the message data D to be transmitted multiple times and directly and sequentially in time. x_y Quantity n, data transmission time t dtt_x D consisting of n identical message data being sent. x_1 ... D x_n Sending time t s The sum, travel time delay t pd and inspection time t chk The conclusion is as follows.

3. The drive system (1) according to claim 1, wherein, According to the message data D to be transmitted multiple times and directly and sequentially in time. x_y Quantity n, data transmission time t dtt_x D consisting of n identical message data being sent. x_1 ... D x_n Sending time t s The sum, travel time delay t pd Inspection time t chk The sum, and the waiting time t wait The conclusion is as follows.

4. The drive system (1) according to claim 2 or 3, wherein, Sending time t s From a single message data D x_y Data length DL and transmitted message data D x_y The data transfer rate DR is used as the quotient.

5. The drive system (1) according to claim 4, wherein, The quantity n is derived from the data length DL, data transmission rate DR, and maximum error rate FR.

6. The drive system (1) according to claim 5, wherein, The quantity n is derived from the following mathematical relationship: 。 7. The drive system (1) according to any one of the preceding claims. in, The drive system (1) has a maximum communication cycle time t cct Communication cycle, The communication cycle includes the following process: The first component (2) transmits the valid data N 1_y The data is transmitted to the second component (3), and then the second component (3) transmits the valid data N. 2_y Send to the first component (2). Among them, the communication cycle time t cct The processing time t of the first component (2) pt_1 Data transmission time t dtt_1 The processing time t of the second component (3) pt_2 and data transmission time t dtt_2 composition.

8. The drive system (1) according to claim 7, wherein, Once valid data N is used as a response to a previously made request. 2_y Not within the maximum communication cycle time t cct The system is waiting for the valid data N. 2_y If the error occurs at component (2) or (3), then the waiting component (2) or (3) reports a communication error F to the drive system (1).

9. The drive system (1) according to claim 7 or 8. in, The additional synchronization mechanism includes at least one synchronization flag S. The first component (2) and / or the second component (3) are configured to transmit message data D, which is to be transmitted multiple times and sequentially in time, in a direct and sequential manner. x_y Merged into transmission message D seq_x , Among them, message data D x_y Including protected valid data N S_x_y and the at least one synchronization tag, Among them, the protected valid data N S_x_y N is the actual valid data to be transmitted x_y And with the help of effective data N x_y The generated checksum CRC x_ y is generated.

10. The drive system (1) according to claim 9. in, The additional synchronization mechanism includes an identification marker E. The first component (2) and the second component (3) are configured to store the protected valid data N. S_x_y Subdivided into z protected valid data segments of the same size N S_x_y_z , Where, for each protected valid data segment N S_x_y_z Supplementary identification marker E, The character length of the synchronization marker S is equal to the length of a protected valid data segment N, which includes the identification marker E. S_x_y_z The characters have the same length. Among them, the protected valid data segment N S_x_y_z The combination of the identification tag E and the synchronization tag S is always distinct from the synchronization tag S. Each of the protected valid data segments N includes the identification marker E. S_x_y_z Each synchronization marker S constitutes a data character to be transmitted via asynchronous serial data transmission.

11. The drive system (1) according to claim 10. in, The first component (2) and the second component (3) are configured to add an identification mark E to each individual protected valid data segment N at any arbitrary but always constant location. S_x_y_z In particular, adding via the front-end method, The first component (2) and the second component (3) are also configured to insert the synchronization marker S into the protected valid data N at least once at any but always constant location. S_x_y In each of them, The identification tag E consists of one or more logic 0 bits, and the synchronization tag S consists of only logic 1 bits. Alternatively, the identification tag E consists of one or more logic 1 bits, and the synchronization tag S consists of only logic 0 bits.

12. The drive system (1) according to claim 11, wherein, The first component (2) and the second component (3) are configured to, at least once, in the protected valid data N S_x_y Previously and / or at least once in protected valid data N S_x_y Then insert the synchronization marker S.

13. A method for operating a drive system (1), particularly a drive system (1) according to any one of claims 10 to 12, in, The drive system (1) includes a first component (2), a second component (3), and a communication link (4). In the case of using asynchronous serial data transmission between the first component (2) and the second component (3), message data D is transmitted via communication link (4) in the form of an asynchronous serial data stream. x_y , And among them, message data D x_y Includes the valid data N to be transmitted x_y and for processing message data D within an asynchronous serial data stream x_y Start and / or stop bits for synchronization. Among them, the first component (2) and / or the second component (3) are valid data N. x_y The sender, Among them, First step In this process, the sender transmits valid data N. x_y Calculated checksum CRC x_y Add to valid data N x_y Generate protected valid data N from the middle S_x_y , Among them, Second step In this process, the sender transmits protected valid data N. S_x_y To generate protected valid data segments N, the data is divided into z equal segments. S_x_y_z , Among them, Third step In this process, the sender transmits data through each protected valid data segment N. S_x_y_z In particular, at least one identification marker E is added at any but constant location to generate an identifiable protected valid data segment N. SE_x_y_z , Among them, Fourth step In this process, the sender, especially at any but always constant location, within all identifiable protected valid data segments N, SE_x_y_z The data block consists of data segments that precede and / or follow and / or are two immediately adjacent, identifiable, protected valid data segments N. SE_x_y_z Add at least one synchronization flag S between them to generate message data D. x_y , Among them, Fifth step In this process, the sender transmits n message data D directly and sequentially in time via the communication link (4), that is, at least two message data in total. x_y To generate transmission message D seq_x .

14. A method for operating a drive system (1), particularly a drive system (1) according to any one of claims 10 to 12, in, The drive system (1) includes a first component (2), a second component (3), and a communication link (4). In the case of using asynchronous serial data transmission between the first component (2) and the second component (3), message data D is transmitted via communication link (4) in the form of an asynchronous serial data stream. x_y , And among them, message data D x_y Includes the valid data N to be transmitted x_y And for processing message data D within an asynchronous serial data stream x_y Start and / or stop bits for synchronization. Among them, the first component (2) and / or the second component (3) are for transmitting message D. seq_x The recipient, Among them, First step In the process, the receiver receives a transmission message D containing at least one transmission message via the communication link (4). seq_x The data stream, and locates n individual message data D according to the synchronization mark S. x_y D x_（y+1） , …, D x_n and separate them from each other. Among them, Second step In the process, the receiver selects the first message data D. x_y That is, especially the specific choice D. x_1 As the current message data D A , Among them, Third step In the middle, the receiver removes the current message data D. A Synchronization marker S, Among them, Fourth step In the middle, the receiver removes the current message data D. A The z currently protected valid data segments N SA_z The identification mark E, Among them, Fifth step In the process, the receiver will allocate all z currently protected valid data segments N SA_1 , …, N SA_z Merge into currently protected valid data N SA , Among them, Step Six In the process, the receiver obtains the currently protected valid data N. SA Extract the currently valid data N A and the current checksum CRC A , Among them, Step 7 In the process, the receiver uses the current checksum and CRC. A Check the current valid data N A The integrity, and Alternatively, if the verification passes, release the currently valid data N. A For further use and to discard all subsequently received and duplicate message data D A+1 , …, D x_n , Alternatively, if the verification fails, the receiver may discard the currently valid data N. A , And or if the current message data D A Not the last received message data D x_n Then Third step continue, The receiver uses the next message data D. A+1 As the current message data D A , Or if the current message data D A It is the last received message data D x_n If so, the drive system (1) will report a communication error.

15. The method for operating the drive system (1) according to claim 13 or 14, wherein, During a communication cycle, multiple transmission messages D are sent sequentially in time. seq_x (That is to say, D) seq_1 D seq_2 , …, D seq_x ).

16. A method for operating a drive system (1) comprising a first component (2), a second component (3), and a communication link (4), in, The communication link (4) is constructed for use with the aid of asynchronous serial data transmission, in particular with a constant data transmission time t that is shortened to a technically feasible minimum. dtt_x Transmit message data D between the first component (2) and the second component (3) x_y , Among them, message data D x_y The asynchronous serial data stream includes the valid data N to be transmitted. x_y , Among them, all message data D x_y It is transmitted two or more times sequentially in time. Among them, all message data D x_y It has at least one synchronization mark S, followed by one or more protected valid data segments N, each containing a preceding identification mark E. S_x_y_z , In particular, the protected valid data segment N S_x_y_z Each of the N in the data is the actual valid data to be transmitted. x_y And with the help of effective data N x_y The generated checksum CRC x_y constitute, Among them, each protected valid data segment N S_x_y_z The duration of the corresponding preceding identification marker E is always equal to and / or equivalent to the corresponding message data D. x_y The duration of the synchronization marker S.

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