Semiconductor device

Abstract

The semiconductor device of the embodiment includes: a nitride semiconductor layer; a first insulating film disposed on the nitride semiconductor layer; a first electrode located on the first insulating film and electrically connected to the nitride semiconductor layer; a second electrode located on the nitride semiconductor layer and electrically connected to the nitride semiconductor layer; a third electrode having a first portion and a second portion, the first portion being located on the nitride semiconductor layer and electrically connected to the nitride semiconductor layer, the second portion being located on the first portion, and the length of the second portion in the first direction, i.e., the direction in which the first electrode and the second electrode are arranged, being longer than the length of the first portion in the first direction; and a second insulating film disposed on the nitride semiconductor layer and in contact with the surface of the first portion facing the first electrode side and the surface of the second portion facing the nitride semiconductor layer side.

Description

Technical Field

[0001] Embodiments of the present invention relate to a semiconductor device. Background Technology

[0002] Semiconductor components such as transistors and diodes are used in circuits such as switching power supplies and inverters. These semiconductor components require high voltage withstand capability and low on-resistance. Moreover, there is a trade-off between voltage withstand capability and on-resistance determined by the component material.

[0003] With advancements in technology, semiconductor devices have achieved on-resistance levels approaching the limits of silicon, the primary material for these devices. To further improve voltage withstand capability or further reduce on-resistance, changes in device materials are necessary. By using nitride semiconductors such as gallium nitride and aluminum gallium nitride as the material for semiconductor devices, the trade-offs determined by the material can be improved. Therefore, leaps in high voltage withstand capability and low on-resistance can be achieved for semiconductor devices.

[0004] Existing technical documents Patent documents Patent Document 1: Japanese Patent No. 6270572 Patent Document 2: Japanese Patent No. 6879662 Summary of the Invention

[0005] The technical problem that the invention aims to solve The problem to be solved by the present invention is to provide a semiconductor device with excellent properties.

[0006] Technical solutions for solving technical problems The semiconductor device of the embodiment includes: a nitride semiconductor layer; a first insulating film disposed on the nitride semiconductor layer; a first electrode located on the first insulating film and electrically connected to the nitride semiconductor layer; a second electrode located on the nitride semiconductor layer and electrically connected to the nitride semiconductor layer; a third electrode having a first portion and a second portion, the first portion being located on the nitride semiconductor layer and electrically connected to the nitride semiconductor layer, the second portion being located on the first portion, and the length of the second portion in the first direction, i.e., the direction in which the first electrode and the second electrode are arranged, being longer than the length of the first portion in the first direction; and a second insulating film disposed on the nitride semiconductor layer and in contact with the surface of the first portion facing the first electrode side and the surface of the second portion facing the nitride semiconductor layer side. Attached Figure Description

[0007] Figure 1 This is a schematic diagram of a semiconductor device according to an implementation method.

[0008] Figure 2 This is a schematic diagram of a semiconductor device according to an implementation method.

[0009] Figure 3 This is a schematic diagram of a semiconductor device according to an implementation method.

[0010] Figure 4 This is a schematic diagram of a semiconductor device according to an implementation method.

[0011] Figure 5 This is a schematic diagram of a semiconductor device according to an implementation method.

[0012] Figure 6 This is a schematic diagram of a semiconductor device according to an implementation method.

[0013] Figure 7 This is a schematic diagram of a semiconductor device according to an implementation method.

[0014] Figure 8 This is a schematic diagram of a semiconductor device according to an implementation method.

[0015] Figure 9 This is a schematic diagram of a semiconductor device according to an implementation method.

[0016] Figure 10 This is a schematic diagram of a semiconductor device according to an implementation method.

[0017] Figure 11 This is a schematic diagram of a semiconductor device according to an implementation method.

[0018] Figure 12 This is a schematic diagram of a method for manufacturing a semiconductor device according to an embodiment.

[0019] Figure 13 This is a schematic diagram of a method for manufacturing a semiconductor device according to an embodiment.

[0020] Figure 14 This is a schematic diagram of a method for manufacturing a semiconductor device according to an embodiment.

[0021] Figure 15 This is a schematic diagram of a method for manufacturing a semiconductor device according to an embodiment.

[0022] Figure 16 This is a schematic diagram of a method for manufacturing a semiconductor device according to an embodiment.

[0023] Figure 17 This is a schematic diagram of a method for manufacturing a semiconductor device according to an embodiment. Detailed Implementation

[0024] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. Furthermore, in the following description, the same or similar components will be labeled with the same reference numerals, and for components that have been described once, their description may be omitted.

[0025] In this specification, "nitride semiconductor layer" includes "GaN-based semiconductor". "GaN-based semiconductor" is a general term for gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), and semiconductors with intermediate compositions thereof.

[0026] In this specification, "undoped" means an impurity concentration of 2 × 10⁻⁶. 16 cm -3 the following.

[0027] In this specification, to indicate the positional relationship of components, the upper direction in the drawings is described as "upper," and the lower direction in the drawings is described as "lower." In this specification, the concepts of "upper" and "lower" do not necessarily refer to their relationship with the direction of gravity.

[0028] (First Implementation) The semiconductor device of the first embodiment includes a nitride semiconductor layer 1 comprising a substrate 1A, a buffer layer 1B, a channel layer 1C (first nitride semiconductor layer), and a barrier layer 1D (second nitride semiconductor layer), a gate insulating film (first insulating film) 2, a gate electrode (first electrode) 3, a gate field plate electrode (third field plate electrode) 4, a source electrode (second electrode) 5, a first source field plate electrode (first field plate electrode) 6, a second source field plate electrode (fourth field plate electrode) 7, a drain electrode (third electrode) 8, a drain field plate electrode (second field plate electrode) 9, a drain electrode side insulating film (second insulating film) 10, and an interlayer insulating film (fifth insulating film) 11.

[0029] In embodiments that include variations of the first embodiment, some or all of the modified or added components can be used in other embodiments.

[0030] Figure 1 This is a schematic diagram of a semiconductor device according to the first embodiment. The semiconductor device is, for example, a HEMT (High Electron Mobility Transistor) 100 using GaN-based semiconductors. Figure 2 It includes Figure 1 A schematic diagram of the A-A' cross-section of the semiconductor device 100. The following description primarily concerns the configuration within the component region.

[0031] The substrate 1A is formed, for example, from silicon (Si). In addition to silicon, sapphire (Al2O3) and silicon carbide (SiC) can also be used, for example.

[0032] A buffer layer 1B is disposed on substrate 1A. Buffer layer 1B functions to mitigate lattice mismatch between substrate 1A and channel layer 1C. Buffer layer 1B is, for example, made of aluminum gallium nitride (Al₂O₃). W Ga 1-WN (0<W≤1)) is formed with a multilayer structure.

[0033] The channel layer 1C is disposed on the buffer layer 1B. The channel layer 1C is also referred to as an electron transport layer. The channel layer 1C is, for example, undoped aluminum gallium nitride (Al X Ga 1-X N (0≤X<1)). More specifically, it is, for example, undoped gallium nitride (GaN). The thickness of the channel layer 1C is, for example, 0.1 [μm] or more and 10 [μm] or less. In the embodiment, the thickness refers to the length (height) of each component in the stacking direction (Y direction) of the channel layer 1C and the barrier layer 1D including the channel layer 1C.

[0034] The barrier layer 1D is disposed on the channel layer 1C. The barrier layer 1D is also referred to as an electron supply layer. The band gap of the barrier layer 1D is larger than the band gap of the channel layer 1C. The barrier layer 1D is, for example, undoped aluminum gallium nitride (Al Y Ga 1-Y N (0<Y≤1, X<Y)). More specifically, it is, for example, undoped Al 0.25 Ga 0.75 N. The thickness of the barrier layer 1D is, for example, 2 nm or more and 100 nm or less.

[0035] A heterojunction interface is formed between the channel layer 1C and the barrier layer 1D. A two-dimensional electron gas (2DEG) is formed at the heterojunction interface, which serves as the carrier of the HEMT 100.

[0036] The gate insulating film 2 is disposed between the source electrode 5 and the drain electrode 8. The gate insulating film 2 may be in direct contact with the source electrode 5, or may be separated from the source electrode 5 in the first direction X. The gate insulating film 2 is not in direct contact with the drain electrode 8, and is separated from the drain electrode 8 in the first direction X. The nitride semiconductor layer 1 and the gate insulating film 2 are stacked in the second direction. The gate insulating film 2 is, for example, an oxide or a nitride. The gate insulating film 2 is, for example, silicon nitride (SiN), aluminum oxide, silicon oxynitride, or aluminum oxynitride. The gate insulating film 2 is a dense insulating film. The density of the gate insulating film 2 is, for example, preferably 2 [g / cm 3 or more and 3.16 [g / cm 3 or less. The thickness of the gate insulating film 2 is, for example, 10 [nm] or more and 100 [nm] or less.

[0037] The gate electrode 3 is located over the gate insulating film 2. The gate electrode 3 is disposed between the source electrode 5 and the drain electrode 8.

[0038] The gate electrode 3 is an electrode having a plurality of fingers extending in a third direction (Z direction). The comb-shaped fingers of the gate electrode 3 extend in the third direction and are arranged in a first direction (X direction). The gate electrode 3 is an electrode disposed on a gate insulating film 2 disposed above the channel layer 1C and the barrier layer 1D. The gate electrode 3 is connected to the channel layer 1C and the barrier layer 1D via the gate insulating film 2. The gate electrode 3 is, for example, in direct contact with the gate insulating film 2. The gate electrode 3 is disposed in the first direction between the source electrode 5 and the drain electrode 8. Preferably, a gate field plate electrode 4 is disposed on the gate electrode 3.

[0039] The third direction intersects with the first and second directions. The first direction intersects with the third and second directions. Preferably, the third direction is orthogonal to the plane formed by the first and second directions, the first direction is orthogonal to the plane formed by the third and second directions, and the second direction is orthogonal to the plane formed by the third and first directions.

[0040] Gate electrode 3 is, for example, titanium nitride (TiN).

[0041] By setting a gate insulating film 2 between the gate electrode 3 and the barrier layer 1D, the semiconductor device 100 can be configured as a MIS (Metal Insulator Semiconductor) type HEMT.

[0042] The gate field plate electrode 4 is electrically connected to and directly connected to the gate electrode 3. The gate field plate electrode 4 is, for example, made primarily of aluminum. The gate field plate electrode 4 includes, for example, a columnar portion connected to the gate electrode 3 and a plate-shaped portion connected to the columnar portion. The columnar portion is sandwiched between the plate-shaped portion and the gate electrode 3. The plate-shaped portion of the gate field plate electrode 4 is a portion that protrudes from the columnar portion towards both sides of the source electrode 5 and the drain electrode 8. The width of the plate-shaped portion of the gate field plate electrode 4 in a first direction is preferably longer than the width of the gate electrode 3 in a first direction. The width of the columnar portion of the gate field plate electrode 4 in a first direction is preferably shorter than the width of the gate electrode 3 in a first direction. Other gate field plate electrodes (not shown) connected to the gate electrode 3 can be provided. The end face of the gate field plate electrode 4 (including any gate field plate electrode (not shown)) on the drain electrode 8 side is preferably located in the first direction closer to the source electrode 5 side than the end face of the drain field plate electrode 9 on the source electrode 5 side.

[0043] The source electrode 5 is an electrode having a plurality of fingers extending in a third direction. The comb-shaped fingers of the source electrode 5 extend in the third direction and are arranged in a first direction (X direction). For example, the fingers of the source electrode 5 are held by the fingers of the gate electrode 3. The source electrode 5 is disposed on the nitride semiconductor layer 1, and more specifically, on the channel layer 1C and the barrier layer 1D. The source electrode 5 is electrically connected to the channel layer 1C and the barrier layer 1D.

[0044] The source electrode 5 is, for example, a metal electrode. The source electrode 5 may be, for example, a laminated structure of aluminum film containing at least 50 wt% aluminum, titanium (Ti), and aluminum (Al). An ohmic contact is preferably formed between the source electrode 5 and the barrier layer 1D.

[0045] The source electrode 5 on the element region has a cross-section, for example, T-shaped. The source electrode 5 includes, for example, a columnar portion (bottom) connected to the barrier layer 1D, and a plate-like portion (upper) connected to the columnar portion. The plate-like portion of the source electrode 5 protrudes from the columnar portion toward the gate electrode 3. The columnar portion is sandwiched between the plate-like portion and the barrier layer 1D. The source electrode 5 preferably has a bottom and an upper portion with a lateral length longer than the lateral length of the bottom.

[0046] The semiconductor device 100 preferably includes a first source field plate electrode 6. The first source field plate electrode 6 is, for example, made primarily of aluminum. By providing the field plate electrode, the electric field concentration at the electrode can be mitigated. The first source field plate electrode 6 is directly and electrically connected to the source electrode 5.

[0047] The cross-section of the first source field plate electrode 6 on the component region is, for example, T-shaped. The first source field plate electrode 6 includes, for example, a columnar portion (bottom) connected to the source electrode 5 and a plate-shaped portion (top) connected to the columnar portion. The columnar portion is sandwiched between the plate-shaped portion and the source electrode 5. The width of the plate-shaped portion of the first source field plate electrode 6 in a first direction is preferably longer than the width of the source electrode 5 in a first direction. The width of the columnar portion of the first source field plate electrode 6 in a first direction is preferably shorter than the width of the source electrode 5 in a first direction. The end face of the first source field plate electrode 6 on the drain electrode 8 side is preferably located closer to the drain electrode 8 side in the first direction than the end face of the gate electrode 3 on the drain electrode 8 side.

[0048] The semiconductor device 100 preferably includes a second source field plate electrode 7. The second source field plate electrode 7 is, for example, made primarily of aluminum. By providing the field plate electrode, the electric field concentration at the electrode can be mitigated. The second source field plate electrode 7 is directly and electrically connected to the source electrode 5. The end face of the second source field plate electrode 7 on the gate electrode 3 side is preferably located in a first direction closer to the drain electrode 8 side than the end face of the gate electrode 3 on the drain electrode 8 side.

[0049] The drain electrode 8 is disposed on the channel layer 1C and the barrier layer 1D. The drain electrode 8 is electrically connected to the channel layer 1C and the barrier layer 1D. For example, the drain electrode 8 is connected to the barrier layer 1D.

[0050] The drain electrode 8 is, for example, a metal electrode. The drain electrode 8 is, for example, a stacked structure of titanium (Ti) and aluminum (Al). The drain electrode 8 is preferably in an ohmic contact with the barrier layer 1D.

[0051] The drain electrode 8 on the element region has a cross-section, for example, T-shaped. The drain electrode 8 includes, for example, a columnar portion, i.e., a first portion 8a, connected to the barrier layer 1D, and a plate-like portion, i.e., a second portion 8b, connected to the columnar portion. The first portion 8a is electrically connected to the nitride semiconductor layer 1. The second portion 8b is located on the first portion 8a, and its length in the first direction (the direction in which the gate electrode 3 and the source electrode 5 are arranged) is longer than the length of the first portion 8a in the first direction. The first portion 8a is sandwiched between the second portion 8b and the barrier layer 1D. The first portion 8a and the second portion 8b are preferably directly electrically connected.

[0052] The drain electrode 8 can also be a multi-stage electrode having multiple columnar portions and plate-like portions. Including the multi-stage drain electrode 8, the second portion 8b is a portion disposed at the position closest to the nitride semiconductor layer 1, protruding more than 0.01 [μm] from the columnar portion toward the gate electrode 3 in the first direction X.

[0053] The semiconductor device 100 preferably includes a drain field plate electrode 9. The drain field plate electrode 9 is, for example, made primarily of aluminum. By providing the field plate electrode, the electric field concentration at the electrode can be mitigated. The drain field plate electrode 9 is directly and electrically connected to the drain electrode 8.

[0054] The drain field plate electrode 9 on the element region has a cross-section, for example, T-shaped. The drain field plate electrode 9 includes, for example, a columnar portion and a plate-shaped portion connected to the drain electrode 8. The end face of the drain field plate electrode 9 on the first source field plate electrode 6 side is preferably located in a first direction closer to the gate electrode 3 side than the end face of the drain electrode 8 on the gate electrode 3 side.

[0055] Drain field plate electrode 9 in Figure 1 It can be configured as a T-shaped primary structure, but it can also be configured as a multi-stage field plate electrode formed by stacking T-shaped components in the second direction. When the drain field plate electrode 9 is multi-stage, the uppermost columnar portion is used as the plate-shaped portion of the drain field plate electrode 9.

[0056] The drain electrode side insulating film 10 is an insulating film sandwiching the side surface of the drain electrode 8. The drain electrode side insulating film 10 is disposed between the gate insulating film 2 and the drain electrode 8, facing the first direction X. The drain electrode side insulating film 10 is disposed on the side surface of the first portion 8a of the drain electrode 8 (the surface facing the gate electrode 3), the bottom surface of the second portion 8b of the drain electrode 8 (the surface facing the nitride semiconductor layer 1), and the surface of the nitride semiconductor layer 1 located between the gate insulating film 2 and the drain electrode 8 in the first direction X, facing the second portion 8b of the drain electrode 8. Preferably, the drain electrode side insulating film 10 is in direct contact with the side surface of the first portion 8a of the drain electrode 8, in direct contact with the bottom surface of the second portion 8b of the drain electrode 8, and in contact with the surface of the nitride semiconductor layer 1 located between the gate insulating film 2 and the drain electrode 8 in the first direction X, facing the second portion 8b of the drain electrode 8.

[0057] The drain electrode side insulating film 10 is preferably disposed on the entire side surface of the first portion 8a of the drain electrode 8, the entire bottom surface of the second portion 8b of the drain electrode 8, and the entire surface of the nitride semiconductor layer 1 located between the gate insulating film 2 and the drain electrode 8 in the first direction X, facing the second portion b side of the drain electrode 8. The drain electrode side insulating film 10 is preferably in direct contact with the entire side surface of the first portion 8a of the drain electrode 8, in direct contact with the entire bottom surface of the second portion 8b of the drain electrode 8, and in contact with the entire surface of the nitride semiconductor layer 1 located between the gate insulating film 2 and the drain electrode 8 in the first direction X, facing the second portion b side of the drain electrode 8.

[0058] Preferably, a drain electrode side insulating film 10 is provided in the entire region sandwiched between the second portion 8b of the drain electrode 8 and the nitride semiconductor layer 1 in the second direction Y.

[0059] The drain electrode side insulating film 10 is preferably a single insulating film. This single-layer drain electrode side insulating film 10 is disposed on the side surface of the first portion 8a of the drain electrode 8, the bottom surface of the second portion 8b of the drain electrode 8, and the surface of the nitride semiconductor layer 1 located between the gate insulating film 2 and the drain electrode 8 in the first direction X, facing the second portion b of the drain electrode 8. Preferably, the single-layer drain electrode side insulating film 10 is in direct contact with the side surface of the first portion 8a of the drain electrode 8, in direct contact with the bottom surface of the second portion 8b of the drain electrode 8, and in contact with the surface of the nitride semiconductor layer 1 located between the gate insulating film 2 and the drain electrode 8 in the first direction X, facing the second portion b of the drain electrode 8.

[0060] A drain electrode-side insulating film 10 is preferably disposed on the entire side surface of the first portion 8a of the drain electrode 8, the entire bottom surface of the second portion 8b of the drain electrode 8, and the entire surface of the nitride semiconductor layer 1 located between the gate insulating film 2 and the drain electrode 8 in the first direction X, facing the second portion b side of the drain electrode 8. The drain electrode-side insulating film 10 is preferably in direct contact with the entire side surface of the first portion 8a of the drain electrode 8, the entire bottom surface of the second portion 8b of the drain electrode 8, and the entire surface of the nitride semiconductor layer 1 located between the gate insulating film 2 and the drain electrode 8 in the first direction X, facing the second portion b side of the drain electrode 8.

[0061] The drain electrode side insulating film 10 is preferably a compound insulating film. As a compound insulating film, the drain electrode side insulating film 10 is disposed on the side surface of the first portion 8a of the drain electrode 8, the bottom surface of the second portion 8b of the drain electrode 8, and the surface of the nitride semiconductor layer 1 located between the gate insulating film 2 and the drain electrode 8 in the first direction X, facing the second portion b of the drain electrode 8. Preferably, the drain electrode side insulating film 10, as a compound insulating film, is in direct contact with the side surface of the first portion 8a of the drain electrode 8, in direct contact with the bottom surface of the second portion 8b of the drain electrode 8, and in direct contact with the surface of the nitride semiconductor layer 1 located between the gate insulating film 2 and the drain electrode 8 in the first direction X, facing the second portion b of the drain electrode 8.

[0062] The drain electrode-side insulating film 10, which is a compound insulating film, is preferably disposed on the entire side surface of the first portion 8a of the drain electrode 8, the entire bottom surface of the second portion 8b of the drain electrode 8, and the entire surface of the nitride semiconductor layer 1 located between the gate insulating film 2 and the drain electrode 8 in the first direction X, facing the second portion b side of the drain electrode 8. The drain electrode-side insulating film 10, which is a compound insulating film, is preferably in direct contact with the entire side surface of the first portion 8a of the drain electrode 8, the entire bottom surface of the second portion 8b of the drain electrode 8, and the entire surface of the nitride semiconductor layer 1 located between the gate insulating film 2 and the drain electrode 8 in the first direction X, facing the second portion b side of the drain electrode 8.

[0063] The drain electrode side insulating film 10 is preferably a single layer of an insulating film of a compound. As a single layer of an insulating film of a compound, the drain electrode side insulating film 10 is disposed on the side surface of the first portion 8a of the drain electrode 8, the bottom surface of the second portion 8b of the drain electrode 8, and the surface of the nitride semiconductor layer 1 located between the gate insulating film 2 and the drain electrode 8 in the first direction X, facing towards the second portion b of the drain electrode 8. Preferably, the drain electrode side insulating film 10, as a single layer of an insulating film of a compound, is in direct contact with the side surface of the first portion 8a of the drain electrode 8, in direct contact with the bottom surface of the second portion 8b of the drain electrode 8, and in direct contact with the surface of the nitride semiconductor layer 1 located between the gate insulating film 2 and the drain electrode 8 in the first direction X, facing towards the second portion b of the drain electrode 8.

[0064] The drain electrode side insulating film 10, which is an insulating film of one layer and one compound, is preferably disposed on the entire side surface of the first portion 8a of the drain electrode 8, the entire bottom surface of the second portion 8b of the drain electrode 8, and the entire surface of the nitride semiconductor layer 1 located between the gate insulating film 2 and the drain electrode 8 in the first direction X, facing the second portion b side of the drain electrode 8. The drain electrode side insulating film 10, which is an insulating film of one layer and one compound, is preferably in direct contact with the entire side surface of the first portion 8a of the drain electrode 8, in direct contact with the entire bottom surface of the second portion 8b of the drain electrode 8, and in direct contact with the entire surface of the nitride semiconductor layer 1 located between the gate insulating film 2 and the drain electrode 8 in the first direction X, facing the second portion b side of the drain electrode 8.

[0065] The drain electrode side insulating film 10 is preferably selected from silicon oxide (SiO2). 2） An insulating film of a compound from the group consisting of silicon nitride (SiN) and silicon oxynitride (SiON), more preferably an insulating film of SiO2 or SiN, and even more preferably an insulating film of SiO2.

[0066] The height of the second direction Y of the drain electrode side insulating film 10 (the distance from the surface of the nitride semiconductor layer 1 side (the surface of the barrier layer 1D) of the drain electrode side insulating film 10 to the surface of the drain electrode side insulating film 10 facing the second portion 8b in the second direction Y) is preferably 0.05 [μm] or more and 0.5 [μm] or less, more preferably 0.05 [μm] or more and 0.4 [μm] or less, and even more preferably 0.1 [μm] or more and 0.3 [μm] or less.

[0067] Figure 1 In addition to the drain electrode 8, the drain electrode side insulating film 10 also sandwiches the gate electrode 3, the gate field plate electrode 4, and the source electrode 5.

[0068] Figure 1The drain electrode side insulating film 10 is also disposed between the gate insulating film 2 and the interlayer insulating film 11.

[0069] Reference Figure 3 A schematic diagram of a semiconductor device 100 is provided, illustrating the distance relationship between the gate insulating film 2 and the drain electrode 8, as well as the distance relationship between the drain electrode side insulating film 10 and the drain electrode 8. Figure 3 The schematic diagram shown is a partial schematic diagram of the vicinity of the drain electrode 8 of the semiconductor device 100.

[0070] The distance d1 between the gate insulating film 2 and the drain electrode 8 is in the first direction X (in Figure 1 , 3 In the direction from the gate electrode 3 toward the drain electrode 8, the distance d1 is the distance between the gate insulating film 2 and the drain electrode 8. The distance d1 is also the length of the first direction X between the gate insulating film 2 and the drain electrode 8, where the nitride semiconductor layer 1 and the drain electrode side insulating film 10 are connected.

[0071] The distance d2 is defined as the length by which the second portion 8b of the drain electrode 8 protrudes from the first portion 8a toward the gate electrode 3 in the first direction X. The distance d2 is also the length in the first direction X between the second portion 8b of the drain electrode 8 and the drain electrode side insulating film 10.

[0072] From the viewpoint of suppressing collapse that occurs near the drain electrode 8, d1 is preferably 0.05 μm or more and 5 μm or less, more preferably 0.05 μm or more and 4 μm or less, and even more preferably 0.1 μm or more and 3 μm or less.

[0073] From the viewpoint of suppressing collapse that occurs near the drain electrode 8, d1-d2 is preferably 0.2 [μm] or more and 10 [μm] or less, more preferably 0.2 [μm] or more and 5 [μm] or less, and even more preferably 0.2 [μm] or more and 3 [μm] or less.

[0074] From the viewpoint of suppressing collapse generated near the drain electrode 8, (d1-d2) is preferably more than 1 and less than 50 times d2, more preferably more than 1 and less than 30 times d2, and even more preferably more than 1 and less than 10 times d2.

[0075] The distance between the first part 8a of the drain electrode 8 facing the first direction X and the first source field plate electrode 6 is set as distance d3.

[0076] d3-d1 is preferably 1 μm or more and 20 μm or less, more preferably 1 μm or more and 15 μm or less, and even more preferably 3 μm or more and 12 μm or less.

[0077] The distance between the drain field plate electrode 9 facing the first direction X and the gate insulating film 2 is set as distance d4.

[0078] d4 is preferably -3μm or more and 5μm or less, more preferably -2μm or more and 4μm or less, and even more preferably -1μm or more and 2μm or less. When d4 is negative, the gate insulating film 2 and the drain field plate electrode 9 overlap in the Y direction, and the overlap distance between the gate insulating film 2 and the drain field plate electrode 9 is called d4.

[0079] The distance between the source electrode 5 and the drain electrode 8 (the distance between the terminals of the source electrode 5 and the drain electrode 8) is, for example, 5 [μm] or more and 30 [μm] or less.

[0080] In addition, the source electrode 5 and the drain electrode 8 can also be configured to be in direct contact with the channel layer 1C.

[0081] The interlayer insulating film 11 is, for example, an oxide or a nitride. The interlayer insulating film 11 is, for example, silicon oxide (SiO2), silicon nitride (SiN), silicon oxynitride (SiON), or a high-k material. Examples of high-k materials include hafnium oxide (HfO2). The interlayer insulating film 11 is preferably a multilayer insulating film. When the interlayer insulating film 11 is a multilayer insulating film, each insulating layer can be of different types. Each insulating film constituting the interlayer insulating film 11 is preferably independently selected from the group consisting of silicon oxide (SiO2), silicon nitride (SiN), and silicon oxynitride (SiON).

[0082] The interlayer insulating film 11 is preferably in direct contact with the side surface of the first portion 8a of the drain electrode 8. The interlayer insulating film 11 is preferably in direct contact with the side surface of the drain field plate electrode 9.

[0083] By providing a drain electrode side insulating film 10, and by providing a layer of SiO2 drain electrode side insulating film 10 below the second part 8b of the drain electrode 8 (on the side from the second part 8b toward the nitride semiconductor layer 1 in the second direction Y), it is possible to suppress current collapse that is prone to occur next to the drain electrode 8.

[0084] (Second Implementation) The second embodiment relates to a semiconductor device. The semiconductor device of the second embodiment is a variation of the semiconductor device 100 of the first embodiment. Descriptions of content common to both the first and second embodiments are omitted. The configuration of the second embodiment can also be applied to other embodiments. A portion of the description of the second embodiment can also be applied to the description of other embodiments.

[0085] Figure 4A schematic diagram showing the semiconductor device 101 according to the second embodiment. Figure 5 It includes Figure 4 A schematic diagram of the B-B' cross section of the semiconductor device 101. Figure 6 This is a schematic diagram of semiconductor device 101. The following description mainly concerns the configuration of the component area. Figure 6 This is a partial schematic diagram of the vicinity of the drain electrode 8 of the semiconductor device 101.

[0086] The semiconductor device 101 includes: a nitride semiconductor layer 1 comprising a substrate 1A, a buffer layer 1B, a channel layer 1C (a first nitride semiconductor layer), and a barrier layer 1D (a second nitride semiconductor layer); a gate insulating film (first insulating film); a gate electrode (first electrode); a gate field plate electrode (third field plate electrode); a source electrode (second electrode); a first source field plate electrode (first field plate electrode); a second source field plate electrode (fourth field plate electrode); a drain electrode (third electrode); a drain field plate electrode (second field plate electrode); a drain electrode side insulating film (second insulating film); an interlayer insulating film (fifth insulating film); a gate FP-source FP side insulating film (third insulating film); a gate FP-source FP side insulating film (fourth insulating film); and a source electrode side insulating film (fourth insulating film).

[0087] The drain electrode side insulating film 10, the gate FP-source FP side insulating film 12 and the source electrode side insulating film 13 of the semiconductor device 101 are different from those of the semiconductor device 100.

[0088] The drain electrode side insulating film 10 of the semiconductor device 100 is divided into a drain electrode side insulating film 10, a gate FP-source FP side insulating film 12, and a source electrode side insulating film 13 within the semiconductor device 101. The drain electrode side insulating film 10 sandwiches the drain electrode 8, the gate FP-source FP side insulating film 12 is disposed between the gate insulating film 2 and the interlayer insulating film 11, and the source electrode side insulating film 13 sandwiches the source electrode 5.

[0089] The drain electrode-side insulating film 10 is sandwiched between the drain electrode 8 and the gate-source-side insulating film 12 in the first direction X. The drain electrode-side insulating film 10 is also sandwiched between the drain electrode 8 and the gate insulating film 2 in the first direction X. The surface of the drain electrode-side insulating film 10 on the gate electrode 3 side faces the surface of the gate-source-side insulating film 12 on the drain electrode 8 side and the surface of the gate insulating film 2 on the drain electrode 8 side. Preferably, the surface of the drain electrode-side insulating film 10 on the gate electrode 3 side is in direct contact with the surface of the gate-source-side insulating film 12 on the drain electrode 8 side and the surface of the gate insulating film 2 on the drain electrode 8 side.

[0090] The gate FP-source FP side insulating film 12 is sandwiched between the drain electrode side insulating film 10 and the source electrode 5 in the first direction X.

[0091] The surface of the gate FP-source FP-side insulating film 12 facing the drain electrode 8 faces the surface of the drain electrode-side insulating film 10 facing the gate electrode 3. Preferably, the surface of the gate FP-source FP-side insulating film 12 facing the drain electrode 8 is in direct contact with the surface of the drain electrode-side insulating film 10 facing the gate electrode 3.

[0092] The surface of the gate FP-source FP side insulating film 12 facing the source electrode 5 side faces the surface of the source electrode 5 gate electrode 3 side, or the surface of the source electrode 5 gate electrode 3 side and the surface of the source electrode side insulating film 13 gate electrode 3 side. Preferably, the surface of the gate FP-source FP side insulating film 12 facing the source electrode 5 side is in direct contact with the surface of the source electrode 5 gate electrode 3 side, or the surface of the source electrode side insulating film 13 gate electrode 3 side.

[0093] The gate FP-source FP side insulating film 12 is sandwiched between the gate insulating film 2 and the interlayer insulating film 11 in the second direction Y.

[0094] The gate FP-source FP side insulating film 12 sandwiches the columnar portion of the gate electrode 3 and the gate field plate electrode 4 in the first direction X. Preferably, the gate FP-source FP side insulating film 12 sandwiching the columnar portion of the gate electrode 3 and the gate field plate electrode 4 in the first direction X is in direct contact with the gate electrode 3 and the gate field plate electrode 4.

[0095] The surface of the interlayer insulating film 11 side of the gate FP-source FP side insulating film 12 preferably faces the surface of the nitride semiconductor layer 1 side of the interlayer insulating film 11, the surface of the nitride semiconductor layer 1 side of the gate field electrode 4, and the surface of the nitride semiconductor layer 1 side of the second source field electrode 7. The surface of the interlayer insulating film 11 side of the gate FP-source FP side insulating film 12 preferably directly contacts the surface of the nitride semiconductor layer 1 side of the interlayer insulating film 11, the surface of the nitride semiconductor layer 1 side of the gate field electrode 4, and the surface of the nitride semiconductor layer 1 side of the second source field electrode 7.

[0096] The surface of the nitride semiconductor layer 1 side of the gate FP-source FP side insulating film 12 preferably faces the surface of the interlayer insulating film 11 side of the gate insulating film 2 and the surface of the interlayer insulating film 11 side of the gate electrode 3. The surface of the nitride semiconductor layer 1 side of the gate FP-source FP side insulating film 12 preferably has direct contact with the surface of the interlayer insulating film 11 side of the gate insulating film 2 and the surface of the interlayer insulating film 11 side of the gate electrode 3.

[0097] The gate-source (FP) side insulating film 12 is preferably an insulating film of a different compound than the drain electrode side insulating film 10. Preferably, the drain electrode side insulating film 10 is a SiO2 insulating film, and the gate insulating film 2 and the gate-source (FP) side insulating film 12 are SiN insulating films. The gate-source (FP) side insulating film 12 may also have a multilayer structure depending on the shape of the gate electrode 3 and the gate field plate electrode 4. The gate-source (FP) side insulating film 12 is preferably an insulating film with a lower density than the gate insulating film 2.

[0098] The height of the gate FP-source FP side insulating film 12 (the distance in the second direction Y from the surface of the nitride semiconductor layer 1 side (the surface of the barrier layer 1D) of the gate FP-source FP side insulating film 12 to the surface of the interlayer insulating film 11 side of the gate FP-source FP side insulating film 12) is preferably 0.05 μm or more and 0.5 μm or less, more preferably 0.05 μm or more and 0.4 μm or less, and even more preferably 0.05 μm or more and 0.3 μm or less.

[0099] The source electrode side insulating film 13 is sandwiched between the gate FP-source FP side insulating film 12 in the first direction X, and also sandwiches the source electrode 5. The source electrode side insulating film 13 is sandwiched between the nitride semiconductor layer 1 and the interlayer insulating film 11 in the second direction Y.

[0100] The surface of the source electrode side insulating film 13 on the gate electrode 3 side faces the surface of the gate FP-source FP side insulating film 12 on the source electrode 5 side and the surface of the gate insulating film 2 on the source electrode 5 side. Preferably, the surface of the source electrode side insulating film 13 on the gate electrode 3 side is in direct contact with the surface of the gate FP-source FP side insulating film 12 on the source electrode 5 side and the surface of the gate insulating film 2 on the source electrode 5 side.

[0101] The surface of the interlayer insulating film 11 side of the source electrode side insulating film 13 preferably faces the surface of the nitride semiconductor layer 1 side of the plate-shaped portion of the source electrode 5, or the surface of the nitride semiconductor layer 1 side of the plate-shaped portion of the source electrode 5 and the surface of the nitride semiconductor layer 1 side of the interlayer insulating film 11. The surface of the interlayer insulating film 11 side of the source electrode side insulating film 13 preferably directly contacts the surface of the nitride semiconductor layer 1 side of the plate-shaped portion of the source electrode 5, or the surface of the nitride semiconductor layer 1 side of the plate-shaped portion of the source electrode 5 and the surface of the nitride semiconductor layer 1 side of the interlayer insulating film 11.

[0102] The surface of the source electrode side insulating film 13 on the nitride semiconductor layer 1 side preferably faces the surface of the interlayer insulating film 11 side of the nitride semiconductor layer 1. The surface of the source electrode side insulating film 13 on the nitride semiconductor layer 1 side preferably is in direct contact with the surface of the interlayer insulating film 11 side of the nitride semiconductor layer 1.

[0103] The source electrode side insulating film 13 is preferably an insulating film of a compound selected from the group consisting of SiO2, SiN and SiON, more preferably an insulating film of SiO2 or SiN, and even more preferably an insulating film of SiO2.

[0104] The source electrode side insulating film 13 is preferably an insulating film of the same compound as the drain electrode side insulating film 10.

[0105] The source electrode side insulating film 13 is preferably an insulating film of a different compound than the gate FP-source FP side insulating film 12.

[0106] The height of the source electrode side insulating film 13 (the distance in the second direction Y from the surface of the source electrode side insulating film 13 on the nitride semiconductor layer 1 side (the surface of the barrier layer 1D) to the surface of the source electrode side insulating film 13 facing the plate-shaped portion of the source electrode 5) is preferably 0.05 [μm] or more and 0.5 [μm] or less, more preferably 0.05 [μm] or more and 0.4 [μm] or less, and even more preferably 0.05 [μm] or more and 0.35 [μm] or less.

[0107] like Figure 6 As shown in the schematic diagram, in the case where the drain electrode side insulating film 10 in the first embodiment is divided into the drain electrode side insulating film 10 and the gate FP-source FP side insulating film 12, the relationship between d1 to d4 is also the same as in the first embodiment.

[0108] The drain electrode side insulating film 10 of the first embodiment is divided into a drain electrode side insulating film 10 and a gate FP-source FP side insulating film 12. The drain electrode side insulating film 10 is an insulating film of a different compound than the drain electrode side insulating film 10 (preferably, the drain electrode side insulating film 10 is an insulating film of SiO2, and the gate FP-source FP side insulating film 12 is an insulating film of SiN). Thus, when a source field plate electrode (e.g., a second source field plate electrode 7) is provided close to the nitride semiconductor layer 1, current collapse that is prone to occur next to the drain electrode 8 and current collapse that is prone to occur between the source field plate electrode and the nitride semiconductor layer 1 can be suppressed, thereby suppressing the increase of Ron.

[0109] (Third Implementation) The third embodiment relates to a semiconductor device. The semiconductor device of the third embodiment is a variation of the semiconductor device 100 of the first embodiment and the semiconductor device 101 of the second embodiment. Descriptions of content common to the first to third embodiments are omitted. The configuration of the third embodiment can also be applied to other embodiments. A portion of the description of the third embodiment can also be applied to the description of other embodiments.

[0110] Figure 7A schematic diagram showing the semiconductor device 102 according to the third embodiment. Figure 8 It includes Figure 7 A schematic diagram of the C-C' cross-section of the semiconductor device 102. The following description primarily concerns the configuration within the component region.

[0111] The semiconductor device 101 includes: a nitride semiconductor layer 1 comprising a substrate 1A, a buffer layer 1B, a channel layer 1C (a first nitride semiconductor layer), and a barrier layer 1D (a second nitride semiconductor layer); a gate insulating film (first insulating film); a gate electrode (first electrode); a gate field plate electrode (third field plate electrode); a source electrode (second electrode); a first source field plate electrode (first field plate electrode); a second source field plate electrode (fourth field plate electrode); a drain electrode (third electrode); a drain field plate electrode (second field plate electrode); a drain electrode side insulating film (second insulating film); an interlayer insulating film (fifth insulating film); and a third source field plate electrode 14.

[0112] The drain electrode side insulating film 10, the gate FP-source FP side insulating film 12 and the third source field plate electrode 14 of the semiconductor device 102 are different from those of the semiconductor device 100.

[0113] The drain electrode side insulating film 10 of the semiconductor device 100 is divided into a drain electrode side insulating film 10 and a gate FP-source FP side insulating film 12.

[0114] The surface of the gate insulating film 2 on the source electrode 5 side is in direct contact with the surface of the source electrode 5 on the gate electrode 3 side.

[0115] The surface of the source electrode 5 side of the gate FP-source FP side insulating film 12 is in direct contact with the surface of the gate electrode 3 side of the source electrode 5.

[0116] The gate FP-source FP side insulating film 12 sandwiches the columnar portion of the gate electrode 3 and the gate field plate electrode 4 in the first direction X. Preferably, the gate FP-source FP side insulating film 12 sandwiching the columnar portion of the gate electrode 3 and the gate field plate electrode 4 in the first direction X is in direct contact with the gate electrode 3 and the gate field plate electrode 4.

[0117] The surface of the interlayer insulating film 11 side of the gate FP-source FP side insulating film 12 preferably faces the surface of the nitride semiconductor layer 1 side of the interlayer insulating film 11, the surface of the nitride semiconductor layer 1 side of the gate field plate electrode 4, the surface of the nitride semiconductor layer 1 side of the second source field plate electrode 7, and the surface of the nitride semiconductor layer 1 side of the plate-shaped portion of the source electrode 5. The surface of the interlayer insulating film 11 side of the gate FP-source FP side insulating film 12 preferably directly contacts the surface of the nitride semiconductor layer 1 side of the interlayer insulating film 11, the surface of the nitride semiconductor layer 1 side of the gate field plate electrode 4, the surface of the nitride semiconductor layer 1 side of the second source field plate electrode 7, and the surface of the nitride semiconductor layer 1 side of the plate-shaped portion of the source electrode 5.

[0118] The surface of the nitride semiconductor layer 1 side of the gate FP-source FP side insulating film 12 preferably faces the surface of the interlayer insulating film 11 side of the gate insulating film 2 and the surface of the interlayer insulating film 11 side of the gate electrode 3. The surface of the nitride semiconductor layer 1 side of the gate FP-source FP side insulating film 12 preferably has direct contact with the surface of the interlayer insulating film 11 side of the gate insulating film 2 and the surface of the interlayer insulating film 11 side of the gate electrode 3.

[0119] Preferably, a third source field plate electrode 14 is disposed in the interlayer insulating film 11. The third source field plate electrode 14 is located between the first source field plate electrode 6 and the second source field plate electrode 7 in the first direction X. The third source field plate electrode 14 is located between the first source field plate electrode 6 and the second source field plate electrode 7 in the second direction Y.

[0120] By providing a drain electrode side insulating film 10, and by providing a layer of SiO2 drain electrode side insulating film 10 below the second part 8b of the drain electrode 8 (on the side from the second part 8b toward the nitride semiconductor layer 1 in the second direction Y), it is possible to suppress current collapse that is prone to occur next to the drain electrode 8.

[0121] The drain electrode side insulating film 10 of the first embodiment is divided into a drain electrode side insulating film 10 and a gate FP-source FP side insulating film 12. The drain electrode side insulating film 10 is an insulating film of a different compound than the drain electrode side insulating film 10 (preferably, the drain electrode side insulating film 10 is an insulating film of SiO2, and the gate FP-source FP side insulating film 12 is an insulating film of SiN). Thus, when a source field plate electrode (e.g., a second source field plate electrode 7) is provided close to the nitride semiconductor layer 1, current collapse that is prone to occur next to the drain electrode 8 and current collapse that is prone to occur between the source field plate electrode and the nitride semiconductor layer 1 can be suppressed, thereby suppressing the increase of Ron.

[0122] (Fourth Implementation) The fourth embodiment relates to a semiconductor device. The semiconductor device of the fourth embodiment is a variation of the semiconductor devices 100-102 of the first to third embodiments. Descriptions of aspects common to the first to fourth embodiments are omitted. The configuration of the fourth embodiment can also be applied to other embodiments. A portion of the description of the fourth embodiment can also be applied to the descriptions of other embodiments.

[0123] Figure 9 This is a schematic diagram illustrating the semiconductor device 103 according to the fourth embodiment. The following description primarily relates to the configuration in the component region.

[0124] It comprises: a nitride semiconductor layer 1 including a substrate 1A, a buffer layer 1B, a channel layer 1C (first nitride semiconductor layer), and a barrier layer 1D (second nitride semiconductor layer); a gate insulating film (first insulating film); a gate electrode (first electrode); a gate field plate electrode (third field plate electrode); a source electrode (second electrode); a first source field plate electrode (first field plate electrode); a second source field plate electrode (fourth field plate electrode); a drain electrode (third electrode); a drain field plate electrode (second field plate electrode); a drain electrode side insulating film (second insulating film); and an interlayer insulating film (fifth insulating film); and an interlayer insulating film (fifth insulating film).

[0125] The source electrode 5, the second source field plate electrode 7, the drain electrode 8, and the drain electrode side insulating film 10 of the semiconductor device 103 are different from those of the semiconductor device 100.

[0126] The plate-shaped portion of the source electrode 5 and / or the drain electrode 8 may also be disposed at a position offset from the second source field plate electrode 7 in the second direction Y toward the side of the nitride semiconductor layer 1 or on the side opposite to the side of the nitride semiconductor layer 1.

[0127] The second source field plate electrode 7 can also be a multi-stage field plate electrode. It is also preferable to provide a source field plate electrode of a shape other than multi-stage on the gate FP-source FP side insulating film 12.

[0128] The distance from the surface of the interlayer insulating film 11 side of the drain electrode side insulating film 10 to the nitride semiconductor layer 1 can also be different from the distance from the surface of the interlayer insulating film 11 side of the gate FP-source FP side insulating film 12 to the nitride semiconductor layer 1.

[0129] The distance in the second direction Y from the surface of the columnar portion of the source electrode 5 on the gate electrode 3 side to the surface of the gate FP-source FP side insulating film 12 on the source electrode 5 side is defined as distance d5. The distance in the second direction Y from the surface of the plate-shaped portion of the source electrode 5 on the gate electrode 3 side to the surface of the gate FP-source FP side insulating film 12 on the source electrode 5 side is defined as distance d5.

[0130] d5 can be greater than or less than d6. When d6 is greater than d5, d6-d5 is preferably 0.05μm or more and less than 2μm, more preferably 0.05μm or more and less than 1μm, and even more preferably 0.05μm or more and less than 0.5μm.

[0131] By providing a drain electrode side insulating film 10, and by providing a layer of SiO2 drain electrode side insulating film 10 below the second part 8b of the drain electrode 8 (on the side from the second part 8b toward the nitride semiconductor layer 1 in the second direction Y), it is possible to suppress current collapse that is prone to occur next to the drain electrode 8.

[0132] The drain electrode side insulating film 10 of the first embodiment is divided into a drain electrode side insulating film 10 and a gate FP-source FP side insulating film 12. The drain electrode side insulating film 10 is an insulating film of a different compound than the drain electrode side insulating film 10 (preferably, the drain electrode side insulating film 10 is an insulating film of SiO2, and the gate FP-source FP side insulating film 12 is an insulating film of SiN). Thus, when a source field plate electrode (e.g., a second source field plate electrode 7) is provided close to the nitride semiconductor layer 1, current collapse that is prone to occur next to the drain electrode 8 and current collapse that is prone to occur between the source field plate electrode and the nitride semiconductor layer 1 can be suppressed, thereby suppressing the increase of Ron.

[0133] (Fifth implementation method) The fifth embodiment relates to a semiconductor device. The semiconductor device of the fifth embodiment is a variation of the semiconductor devices 100-103 of the first to fourth embodiments. Descriptions of aspects common to the first to fifth embodiments are omitted. The configuration of the fifth embodiment can also be applied to other embodiments. A portion of the description of the fifth embodiment can also be applied to the descriptions of other embodiments.

[0134] Figure 10 This is a schematic diagram illustrating the semiconductor device 104 according to the fifth embodiment. The following description primarily relates to the configuration within the component region.

[0135] It comprises: a nitride semiconductor layer 1 including a substrate 1A, a buffer layer 1B, a channel layer 1C (first nitride semiconductor layer), and a barrier layer 1D (second nitride semiconductor layer); a gate insulating film (first insulating film); a gate electrode (first electrode); a gate field plate electrode (third field plate electrode); a source electrode (second electrode); a first source field plate electrode (first field plate electrode); a second source field plate electrode (fourth field plate electrode); a drain electrode (third electrode); a drain field plate electrode (second field plate electrode); a drain electrode side insulating film (second insulating film) 10; and an interlayer insulating film (fifth insulating film) 11. A barrier layer 15 is present on the drain electrode side insulating film 10 side of the gate field plate electrode 4, the drain electrode side insulating film 10 side of the source electrode 5, and the drain electrode side insulating film 10 side of the second portion 8b of the drain electrode 8.

[0136] Unlike semiconductor device 100, semiconductor device 104 has a barrier layer 15 and no second source field plate electrode 7. The barrier layer 15 is, for example, one or more nitrides selected from the group consisting of Ti, W, Ta, Nb, V and Zr.

[0137] The barrier layer 15 of the gate field plate electrode 4 is a part of the gate field plate electrode 4. The barrier layer 15 of the gate field plate electrode 4 is, for example, a TiN layer. The barrier layer 15 of the gate field plate electrode 4 is in direct contact with the insulating film 10 on the drain electrode side.

[0138] The barrier layer 15 of the source electrode 5 is a part of the source electrode 5. The barrier layer 15 of the source electrode 5 is, for example, a TiN layer. The barrier layer 15 of the source electrode 5 is in direct contact with the insulating film 10 on the drain electrode side.

[0139] The barrier layer 15 of the drain electrode 8 is a part of the drain electrode 8. The barrier layer 15 of the drain electrode 8 is, for example, a TiN layer. The barrier layer 15 of the drain electrode 8 is in direct contact with the insulating film 10 on the drain electrode side.

[0140] If a barrier layer 15 is present, the diffusion of Al and other materials into the insulating film (drain electrode side insulating film 10 in the fifth embodiment, and gate FP-source FP side insulating film 12 and source electrode side insulating film 13) below the plate-shaped portions of the gate field plate electrode 4, source electrode 5, and drain electrode 8 can be suppressed by heating during alloying. When the insulating film under the gate field plate electrode 4, source electrode 5, and drain electrode 8 is a SiN insulating film, the SiN film functions as a barrier film, making it difficult for Al and other materials to diffuse. When the insulating film under the plate-shaped portions of one or more electrodes selected from the group including the gate field plate electrode 4, source electrode 5, and drain electrode 8 is a SiO2 insulating film, the barrier layer 15 can suppress the degradation of the insulating film.

[0141] By providing a drain electrode-side insulating film 10, and by providing a layer of SiO2 drain electrode-side insulating film 10 below the second portion 8b of the drain electrode 8 (on the side facing the nitride semiconductor layer 1 from the second portion 8b in the second direction Y), current collapse that is prone to occur next to the drain electrode 8 can be suppressed. When an insulating film such as SiO2 is used for the drain electrode-side insulating film 10, degradation of the drain electrode-side insulating film 10 can also be suppressed.

[0142] (Sixth Implementation Method) The sixth embodiment relates to a semiconductor device. The semiconductor device of the sixth embodiment is a variation of the semiconductor devices 100-104 of the first to fifth embodiments. Descriptions of aspects common to the first to sixth embodiments are omitted. The configuration of the sixth embodiment can also be applied to other embodiments. A portion of the description of the sixth embodiment can also be applied to the descriptions of other embodiments.

[0143] Figure 11 This is a schematic diagram illustrating the semiconductor device 105 according to the sixth embodiment. The following description primarily relates to the configuration in the component region.

[0144] It comprises: a nitride semiconductor layer 1 including a substrate 1A, a buffer layer 1B, a channel layer 1C (first nitride semiconductor layer), and a barrier layer 1D (second nitride semiconductor layer); a gate insulating film (first insulating film); a gate electrode (first electrode); a gate field plate electrode (third field plate electrode); a source electrode (second electrode); a first source field plate electrode (first field plate electrode); a second source field plate electrode (fourth field plate electrode); a drain electrode (third electrode); a drain field plate electrode (second field plate electrode); a drain electrode side insulating film (second insulating film); an interlayer insulating film (fifth insulating film); a gate FP-source FP side insulating film (third insulating film); and a source electrode side insulating film (fourth insulating film) 13. A barrier layer 15 is present on the drain electrode side insulating film 10 side of the source electrode 5 and on the drain electrode side insulating film 10 side of the second portion 8b of the drain electrode 8.

[0145] The difference between semiconductor device 101 and semiconductor device 105 is that there is no barrier layer 15.

[0146] The surfaces of the gate FP-source FP side insulating film 12 on the source electrode 5 side and / or the drain electrode 8 side can, for example, have a tapered shape in such a way that the length of the interlayer insulating film 11 side in the first direction X is shortened. Alternatively, the surfaces of the gate FP-source FP side insulating film 12 on the source electrode 5 side and / or the drain electrode 8 side can also be stepped.

[0147] The barrier layer 15 of the source electrode 5 is a part of the source electrode 5. The barrier layer 15 of the source electrode 5 is, for example, a TiN layer. The barrier layer 15 of the source electrode 5 is in direct contact with the insulating film 10 on the drain electrode side.

[0148] The barrier layer 15 of the drain electrode 8 is a part of the drain electrode 8. The barrier layer 15 of the drain electrode 8 is, for example, a TiN layer. The barrier layer 15 of the drain electrode 8 is in direct contact with the insulating film 10 on the drain electrode side.

[0149] When the gate FP-source FP side insulating film 12 is, for example, a SiN insulating film, the gate FP-source FP side insulating film 12 functions as a barrier film. Therefore, even if the barrier layer 15 is not provided under the plate-shaped portion of the gate field plate electrode 4 and under the second source field plate electrode 7, the diffusion of Al and the like can be prevented.

[0150] If a barrier layer 15 is present, it is possible to suppress the diffusion of Al and the like into the insulating film (in the sixth embodiment, the drain electrode side insulating film 10 and the source electrode side insulating film 13) under the plate-shaped portion of the source electrode 5 and the drain electrode 8 during the heating process when alloying the gate field plate electrode 4, the source electrode 5 and the drain electrode 8, thereby suppressing the deterioration of the insulating film.

[0151] By providing a drain electrode-side insulating film 10, and by providing a layer of SiO2 drain electrode-side insulating film 10 below the second portion 8b of the drain electrode 8 (on the side facing the nitride semiconductor layer 1 from the second portion 8b in the second direction Y), current collapse that is prone to occur next to the drain electrode 8 can be suppressed. When an insulating film such as SiO2 is used for the drain electrode-side insulating film 10, degradation of the drain electrode-side insulating film 10 can also be suppressed.

[0152] (Seventh Implementation) The seventh embodiment relates to a method for manufacturing a semiconductor device. The method of describing the semiconductor device of this embodiment will be illustrated using the semiconductor device 100 of the first embodiment as an example. The description of the manufacturing method of the seventh embodiment is also applicable to semiconductor devices 101-105 of other embodiments.

[0153] Reference Figure 12 and Figure 13 A schematic diagram of a method for manufacturing a semiconductor device is provided to illustrate the method for manufacturing the semiconductor device 100.

[0154] First, a nitride semiconductor layer 1 is formed. An LP-SiN film is then deposited on the nitride semiconductor layer 1, for example, using a reduced-pressure CVD method, to serve as a gate insulating film 2. A TiN film is then deposited on the gate insulating film 2 to serve as a gate electrode 3. The gate electrode 3 is then patterned to obtain… Figure 12 The schematic diagram shows the components.

[0155] Next, the gate insulating film 2 is patterned as a precursor to the drain electrode-side insulating film 10, and a SiO2 layer is formed to create vias for the gate field plate electrode 4, source electrode 5, and drain electrode 8. An Al / Ti layer is formed within the vias and on the SiO2 layer, followed by a heat treatment for alloying to fabricate the gate field plate electrode 4, source electrode 5, drain electrode 8, and second source field plate electrode 7. Figure 13 The schematic diagram shows the components.

[0156] Next, an interlayer insulating film 11 is formed, through-hole processing is performed, and the remaining electrodes are fabricated. Figure 1 Semiconductor device 100.

[0157] (Eighth Implementation) The eighth embodiment relates to a method for manufacturing a semiconductor device. The method of describing the semiconductor device of this embodiment will be illustrated using the semiconductor device 101 of the second embodiment as an example. The description of the manufacturing method of the eighth embodiment is also applicable to semiconductor devices 100, 102-105 of other embodiments.

[0158] Reference Figure 12 , Figures 14 to 17A schematic diagram of a method for manufacturing a semiconductor device is provided to illustrate the method for manufacturing the semiconductor device 101.

[0159] First, a nitride semiconductor layer 1 is formed. An LP-SiN film is then deposited on the nitride semiconductor layer 1, for example, using a reduced-pressure CVD method, to serve as a gate insulating film 2. A TiN film is then deposited on the gate insulating film 2 to serve as a gate electrode 3. The gate electrode 3 is then patterned to obtain… Figure 12 The schematic diagram shows the components.

[0160] Next, as the gate-source FP side insulating film 12, a P-SiN film is formed by plasma CVD to form a through hole for the gate field plate electrode 4, thus forming the gate field plate electrode 4 and the second source field plate electrode 7, resulting in... Figure 14 The schematic diagram shows the components.

[0161] Next, through-hole processing is performed on the gate FP-source FP side insulating film 12 to obtain... Figure 15 The schematic diagram shows the components.

[0162] Next, in Figure 16 In the schematic diagram, SiO2 films are formed inside the vias of the gate FP-source FP side insulating film 12 and on the gate FP-source FP side insulating film 12 as the drain electrode side insulating film 10 and the source electrode side insulating film 13, respectively. Figure 16 The schematic diagram shows the components.

[0163] Next, through-holes for the source electrode 5 and drain electrode 8 are fabricated on the SiO2 film to form the source electrode 5 and drain electrode 8, thus obtaining... Figure 17 The schematic diagram shows the components.

[0164] Next, an interlayer insulating film 11 is formed, through-hole processing is performed, and the remaining electrodes are fabricated. Figure 2 Semiconductor device 101.

[0165] While several embodiments of the invention have been described, these embodiments are provided as examples and are not intended to limit the scope of the invention. These new embodiments can be implemented in various other ways, with various omissions, substitutions, and modifications possible without departing from the spirit of the invention. For example, elements of one embodiment may be substituted or modified with elements of other embodiments. These embodiments and their variations are included within the scope or spirit of the invention, and are included within the scope of the invention as described in the claims and its equivalents.

[0166] Explanation of reference numerals in the attached figures 1: Nitride semiconductor layer 1A: Substrate 1B: Buffer layer 1C: Channel layer 1D: Barrier Layer 2: Gate insulating film 3: Gate electrode 4: Gate field plate electrode 5: Source electrode 6: First source field plate electrode 7: Second source field plate electrode 8: Drain electrode 8a: Part 1 8b: Part Two 9: Drain field plate electrode 10: Insulating film on the drain electrode side 11: Interlayer insulating film 12: Gate FP-Source FP side insulating film 13: Insulating film on the source electrode side 14: Third source field plate electrode 15: Barrier Layer 100: Semiconductor devices 101: Semiconductor Devices 102: Semiconductor Devices 103: Semiconductor Devices 104: Semiconductor Devices 105: Semiconductor devices.

Claims

1. A semiconductor device, characterized in that, have: Nitride semiconductor layer; A first insulating film is disposed on the nitride semiconductor layer; The first electrode is located on the first insulating film and is electrically connected to the nitride semiconductor layer. The second electrode is located on the nitride semiconductor layer and is electrically connected to the nitride semiconductor layer; The third electrode has a first part and a second part. The first part is located on the nitride semiconductor layer and is electrically connected to the nitride semiconductor layer. The second part is located on the first part. The length of the second part in the first direction, i.e., the direction in which the first electrode and the second electrode are arranged, is longer than the length of the first part in the first direction. as well as A second insulating film is disposed on the nitride semiconductor layer and is in contact with the surface of the first portion facing the first electrode side and the surface of the second portion facing the nitride semiconductor layer side.

2. A semiconductor device, characterized in that, have: Nitride semiconductor layer; A first insulating film is disposed on the nitride semiconductor layer; The first electrode is located on the first insulating film and is electrically connected to the nitride semiconductor layer. The second electrode is located on the nitride semiconductor layer and is electrically connected to the nitride semiconductor layer; The third electrode has a first part and a second part. The first part is located on the nitride semiconductor layer and is electrically connected to the nitride semiconductor layer. The second part is located on the first part. The length of the second part in the first direction, i.e., the direction in which the first electrode and the second electrode are arranged, is longer than the length of the first part in the first direction. as well as The second insulating film, disposed on the nitride semiconductor layer, is in contact with the surface of the first portion facing the first electrode side and the surface of the second portion facing the nitride semiconductor layer side, and is an insulating film of a compound.

3. The semiconductor device according to claim 1, characterized in that, The second insulating film is an insulating film of a compound.

4. The semiconductor device according to claim 1 or 2, characterized in that, A third insulating film is present on the first electrode. The third insulating film is an insulating film of a different compound than the second insulating film.

5. The semiconductor device according to claim 4, characterized in that, The second insulating film is a SiO2 insulating film. The third insulating film is a SiN insulating film.

6. The semiconductor device according to claim 1 or 2, characterized in that, The second insulating film is a SiO2 insulating film.

7. The semiconductor device according to any one of claims 1-6, characterized in that, The stacking direction of the nitride semiconductor layer and the first insulating film is set as the second direction. The second insulating film is disposed over the entire region sandwiched between the second portion and the nitride semiconductor layer in the second direction.

8. The semiconductor device according to claim 4 or 5, characterized in that, The stacking direction of the nitride semiconductor layer and the first insulating film is set as the second direction. The second insulating film sandwiches the side of the third electrode. The second insulating film is disposed between the first insulating film and the third insulating film in the first direction.

9. The semiconductor device according to any one of claims 1-8, characterized in that, The second insulating film is in direct contact with the surface of the first portion facing the first electrode, in direct contact with the surface of the second portion facing the nitride semiconductor layer, and in direct contact with the surface of the nitride semiconductor layer located between the first insulating film and the third electrode in the first direction facing the second portion.

10. The semiconductor device according to any one of claims 1-9, characterized in that, The second insulating film sandwiches the first electrode, the second electrode, and the third electrode.

11. The semiconductor device according to any one of claims 1-10, characterized in that, The second insulating film is in direct contact with the entire surface of the first portion facing the first electrode side, in direct contact with the entire surface of the second portion facing the nitride semiconductor layer side, and in direct contact with the entire surface of the nitride semiconductor layer facing the second portion side located between the first insulating film and the third electrode in the first direction.

12. The semiconductor device according to any one of claims 1-11, characterized in that, The first insulating film is separated from the second electrode and the third electrode.

13. The semiconductor device according to any one of claims 1-12, characterized in that, Let d1 be the distance between the first insulating film facing the first direction and the third electrode. Let d2 be the length by which the second part protrudes from the first part toward the first electrode side in the first direction. d1-d2 is greater than 0.2μm and less than 3μm.

14. The semiconductor device according to claim 4 or 5, characterized in that, The surface of the third insulating film facing the third electrode is in direct contact with the surface of the second insulating film facing the first electrode.

15. The semiconductor device according to any one of claims 4, 5, and 14, characterized in that, It has a fourth insulating film sandwiching the second electrode. The fourth insulating film is an insulating film made of the same compound as the second insulating film. The fourth insulating film is an insulating film of a different compound than the third insulating film.

16. The semiconductor device according to any one of claims 1-15, characterized in that, The third electrode includes a barrier layer. The barrier layer is in direct contact with the second insulating film.

17. The semiconductor device according to any one of claims 1-15, characterized in that, The third electrode includes a barrier layer. The barrier layer is one or more nitrides selected from the group consisting of Ti, W, Ta, Nb, V and Zr. The barrier layer is in direct contact with the second insulating film.

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