Plasma processing apparatus, power supply system, and plasma processing method
Patent Information
- Application Number
- CN202580021542.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-03-25
- Filing Date
- 2025-03-05
- Publication Date
- 2026-10-20
AI Technical Summary
根据一个例示性实施方式,提供抑制蚀刻速率的降低的技术。
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Abstract
Description
Technical Field
[0001] The exemplary embodiments of this disclosure relate to plasma processing apparatus, power supply system, and plasma processing method. Background Technology
[0002] A plasma processing apparatus is used to perform plasma processing on a substrate. The plasma processing apparatus described in Patent Document 1 includes a chamber and a substrate holding electrode. The substrate holding electrode is disposed within the chamber. The substrate holding electrode holds the substrate mounted on its main surface. The plasma processing apparatus described in Patent Document 1 also includes a high-frequency generating device and a DC negative pulse generating device. The high-frequency generating device applies a high-frequency voltage to the substrate holding electrode. Furthermore, the switching on and off of the high-frequency voltage is alternately switched. Based on the timing of the switching on and off of the high-frequency voltage, a DC negative pulse voltage is applied to the substrate holding electrode from the DC negative pulse generating device.
[0003] Existing technical documents Patent documents Patent Document 1: Japanese Patent Application Publication No. 2009-187975 Summary of the Invention
[0004] The problem that the invention aims to solve This disclosure provides a technique for suppressing the reduction of etch rate.
[0005] Methods for solving problems A plasma processing apparatus is disclosed in one exemplary embodiment. The plasma processing apparatus includes a chamber, a substrate support within the chamber, a high-frequency power supply, a bias power supply, and a control unit. The high-frequency power supply is configured to supply source high-frequency power for generating plasma from gas within the chamber. The bias power supply is configured to supply electrical bias to the substrate support for introducing ions from the plasma onto the substrate. The control unit is configured to control the high-frequency power supply and the bias power supply such that the source high-frequency power and the electrical bias are continuously and simultaneously supplied during plasma processing, wherein the power level of the source high-frequency power is set to 3 kW or less, the bias frequency (the reciprocal of the waveform period of the electrical bias, i.e., the bias frequency) is set to less than 400 kHz, and the voltage amplitude of the electrical bias is set to 3 kV or more.
[0006] Invention Effects According to an exemplary embodiment, a technique for suppressing the reduction of etch rate is provided. Attached Figure Description
[0007] Figure 1 This is a diagram illustrating a structural example of a plasma processing system.
[0008] Figure 2 This is a diagram illustrating a structural example of a capacitively coupled plasma processing device.
[0009] Figure 3 This is a diagram illustrating a plasma processing apparatus according to an exemplary embodiment.
[0010] Figure 4 This is a diagram illustrating an example of a waveform representing electrical bias.
[0011] Figure 5 (a) is a timing diagram of an example of high-frequency power source. Figure 5 (b) is a timing diagram of an example of electrical bias.
[0012] Figure 6 This is a diagram illustrating an example of plasma and sheath within a cavity.
[0013] Figure 7 This is a diagram illustrating an exemplary embodiment of a plasma processing method.
[0014] Figure 8 This is a graph representing the results of the first experiment.
[0015] Figure 9 This is a graph representing the results of the second experiment.
[0016] Figure 10 This is a diagram illustrating another exemplary embodiment of a plasma processing apparatus.
[0017] Figure 11 This is a block diagram of a processing circuit that performs the actions described in this manual on a computer. Detailed Implementation
[0018] Hereinafter, various exemplary embodiments will be described in detail with reference to the accompanying drawings. Furthermore, in each drawing, the same or corresponding parts are labeled with the same reference numerals.
[0019] Figure 1 This is a diagram illustrating a structural example of a plasma processing system. In one embodiment, the plasma processing system includes a plasma processing apparatus 1 and a control unit 2. The plasma processing system is an example of a substrate processing system, and the plasma processing apparatus 1 is an example of a substrate processing apparatus. The plasma processing apparatus 1 includes a plasma processing chamber 10, a substrate support 11, and a plasma generation unit 12. The plasma processing chamber 10 has a plasma processing space. Furthermore, the plasma processing chamber 10 has at least one gas supply port for supplying at least one processing gas to the plasma processing space and at least one gas outlet for discharging gas from the plasma processing space. The gas supply port is connected to the gas supply unit 20 (described later), and the gas outlet is connected to the exhaust system 40 (described later). The substrate support 11 is disposed within the plasma processing space and has a substrate support surface for supporting a substrate.
[0020] The plasma generation unit 12 is configured to generate plasma from at least one process gas supplied to the plasma processing space. The plasma generated in the plasma processing space can be capacitively coupled plasma (CCP), inductively coupled plasma (ICP), electron-cyclotron-resonance plasma (ECR), helicon wave plasma (HWP), or surface wave plasma (SWP), etc. Alternatively, various types of plasma generation units, including AC (alternating current) plasma generation units and DC (direct current) plasma generation units, can be used. In one embodiment, the AC signal (AC power) used in the AC plasma generation unit has a frequency in the range of 100 kHz to 10 GHz. Therefore, the AC signal includes both RF (radio frequency) and microwave signals. In one embodiment, the RF signal has a frequency in the range of 100 kHz to 150 MHz.
[0021] The control unit 2 processes computer-executable commands that cause the plasma processing apparatus 1 to perform the various processes described herein. The control unit 2 can be configured to control various elements of the plasma processing apparatus 1 in a manner that executes the various processes described herein. In one embodiment, part or all of the control unit 2 may be included in the plasma processing apparatus 1. The control unit 2 may include a processing unit 2a1, a storage unit 2a2, and a communication interface 2a3. The control unit 2 is implemented, for example, by a computer 2a. The processing unit 2a1 can be configured to perform various control actions by reading a program from the storage unit 2a2 and executing the read program. The program may be pre-stored in the storage unit 2a2 or retrieved via a medium when needed. The retrieved program is stored in the storage unit 2a2 and read and executed by the processing unit 2a1. The medium may be various storage media readable by the computer 2a, or a communication line connected to the communication interface 2a3. The processing unit 2a1 may be a CPU (Central Processing Unit). The storage unit 2a2 may include RAM (Random Access Memory), ROM (Read Only Memory), HDD (Hard Disk Drive), SSD (Solid State Drive), or a combination thereof. The communication interface 2a3 can communicate with the plasma processing device 1 via a communication line such as a LAN (Local Area Network).
[0022] Hereinafter, a structural example of a capacitively coupled plasma processing device, which is one example of plasma processing device 1, will be described. Figure 2 This is a diagram illustrating a structural example of a capacitively coupled plasma processing device.
[0023] The capacitively coupled plasma processing apparatus 1 includes a plasma processing chamber 10, a gas supply unit 20, a power supply 30, and an exhaust system 40. Additionally, the plasma processing apparatus 1 includes a substrate support 11 and a gas inlet. The gas inlet is configured to introduce at least one processing gas into the plasma processing chamber 10. The gas inlet includes a spray head 13. The substrate support 11 is disposed within the plasma processing chamber 10. The spray head 13 is disposed above the substrate support 11. In one embodiment, the spray head 13 constitutes at least a portion of the ceiling of the plasma processing chamber 10. The plasma processing chamber 10 has a plasma processing space 10s defined by the spray head 13, the sidewall 10a of the plasma processing chamber 10, and the substrate support 11. The plasma processing chamber 10 is grounded. The spray head 13 and the substrate support 11 are electrically insulated from the housing of the plasma processing chamber 10.
[0024] The substrate support portion 11 includes a main body portion 111 and a ring assembly 112. The main body portion 111 has a central region 111a for supporting a substrate W and an annular region 111b for supporting the ring assembly 112. A wafer is an example of a substrate W. The annular region 111b of the main body portion 111 surrounds the central region 111a of the main body portion 111 when viewed from above. The substrate W is disposed on the central region 111a of the main body portion 111, and the ring assembly 112 is disposed on the annular region 111b of the main body portion 111 in such a way that it surrounds the substrate W on the central region 111a of the main body portion 111. Therefore, the central region 111a is also referred to as a substrate support surface for supporting the substrate W, and the annular region 111b is also referred to as an annular support surface for supporting the ring assembly 112.
[0025] In one embodiment, the main body 111 includes a base 1110 and an electrostatic chuck 1111. The base 1110 includes a conductive component. The conductive component of the base 1110 can function as a lower electrode. The electrostatic chuck 1111 is disposed on the base 1110. The electrostatic chuck 1111 includes a ceramic component 1111a and an electrostatic electrode 1111b disposed within the ceramic component 1111a. The ceramic component 1111a has a central region 111a. In one embodiment, the ceramic component 1111a also has an annular region 111b. Alternatively, other components surrounding the electrostatic chuck 1111, such as an annular electrostatic chuck or an annular insulating component, may have an annular region 111b. In this case, the ring assembly 112 may be disposed on either the annular electrostatic chuck or the annular insulating component, or on both the electrostatic chuck 1111 and the annular insulating component. Alternatively, at least one RF / DC electrode coupled to the RF power supply 31 and / or DC power supply 32 (described later) may be disposed within the ceramic component 1111a. In this case, the at least one RF / DC electrode functions as a lower electrode. When the bias RF signal and / or DC signal (described later) are supplied to the at least one RF / DC electrode, the RF / DC electrode is also referred to as a bias electrode. Alternatively, the conductive components of the base 1110 and the at least one RF / DC electrode may function as multiple lower electrodes. Alternatively, the electrostatic electrode 1111b may function as a lower electrode. Therefore, the substrate support portion 11 includes at least one lower electrode.
[0026] The ring assembly 112 includes one or more annular components. In one embodiment, the one or more annular components include one or more edge rings and at least one cover ring. The edge rings are formed of a conductive or insulating material, and the cover rings are formed of an insulating material.
[0027] Additionally, the substrate support 11 may include a temperature control module configured to adjust at least one of the electrostatic chuck 1111, the ring assembly 112, and the substrate to a target temperature. The temperature control module may include a heater, a heat transfer medium, a flow path 1110a, or a combination thereof. A heat transfer fluid such as brine or gas flows in the flow path 1110a. In one embodiment, the flow path 1110a is formed within the base 1110, and one or more heaters are disposed within the ceramic component 1111a of the electrostatic chuck 1111. Furthermore, the substrate support 11 may also include a heat transfer gas supply section configured to supply heat transfer gas to the gap between the back surface of the substrate W and the central region 111a.
[0028] The spray head 13 is configured to introduce at least one process gas from the gas supply unit 20 into the plasma processing space 10s. The spray head 13 has at least one gas supply port 13a, at least one gas diffusion chamber 13b, and a plurality of gas inlets 13c. The process gas supplied to the gas supply port 13a passes through the gas diffusion chamber 13b and is introduced into the plasma processing space 10s through the plurality of gas inlets 13c. Additionally, the spray head 13 includes at least one upper electrode. Furthermore, in addition to the spray head 13, the gas inlet unit may also include one or more side gas injectors (SGIs) mounted on one or more openings formed in the sidewall 10a.
[0029] The gas supply unit 20 may also include at least one gas source 21 and at least one flow controller 22. In one embodiment, the gas supply unit 20 is configured to supply at least one processing gas from a corresponding gas source 21 to the spray head 13 via a corresponding flow controller 22. Each flow controller 22 may include, for example, a mass flow controller or a pressure-controlled flow controller. Furthermore, the gas supply unit 20 may also include at least one flow modulation device for modulating or pulsed the flow rate of the at least one processing gas.
[0030] The power supply 30 includes an RF power supply 31 coupled to the plasma processing chamber 10 via at least one impedance matching circuit. The RF power supply 31 is configured to supply at least one RF signal (RF power) to at least one lower electrode and / or at least one upper electrode. This causes at least one processing gas supplied to the plasma processing space 10s to form plasma. Therefore, the RF power supply 31 can function as at least a part of the plasma generation unit 12. Furthermore, by supplying a bias RF signal to at least one lower electrode, a bias potential can be generated on the substrate W, introducing ionic components from the formed plasma into the substrate W.
[0031] In one embodiment, the RF power supply 31 includes a first RF generation unit 31a and a second RF generation unit 31b. The first RF generation unit 31a is configured to be coupled to at least one lower electrode and / or at least one upper electrode via at least one impedance matching circuit to generate a source RF signal (source RF power) for plasma generation. In one embodiment, the source RF signal has a frequency in the range of 10 MHz to 150 MHz. In one embodiment, the first RF generation unit 31a may also be configured to generate multiple source RF signals with different frequencies. The generated one or more source RF signals are supplied to at least one lower electrode and / or at least one upper electrode.
[0032] The second RF generation unit 31b is configured to be coupled to at least one lower electrode via at least one impedance matching circuit to generate a bias RF signal (bias RF power). The frequency of the bias RF signal may be the same as or different from the frequency of the source RF signal. In one embodiment, the bias RF signal has a frequency lower than that of the source RF signal. In one embodiment, the bias RF signal has a frequency in the range of 100 kHz to 60 MHz. In one embodiment, the second RF generation unit 31b may also be configured to generate multiple bias RF signals with different frequencies. The generated one or more bias RF signals are supplied to at least one lower electrode. In addition, in various embodiments, at least one of the source RF signal and the bias RF signal may be pulsed.
[0033] Alternatively, the power supply 30 may also include a DC power supply 32 coupled to the plasma processing chamber 10. The DC power supply 32 includes a first DC generating unit 32a and a second DC generating unit 32b. In one embodiment, the first DC generating unit 32a is configured to be connected to at least one lower electrode to generate a first DC signal. The generated first DC signal is applied to at least one lower electrode. In one embodiment, the second DC generating unit 32b is configured to be connected to at least one upper electrode to generate a second DC signal. The generated second DC signal is applied to at least one upper electrode.
[0034] In various embodiments, the first and second DC signals can be pulsed. In this case, a sequence of voltage pulses is applied to at least one lower electrode and / or at least one upper electrode. The voltage pulses can have rectangular, trapezoidal, triangular, or combinations thereof pulse waveforms. In one embodiment, a waveform generation unit for generating a sequence of voltage pulses based on the DC signals is connected between the first DC generation unit 32a and at least one lower electrode. Therefore, the first DC generation unit 32a and the waveform generation unit constitute a voltage pulse generation unit. When the second DC generation unit 32b and the waveform generation unit constitute a voltage pulse generation unit, the voltage pulse generation unit is connected to at least one upper electrode. The voltage pulses can have positive or negative polarity. Additionally, the sequence of voltage pulses can also include one or more positive voltage pulses and one or more negative voltage pulses within one cycle. Furthermore, the first and second DC generation units 32a and 32b can be provided based on the RF power supply 31, or the first DC generation unit 32a can be provided instead of the second RF generation unit 31b.
[0035] The exhaust system 40 can be connected, for example, to a gas outlet 10e located at the bottom of the plasma processing chamber 10. The exhaust system 40 may include a pressure regulating valve and a vacuum pump. The pressure within the plasma processing space 10s is adjusted using the pressure regulating valve. The vacuum pump may include a turbomolecular pump, a dry pump, or a combination thereof.
[0036] The following is for reference Figure 3 . Figure 3 This is a diagram illustrating an exemplary embodiment of a plasma processing apparatus. (As shown) Figure 3 As shown, the plasma processing apparatus 1 includes a high-frequency power supply 41 and a bias power supply 42. The high-frequency power supply 41 and the bias power supply 42 constitute a power supply system 30S. The power supply system 30S may also include a control unit 2. Alternatively, the power supply system 30S may replace the control unit 2 with a control unit other than the control unit 2, which is capable of performing the same control of the high-frequency power supply 41 and the bias power supply 42 as described below. Alternatively, the power supply system 30S may not include a control unit and may be configured such that the high-frequency power supply 41 and the bias power supply 42 perform their respective operations as described below.
[0037] The high-frequency power supply 41 is the first RF generation unit 31a. The high-frequency power supply 41 is configured to generate a source RF signal, namely a source high-frequency power HF. The source high-frequency power HF has a source frequency. That is, the source high-frequency power HF has a sinusoidal waveform with its frequency being the source frequency. The source frequency can be a frequency in the range of 10MHz to 150MHz.
[0038] The high-frequency power supply 41 is electrically connected to the high-frequency electrode via a matching adapter 43, thereby supplying source high-frequency power HF to the high-frequency electrode. The high-frequency electrode may be disposed within the substrate support portion 11. The high-frequency electrode may be at least one electrode disposed within a conductive component or ceramic component 1111a of the base 1110. Alternatively, the high-frequency electrode may be an upper electrode. When source high-frequency power HF is supplied to the high-frequency electrode, plasma is generated from the gas within the chamber 10.
[0039] Matching unit 43 has a variable impedance. The variable impedance of matching unit 43 is set to reduce the reflection of high-frequency power HF from the load. Matching unit 43 can be controlled, for example, by control unit 2.
[0040] The bias power supply 42 includes a second RF generation section 31b or a first DC generation section 32a. The bias power supply 42 is electrically coupled to the substrate support section 11. The bias power supply 42 is configured to be electrically connected to a bias electrode within the substrate support section 11, supplying an electrical bias EB to the bias electrode. The bias electrode can be at least one electrode disposed within a conductive component or ceramic component 1111a of the substrate 1110. The bias electrode can be shared with a high-frequency electrode. When the electrical bias EB is supplied to the bias electrode, ions from the plasma are attracted to the substrate W.
[0041] The following, with Figure 3 Refer to together Figure 4 . Figure 4 This is a diagram illustrating an example of an electrical bias waveform. The bias power supply 42 is configured to periodically apply a waveform with period C to the bias electrode. W The electrical bias EB. That is, the electrical bias EB is in the waveform period C that is repeating. W Multiple waveform periods C W Each of these is applied to the bias electrode. Waveform period C W Defined by the bias frequency. The bias frequency is, for example, a frequency above 50 kHz and below 27 MHz. The electrical bias EB has a bias frequency. Waveform period C W The duration is the reciprocal of the bias frequency. The bias frequency can be below 13.56 MHz or below 400 kHz.
[0042] The electrical bias EB can be a bias RF signal, i.e., a bias high-frequency power LF with a bias frequency. That is, the electrical bias EB can have a sinusoidal waveform with its frequency being the bias frequency. In this case, the bias power supply 42 is electrically connected to the bias electrode via a matching adapter 44. The variable impedance of the matching adapter 44 is set to reduce the reflection of the bias high-frequency power LF from the load.
[0043] Alternatively, the electrical bias EB can include a pulsed first DC signal, namely the voltage pulse VP. The voltage pulse VP occurs within the waveform period C. WThe voltage pulse VP is applied to the bias electrode. The voltage pulse VP is synchronized with the waveform period C. W The voltage pulse VP is periodically applied to the bias electrode at time intervals of the same length. The waveform of the voltage pulse VP can be a rectangular wave, a triangular wave, or any arbitrary waveform. The polarity of the voltage pulse VP is set to create a potential difference between the substrate W and the plasma, thereby introducing ions from the plasma into the substrate W. The voltage pulse VP has a waveform period C. W A bias electrode is applied during a period when the potential of the substrate W is negative. The voltage pulse VP applied to the bias electrode can be negative, positive, or a potential that varies between positive and negative. The voltage pulse VP can also be a negative voltage pulse or a negative DC voltage pulse. Furthermore, when the electrical bias EB is a voltage pulse VP, the plasma processing apparatus 1 may not include a matching device 44.
[0044] The following, with Figure 3 Refer to together Figure 5 (a) and Figure 5 (b) Figure 5 (a) is a timing diagram of an example of high-frequency power source. Figure 5 (b) is a timing diagram of an example of electrical bias. Figure 5 In (a), ON (connected) of the source high-frequency power HF indicates that the source high-frequency power HF is supplied, and OFF (disconnected) of the source high-frequency power HF indicates that the source high-frequency power HF is stopped. Figure 5 In (b), ON of the electrical bias EB indicates that the electrical bias EB is supplied, and OFF of the electrical bias EB indicates that the electrical bias EB is stopped.
[0045] like Figure 5 As shown in (a), during plasma processing, control unit 2 P S The high-frequency power supply 41 and the bias power supply 42 are controlled to continuously and simultaneously supply the source high-frequency power HF and the electrical bias EB. Additionally, in Figure 5 In the example shown in (a), the source high-frequency power HF and the electrical bias EB can be continuously supplied for more than 1 minute, more than 5 minutes, or more than 10 minutes. During plasma processing, P S It is possible to use plasma generated within chamber 10 to process substrate W on substrate support 11.
[0046] Control unit 2 during plasma processing P SThe high-frequency power supply 41 and bias power supply 42 are controlled to set the power level of the source high-frequency power HF to below 3kW, the bias frequency to below 400kHz, and the voltage amplitude of the electrical bias EB to above 3kV. The voltage amplitude of the electrical bias EB can be the output of the bias power supply 42, the bias electrode, or the voltage amplitude of the electrical bias EB in the substrate W. When the electrical bias EB includes a voltage pulse VP, the voltage amplitude of the electrical bias EB is the amplitude of the voltage pulse VP. When the electrical bias EB includes a voltage pulse VP, the voltage amplitude of the electrical bias EB can be the absolute value of the voltage level of the voltage pulse VP relative to a reference potential. The reference potential of the voltage pulse VP is at the waveform period C. W The voltage level of the electrical bias EB during the period when no voltage pulse VP is generated is, for example, 0V. When the electrical bias EB is the bias high-frequency power LF, the voltage amplitude of the electrical bias EB is equal to the peak-to-peak voltage (V) of the bias high-frequency power LF. PP ).
[0047] In plasma processing apparatus 1, during plasma processing P S The high-frequency power source HF, which has a relatively low power level, is used. Therefore, according to the plasma processing apparatus 1, the high-frequency power supply 41 can be miniaturized and its power consumption reduced.
[0048] Furthermore, in the plasma processing apparatus 1, an electrical bias EB with a bias frequency of less than 400 kHz is used. Based on the electrical bias EB with a bias frequency of less than 400 kHz, reflection of the source high-frequency power HF from the load of the high-frequency power supply 41 is suppressed, and coupling between the source high-frequency power HF and the plasma is promoted.
[0049] The following is for reference Figure 6 . Figure 6 This is a diagram illustrating an example of plasma and sheath within a chamber. Figure 6 In the diagram, the solid line represents the plasma PL when the electrical bias EB has a peak voltage on the negative side, and the dashed line represents the plasma PL when the electrical bias EB has a peak voltage on the positive side. Furthermore, when the electrical bias EB includes a voltage pulse VP, the peak voltage on the negative side is [value missing] during the waveform period C. W The voltage of the output voltage pulse VP during its duration. When the electrical bias EB includes the voltage pulse VP, the peak voltage on the positive side is during the waveform period C. W The voltage of the electrical bias EB during the period when the internal voltage pulse VP stops. When the electrical bias EB is the bias high-frequency power LF, the peak voltage on the negative side is the waveform period C. W The peak voltage on the negative side of the biased high-frequency power LF. Furthermore, when the electrical bias EB is the biased high-frequency power LF, the peak voltage on the positive side is the waveform period C.W The peak voltage on the positive side of the biased high-frequency power LF.
[0050] like Figure 6 As shown, when the electrical bias EB has a peak voltage on the relatively positive side, the thickness of the sheath layer SB (plasma sheath) between the plasma PL and the substrate W is small, and the sheath voltage is also small. On the other hand, when the electrical bias EB has a peak voltage on the negative side, the thickness of the sheath layer SA (plasma sheath) between the plasma PL and the substrate W is large, and the sheath voltage is also large. When the voltage of the electrical bias EB switches from the peak voltage on the positive side to the peak voltage on the negative side, that is, when the sheath voltage (potential difference) between the plasma PL and the substrate W switches from minimum to maximum, most of the ions in the plasma PL present in the region VR of the sheath layer SA, excluding the region of the sheath layer SB, are accelerated by the relatively large sheath voltage and introduced into the substrate W. In the plasma processing apparatus 1, as described above, during plasma processing, P S The voltage amplitude of the intermediate bias EB is set to above 3kV, thus enabling P during plasma processing. S The thickness of region VR in the plasma is relatively large. Therefore, according to the plasma processing apparatus 1, even if the density of plasma PL is low, a large number of ions with high energy can be introduced into the substrate W. Therefore, according to the plasma processing apparatus 1, the reduction in etching rate can be suppressed. In addition, in the plasma processing apparatus 1, a low-power-level source high-frequency power can be used, and even with the use of a low-power-level source high-frequency power, the reduction in etching rate can be suppressed.
[0051] In one embodiment, the control unit 2 can operate in conjunction with the plasma processing P S The time elapsed during this process changes one or more control parameters of the plasma processing device 1. These control parameters include the voltage amplitude, bias frequency, and waveform period C determined by the electrical bias EB. W The control parameter is selected from the group consisting of the duty cycle (ON duty cycle) of the voltage pulse VP, the pressure in the chamber 10, the power level of the source high-frequency power HF, the frequency of the source high-frequency power HF, and the temperature of the substrate support 11.
[0052] In one embodiment, the control unit 2 may adjust the P-axis as the plasma processing progresses. S The bias power supply 42 is controlled by increasing the voltage amplitude of the electrical bias EB as time passes. In this case, the ion energy can be adjusted according to the plasma processing time P. S The time in the medium increases. As a result, ions can be supplied to the bottom of the high aspect ratio recess of the substrate W.
[0053] In one embodiment, the control unit 2 may adjust the P-axis as the plasma processing progresses. S The bias power supply 42 is controlled by changing the bias frequency as time passes. During plasma processing, P... S As the bias frequency decreases over time, the time for supplying electrons to the bottom of the recess in the substrate W varies with the plasma processing time P. S The time elapsed during this process increased. As a result, the charge on the substrate W was mitigated or eliminated, promoting ion supply to the bottom of the high aspect ratio recesses of the substrate W. During plasma processing, P... S As the bias frequency increases over time, the charging of the substrate W suppresses the supply of low-energy ions to the bottom of the recess in the substrate W. Furthermore, the etching rate increases due to the increased number of ion incidents.
[0054] In one implementation, the control unit 2 may cause the waveform period C to be... W The duty cycle of the voltage pulse VP during plasma processing varies with P S The bias power supply 42 is controlled by decreasing the time elapsed during the plasma treatment. In this case, the time for supplying electrons to the bottom of the recess in the substrate W varies with the plasma treatment time P. S The time spent in the substrate increases. As a result, the charge on the substrate W is mitigated or eliminated, promoting ion supply to the bottom of the high aspect ratio recess of the substrate W.
[0055] In one embodiment, the control unit 2 may adjust the pressure within the chamber 10 according to the plasma processing P. S The exhaust system 40 is controlled by reducing the time elapsed during plasma treatment. At this time, the mean free path of active species such as ions and / or free radicals decreases with the plasma treatment process. S The time elapsed during this process increased, thus promoting the supply of active species to the bottom of the high aspect ratio recess of the substrate W.
[0056] In one embodiment, the control unit 2 may cause P to... S The high-frequency power supply 41 is controlled by changing the power level of the source high-frequency power HF as time passes. The power level of the source high-frequency power HF can be increased or decreased according to the balance of ions and free radicals at the bottom of the recess of the substrate W.
[0057] In one embodiment, the control unit 2 may adjust the plasma processing time P according to the plasma processing period P. S The high-frequency power supply 41 is controlled by changing the frequency of the source high-frequency power HF as time passes. The frequency of the source high-frequency power HF can be changed to suppress the reflection of the source high-frequency power HF from the load of the high-frequency power supply 41.
[0058] In one embodiment, the control unit 2 may adjust the P-axis as the plasma processing progresses. S The temperature regulating mechanism controls the temperature of the substrate support 11 by reducing its temperature over time. The temperature regulating mechanism can be the temperature regulating module described above. For example, the temperature regulating mechanism controls the temperature of the heat transfer fluid supplied to the flow path 1110a. In this case, the adsorption coefficient of free radicals onto the bottom surface of the recessed portion of the substrate W increases with the plasma processing time P. S The time in the middle increases as it passes.
[0059] Furthermore, in the above-described embodiment, the control unit 2 changes one or more control parameters of the plasma processing apparatus 1 as time passes in the PS during plasma processing. Alternatively, the control unit 2 may change one or more control parameters of the plasma processing apparatus 1 as the depth of the recess formed in the substrate W by etching or the aspect ratio of the recess increases. Alternatively, the control unit 2 may also change one or more control parameters of the plasma processing apparatus 1 based on the amount of etching byproducts measured by a sensor. The sensor may be, for example, an optical analyzer or a quadrupole mass spectrometer that analyzes the emission or absorption of byproducts. Alternatively, the control unit 2 may change one or more control parameters of the plasma processing apparatus 1 based on calculations from one or more of the time passing in the PS during plasma processing, the depth of the recess, the aspect ratio of the recess, and the amount of etching byproducts measured by a sensor.
[0060] The following is for reference Figure 7 An exemplary embodiment of a plasma processing method will be described. Figure 7 This is a diagram illustrating an exemplary embodiment of a plasma processing method. Figure 7 In the plasma processing method shown (hereinafter referred to as "method MT"), each part of the plasma processing apparatus 1 can be controlled by the control unit 2. Method MT includes process STa and process STb. Method MT may also include process STp.
[0061] In process STp, substrate W is prepared in chamber 10. Substrate W is placed on substrate support 11. Processes STa and STb can be performed with substrate W placed on substrate support 11.
[0062] In process STa, in order to P during plasma treatment S Plasma is generated from gas within chamber 10, and high-frequency power (HF) is supplied from high-frequency power source 41 to the high-frequency electrodes. Process STb and process STa are performed simultaneously. In process STb, in order to ensure P during plasma processing... SIons are introduced from plasma into the substrate W, and an electrical bias EB is supplied to the substrate support 11 simultaneously and continuously with the high-frequency power HF supplied from the power source.
[0063] P during plasma treatment S The power level of the high-frequency power source (HF) is set to below 3kW, the bias frequency of the electrical bias EB is set to less than 400kHz, and the voltage amplitude of the electrical bias EB is set to above 3kV. Furthermore, during plasma processing, P... S As mentioned above, more than one control parameter can be changed.
[0064] In method MT, a silicon-containing film on substrate W can be etched. The silicon-containing film can be a single-layer film comprising at least one film selected from the group consisting of silicon oxide, silicon nitride, and polycrystalline silicon films, or a multilayer film comprising two or more films selected from the group. In this case, the gas used to generate plasma in step STa may contain hydrogen fluoride gas. Additionally, the gas may also contain phosphorus-containing gas. Furthermore, the gas may also contain oxygen-containing gas and / or rare gases.
[0065] The following describes the experiments conducted to evaluate plasma processing device 1.
[0066] (First Experiment) In the first experiment, the power level of the source high-frequency power HF was varied, and the luminescence of the plasma within chamber 10 was observed using a camera, thereby determining the thickness ΔT of region VR. Additionally, in the first experiment, a voltage pulse VP was used as the electrical bias EB. The bias frequency of the electrical bias EB, the amplitude of the voltage pulse VP, and the duty cycle of the voltage pulse VP were 400 kHz, -5 kV, and 20%, respectively. Figure 8 This is a graph representing the results of the first experiment. In Figure 8 In the diagram, the horizontal axis represents the power level of the source high-frequency power HF, and the vertical axis represents the thickness ΔT. For example... Figure 8 As shown, based on the first experiment, it was confirmed that when the power level of the source high-frequency power HF is below 3kW, the thickness ΔT increases.
[0067] (Second Experiment) In the second experiment, the amplitude of the voltage pulse VP of the electrical bias EB was varied, and the luminescence of the plasma in chamber 10 was observed by a camera, thereby determining the thickness ΔT of region VR. Furthermore, in the second experiment, the bias frequency of the electrical bias EB, the duty cycle of the voltage pulse VP, and the power level of the source high-frequency power HF were 400 kHz, 20%, and 1 kW, respectively. Figure 9 This is a graph representing the results of the second experiment. Figure 9 In the diagram, the horizontal axis represents the amplitude of the voltage pulse VP, and the vertical axis represents the thickness ΔT. For example... Figure 9As shown, based on the second experiment, it was confirmed that when the amplitude of the voltage pulse VP is greater than 2kV, the thickness ΔT increases. Furthermore, it was confirmed that when the amplitude of the voltage pulse VP is greater than 3kV, the thickness ΔT increases significantly.
[0068] (Third Experiment) In the third experiment, three voltage pulses VP with the same ON (on) time length were used as electrical bias EB, and the P during plasma processing was measured. S The reflectivity of the source high-frequency electric field (HF) is measured. Reflectivity is the ratio of the power level of the reflected wave from the source HF to the power level of the traveling wave from the source HF. The bias frequency and duty cycle of the first voltage pulse (VP) in the three voltage pulses are 400 kHz and 20%, respectively. The bias frequency and duty cycle of the second voltage pulse (VP) in the three voltage pulses are 200 kHz and 10%, respectively. The bias frequency and duty cycle of the third voltage pulse (VP) in the three voltage pulses are 100 kHz and 5%, respectively. In the third experiment, the power level of the source HF is 0.6 kW. The results of the third experiment show that the reflectivity using the first to third voltage pulses are 34.4%, 23.4%, and 15.6%, respectively. Based on the third experiment, it is confirmed that by using an electrical bias EB with a bias frequency less than 400 kHz, the reflectivity can be significantly reduced.
[0069] The following is for reference Figure 10 . Figure 10 This is a diagram showing another exemplary embodiment of the plasma processing apparatus 1A. Hereinafter, the plasma processing apparatus 1A will be described from the viewpoint of its differences from the plasma processing apparatus 1.
[0070] like Figure 10 As shown, in the plasma processing apparatus 1A, the high-frequency power supply 41 is electrically connected to the base 1110 of the substrate support portion 11 via the matching device 43.
[0071] The substrate support portion 11 includes a first region R1 and a second region R2. Figure 10In the diagram, the boundaries of the first region R1 and the second region R2 are indicated by dashed lines. The first region R1 is the region intersecting the axis AX and has a generally disk-shaped form. The axis AX is the central axis of the substrate support 11 and can be aligned with the central axis of the chamber 10. The first region R1 includes the aforementioned substrate support surface 111a as its upper surface. The second region R2 extends in a manner that surrounds the first region R1. The substrate W is placed on the substrate support surface 111a and supported on the first region R1. The second region R2 is an annular region around the axis AX. The second region R2 includes the aforementioned annular support surface 111b as its upper surface. The edge ring ER included in the ring assembly 112 is placed on the annular support surface 111b and supported on the second region R2. The substrate W is disposed within the region surrounded by the edge ring ER.
[0072] The substrate support portion 11 includes a first electrode BE1 and a second electrode BE2 as bias electrodes. The first electrode BE1 extends below the substrate support surface 111a and is disposed within a first region R1. The first electrode BE1 may be a film formed of a conductive material. The first electrode BE1 may have a generally circular planar shape. The first electrode BE1 may be configured such that its center is located on the axis AX.
[0073] The second electrode BE2 extends below the annular support surface 111b and within the second region R2. The second electrode BE2 may be a film formed of a conductive material. The second electrode BE2 may have a generally annular planar shape. The second electrode BE2 may be configured such that its center is located on the axis AX.
[0074] like Figure 3 As shown, the electrostatic chuck 1111 may include a dielectric portion 1111d. The dielectric portion 1111d may be the ceramic component 1111a described above. The central portion of the dielectric portion 1111d may form a first region R1, and may have a substrate support surface 111a as its upper surface. The peripheral portion of the dielectric portion 1111d may form a second region R2, and may have a ring support surface 111b as its upper surface.
[0075] The electrostatic chuck 1111 may include a chuck electrode CE1 as part of the electrostatic electrode 1111b. The chuck electrode CE1 is disposed within the dielectric portion 1111d and within the first region R1. The chuck electrode CE1 may be a film formed of a conductive material. The chuck electrode CE1 may have a generally circular planar shape. The chuck electrode CE1 may be configured such that its center is located on the axis AX. The chuck electrode CE1 may extend between the substrate support surface 111a and the first electrode BE1.
[0076] Additionally, the electrostatic chuck 1111 may include chuck electrodes CE2 and CE3 as another part of the electrostatic electrode 1111b. The chuck electrodes CE2 and CE3 are respectively disposed within the dielectric portion 1111d and the second region R2. The chuck electrodes CE2 and CE3 may each be a film formed of a conductive material. The chuck electrodes CE2 and CE3 may each extend circumferentially around the axis AX and may have a generally annular planar shape. The chuck electrode CE2 is disposed on the inner side relative to the chuck electrode CE3. That is, the radial distance between the chuck electrode CE2 and the axis AX is smaller than the radial distance between the chuck electrode CE3 and the axis AX. Furthermore, the chuck electrodes CE2 and CE3 may extend between the annular support surface 111b and the second electrode BE2.
[0077] The plasma processing apparatus 1A may also include a DC power supply 51p. The DC power supply 51p is electrically connected to the chuck electrode CE1 via a switch 51s. A filter 51f may also be connected between the DC power supply 51p and the chuck electrode CE1. The filter 51f is a low-pass filter configured to cut off or attenuate RF signals such as high-frequency (HF) power sources. When a voltage from the DC power supply 51p is applied to the chuck electrode CE1, an electrostatic attraction is generated between the electrostatic chuck 1111 and the substrate W. The substrate W is attracted to and held by the first region R1 by the generated electrostatic attraction.
[0078] The plasma processing apparatus 1A may also include DC power supplies 52p and 53p. DC power supply 52p is electrically connected to the suction cup electrode CE2 via switch 52s. A filter 52f may also be connected between DC power supply 52p and suction cup electrode CE2. Filter 52f is a low-pass filter configured to cut off or attenuate RF signals such as high-frequency electrical signals (HF). DC power supply 53p is electrically connected to the suction cup electrode CE3 via switch 53s. Filter 53f may also be connected between DC power supply 53p and suction cup electrode CE3. Filter 53f is a low-pass filter configured to cut off or attenuate RF signals such as high-frequency electrical signals (HF). When voltages from DC power supplies 52p and 53p are applied to suction cup electrodes CE2 and CE3, electrostatic attraction is generated between the electrostatic chuck 1111 and the edge ring ER. The edge ring ER is attracted to and held by the second region R2 by the generated electrostatic attraction. Furthermore, a voltage can be applied to suction cup electrodes CE2 and CE3 to create a potential difference between them. That is, the second region R2 can form a bipolar electrostatic chuck.
[0079] In the plasma processing apparatus 1A, the bias power supply 42 is configured to supply electrical bias EB to both the first electrode BE1 and the second electrode BE2. The bias power supply 42 may be a single power supply configured to distribute electrical bias EB to both the first electrode BE1 and the second electrode BE2. The bias power supply 42 may include a first power supply 421 electrically connected to the first electrode BE1 and a second power supply 422 electrically connected to the second electrode BE2. The first power supply 421 supplies electrical bias EB to the first electrode BE1, and the second power supply 422 supplies electrical bias EB to the second electrode BE2.
[0080] In the plasma processing apparatus 1A, the control unit 2 can control the bias power supply 42 so that the level of the electrical bias EB supplied to the second electrode BE2 increases relative to the level of the electrical bias EB supplied to the first electrode BE1 as the consumption of the edge ring ER increases. When the electrical bias EB includes a voltage pulse VP, the level of the electrical bias EB is the amplitude of the voltage pulse VP. When the electrical bias EB is a bias high-frequency power LF, the level of the electrical bias EB is the power level of the bias high-frequency power LF. According to the plasma processing apparatus 1A, by adjusting the level of the electrical bias EB supplied to the second electrode BE2 relative to the level of the electrical bias EB supplied to the first electrode BE1, the difference between the upper end position of the sheath layer on the substrate W and the upper end position of the sheath layer on the edge ring ER can be reduced. As a result, the direction of ion travel relative to the edge of the substrate W can be corrected to a perpendicular direction.
[0081] Furthermore, the thickness of the sheath is inversely proportional to the half-power of the plasma density. This is because P... S The plasma density fluctuates little because a high-frequency power HF is continuously supplied to the source. Therefore, by continuously supplying individually level-adjusted electrical biases EB to the first electrode BE1 and the second electrode BE2, the difference between the upper position of the sheath on the substrate W and the upper position of the sheath on the edge ring ER can be reduced.
[0082] Hereinafter, examples of processing circuits that can be used as one or more processing circuits in plasma processing apparatus 1 and 1A, such as control unit 2 and / or power system 30S, will be described. Figure 11 This is a block diagram of a processing circuit that performs the actions described in this specification on a computer. Figure 11The diagram illustrates a processing circuit 130 capable of controlling control processes on any computer. The flowchart's descriptions or function blocks represent portions of modules, segments, or code containing one or more executable instructions for implementing specific logical functions or steps of the processing. As will be understood by those skilled in the art, other embodiments having functions capable of being executed in a sequence different from that shown or described, such as substantially simultaneous or in the reverse order, are included within the scope of the exemplary embodiments of this disclosure, depending on the associated functions. The various elements, features, and processes described in this specification can be used independently of each other or combined in various ways. Any combination and partial combination that can be conceived can be included within the scope of this disclosure.
[0083] exist Figure 11 In this embodiment, the processing circuit 130 includes a CPU 1200 that implements one or more control processes described above / below. Processing data and commands can be stored in the memory 1202. These processing data and commands can also be stored on a storage medium 1204 such as a hard disk drive (HDD) or portable storage medium, or they can be stored remotely. Furthermore, the present disclosure as described in the claims is not limited to the form of a computer-readable medium storing the processing commands of this invention. For example, these commands can also be stored on any other information processing device such as a CD, DVD, flash memory, RAM, ROM, PROM, EPROM, EEPROM, hard disk, or a server and / or computer that communicates with the processing circuit 130.
[0084] Furthermore, the present disclosure described in the claims can be provided as a utility program, a background daemon, a component of an operating system, or a combination thereof, and can also be executed in conjunction with CPU 1200 and operating systems known to those skilled in the art such as Microsoft Windows (registered trademark), UNIX (registered trademark), Solaris (registered trademark), LINUX (registered trademark), and Apple MAC-OS.
[0085] The hardware elements for constructing the processing circuit 130 can be implemented using various circuit elements. Furthermore, the functions of each of the above-described embodiments can be implemented using a circuit that includes one or more processing circuits. For example... Figure 11 As shown, the processing circuit includes a processing device that executes a specific program, such as a processing unit (CPU) 1200. The processing circuit also includes application-specific integrated circuits (ASICs), conventional circuit components configured to perform the described functions, and other devices.
[0086] exist Figure 11In this embodiment, the processing circuit 130 includes a CPU 1200 that performs the aforementioned processing. The processing circuit 130 may be a general-purpose computer or a specific special-purpose machine. In one embodiment, when the processing device 1200 is programmed to control the plasma generation unit 12 and the gas supply unit 20, and / or the high-frequency power supply 41 and the bias power supply 42, the processing circuit 130 functions as a specific special-purpose machine.
[0087] Alternatively, as those skilled in the art will understand, the CPU 1200 may also be implemented using an FPGA, ASIC, PLD, and / or discrete logic circuits. Furthermore, the CPU 1200 may also be implemented as multiple processing devices that cooperate in a manner that executes the processes of the present invention described above in parallel.
[0088] Figure 11 The processing circuitry 130 also includes a network controller 1206 for interface connection with network 1228, such as the Intel Ethernet PRO network interface card from Intel Corporation. As will be understood, network 1228 can be a public network such as the Internet, a private network such as a LAN or WAN, or any combination thereof. It may also include subnetworks such as PSTN or ISDN. Network 1228 can also be a wired network such as Ethernet, or a wireless network such as cellular networks including EDGE, 3G, or 4G wireless cellular systems. The wireless network can also be Wi-Fi, Bluetooth (registered trademark), or any other known form of wireless communication.
[0089] The processing circuitry 130 also includes a display device controller 1208 for interface connection with display devices 1210 such as monitors, graphics cards, and graphics adapters. A general-purpose I / O interface 1212 interfaces with a keyboard and / or mouse 1214, and a touch panel 1216 integrated with or separate from the display device 1210. The general-purpose I / O interface also connects to various peripheral devices 1218 such as printers and scanners.
[0090] The storage device controller 1224 is connected to the storage medium disk 1204 via communication buses 1226 such as ISA, EISA, VESA, and PCI. All components of the processing circuit 130 are interconnected. General features and functions of the display device 1210, keyboard and / or mouse 1214, display device controller 1208, storage device controller 1224, network controller 1206, sound controller 1220, and general-purpose I / O interface 1212 are assumed to be known in this specification for simplicity and are omitted from description.
[0091] The exemplary circuit elements described in this disclosure can be substituted with other elements and may have a different configuration than the examples described in this specification. Furthermore, circuits configured to implement the features described in this specification can be implemented using multiple circuit units (e.g., chips), or these features can be incorporated into the circuitry of a single chipset.
[0092] The functions and features described in this specification can also be performed by various components distributed across the system. For example, more than one processing device may perform the functions of the system, in which case the processing device is distributed across multiple components communicating within the network. As components of the distributed configuration, in addition to various human-machine interfaces and communication devices (display monitors, smartphones, tablets, personal digital assistants (PDAs), etc.), more than one client device and server device capable of sharing processing may also be included. The network can be a private network such as a LAN or WAN, or a public network such as the Internet. Input to the system can be received by direct user input, or remotely in real time or as batch processing. Furthermore, a portion of the embodiments may be implemented on modules or hardware different from those described above. Therefore, other embodiments are also included in the claims.
[0093] The above descriptions have illustrated various exemplary embodiments, but the embodiments are not limited to these exemplary embodiments. Various additions, omissions, substitutions, and modifications are possible. Furthermore, elements from different embodiments can be combined to form other embodiments.
[0094] Various exemplary embodiments included in this disclosure are described below in [E1] to [E17].
[0095] [E1] A plasma processing device, have: chamber; The substrate support portion within the cavity; A high-frequency power supply is configured to supply high-frequency power for generating plasma from the gas within the chamber; A bias power supply configured to supply electrical bias to the substrate support for introducing ions from the plasma onto the substrate support; and The control unit is configured to control the high-frequency power supply and the bias power supply. The control unit is configured to control the high-frequency power supply and the bias power supply so that the source high-frequency power and the electrical bias are continuously and simultaneously supplied during plasma processing. The power level of the source high-frequency power supply is set to 3kW or less, the bias frequency (the reciprocal of the waveform period of the electrical bias, i.e., the bias frequency) is set to less than 400kHz, and the voltage amplitude of the electrical bias is set to 3kV or more.
[0096] [E2] The plasma processing apparatus as described in E1 The control unit is configured to control the bias power supply such that the voltage amplitude increases as time passes during the plasma treatment.
[0097] [E3] Plasma processing apparatus as described in E1 or E2 The control unit is configured to control the bias power supply so that the bias frequency changes as time passes during the plasma treatment.
[0098] [E4] The plasma processing apparatus as described in any one of E1 to E3, The electrical bias is a voltage pulse that is periodically supplied at time intervals of the waveform period, and the voltage amplitude is the amplitude of the voltage pulse.
[0099] [E5] The plasma processing apparatus as described in E4 The control unit is configured to control the bias power supply such that the duty cycle of the voltage pulse in the waveform period decreases as time passes during the plasma treatment.
[0100] [E6] The plasma processing apparatus as described in any one of E1 to E3, The electrical bias is a bias high-frequency power having the bias frequency, and the voltage amplitude is the peak-to-peak voltage of the bias high-frequency power.
[0101] [E7] The plasma processing apparatus as described in any one of E1 to E6, It also includes an exhaust system configured to exhaust the gas inside the chamber. The control unit is configured to control the exhaust system so that the pressure inside the chamber decreases as time passes during the plasma treatment.
[0102] [E8] The plasma processing apparatus as described in any one of E1 to E7, The control unit is configured to control the high-frequency power supply so that the power level of the source high-frequency power supply changes as time passes during the plasma treatment.
[0103] [E9] The plasma processing apparatus as described in any one of E1 to E8, It also includes a temperature regulating mechanism configured to adjust the temperature of the substrate support portion. The control unit is configured to control the temperature adjustment mechanism so that the temperature of the substrate support decreases as time passes during the plasma treatment.
[0104] [E10] A power supply system, have: A high-frequency power supply is configured to supply high-frequency power for generating plasma from gas within the chamber of a plasma processing apparatus; and The bias power supply is configured to supply electrical bias to the substrate support for introducing ions from the plasma into the substrate on the substrate support within the chamber. The high-frequency power supply and the bias power supply are respectively configured to continuously and simultaneously supply the source high-frequency power and the electrical bias during plasma processing. The high-frequency power supply is configured to set the power level of the source high-frequency power to below 3kW during plasma processing. The bias power supply is configured to set the bias frequency, which is the reciprocal of the waveform period of the electrical bias, to less than 400kHz, and set the voltage amplitude of the electrical bias to above 3kV during plasma processing.
[0105] [E11] The power system as described in E10 The bias power supply is configured such that the voltage amplitude increases as time passes during the plasma treatment.
[0106] [E12] Power systems as described in E10 or E11 The bias power supply is configured to change the bias frequency as time passes during the plasma treatment.
[0107] [E13] The power supply system as described in any one of E10 to E12, The electrical bias is a voltage pulse that is periodically supplied at time intervals of the waveform period, and the voltage amplitude is the amplitude of the voltage pulse.
[0108] [E14] The power system as described in E13 The bias power supply is configured to reduce the duty cycle of the voltage pulse in the waveform period as time passes during the plasma treatment.
[0109] [E15] The power supply system as described in any one of E10 to E12, The electrical bias is a bias high-frequency power having the bias frequency, and the voltage amplitude is the peak-to-peak voltage of the bias high-frequency power.
[0110] [E16] The power supply system as described in any one of E10 to E15, The high-frequency power supply is configured to change the power level of the source high-frequency power as time passes during the plasma treatment.
[0111] [E17] A plasma processing method, The process includes the following steps: (a) During plasma processing, a high-frequency power source is continuously supplied to generate plasma from gas within the chamber of the plasma processing apparatus; and (b) During the plasma treatment, in order to introduce ions from the plasma into the substrate on the substrate support within the chamber, an electrical bias is supplied to the substrate support simultaneously and continuously with the supply of the source high-frequency power in (a). During the plasma treatment, the power level of the source high-frequency power is set to below 3kW, the reciprocal of the time length of the electrical bias waveform period, i.e., the bias frequency, is set to less than 400kHz, and the voltage amplitude of the electrical bias is set to above 3kV.
[0112] Based on the foregoing description, it should be understood that various embodiments of this disclosure have been described in this specification for illustrative purposes, and various modifications can be made without departing from the scope and spirit of this disclosure. Therefore, the various embodiments disclosed in this specification are not intended to be limiting, and the true scope and spirit are set forth in the appended claims.
[0113] Explanation of reference numerals in the attached figures 1…Plasma processing device, 2…Control unit, 10…Cavity, 11…Substrate support unit, 41…High-frequency power supply, 42…Bias power supply.
Claims
1. A plasma processing device, have: chamber; The substrate support portion within the cavity; A high-frequency power supply is configured to supply high-frequency power for generating plasma from the gas within the chamber; A bias power supply configured to supply electrical bias to the substrate support for introducing ions from the plasma onto the substrate support; and The control unit is configured to control the high-frequency power supply and the bias power supply. The control unit is configured to control the high-frequency power supply and the bias power supply so that the source high-frequency power and the electrical bias are continuously and simultaneously supplied during plasma processing. The power level of the source high-frequency power supply is set to 3kW or less, the bias frequency (the reciprocal of the waveform period of the electrical bias, i.e., the bias frequency) is set to less than 400kHz, and the voltage amplitude of the electrical bias is set to 3kV or more.
2. The plasma processing apparatus as described in claim 1, The control unit is configured to control the bias power supply such that the voltage amplitude increases as time passes during the plasma treatment.
3. The plasma processing apparatus as described in claim 1, The control unit is configured to control the bias power supply so that the bias frequency changes as time passes during the plasma treatment.
4. The plasma processing apparatus as described in any one of claims 1 to 3, The electrical bias is a voltage pulse that is periodically supplied at time intervals of the waveform period, and the voltage amplitude is the amplitude of the voltage pulse.
5. The plasma processing apparatus as described in claim 4, The control unit is configured to control the bias power supply such that the duty cycle of the voltage pulse in the waveform period decreases as time passes during the plasma treatment.
6. The plasma processing apparatus according to any one of claims 1 to 3, The electrical bias is a bias high-frequency power having the bias frequency, and the voltage amplitude is the peak-to-peak voltage of the bias high-frequency power.
7. The plasma processing apparatus as described in any one of claims 1 to 3, It also includes an exhaust system configured to exhaust the gas inside the chamber. The control unit is configured to control the exhaust system so that the pressure inside the chamber decreases as time passes during the plasma treatment.
8. The plasma processing apparatus as described in any one of claims 1 to 3, The control unit is configured to control the high-frequency power supply so that the power level of the source high-frequency power supply changes as time passes during the plasma treatment.
9. The plasma processing apparatus as described in any one of claims 1 to 3, It also includes a temperature regulating mechanism configured to adjust the temperature of the substrate support portion. The control unit is configured to control the temperature adjustment mechanism so that the temperature of the substrate support decreases as time passes during the plasma treatment.
10. A power supply system, have: A high-frequency power supply is configured to supply high-frequency power for generating plasma from gas within the chamber of a plasma processing apparatus; and The bias power supply is configured to supply electrical bias to the substrate support for introducing ions from the plasma into the substrate on the substrate support within the chamber. The high-frequency power supply and the bias power supply are respectively configured to continuously and simultaneously supply the source high-frequency power and the electrical bias during plasma processing. The high-frequency power supply is configured to set the power level of the source high-frequency power to below 3kW during plasma processing. The bias power supply is configured to set the bias frequency, which is the reciprocal of the waveform period of the electrical bias, to less than 400kHz, and set the voltage amplitude of the electrical bias to above 3kV during plasma processing.
11. The power supply system as claimed in claim 10, The bias power supply is configured such that the voltage amplitude increases as time passes during the plasma treatment.
12. The power supply system as described in claim 10, The bias power supply is configured to change the bias frequency as time passes during the plasma treatment.
13. The power supply system as described in any one of claims 10 to 12, The electrical bias is a voltage pulse that is periodically supplied at time intervals of the waveform period, and the voltage amplitude is the amplitude of the voltage pulse.
14. The power supply system as described in claim 13, The bias power supply is configured to reduce the duty cycle of the voltage pulse in the waveform period as time passes during the plasma treatment.
15. The power supply system as described in any one of claims 10 to 12, The electrical bias is a bias high-frequency power having the bias frequency, and the voltage amplitude is the peak-to-peak voltage of the bias high-frequency power.
16. The power supply system as described in any one of claims 10 to 12, The high-frequency power supply is configured to change the power level of the source high-frequency power as time passes during the plasma treatment.
17. A plasma processing method, The process includes the following steps: (a) During plasma processing, a high-frequency power source is continuously supplied to generate plasma from gas within the chamber of the plasma processing apparatus; and (b) During the plasma treatment, in order to introduce ions from the plasma into the substrate on the substrate support within the chamber, an electrical bias is supplied to the substrate support simultaneously and continuously with the supply of the source high-frequency power in (a). During the plasma treatment, the power level of the source high-frequency power is set to below 3kW, the reciprocal of the time length of the electrical bias waveform period, i.e., the bias frequency, is set to less than 400kHz, and the voltage amplitude of the electrical bias is set to above 3kV.
Citation Information
Patent Citations
Plasma treatment apparatus of substrate and plasma treatment method thereof
JP2009187975A