Process for the production of electronic grade polysilicon by silane method

Abstract

The application discloses a kind of silane method production electronic grade polycrystalline silicon process, belong to electronic grade polycrystalline silicon preparation technical field.The process includes: the inside diameter of sleeve is 180mm-400mm, surface roughness Ra<50, using pure nickel / nickel alloy / stainless steel material or the composite structure of stainless steel, graphene heat dissipation film and reflection layer;Control sleeve in and out cooling liquid temperature difference is less than 50 ℃;Silane gas pipeline is set on a pair of sleeve center line, outlet height is 300mm-2500mm from base plate;With double-ring silicon rod arrangement and gradient growth formula.The application solves the problems of uneven temperature field, low silane decomposition rate, poor deposition uniformity and high energy consumption in the prior art, and can stably prepare electronic grade polycrystalline silicon with purity not less than 9N, silane decomposition rate ≥95%, product qualification rate ≥98%, production cost is reduced by more than 30%, and can be implemented by relying on the improvement of old siemens method equipment.

Description

Technical Field

[0001] This invention relates to the field of electronic-grade polycrystalline silicon preparation technology, specifically to a silane method for producing electronic-grade polycrystalline silicon, and more particularly to an apparatus and process formulation for preparing electronic-grade polycrystalline silicon using a silane method chemical vapor deposition (CVD) furnace. Background Technology

[0002] Electronic-grade polysilicon (EG) is a key product in the semiconductor basic raw materials industry. Its core technical indicator is ultra-high purity, with industry standards explicitly requiring a purity of no less than nine nines (i.e., 9N, purity ≥ 99.9999999%). EG is widely used in the manufacturing of semiconductor devices and integrated circuits in high-end fields such as artificial intelligence, automatic control, information processing, and photoelectric conversion. It is an indispensable and irreplaceable core material for these high-end products. Industry statistics confirm that over 95% of integrated circuit chips and various semiconductor devices worldwide use silicon as their core substrate, highlighting the fundamental and strategic position of EG in the semiconductor industry and high-end manufacturing.

[0003] Currently, the mainstream industrial production process for polysilicon is the modified Siemens process. The specific steps are as follows: chlorine and hydrogen are reacted to synthesize hydrogen chloride; the hydrogen chloride reacts with industrial silicon powder to produce trichlorosilane; after purification by distillation, it is deposited as polysilicon in a hydrogen reduction furnace via vapor deposition. This process has inherent drawbacks: the reaction exhaust gas contains a large amount of chlorosilanes, requiring specialized recovery and treatment, resulting in a complex process, high production costs, and environmental pollution risks.

[0004] Compared to the modified Siemens process, the silane process offers significant advantages, achieving a silane decomposition rate of over 95%. The main component of the reaction tail gas is hydrogen, eliminating the need for chlorosilane recovery. This simplifies the process, reduces production costs, and provides excellent environmental performance. However, existing silane processes still face numerous technical challenges in practical applications. Specifically, the reactor sleeve, a core component for regulating the reaction temperature field, lacks clearly defined structural parameters (such as inner diameter range and material selection) and surface treatment processes. This leads to unstable thermal radiation coefficients, poor temperature uniformity within the reaction chamber, and uneven polycrystalline silicon deposition, making it impossible to stably produce electronic-grade polycrystalline silicon conforming to the 9N standard. Furthermore, the temperature difference between the inlet and outlet of the coolant in the sleeve is not controlled. Coolant temperature fluctuations directly result in uneven temperature distribution within the reactor, affecting silane decomposition efficiency (making it difficult to consistently achieve over 95%) and causing fluctuations in polycrystalline silicon product purity and poor quality consistency. Furthermore, the installation location of the silane inlet pipeline, including its relative position to the sleeve and its height from the chassis, is not clearly specified. This leads to uneven distribution of silane gas after entering the reactor, with local concentrations that are too high or too low. This results in incomplete silane decomposition, uneven silicon rod growth, increased production energy consumption, and reduced product yield. More importantly, existing technologies do not provide a complete technical solution with clearly defined structural parameters, optimized process formulation, and strong feasibility. It is difficult to achieve synergistic control of efficient silane decomposition and uniform polycrystalline silicon deposition. Moreover, it is impossible to effectively utilize existing modified Siemens process equipment for upgrading, resulting in idle and wasted equipment assets and persistently high production costs for electronic-grade polycrystalline silicon.

[0005] Therefore, it is necessary to develop a silane process for producing electronic-grade polysilicon with well-defined parameters, stable process, low energy consumption, high purity, and the ability to be implemented by modifying existing equipment, in order to solve the above-mentioned technical problems. Summary of the Invention

[0006] This application provides a silane-based process for producing electronic-grade polycrystalline silicon. By optimizing the core structural parameters of the reactor device, clarifying material requirements and growth formulas, it achieves synergistic control of efficient silane decomposition and uniform polycrystalline silicon deposition, balancing energy consumption, environmental friendliness, and product purity. This solves the core problems in existing technologies, such as low silane decomposition efficiency, poor polycrystalline silicon deposition uniformity, unstable product purity, high energy consumption, and poor environmental friendliness.

[0007] To achieve the above objectives, the present invention adopts the following technical solution: A silane method for producing electronic-grade polycrystalline silicon is disclosed, which uses a silane CVD reactor. The silane CVD reactor includes a bell jar, a chassis, a sleeve, electrodes, and a silane inlet pipeline. The bell jar and the chassis are sealed together to form a reaction chamber. The sleeve is disposed inside the reaction chamber. The electrodes pass through the chassis. The silane inlet pipeline passes through the chassis and extends into the reaction chamber. The inner diameter of the sleeve is 180mm-400mm, and the inner surface of the sleeve is polished with a surface roughness Ra<50. The sleeve is connected to a coolant, and the temperature difference between the coolant entering and exiting the sleeve is less than 50℃. The silane inlet pipeline is located on the center line of a pair of sleeves, and the height of the silane inlet pipeline from the chassis is 300mm-2500mm. The process includes the following steps: (1) Silicon core installation: A silicon core with a diameter of 612 mm and a length of 1.53 m is fixed to the upper end of the electrode using a graphite clamp. The silicon core is arranged in a U-shape or gate shape in the reaction chamber. (2) Pretreatment: Vacuum treatment is performed on the reaction chamber, and coolant is introduced into the outside of the sleeve and the flow rate is adjusted so that the sleeve temperature reaches the preset range; (3) Gas reaction: Process gas composed of silane and hydrogen is introduced into the reaction chamber. A high voltage of 5000-25000V is applied to the silicon core through the electrode, which breaks down the silicon core and causes the silicon core to generate high temperature and heat. The silane gas decomposes on the surface of the silicon core, and elemental silicon is deposited on the surface of the silicon core. (4) Growth control: During the reaction process, the temperature difference of the coolant, the decomposition rate of silane and the composition of the reaction tail gas are monitored in real time. The process parameters are finely adjusted according to the monitoring results, and the silicon core diameter is gradually increased to 6200mm. (5) Exhaust gas treatment: The reaction exhaust gas is discharged through the exhaust port at the top of the bell jar for recycling.

[0008] Furthermore, the inner diameter of the sleeve is selected from one of the following dimensions: 280±15mm, 300±15mm, 330±15mm, 370±15mm.

[0009] Furthermore, the sleeve is made of one or more of the following materials: pure nickel, nickel alloy, stainless steel, silver, chromium, molybdenum, Hastelloy, and Stellite; the pure nickel grades include Ni200, Ni201, and Ni205, and the stainless steel grades include 316L and 304.

[0010] Furthermore, the sleeve has a composite layer structure, including an inner wall, an outer wall, and a reflective layer; both the inner and outer walls are made of stainless steel as a support layer, and a graphene heat dissipation film is provided between the inner and outer walls as an intermediate heat-conducting layer; the reflective layer is made of one or more of pure nickel, nickel alloy, silver, chromium, molybdenum, Hastelloy, and Stellite alloy; the stainless steel inner wall, the intermediate graphene heat dissipation film, and the reflective layer are connected by welding and polishing, or by sealing with epoxy resin.

[0011] Furthermore, the temperature difference between the coolant entering and exiting the sleeve is 315°C.

[0012] Furthermore, the reaction chamber is provided with two rings of silicon rods, namely an inner ring of silicon rods and an outer ring of silicon rods; the inner ring is provided with 4 pairs of silicon rods and the outer ring is provided with 12 pairs of silicon rods, for a total of 16 pairs; or the inner ring is provided with 8 pairs of silicon rods and the outer ring is provided with 12 pairs of silicon rods, for a total of 24 pairs.

[0013] Furthermore, the inner and outer silicon rods are interconnected via a bridge; or adjacent inner silicon rods are interconnected, and adjacent outer silicon rods are interconnected.

[0014] Furthermore, the volume concentration of silane in the process gas is 15%-30%, and the volume concentration of hydrogen is 70%-85%.

[0015] Furthermore, in steps (3) and (4), the silane flow rate and current value are adjusted according to the time gradient, once every 0.54 hours, preferably once every 1 hour.

[0016] Furthermore, the silicon core has a square or circular cross-section.

[0017] One or more technical solutions provided in the embodiments of this application have at least the following technical effects or advantages: By specifying the material, inner diameter range, optimal dimensions, and surface treatment process of the sleeve, the thermal radiation coefficient of the sleeve is ensured to be stable, and the temperature field inside the reaction chamber is uniformly distributed, significantly improving the uniformity of polycrystalline silicon deposition. Electronic-grade polycrystalline silicon with a purity ≥99.9999999% can be stably prepared.

[0018] By limiting the temperature difference range between the inlet and outlet of the coolant in the sleeve (less than 50℃, preferably 315℃), the fluctuation of the internal temperature field of the reactor can be effectively controlled, so that the silane decomposition rate can be stably maintained at more than 95%, ensuring the consistency of product purity and reducing the risk of quality fluctuation.

[0019] Clearly define the installation location (center line of a pair of sleeves) and height range (300mm-2500mm) of the silane inlet pipeline to achieve uniform distribution of silane gas in the reaction chamber, avoid excessively high or low local concentrations, improve the sufficiency of silane decomposition, reduce production energy consumption, and increase the product qualification rate to over 98%.

[0020] The process gas formulation and silicon core installation method are optimized to further enhance the stability of polycrystalline silicon growth. At the same time, the reaction exhaust gas can be recycled and reused, reducing production costs by more than 30%, and there is no chlorosilane pollution. The environmental performance is significantly better than existing technologies.

[0021] All parameters in the technical solution have been tested and verified, making it highly feasible and adaptable to the production needs of electronic-grade polysilicon and zone-melting polysilicon of different specifications, with a wide range of applications.

[0022] The technical solution of this invention can transform outdated Siemens process reduction furnaces into electronic-grade polysilicon by upgrading and transforming existing old equipment. This will activate outdated production capacity into advanced production capacity, and the produced electronic-grade polysilicon can meet the needs of high-end fields such as artificial intelligence and high-end integrated circuits, thereby improving my country's independent production capacity of electronic-grade polysilicon and breaking through technical barriers. Attached Figure Description

[0023] Figure 1 This is a schematic diagram of the silane decomposition reactor used in this invention; Figure 2 This is a schematic diagram of the chassis and the connection method of the two pairs of silicon rods; Figure 3 This is a schematic diagram of the chassis and silicon rod connection method for 12 pairs of silicon rods; Figure 4 This is a schematic diagram of the chassis and silicon rod connection method for 24 pairs of silicon rods; Figure 5 This is a schematic diagram of a composite layer structure for a single sleeve. Detailed Implementation

[0024] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains; the terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to limit the invention; the term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0025] The present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments.

[0026] like Figure 1 As shown, the silane decomposition reactor used in this invention is the core component of the silane-based chemical vapor deposition (CVD) furnace, mainly composed of a bell jar, a chassis, a sleeve, electrodes, and a silane inlet pipeline. The bell jar is sealed to the chassis, forming a closed reaction chamber; the sleeve is fixedly installed or detachably connected to the chassis, located inside the reaction chamber, and its exterior is connected to the coolant to control the sleeve temperature, thereby regulating the temperature field inside the reaction chamber; the electrodes are installed through the chassis, extending to the inside of the reaction chamber at their upper ends, for mounting and fixing the silicon core; the silane inlet pipeline passes through the chassis and extends into the reaction chamber, for introducing process gases such as silane and hydrogen into the reaction chamber; the exhaust port is located at the top or bottom of the bell jar, for discharging reaction tail gas (mainly hydrogen).

[0027] like Figure 2-4 As shown, the silicon chip interconnection method of the present invention includes various embodiments: like Figure 2As shown, two pairs of silicon rods are used, connected to each other in pairs; like Figure 3 As shown, the inner ring has 4 pairs of silicon rods and the outer ring has 12 pairs of silicon rods; after one pair of silicon rods in the outer ring is connected, the silicon cores of the inner and outer rings are connected to each other through a bridge; or two adjacent pairs of silicon rods in the inner ring are connected to each other, and two adjacent pairs of silicon rods in the outer ring are connected to each other. like Figure 4 As shown, there are 8 pairs of silicon rods in the inner ring and 12 pairs of silicon rods in the outer ring; the silicon rods in the inner ring are connected to each other in pairs, and the silicon rods in the outer ring are connected to each other in pairs.

[0028] like Figure 5 As shown, the structure includes an inner wall, an outer wall, and a reflective layer. Both the inner and outer walls are made of stainless steel as a support layer, with a graphene heat dissipation film serving as an intermediate heat-conducting layer between them. The reflective layer is made of one or more of the following materials: pure nickel, nickel alloy, silver, chromium, molybdenum, Hastelloy, and Stellite. The stainless steel inner wall, the intermediate graphene heat dissipation film, and the reflective layer can be welded together and then polished, or sealed with epoxy resin. This composite structure effectively solves some defects present in the welding process of certain materials, avoiding the problem of easy breakage of the sleeve due to alternating high and low temperatures caused by air mixed in the coolant, thereby improving product quality and safety.

[0029] The technical solution of the present invention will be further described below through specific embodiments.

[0030] Example 1: Electronic-grade polycrystalline silicon with a purity of 9N was prepared. A circular silicon core with a diameter of 6.6 mm and a length of 2.15 m was selected and mounted on the electrode in a U-shape. The silane inlet pipeline was located on the center line of a pair of sleeves, 1400 mm above the chassis. The reflective layer on the inner wall of the sleeve was made of pure nickel and polished to Ra < 50. The inner diameter was 280 ± 15 mm. The temperature difference between the coolant inlet and outlet was controlled at 45 °C. The volume concentration of silane in the process gas was 30%, and the volume concentration of hydrogen was 70%. The breakdown voltage was 12000 V.

[0031] During the reaction, the silane decomposition rate exceeded 95.5%, the power consumption for preparing electronic-grade polycrystalline silicon was 1930 kWh / kg, and the final product was rod-shaped polycrystalline silicon with a diameter of 80-140 mm, a smooth and dense surface with a material density of over 75%, and a purity of 99.99999992%, which meets the electronic-grade standard.

[0032] This embodiment uses formulation 1, with the silane flow rate and current value adjusted over time, every hour. The specific parameters of formulation 1 are shown in Table 1 below: Table 1 Formulation of Example 1

[0033] Example 2: Electronic-grade polycrystalline silicon with a purity of 9N was prepared. A square silicon core with a side length of 7mm and a length of 2.2m was selected and mounted on the electrode in a gate shape. The silane inlet line was located on the center line of a pair of sleeves, 1300mm above the base. The sleeves were made of stainless steel or copper-nickel alloy, polished internally, and had an inner diameter of 300±15mm. The temperature difference between the inlet and outlet of the coolant was controlled at 30℃. The silane decomposition rate during the reaction was 97.2%, and the power consumption for electronic-grade polycrystalline silicon preparation was 60 kWh / kg. Finally, rod-shaped polycrystalline silicon with a diameter of 100-150mm was obtained, which met the requirements of zone melting and electronic-grade polycrystalline silicon quality.

[0034] This embodiment uses formulation 2. The silane intake rate and current value are adjusted according to a time gradient, or they can be adjusted after data fitting. The specific parameters of formulation 2 are shown in Table 2 below.

[0035] Table 2 Formulation of Example 2

[0036] Example 3: Zone-melting polycrystalline silicon with a purity of 9N was prepared. A circular silicon core with a diameter of 6.6 mm and a length of 2.5 m was selected and mounted on the electrode in a gate shape. The silane inlet pipeline was located on the center line of a pair of sleeves, 400 mm above the chassis. The sleeves were made of Hastelloy alloy and polished internally to Ra < 50, with an inner diameter of 330 ± 15 mm. The temperature difference between the inlet and outlet of the coolant was controlled at 15 °C.

[0037] The silane decomposition rate during the reaction was 97.2%, and the power consumption for preparing zone-melted polycrystalline silicon did not exceed 150 kWh / kg. Finally, rod-shaped polycrystalline silicon with a diameter of 165 mm was obtained, which met the quality requirements of zone-melted polycrystalline silicon.

[0038] Table 3 Formulation of Example 3

[0039] This embodiment uses formulation 3. The silane intake rate and current value are adjusted according to the time gradient, or they can be adjusted after data fitting. The specific parameters of formulation 3 are shown in Table 3 below.

[0040] Example 4: A zone-melting polycrystalline silicon with a purity of 9N was prepared. A square silicon core with a side length of 7mm and a length of 3m was selected and mounted on the electrode in a gate shape. The silane inlet line was located on the center line of a pair of sleeves, 600mm above the base. The sleeves were made of pure silver, polished internally to Ra < 50, and had an inner diameter of 370 ± 15mm. The temperature difference between the coolant inlet and outlet was controlled at 5℃. The volume concentration of silane in the process gas was 15%, and the volume concentration of hydrogen was 85%. The applied voltage was 18000V.

[0041] The silane decomposition rate during the reaction was 97.2%, and the power consumption for preparing zone-melted polycrystalline silicon was 150-230 kWh / kg. Finally, rod-shaped polycrystalline silicon with a diameter of 170 mm was obtained, which met the quality requirements of zone-melted polycrystalline silicon.

[0042] This embodiment uses formulation 4. The silane intake rate and current value are adjusted according to the time gradient, or they can be adjusted after data fitting. The specific parameters of formulation 4 are shown in Table 4 below.

[0043] Table 4 Formulation of Example 4

[0044] Example 5: This example is a method for retrofitting existing equipment, as detailed below: Using the outdated modified Siemens process trichlorosilane reduction furnace as the basic equipment, it was converted into a silane decomposition reactor through the following modification steps: (1) A sleeve is added to the original reaction chamber. The inner diameter of the sleeve is selected according to the furnace body specifications: 280±15mm, 300±15mm, 330±15mm or 370±15mm. The sleeve material is pure nickel or copper-nickel alloy, and the inner surface is polished to Ra<50. The outside of the sleeve is connected to the original cooling system.

[0045] (2) Adjust the silane inlet pipeline and set its outlet on the center line of a pair of sleeves. The distance between the outlet and the chassis should be controlled to be 300mm-2500mm.

[0046] (3) The original main structure such as electrodes, bell jar, and chassis is retained. The silicon core installation method, silicon rod arrangement method, process gas formula and growth control method are all implemented according to any one of the schemes in Examples 1-4.

[0047] (4) Replace the original chlorosilane tail gas recovery system with a hydrogen recovery and recycling system.

[0048] Through the above modifications, the existing Siemens process equipment can be upgraded to silane process electronic-grade polysilicon production equipment, activating outdated production capacity into advanced capacity, significantly reducing investment in new equipment, and producing electronic-grade polysilicon with costs and energy consumption close to or even lower than photovoltaic-grade polysilicon.

[0049] It should be noted that formulations 1-4 in the above embodiments are formulation parameters for a single pair of silicon rods. When using multiple pairs of silicon rods, simply multiply the silane amount by the number of silicon rod pairs. In actual use, the silane flow rate and time data can be fitted, and the silane and current values ​​can be adjusted every 4, 2, 1, and 0.5 hours, preferably every 1 hour.

[0050] Furthermore, the inner wall of the sleeve of this invention can be made of materials such as pure nickel, nickel alloy, silver, chromium, molybdenum, Hastelloy, Stellite, or stainless steel; or it can adopt a composite layer structure, such as... Figure 5 As shown: the inner wall uses stainless steel as the support layer, the middle layer uses graphene heat dissipation film as the heat-conducting layer, and the outer reflective layer uses high-temperature resistant, corrosion-resistant, and thermally stable metal materials such as pure nickel, nickel alloy, silver, chromium, molybdenum, Hastelloy, and Stellite alloy. The stainless steel inner wall, the graphene heat dissipation film middle layer, and the outer reflective layer can be welded and polished, or sealed with epoxy resin. This composite structure can effectively solve some defects in the welding process of materials, avoid the problem of easy cracking of the sleeve due to alternating high and low temperatures caused by air mixed in the coolant, thereby improving product quality and safety.

[0051] When the purity of the raw silane fluctuates, the process is adjusted accordingly. When the content of impurities (such as boron and phosphorus) in the silane raw material increases, these impurities will participate in the competitive reaction and reduce the deposition rate and product purity. In this case, the inlet pipe height is increased from the standard 1400mm to 2000mm to lengthen the gas diffusion path and promote the uniform distribution and discharge of impurities in the gas phase; simultaneously, the temperature difference between the coolant inlet and outlet is narrowed from 30℃ to 6±1℃ to enhance temperature field stability and suppress impurity incorporation; the silane flow rate is reduced by 12%-15% according to the formulation baseline value to ensure the decomposition reaction takes place under purer conditions.

[0052] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. For those skilled in the art, the present invention can have various modifications and variations. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A silane-based process for producing electronic-grade polycrystalline silicon, characterized in that, The preparation is carried out using a silane CVD reactor, which includes a bell jar, a chassis, a sleeve, electrodes, and a silane inlet pipeline. The bell jar and the chassis are sealed together to form a reaction chamber. The sleeve is disposed inside the reaction chamber. The electrodes are disposed through the chassis. The silane inlet pipeline passes through the chassis and extends into the reaction chamber. The inner diameter of the sleeve is 180mm-400mm, and the inner surface of the sleeve is polished with a surface roughness Ra<50. The sleeve is connected to a coolant, and the temperature difference between the coolant entering and exiting the sleeve is less than 50℃. The silane inlet pipeline is located on the center line of a pair of sleeves, and the height of the silane inlet pipeline from the chassis is 300mm-2500mm. The process includes the following steps: (1) Silicon core installation: A silicon core with a diameter of 6-12 mm and a length of 1.5-3 m is fixed to the upper end of the electrode using a graphite clamp. The silicon core is arranged in a U-shape or gate shape in the reaction chamber. (2) Pretreatment: Vacuum treatment is performed on the reaction chamber, and coolant is introduced into the outside of the sleeve and the flow rate is adjusted so that the sleeve temperature reaches the preset range; (3) Gas-breathing reaction: process gas composed of silane and hydrogen is introduced into the reaction chamber. A high voltage of 5000-25000V is applied to the silicon core through the electrode, which breaks down the silicon core and causes the silicon core to generate high temperature and heat. The silane gas decomposes on the surface of the silicon core, and elemental silicon is deposited on the surface of the silicon core. (4) Growth control: During the reaction process, the temperature difference of the coolant, the decomposition rate of silane and the composition of the reaction tail gas are monitored in real time. The process parameters are finely adjusted according to the monitoring results, and the silicon core diameter is gradually increased to 6-200mm. (5) Exhaust gas treatment: The reaction exhaust gas is discharged through the exhaust port at the top of the bell jar for recycling.

2. The silane method for producing electronic-grade polycrystalline silicon according to claim 1, characterized in that, The inner diameter of the sleeve is selected from one of the following dimensions: 280±15mm, 300±15mm, 330±15mm, 370±15mm.

3. The silane method for producing electronic-grade polycrystalline silicon according to claim 1, characterized in that, The sleeve is made of one or more of the following materials: pure nickel, nickel alloy, silver, chromium, molybdenum, Hastelloy, Stellite, and stainless steel; the pure nickel grades include Ni200, Ni201, and Ni205, and the stainless steel grades include 316L and 304.

4. The silane method for producing electronic-grade polycrystalline silicon according to claim 1, characterized in that, The sleeve has a composite layer structure, including an inner wall, an outer wall, and a reflective layer. Both the inner and outer walls are made of stainless steel as the support layer, and a graphene heat dissipation film is provided between the inner and outer walls as an intermediate heat-conducting layer. The reflective layer is made of one or more of pure nickel, nickel alloy, silver, chromium, molybdenum, Hastelloy, and Stellite alloy. The stainless steel inner wall, the intermediate graphene heat dissipation film, and the reflective layer are connected by welding and polishing, or by sealing with epoxy resin.

5. The silane method for producing electronic-grade polycrystalline silicon according to claim 1, characterized in that, The temperature difference between the coolant entering and exiting the sleeve is 3-15℃.

6. The silane method for producing electronic-grade polycrystalline silicon according to claim 1, characterized in that, The reaction chamber is provided with two rings of silicon rods, namely an inner ring of silicon rods and an outer ring of silicon rods; the inner ring is provided with 4 pairs of silicon rods and the outer ring is provided with 12 pairs of silicon rods, for a total of 16 pairs; or the inner ring is provided with 8 pairs of silicon rods and the outer ring is provided with 12 pairs of silicon rods, for a total of 24 pairs.

7. The silane method for producing electronic-grade polycrystalline silicon according to claim 6, characterized in that, The inner and outer silicon rods are connected to each other via a bridge; or adjacent inner silicon rods are connected to each other, and adjacent outer silicon rods are connected to each other.

8. The silane method for producing electronic-grade polycrystalline silicon according to claim 1, characterized in that, The process gas contains 15%-30% silane by volume and 70%-85% hydrogen by volume.

9. The silane method for producing electronic-grade polycrystalline silicon according to claim 1, characterized in that, In steps (3) and (4), the silane flow rate and current value are adjusted according to the time gradient, once every 0.54 hours, preferably once every 1 hour.

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