Wide-range capacitance measurement calibration method for microfluidic chip

Abstract

The application relates to the technical field of capacitance measurement and calibration, in particular to a wide-range capacitance measurement and calibration method for a micro-fluidic chip. The method comprises the following steps: acquiring calibration sampling signals under multiple gain gears of the micro-fluidic chip; determining calibration amplitudes from the sorted calibration sampling signals according to windowing parameters of a sub-quantity corresponding to the multiple gain gears; respectively establishing capacitance conversion relationships corresponding to the multiple gain gears according to calibration capacitance values corresponding to the multiple gain gears and correction amplitudes; setting overlapping anchor capacitances in an overlapping interval to perform cross-gear consistency verification; obtaining a to-be-measured amplitude according to the windowing parameters of the sub-quantity after the verification passes; and converting the to-be-measured amplitude into a to-be-measured capacitance value by using the capacitance conversion relationships. According to the technical scheme provided in the application, the amplitude estimation deviation caused by the nonlinear compression of a large capacitance signal is suppressed, system superposition offset is eliminated, cross-gear measurement consistency is ensured, and the precision and reliability of wide-range capacitance measurement are improved.

Description

Technical Field

[0001] This application relates to the field of capacitance measurement and calibration technology, and in particular to a wide-range capacitance measurement and calibration method for microfluidic chips. Background Technology

[0002] Currently, capacitance measurement, due to its non-contact, marker-free, and fast response characteristics, has become a key method for measuring the dielectric properties and volume of droplets in microfluidic chips. In microfluidic capacitance measurement, the capacitance under test is typically converted into a voltage signal by a transimpedance amplifier (TIA), and then sampled and quantized by an analog-to-digital converter (ADC). Limited by chip parasitic capacitance, front-end gain, and excitation voltage amplitude, a single gain level cannot cover a wide range of capacitances, from extremely small microfluidic droplets to large dielectric volumes. Therefore, existing technologies generally employ a multi-gain-level segmented calibration scheme: calibrating a known calibration capacitor at different gain levels to obtain the conversion slope, and selecting the gain level based on the signal amplitude during measurement and converting it to a capacitance value.

[0003] However, the aforementioned multi-gain level segmented calibration scheme still suffers from several technical defects that limit measurement accuracy and consistency when applied to wide-range (e.g., 10pF to 2200pF) capacitance measurements of microfluidic chips. The physical and structural root causes are as follows: First, under high-voltage excitation conditions, large-capacitance signals exhibit nonlinear compression after ADC sampling. If full-sample data is used for amplitude estimation, the compressed data significantly inflates the amplitude estimate, introducing an error of up to 38%. Second, the signal noise characteristics of different gain levels differ significantly. Existing technologies typically use globally uniform quantile parameters for amplitude estimation, failing to consider the noise and compression characteristics of each gain level, resulting in insufficient robustness of amplitude estimation. Third, traditional methods apply equal weight to each calibration point, but the signal-to-noise ratio of high-capacitance calibration points is far superior to that of low-capacitance calibration points. The equal-weight scheme causes noise-dominated low-capacitance calibration points to lower the overall calibration accuracy, and key parameters (quantiles, slope calculation methods, etc.) rely on repeated manual adjustments, lacking a systematic automatic optimization mechanism. Fourth, the overlapping ranges of adjacent gain levels lack effective cross-validation methods, making it impossible to guarantee the consistency of cross-range measurements. Fifth, the sampling signals acquired under no-load conditions inherently contain system superposition offsets. Without subtraction, the system offset accounts for a higher proportion of the calibration amplitude at the low capacitance calibration point. Directly using this to establish conversion relationships will lead to distortion of the equivalent calibration slope. Sixth, the relationship between capacitance and amplitude may be nonlinear over a wide measurement range, which cannot be accurately described by a single slope. Furthermore, there is a lack of systematic detection and backoff strategies for abnormal data during the measurement process (such as ADC saturation).

[0004] In summary, there is an urgent need in this field for a capacitance measurement calibration method that can take into account the robustness of amplitude estimation, system offset subtraction, cross-range consistency, and adaptive parameter optimization under high-voltage excitation, wide range, and multiple gain levels, so as to fundamentally suppress the above-mentioned error sources and improve the accuracy and reliability of capacitance measurement of microfluidic chips. Summary of the Invention

[0005] This application provides a wide-range capacitance measurement and calibration method for microfluidic chips, which solves the technical problems in the prior art of wide-range capacitance measurement of microfluidic chips, such as signal nonlinear compression leading to amplitude estimation deviation, system superposition offset degrading small capacitance accuracy, and lack of cross-validation between ranges leading to poor consistency.

[0006] To achieve the above objectives, this application adopts the following technical solution: This application provides a wide-range capacitance measurement calibration method for a microfluidic chip, including: acquiring calibration sampling signals corresponding to multiple gain levels of the microfluidic chip, wherein the multiple gain levels correspond to different capacitance measurement ranges, and the capacitance measurement ranges of at least two adjacent gain levels have overlapping intervals; For each gain level, a corresponding quantile clipping window parameter is configured. The calibration sampling signals under each gain level are sorted, and the valid sampling data is determined from the sorted calibration sampling signals according to the corresponding quantile clipping window parameter to obtain the calibration amplitude corresponding to each gain level. The idle sampling signals corresponding to the multiple gain levels in the no-load state are acquired respectively. The idle sampling signals are processed in the same signal processing method as the calibration sampling signals to obtain the idle amplitude corresponding to the multiple gain levels. Based on the difference between the calibration amplitude and the idle amplitude corresponding to the multiple gain levels, the correction amplitude corresponding to the multiple gain levels is obtained. Based on the calibration capacitance value and correction amplitude corresponding to the multiple gain levels, the capacitance conversion relationship corresponding to the multiple gain levels is established respectively. Overlapping anchor capacitors are set within the overlapping range of at least two gain levels. The same overlapping anchor capacitor is measured at the corresponding at least two gain levels. Based on the measurement results of the same overlapping anchor capacitor at different gain levels, the capacitance conversion relationship of each corresponding gain level is verified for cross-level consistency. After the cross-level consistency verification meets the preset consistency conditions, the measurement signal of the capacitor under test is acquired at at least one gain level. The measurement amplitude is obtained according to the quantile clipping parameter of the corresponding gain level. The measurement amplitude is then corrected for no-load offset according to the no-load amplitude of the corresponding gain level to obtain the amplitude to be measured. The amplitude to be measured is converted into the capacitance value to be measured using the capacitance conversion relationship of the corresponding gain level.

[0007] The technical solutions provided by the embodiments of this application achieve at least the following beneficial effects: 1. Configure quantile clipping parameters independently according to gain level to match the effective sampling range of each level with its noise and nonlinear compression characteristics. This avoids data contamination of amplitude estimation in the nonlinear compression region of large capacitor signals under high voltage excitation, reduces calibration slope dispersion, and achieves a significant improvement in calibration accuracy.

[0008] 2. Using the no-load sampling signal for no-load offset correction eliminates the overestimation effect of system superposition offset on the calibration amplitude of low capacitance calibration points, and the measured calibration accuracy of small capacitors below 200pF is significantly improved.

[0009] 3. Cross-range consistency verification is performed by setting global overlap anchor point capacitance (470pF) and connecting overlap anchor point capacitance (100pF, 1000pF) to calculate capacitance value deviation, linear regression R² and conversion slope ratio to evaluate inter-range consistency and ensure the accuracy of cross-range measurement across the entire range.

[0010] 4. Construct a parameter matrix combining excitation voltage, quantile window, and capacitance conversion model. This allows for multiple traversal calibrations and statistics of various parameter combinations without human intervention, and automatically outputs the target calibration parameter combination.

[0011] 5. During the measurement phase, the target gain level is automatically determined based on the effective measurement amplitude range. When multiple levels are effective, the gain level with smaller measurement error or measurement dispersion is selected first, eliminating the need for manual level switching and making it suitable for microfluidic automated production line scenarios.

[0012] 6. Signal-to-noise ratio filtering (removing calibration points when the correction amplitude is lower than the preset threshold) and the full-range invalid backoff strategy enhance the robustness and self-recovery capability of the algorithm. Attached Figure Description

[0013] The exemplary embodiments of this application can be more fully understood by referring to the following accompanying drawings. The drawings are provided to further illustrate the embodiments of this application and form part of the specification. They are used together with the embodiments of this application to explain this application and do not constitute a limitation thereof. In the drawings, the same reference numerals generally represent the same components or steps.

[0014] Figure 1 This is a schematic flowchart of the wide-range capacitance measurement and calibration method for microfluidic chips provided in the embodiments of this application; Figure 2 This is a structural block diagram of the electronic device provided in the embodiments of this application; Figure 3 This is a schematic diagram of any capacitance measurement process provided in the embodiments of this application; Figure 4 This is a schematic diagram of the automatic optimization process for calibration parameters provided in the embodiments of this application.

[0015] Figure Labels 10—Microfluidic chip; 11—Detection electrode pair; 20—Transimpedance amplifier (TIA); 30—Analog-to-digital converter (ADC); 40—Direct memory access (DMA); 50—Processor; 60—Memory; 70—Excitation module; 71—PWM controller; 72—High voltage drive circuit; 80—Multi-channel selection module; 90—Output interface. Detailed Implementation

[0016] Exemplary embodiments of this application will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of this application are shown in the drawings, it should be understood that this application may be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided to enable a more thorough understanding of this application and to fully convey the scope of this application to those skilled in the art.

[0017] It should be understood that in the description of the embodiments of this application, unless otherwise stated, " / " means "or," for example, A / B can mean A or B; the "and / or" in this document is merely a description of the relationship between related objects, indicating that three relationships can exist, for example, A and / or B can represent: A alone, A and B simultaneously, and B alone. In this embodiment, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first" and "second" can explicitly or implicitly include one or more of that feature. In the description of this embodiment, unless otherwise stated, "multiple" means two or more.

[0018] In this application, the meanings of the following core technical terms are explained as follows: The "gain level" refers to the front-end amplification / sampling level set to cover different levels of capacitance measurement range. Different gain levels correspond to different capacitance measurement ranges, and the measurement ranges of adjacent levels partially overlap. In the embodiments of this application, the three gain levels correspond to the small capacitance level (also known as the HIGH level or BACK3 level, approximately 10pF to 500pF), the medium capacitance level (also known as the MEDIUM level or BACK2 level, approximately 100pF to 1500pF), and the large capacitance level (also known as the LOW level or BACK1 level, approximately 400pF to 2200pF).

[0019] The "calibrated capacitance value" refers to a preset known capacitance value of the calibrated capacitor, determined by the nominal capacitance value of the calibrated capacitor. In this embodiment, it is a preset nominal value such as 10pF, 100pF, 470pF, 1000pF, or 2200pF. The "calibrated sampling signal" refers to the sampling signal obtained by performing AD sampling on the known calibrated capacitor at each gain level. The effective sampling data refers to a subset of sampling data obtained by sorting the calibrated sampling signal and truncating it according to the corresponding quantile window parameter. The calibrated amplitude refers to the representative amplitude determined by the effective sampling data (e.g., the mean or median of the effective subset).

[0020] The “quantile clipping parameter” refers to the parameter that truncates the effective subset from the sorted sampled signal according to the preset lower and upper quantiles. For example, P10 / P90 means taking the sampled signal between the 10th percentile and the 90th percentile after sorting.

[0021] The "no-load sampling signal" refers to the sampling signal collected when no calibration capacitor or capacitor under test is connected at the gain setting (no-load state); the no-load amplitude refers to the amplitude obtained after the no-load sampling signal is processed in the same signal processing method as the calibration sampling signal (including filtering and quantile clipping); the corrected amplitude is the effective amplitude obtained by subtracting the corresponding no-load amplitude from the index amplitude value and used to establish the capacitance conversion relationship.

[0022] The “capacitance conversion relationship” refers to the mapping relationship obtained from the calibration of the capacitance value and the correction amplitude, which is used to convert the measured amplitude into the capacitance value, including a single slope model and a piecewise linear model.

[0023] The “calibration data” refers to the data obtained during the calibration process used to determine the capacitance conversion model, including the calibration sampling signal, calibration amplitude, correction amplitude, and calibration capacitance value corresponding to each gain level; the “candidate capacitance conversion model” refers to the set of alternative models used to establish the capacitance conversion relationship, including at least two of the following: weighted average model, truncated weighted model, median model, and piecewise linear model; each gain level determines the corresponding capacitance conversion model from these models based on the characteristics of its calibration data.

[0024] The “overlapping anchor capacitor” refers to a calibration capacitor that is measured by two or more gain levels and used for cross-gain consistency verification; among them, the one measured by at least three gain levels is called the global overlapping anchor capacitor (470pF in this embodiment), and the one measured by two adjacent gain levels is called the connecting overlapping anchor capacitor (100pF and 1000pF in this embodiment).

[0025] The "cross-gain consistency verification" refers to the process of analyzing the consistency of capacitance conversion relationships at different gain levels by using the measurement results of the same overlapping anchor point capacitor at different gain levels. This includes calculating capacitance value deviation analysis, linear consistency analysis, and / or conversion slope ratio analysis.

[0026] The “capacitor under test” refers to the unknown capacitor connected during the measurement phase; the measurement signal refers to the sampling signal obtained by performing AD sampling on the capacitor under test at the gain level; the “measurement amplitude” refers to the amplitude obtained after the measurement signal is processed by the same signal processing method as the calibration sampling signal; the “amplitude to be measured” refers to the amplitude obtained after performing no-load offset correction on the measurement amplitude according to the no-load amplitude of the corresponding gain level; the “capacitance value to be measured” refers to the capacitance value obtained by converting the amplitude to be measured through the corresponding capacitance conversion relationship.

[0027] The “effective measurement amplitude range” refers to the preset effective range of the amplitude to be measured under each gain level, which is used for automatic level selection and validity determination; the “target gain level” refers to the gain level that is ultimately used to output the capacitance value to be measured during measurement.

[0028] The “excitation voltage parameter” refers to the voltage amplitude parameter of the high-voltage excitation signal applied to the detection electrode pair of the microfluidic chip (either 80V or 100V can be selected in this embodiment); the “parameter combination matrix” refers to the set of parameter combinations constructed by combining the excitation voltage parameter, quantile window parameter and capacitance conversion model; the “measurement dispersion” refers to the consistency of the calibration results of the same parameter combination multiple times, which can be measured by standard deviation or coefficient of variation.

[0029] The "transimpedance amplifier (TIA)" refers to an analog front-end circuit that converts a capacitor sensing current signal into a voltage signal; the "analog-to-digital converter" refers to a device that converts an analog voltage signal into a digital sample value; the "direct memory access" refers to a data transmission mechanism that can continuously transfer ADC sampled data to memory without the processor's point-by-point involvement; the "PWM controller" refers to a pulse width modulation circuit that controls the amplitude of the high-voltage excitation by adjusting the square wave duty cycle; and the "COG capacitor" refers to a temperature-compensated ceramic capacitor with extremely high temperature stability (typical temperature coefficient less than 30ppm / ℃). In this application, the calibration capacitor and anchor capacitor are preferably made of COG material.

[0030] The "quantile clipping window" refers to the process of truncating a subset of the sorted sampled data according to a specified quantile interval for robust amplitude estimation; the "no-load offset correction" refers to the method of using the no-load amplitude of each gain level as the system offset reference for that level, using the difference between the calibrated amplitude and the no-load amplitude as the correction amplitude during the calibration stage, and using the difference between the measured amplitude and the no-load amplitude as the correction method during the measurement stage.

[0031] Example 1 The wide-range capacitance measurement and calibration method described in this application can be performed on the following electronic devices, such as... Figure 2 As shown, the electronic device includes: a microfluidic chip 10, a transimpedance amplifier (TIA) 20, an analog-to-digital converter (ADC) 30, a direct memory access (DMA) 40, a processor 50, a memory 60, an excitation module 70, and an output interface 90.

[0032] The microfluidic chip 10 includes a pair of detection electrodes 11 for forming the capacitance under test. The excitation module 70 includes a PWM controller 71 and a high-voltage drive circuit 72. The PWM controller 71 controls the high-voltage excitation amplitude (optionally 80V or 100V in this embodiment) output by the high-voltage drive circuit 72 by adjusting the square wave duty cycle to apply an excitation signal to the detection electrode pair 11. The current signal generated by the capacitance under test between the detection electrode pair 11 is converted into a voltage signal by a transimpedance amplifier (TIA) 20, and then sampled and quantized into a digital sample value by an analog-to-digital converter (ADC) 30. The sampled data output by the ADC 30 is transferred to the memory 60 via direct memory access (DMA) 40, without the need for the processor 50 to participate point by point, thereby supporting high-speed continuous sampling.

[0033] The memory 60 stores: quantile clipping parameters for each gain level, no-load amplitude (or system offset value) for each gain level, capacitance conversion relationship for each gain level, calibration capacitance value, and a computer program executed by the processor 50. The processor 50 runs the computer program and performs the following processes: sorts the sampled data according to the quantile clipping parameters of the corresponding gain level and determines the valid sampled data; performs no-load offset correction according to the no-load amplitude of the corresponding gain level; converts the measured amplitude into a capacitance value according to the capacitance conversion relationship of the corresponding gain level; and outputs the measurement result through the output interface 90.

[0034] In some embodiments, the electronic device further includes a multiplexing module 80 for automatically switching access between multiple calibration capacitors, no-load state, and test state to support automatic calibration and measurement in automated production line scenarios. In other embodiments, the multiplexing module 80 can also be used in conjunction with a shift register (e.g., HC595) to achieve multi-channel expansion, with each channel performing calibration independently, enabling multi-channel parallel measurement of the array-type microfluidic chip.

[0035] It should be noted that the above division of modules is only one implementation method for ease of explanation: the processor 50 can also be a programmable device such as a microcontroller, DSP, or FPGA; the transimpedance amplifier (TIA) 20 can also be replaced by a charge amplifier or other current-to-voltage conversion front end; the excitation module 70 can also be implemented by other high-voltage signal sources with adjustable amplitude. This application does not limit this.

[0036] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0037] Example 2 This embodiment provides a wide-range capacitance measurement and calibration method for microfluidic chips, referring to... Figure 1 The overall process is shown below. Figure 1 As shown, the capacitance measurement calibration method of this embodiment includes the following steps: S01 (Acquisition Step): Acquire the calibration sampling signals corresponding to the microfluidic chip at multiple gain levels. Specifically, the multiplexing module 80 switches between the calibration capacitor (e.g., 10pF, 100pF, 470pF, 1000pF, 2200pF) and the no-load state, and collects the sampling signals of a preset number of points (e.g., 192 points) at each gain level, and then transfers them to the memory 60 via direct memory access (DMA) 40.

[0038] S02 (Filtering Step): The sampled signal is filtered, including median filtering and moving average filtering, to eliminate impulse noise and high-frequency interference. Median filtering is used to suppress occasional pulse spikes, and moving average filtering is used to smooth high-frequency random noise.

[0039] S03 (Amplitude Extraction Step): Based on the quantile clipping parameters configured independently for each gain level, determine the valid sampled data from the filtered calibration sampled signal and extract the calibration amplitude.

[0040] S04 (No-load Offset Correction Step): Acquire the no-load sampling signal for each gain level under no-load conditions. Use the same signal processing method (filtering + quantile clipping) as the calibration sampling signal to obtain the no-load amplitude for each gain level. Subtract the corresponding no-load amplitude from the calibration amplitude for each gain level to obtain the corrected amplitude for each gain level. This step uses the physically measured no-load amplitude as the system offset reference, rather than obtaining it through mathematical estimation or weighted optimization, thereby eliminating the overestimation effect of superimposed offset on the calibration amplitude at the low-capacitance calibration point.

[0041] S05 (Signal-to-noise ratio filtering step): Remove calibration points whose correction amplitude is lower than the preset threshold to ensure that the remaining calibration points have a sufficient signal-to-noise ratio.

[0042] S06 (Conversion Relationship Establishment Step): Based on the calibration capacitor value and correction amplitude corresponding to each gain level, determine the corresponding capacitor conversion model from multiple candidate capacitor conversion models for different gain levels to establish the capacitor conversion relationship corresponding to each gain level. For details, please refer to the description in Example 4.

[0043] S07 (Cross-validation step): Set overlapping anchor capacitors in the overlapping interval of at least two gain levels, so that the same overlapping anchor capacitor is measured at the corresponding at least two gain levels, and verify the cross-level consistency of the capacitance conversion relationship of each gain level based on the measurement results. For details, please refer to the description in Example 5.

[0044] S08 (Measurement Conversion Step): After the cross-gain consistency verification meets the preset consistency conditions, the measurement signal of the capacitor under test is obtained at at least one gain level. The measurement amplitude is obtained according to the quantile window parameter of the corresponding gain level, and the measurement amplitude is corrected for no-load offset according to the no-load amplitude of the corresponding gain level to obtain the amplitude to be measured. The amplitude to be measured is converted into the capacitance value to be measured using the capacitance conversion relationship of the corresponding gain level. For details, please refer to the description in Example 6.

[0045] The multi-gain range includes three gain levels: the first gain level (small capacitance level / HIGH / BACK3, range approximately 10pF to 500pF), the second gain level (medium capacitance level / MEDIUM / BACK2, range approximately 100pF to 1500pF), and the third gain level (large capacitance level / LOW / BACK1, range approximately 400pF to 2200pF). The ranges of adjacent gain levels partially overlap, collectively forming a wide capacitance measurement range of 10pF to 2200pF, ensuring full range coverage without blind spots.

[0046] The calibration capacitor bank includes at least five calibration capacitors: 10pF, 100pF, 470pF, 1000pF, and 2200pF. The 470pF capacitor is measured simultaneously at three gain levels and serves as the global overlap anchor capacitor. The 100pF capacitor is measured simultaneously at the first two gain levels, and the 1000pF capacitor is measured simultaneously at the last two gain levels, serving as the connecting overlap anchor capacitors. The calibration and anchor capacitors are preferably made of C0G material to utilize its high temperature stability to suppress errors introduced by calibration capacitor tolerance (typically ±1% to ±5%) and temperature drift (typically less than 30ppm / ℃).

[0047] It should be noted that the order between S01 and S08 is only an example of this embodiment. For example, in a mass production scenario, the relationship between S05 signal-to-noise ratio filtering and S06 conversion can be merged into an iterative process. This application does not limit this.

[0048] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0049] Example 3 The core algorithm in this embodiment configures quantile parameters independently according to gain levels, and extracts subsets of the sampled signals according to quantile intervals after sorting. Under high-voltage excitation, the ADC sampling of large-capacitor signals exhibits nonlinear compression: when the signal amplitude approaches the full scale of the ADC, the sampled value is compressed to near the saturation region, causing the right tail of the amplitude distribution to deviate significantly from linearity. If full sampled data (default quantiles P10 / P90) is used for amplitude estimation, the compressed data will inflate the estimated value; by narrowing the quantile interval (e.g., P25 / P75), the tail of the compressed region and the head of noise are removed, making the amplitude estimation closer to the true value.

[0050] The specific rules for configuring quantile parameters independently according to gain levels are as follows: First gain setting (small capacitor setting): The signal amplitude is small and far from the full scale of the ADC. The nonlinear compression is not significant and the effective sampling points are greatly affected by noise. Therefore, P10 / P90 is used by default to retain enough sampling points and take into account the sample size for amplitude estimation. Second gain setting (medium capacitor setting): The degree of nonlinear compression is moderate, narrowed to P20 / P80, balancing accuracy and stability; The third gain level (large capacitor level): under high voltage excitation, nonlinear compression is significant, narrowing to P25 / P75 to effectively eliminate the compression region.

[0051] It should be noted that a narrower quantile window is not always better: a window that is too narrow (e.g., P40 / P60) will remove too many valid samples, resulting in insufficient sample size for amplitude estimation, increased variance, and reduced tolerance for occasional impulses; a window that is too wide (e.g., P5 / P95 or even P0 / P100) will re-include data from the compressed and noisy regions. Therefore, the quantile window for each quantile level needs to match its signal characteristics, which is the physical basis for the independent configuration of quantile levels in this application.

[0052] The measured data (measured, single-point three-round sampling) of the quantile window parameter screening at the 2200pF calibration point in this embodiment are shown in Table 1. The “three-point slope” is the single-point transformation slope calculated near different calibration points, and the “dispersion” is the coefficient of variation of the three-point slope, reflecting the consistency of the slope.

[0053] Table 1 P10 / P90 1726 1.274, 1.472, 1.263 38.8% ADC nonlinear compression is severe P20 / P80 1616 1.361, 1.425, 1.287 19.0% Improved but still unstable P25 / P75 1539 1.430, 1.385, 1.338 4.8% Significant improvement, feasible as expected As shown in Table 1, narrowing the quantile window of the third gain level from P10 / P90 to P25 / P75 can reduce the slope dispersion at 2200pF from 38.8% to 4.8%, fundamentally suppressing the contamination of amplitude estimation by the nonlinear compression of large capacitor signals under high voltage excitation.

[0054] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0055] Example 4 This embodiment provides multiple candidate capacitance conversion models. For each gain level, a corresponding capacitance conversion model is determined from these models based on the characteristics of its calibration data. The multiple candidate capacitance conversion models include: (1) Weighted average model (WGT): For each calibration point, the single-point conversion slope slopei = Crefi / Vi is calculated separately, where Crefi is the calibration capacitance value of the i-th calibration point and Vi is the corresponding correction amplitude. Then, the weights corresponding to each calibration point are determined according to the indicators related to the signal-to-noise ratio, and the multiple single-point conversion slopes are weighted and averaged according to the weights (e.g., the calibration amplitude) to obtain the capacitance conversion relationship for that gain level. This model is suitable for levels where the signal-to-noise ratio of the calibration amplitude changes slowly with the capacitance value.

[0056] (2) Truncated Weighted Model (CLP): Based on the weighted average model, calibration points exceeding a preset capacitance threshold (e.g., 1000pF) are truncated (reduced in weight or removed) to suppress the excessive pull of large capacitance on the overall slope. The physical basis is that large capacitance calibration points have large calibration amplitudes and high signal-to-noise ratios. If they are included in the calculation with equal weights as other calibration points, they will have a disproportionate impact on the overall slope, resulting in distortion of the slope in the low capacitance region. After truncation, the influence of abnormal or excessively pulled calibration points on the capacitance conversion relationship is reduced.

[0057] (3) Median Model (MED): The same calibration capacitor is sampled multiple times (in multiple rounds), and the slope is calculated after taking the median of the multiple sampling results, which improves the robustness to abnormal sampling values. This model has low computational cost and high stability, and is suitable for gears with large sampling noise or occasional spikes.

[0058] (4) Piecewise Linear Model (SEG): When the linear relationship between capacitance and amplitude is poor within the measurement range, a corresponding piecewise transformation relationship is established based on adjacent calibration points. During the measurement stage, the corresponding piecewise transformation relationship is determined based on the amplitude interval to which the measured amplitude belongs, and piecewise interpolation calculation is performed. This model is suitable for ranges with significant nonlinearity over a wide range, where a single slope cannot accurately describe the measurement.

[0059] For different gain levels, the optimal model is selected from the candidate models mentioned above based on the characteristics of their calibration data (e.g., linear regression coefficient of determination R², single-point slope dispersion) to balance accuracy and stability requirements. Specifically, when R² is close to 1 and single-point slope dispersion is low within a certain gain range, a weighted average model can be used; when there is significant traction at the high capacitance end, a truncated weighted model can be used; when sampling noise is significant, a median model can be used; and when the linear relationship is poor, a piecewise linear model can be used.

[0060] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0061] Example 5 This embodiment provides the process for setting overlapping anchor point capacitors and verifying cross-grade consistency. For example... Figure 1 As shown, overlapping anchor capacitors are set in the overlapping range of at least two gain levels, so that the same overlapping anchor capacitor is measured at the corresponding at least two gain levels. Based on the measurement results of the same overlapping anchor capacitor at different gain levels, the consistency of the capacitance conversion relationship of each corresponding gain level is verified.

[0062] In this embodiment, the overlapping anchor capacitors include global overlapping anchor capacitors and connecting overlapping anchor capacitors. The global overlapping anchor capacitor (470pF) is simultaneously located within the capacitance measurement range corresponding to the three gain levels (470pF is located in the overlapping area of ​​the three gain levels: 10pF~500pF, 100pF~1500pF, and 400pF~2200pF), and is measured jointly by the three gain levels. The connecting overlapping anchor capacitors include 100pF and 1000pF, where 100pF is located within the overlapping interval of the measurement range of the first gain level and the second gain level, and is measured jointly by the two adjacent gain levels for cross-level consistency verification between the first gain level and the second gain level; 1000pF is located within the overlapping interval of the measurement range of the second gain level and the third gain level, and is measured jointly by the two adjacent gain levels for cross-level consistency verification between the second gain level and the third gain level.

[0063] The specific process of cross-level consistency verification includes: Obtain the measurement results of the same overlapping anchor point capacitor at different gain levels (e.g., the calibrated amplitude or the amplitude to be measured at each level). The measurement result is converted using the capacitance conversion relationship corresponding to each gain level to obtain the corresponding calculated capacitance value; Calculate the deviation between the calculated capacitance values ​​corresponding to different gain levels, and perform linear consistency analysis (e.g., linear regression determination coefficient R² analysis) and / or conversion slope ratio analysis; When the deviation is within the preset deviation threshold and the linear consistency analysis results and / or the conversion slope ratio meet the preset consistency conditions, the capacitance conversion relationship corresponding to different gain levels is determined to pass the cross-gain consistency verification. If the preset consistency conditions are not met, readjust the quantile window parameters and / or capacitance conversion model corresponding to at least one gain level, re-establish the corresponding capacitance conversion relationship, and then perform cross-level consistency verification again.

[0064] For example, for a 470pF globally overlapped anchor capacitor, three calculated capacitance values ​​can be obtained by measuring and converting at three different gain levels, and their deviations can be compared pairwise. For a 100pF connecting anchor capacitor, two calculated capacitance values ​​are obtained by measuring and converting at the first and second gain levels, their deviations are compared, and the conversion slope ratio between the two levels is calculated. For a 1000pF connecting anchor capacitor, the same process is performed at the second and third gain levels. Actual measurements show that after the above cross-validation, the inter-level consistency deviation can be controlled within approximately 1% to 3%.

[0065] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0066] Example 6 After calibration, the measurement procedure for any capacitor under test is as follows: Figure 3 .like Figure 3 As shown, the measurement conversion and automatic range selection process includes: Acquire the measurement signal of the capacitor under test at each gain level (in this embodiment, 192 points of sampling are used for each gain level); After median filtering and moving average filtering, the measured amplitude is extracted according to the quantile clipping window parameters configured for each gear, and the no-load offset is corrected according to the no-load amplitude of each gear to obtain the measured amplitude. Candidate gain levels are determined based on the effective measurement amplitude range corresponding to each gain level, and the gain levels whose measured amplitude falls within the effective measurement amplitude range are taken as candidate gain levels. When there is more than one candidate gain level (i.e., the measured amplitude of the capacitor under test is within the effective measurement amplitude range of multiple gain levels), the gain level with smaller corresponding measurement error and / or measurement dispersion is selected as the target gain level; when there is only one candidate gain level, the unique candidate gain level is used as the target gain level. If the target gain level adopts a piecewise linear model, the corresponding piecewise transformation relationship is determined according to the amplitude interval to which the measured amplitude belongs, and piecewise interpolation is performed; otherwise, a single calibration slope is used for calculation. The amplitude to be measured is converted into the capacitance value to be measured and output by utilizing the capacitance conversion relationship corresponding to the target gain level; If the measured amplitude of all gain levels does not meet the preset valid measurement conditions (e.g., the measured amplitude of all levels is less than 25 ADC code values, or all fall outside the valid measurement amplitude range), the measurement is judged to be abnormal. A rough estimate of amplitude × 0.5 is used as the backoff measurement result output, and a measurement confidence level prompt is given.

[0067] In this embodiment, the target gain level is automatically determined based on the effective measurement amplitude range during the measurement phase. When multiple levels are effective, the level with smaller measurement error or measurement dispersion is selected first, eliminating the need for manual level switching and adapting to microfluidic automated production line scenarios. The signal-to-noise ratio filtering (removing calibration points when the correction amplitude is less than 25 ADC code values) and the full-level invalid backoff strategy enhance the robustness and self-recovery capability of the algorithm. Even if abnormal situations such as ADC saturation occur, usable backoff measurement results can still be output, avoiding interruption of the measurement process.

[0068] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0069] Example 7 This embodiment provides an automatic calibration parameter optimization mechanism, referring to... Figure 4 .like Figure 4 As shown, the automatic calibration parameter optimization process includes: S1: Construct a parameter combination matrix: 2 excitation voltages (80V / 100V) × 3 quantile window configurations (P10 / P90, P20 / P80, P25 / P75) × 4 capacitor conversion models (WGT / CLP / MED / SEG) = 24 parameter combinations; S2: Perform multiple capacitance measurement calibrations for different parameter combinations in the parameter combination matrix (e.g., calibrate each combination independently N=10 times), and record the relative error of all calibration points in each calibration. S3: Calculate the corresponding measurement error and / or measurement dispersion (e.g., standard deviation or coefficient of variation) based on the multiple calibration results corresponding to each parameter combination. S4: Compare the measurement errors and / or measurement dispersions corresponding to different parameter combinations, generate a summary comparison table, and determine the parameter combination with the lowest dispersion as the target calibration parameter combination.

[0070] The measured data (measured, N=10) show that under an 80V excitation voltage, the dispersion of the four slope methods is between 3.19% and 3.25%, with little difference between the methods, and the default configuration is sufficient to meet the requirements. Under a 100V excitation voltage, the dispersion of P25 / P75 combined with CLP or SEG methods can be reduced to 4.7% to 4.8%, which is significantly better than P10 / P90 (dispersion 38.8%). Table 2 shows the comparison of the mean dispersion of the four slope methods in 24 combined benchmark tests under the P25 / P75 quantile configuration in this application (measured, N=10).

[0071] Table 2 WGT 5.96% 4.81% generally CLP 5.26% 4.70% better MED 6.10% 6.10% Stablize SEG 5.31% 4.76% better The automatic calibration parameter optimization framework in this embodiment can complete the traversal calibration and statistics of 24 parameter combinations without human intervention, and automatically output the target calibration parameter combination, solving the problem of existing technologies relying on repeated manual adjustments of key parameters. In mass production or environmental change scenarios, this automatic optimization process can be embedded into the PLC control of the production line to achieve periodic automatic calibration and equipment health self-diagnosis.

[0072] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0073] Example 8 This embodiment illustrates the application of the above calibration method in the scenario of droplet detection and counting in a microfluidic chip. The electronic device described above is connected to the microfluidic chip 10, with the detection electrode pair 11 positioned across both sides of the droplet channel. When a droplet flows between the detection electrode pair 11, the equivalent dielectric constant of the medium between the electrodes changes, causing a step change in the capacitance between the detection electrode pair 11.

[0074] During the measurement process, the electronic device follows the measurement procedure described in Example 6: acquiring measurement signals at each gain level, filtering, extracting the measurement amplitude by quantile windowing, performing no-load offset correction based on the no-load amplitude to obtain the amplitude to be measured, automatically determining the target gain level based on the effective measurement amplitude range, and outputting the capacitance value to be measured using the corresponding capacitance conversion relationship. The processor 50 compares the continuously output capacitance value sequence with a preset droplet judgment threshold: when the capacitance value increases by a step and exceeds the judgment threshold, a droplet is judged to have passed, counted, and the droplet passing time is recorded; when the capacitance value falls back below the threshold, the droplet is judged to have left.

[0075] Thanks to the wide measurement range (10pF to 2200pF) of this application, the same detection electrode pair can cover different dielectric characteristics from tiny droplets (e.g., nanoliters) to larger droplets (e.g., microliters), and the measurement consistency across ranges is good. There is no need to manually switch ranges, thus adapting to the high-speed detection and counting requirements of microfluidic automated production lines.

[0076] It should be noted that the application scenario of this embodiment is only an example. The method of this application can also be applied to scenarios such as accurate measurement of capacitive liquid level sensors, high-precision calibration of capacitive touch sensors, wide-range adaptation of capacitive proximity sensors, and capacitance parameter detection in industrial automated production lines. This application does not limit these applications.

[0077] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

Claims

1. A wide-range capacitance measurement and calibration method for a microfluidic chip, characterized in that, Includes the following steps: Step 1: Obtain the calibration sampling signals of the microfluidic chip at multiple gain levels. The calibration sampling signals are obtained by sampling a known calibration capacitor, which has a preset calibration capacitance value. The multiple gain levels correspond to different capacitance measurement ranges, and the capacitance measurement ranges of at least two adjacent gain levels have overlapping intervals. Step 2: Configure corresponding quantile clipping parameters for each of the multiple gain levels, sort the calibration sampling signals, determine the valid sampling data from the sorted calibration sampling signals according to the corresponding quantile clipping parameters, and obtain the calibration amplitude corresponding to the multiple gain levels. Step 3: Obtain the no-load sampling signals corresponding to the multiple gain levels in the no-load state, and process the no-load sampling signals in the same signal processing method as the calibration sampling signals to obtain the no-load amplitude corresponding to the multiple gain levels. Based on the difference between the calibrated amplitude and the no-load amplitude corresponding to multiple gain levels, the correction amplitude corresponding to multiple gain levels is obtained, and based on the calibrated capacitance value and correction amplitude corresponding to multiple gain levels, the capacitance conversion relationship corresponding to each gain level is established respectively. Step 4: Set up overlapping anchor capacitors within the overlapping interval, and measure the same overlapping anchor capacitor at at least two corresponding gain levels. Based on the measurement results of the same overlapping anchor capacitor at different gain levels, verify the consistency of the capacitance conversion relationship across gain levels. Step 5: After the cross-gain consistency verification meets the preset consistency conditions, the measurement signal of the capacitor under test is obtained at at least one gain level. The measurement amplitude is obtained according to the quantile clipping window parameter, and the measurement amplitude is corrected for no-load offset according to the no-load amplitude of the corresponding gain level to obtain the amplitude to be measured. The amplitude to be measured is converted into the capacitance value to be measured using the capacitance conversion relationship.

2. The wide-range capacitance measurement and calibration method for microfluidic chips according to claim 1, characterized in that, The multiple gain levels include a first gain level, a second gain level, and a third gain level; The capacitance measurement range corresponding to the first gain level is 10pF to 500pF, the capacitance measurement range corresponding to the second gain level is 100pF to 1500pF, and the capacitance measurement range corresponding to the third gain level is 400pF to 2200pF. The first gain setting, the second gain setting, and the third gain setting together form a wide capacitance measurement range of 10pF to 2200pF.

3. The wide-range capacitance measurement and calibration method for microfluidic chips according to claim 2, characterized in that, The quantile clipping window parameters are configured independently according to the gain level; The quantile clipping parameters corresponding to the first gain level are P10 / P90, the quantile clipping parameters corresponding to the second gain level are P20 / P80, and the quantile clipping parameters corresponding to the third gain level are P25 / P75. Wherein, P10 / P90, P20 / P80 and P25 / P75 represent the effective sampling intervals determined from the sorted sampled signals according to the corresponding lower and upper quantiles, respectively.

4. The wide-range capacitance measurement and calibration method for microfluidic chips according to claim 1, characterized in that, For different gain levels, a corresponding capacitance conversion model is determined from multiple candidate capacitance conversion models based on the calibration data of the corresponding gain level, so as to establish the capacitance conversion relationship for each gain level; wherein, the calibration data includes the calibration sampling signal, calibration amplitude, correction amplitude and calibration capacitance value corresponding to each gain level; the multiple candidate capacitance conversion models include at least two of the following: weighted average model, truncated weighted model, median model and piecewise linear model.

5. The wide-range capacitance measurement and calibration method for microfluidic chips according to claim 4, characterized in that, When using the weighted average model, multiple single-point conversion slopes are determined based on the calibration capacitance value and correction amplitude corresponding to multiple calibration points, and the multiple single-point conversion slopes are weighted according to the corresponding weights, wherein the corresponding weights are determined based on the calibration amplitude corresponding to each calibration point. When the truncated weighted model is used, the weight of the calibration points that meet the preset truncation conditions is reduced or eliminated. When using the median model, the same calibrated capacitor is sampled multiple times, and the corresponding capacitance conversion relationship is determined based on the median of the multiple sampling results. When using the piecewise linear model, the corresponding piecewise transformation relationship is established based on adjacent calibration points, and the corresponding piecewise transformation relationship is determined based on the amplitude interval to which the amplitude to be measured belongs.

6. The wide-range capacitance measurement and calibration method for microfluidic chips according to claim 1, characterized in that, The overlapping anchor capacitors include at least one global overlapping anchor capacitor and at least one interconnecting overlapping anchor capacitor; The global overlapping anchor point capacitor is simultaneously located within the capacitance measurement range corresponding to at least three gain levels, and is measured jointly by the at least three gain levels; the connecting overlapping anchor point capacitor is located within the overlapping interval of the capacitance measurement range corresponding to two adjacent gain levels, and is measured jointly by the two adjacent gain levels.

7. The wide-range capacitance measurement and calibration method for microfluidic chips according to claim 6, characterized in that, The cross-level consistency verification includes: The measurement results of the same overlapping anchor point capacitance at different gain levels were obtained respectively; The measurement results are converted using the capacitance conversion relationship corresponding to each gain level to obtain the corresponding calculated capacitance value; Calculate the deviation between the calculated capacitance values ​​corresponding to different gain levels, and perform linear consistency analysis and / or conversion slope ratio analysis; When the deviation, linear consistency analysis results and / or conversion slope ratio meet the preset consistency conditions, the capacitor conversion relationship corresponding to different gain levels is determined to pass the cross-gain level consistency verification. When the preset consistency condition is not met, the quantile window parameter corresponding to at least one gain level is readjusted, and the corresponding capacitance conversion relationship is re-established.

8. The wide-range capacitance measurement and calibration method for microfluidic chips according to claim 7, characterized in that, It also includes an automatic calibration parameter optimization step, which includes: constructing a parameter combination matrix composed of excitation voltage parameters, quantile window parameters and capacitance conversion model, wherein the excitation voltage parameters are voltage parameters for applying excitation signals to the microfluidic chip, the quantile window parameters are quantile window parameters corresponding to each gain level, and the capacitance conversion model is a model used to establish the capacitance conversion relationship; Perform multiple capacitance measurement calibrations for different parameter combinations in the parameter combination matrix; calculate the corresponding measurement error and / or measurement dispersion based on the multiple calibration results for each parameter combination. Compare the measurement errors and / or measurement dispersions corresponding to different parameter combinations, and determine the target calibration parameter combination based on the comparison results.

9. The wide-range capacitance measurement and calibration method for microfluidic chips according to claim 8, characterized in that, When measuring the capacitor under test, the measured amplitude of the capacitor under test is obtained at multiple gain levels, and the target gain level is determined according to the effective measured amplitude range corresponding to each gain level. When the measured amplitude corresponding to the capacitor under test is within the effective measurement amplitude range of multiple gain levels, the gain level with smaller measurement error and / or measurement dispersion is selected as the target gain level, and the capacitance value of the capacitor under test is calculated using the capacitance conversion relationship corresponding to the target gain level; wherein, the effective measurement amplitude range is a preset effective range of the measured amplitude under the corresponding gain level, the target gain level is a gain level used to convert the measured amplitude into the measured capacitance value, and the measurement error and / or measurement dispersion is the measurement error and / or measurement dispersion determined according to the calibration results corresponding to each gain level.

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