Polarization independent n-bit path-selective integrated optical delay chip

Abstract

The application relates to a polarization-independent N-bit path selection type integrated optical delay line chip which is formed by cascading 2*2 polarization-independent MZ optical switch units and polarization-independent delay waveguides / reference waveguides. The delay waveguide and the reference waveguide can support low-loss transmission of TE0 and TM0 mode components. Each stage of the delay waveguide and the reference waveguide is divided into two sections, and a TE0-TM0 mode switch is inserted between the two sections. After the delay of the previous section of the waveguide, the TE0 and TM0 components of the input optical signal are simultaneously converted into TM0 and TE0 components and then delayed through the latter section of the waveguide, so that the polarization independence of the relative delay amount of each stage of the delay unit to the TE0 and TM0 modes is realized. In combination with the polarization-independent MZ optical switch unit, the polarization-independent N-bit path selection type integrated optical delay line chip can be realized. The application scheme can be designed and realized on multiple integrated platforms including a 220nm thick SOI platform.

Description

Technical Field

[0001] This invention relates to the field of optical communication device technology, and specifically to a polarization-independent N-bit path-selective integrated optical delay chip. Background Technology

[0002] In recent years, optical true-time delay lines (OTTDLs) have been widely used in fields such as optical beamforming networks (OBFNs) and microwave photonic filters (MPFs) because they support high bandwidth and low loss processing of electrical signals and have characteristics such as resistance to electromagnetic interference.

[0003] Silicon photonics integration platforms, with their advantages of small size, low power consumption, CMOS compatibility, and low cost, can be widely used in the design and fabrication of integrated optical true delay line chips. Currently, the technical routes for integrated optical true delay chips include micro-ring tunable true delay lines [Y.Liu, Opt. Express. 32(5), 7848, 2024] and cascaded Mach-Zehnder switch tunable delay lines [W.Shan, Opt. Express. 29(3), 3375, 2021]. Among them, micro-ring tunable delay lines achieve tunable delay by adjusting the resonant or anti-resonant state of the micro-ring. This scheme has a compact structure and continuously adjustable delay, but its adjustment range is small and requires complex micro-ring control and stabilization schemes. Mach-Zehnder switch-type adjustable delay lines are composed of multiple 2×2 Mach-Zehnder switches (MZS) and delay waveguides cascaded together. Adjustable delay is achieved by switching the routing state of each MZS to generate different delay paths. This scheme has a large delay adjustment range, and the delay accuracy depends on the unit delay and the number of stages of the delay line.

[0004] Due to the inhomogeneity, shape defects, and stress of optical fibers, the polarization state of optical signals often exhibits random variations. The birefringence effect of conventional silicon and silicon nitride waveguides leads to polarization dependence in both micro-Zehnder wedges (MZS) and delay waveguides; that is, the insertion loss of MZS and the loss and delay of delay waveguides are strongly polarization sensitive. When the polarization state of the input signal changes, the performance of integrated delay line chips deteriorates. Currently, although there are polarization-independent schemes for optical delay lines based on micro-fibers [Ji Jun, Wang Yi, Jin Xiaofeng, Zhang Xianmin, Zheng Shilie, Chi Hao, A polarization-independent micro-fiber tunable delay line, CN200910157015.8] and space optical modules [NARiza, S. Sumeriddetchkajorn, Opt. Commun. 1999, 160, 311.], there are no reports on polarization-independent integrated optical delay line chips. Summary of the Invention

[0005] To overcome the shortcomings of the prior art, this invention proposes a polarization-independent N-bit path-selective integrated optical delay chip, which can be implemented on any integrated platform, including a 220nm thick SOI platform, and can eliminate the polarization dependence of switch-type adjustable delay chips.

[0006] The technical solution of the present invention is as follows:

[0007] On the one hand, a polarization-independent N-bit path-selective integrated optical delay chip is characterized by comprising N+1 2×2 polarization-independent MZ optical switch units, N polarization-independent delay waveguides, N polarization-independent reference waveguides, an input waveguide, and an output waveguide.

[0008] Furthermore, the polarization-independent N-bit path-selective integrated optical delay chip is characterized in that the 2×2 polarization-independent MZ optical switch unit is used to synchronously switch the TEO / TMO mode optical signals supported by the waveguide.

[0009] Furthermore, the polarization-independent N-bit path-selective integrated optical delay chip is characterized in that the polarization-independent delay waveguide is composed of two waveguides of equal length and width connected in series with a TEO-TMO mode switch. These two waveguides simultaneously support low-loss transmission in both TEO and TMO modes, wherein the TEO-TMO mode switch is inserted between the two waveguides.

[0010] Furthermore, the polarization-independent N-bit path-selective integrated optical delay chip is characterized in that the polarization-independent reference waveguide is composed of two waveguides of equal length and width connected in series with a TEO-TMO mode switch. These two waveguides simultaneously support low-loss transmission in both TEO and TMO modes, and a TEO-TMO mode switch is inserted between the two waveguides.

[0011] Furthermore, the polarization-independent N-bit path-selective integrated optical delay chip is characterized in that the TE0-TM0 mode switch is used to simultaneously convert the TE0 and TM0 mode optical signals of the input waveguide into TM0 and TE0 mode optical signals for output, respectively.

[0012] Furthermore, the polarization-independent N-bit path-selective integrated optical delay chip is characterized in that, considering the k-th polarization-independent delay waveguide, the TE0(TM0) component of the input optical signal passes through its first segment of length L0+2. k-1 When the waveguide is delayed by ΔL, the accumulated τ TE0 +2 k-1 Δτ TE0 (τ TM0 +2 k-1 Δτ TM0 The delay amount; the TE0-TM0 mode switch converts the TM0 (TE0) component into the second segment with the same length L0+2. k-1 The delayed waveguide of ΔL accumulates τ again. TM0 +2 k-1 Δτ TM0 (τ TE0 +2 k-1 Δτ TE0 The delay amount; the delay of the polarization-independent delay waveguide on the input signal TE0 and TM0 components is τ. TE0 +τ TM0 +2 k-1 Δτ TE0 +2 k-1 Δτ TM0 +τ ME , where τ ME The delay of the TE0-TM0 mode switch is given by the following relationship between the delay and the waveguide length: Where n g is the refractive index of the waveguide group.

[0013] Furthermore, the polarization-independent N-bit path-selective integrated optical delay chip is characterized in that N polarization-independent reference waveguides are required in the system. Considering the k-th polarization-independent delay waveguide, when the TE0(TM0) component of the input optical signal passes through its first segment of the reference waveguide with length L0, it accumulates τ. TE0 (τ TM0 The delay amount; converted from TE0-TM0 mode by the switch to TM0 (TE0) component and entering the second reference waveguide of the same length L0, τ is accumulated again. TM0 (τ TE0 The delay is τ. Therefore, the delay of the polarization-independent reference waveguide on the input signal TE0- and TM0 components is τ. TE0 +τTM0 +τ ME In conjunction with claim 6, considering the input signal components TE0 and TM0, the relative delay between the k-th order reference waveguide and the delay waveguide is 2. k-1 (Δτ TE0 +Δτ TM0 ), where Δτ TE0(TM0) This represents the unit relative delay in TE0 (TM0) mode.

[0014] Furthermore, the polarization-independent N-bit path-selective integrated optical delay chip is characterized by being cascaded from one input / output waveguide, N+1 2×2 polarization-independent MZ optical switch units, N polarization-independent delay waveguides, and N polarization-independent reference waveguides. The input terminal of the first-stage polarization-independent MZ optical switch unit is connected to the input waveguide; the output terminal of the (N+1)th-stage 2×2 polarization-independent MZ optical switch unit is connected to the output waveguide. The first output terminal of the k-th (k = 1, 2, 3, ... N)-th stage 2×2 polarization-independent MZ optical switch unit is connected to the first input terminal of the (k+1)-th stage 2×2 polarization-independent MZ optical switch unit via the k-th stage polarization-independent delay waveguide; the second output terminal of the k-th stage 2×2 polarization-independent MZ optical switch unit is connected to the second input terminal of the (k+1)-th stage 2×2 polarization-independent MZ optical switch unit via the k-th stage polarization-independent reference waveguide. The polarization-independent reference waveguides of each stage have equal lengths; the length difference between the k-th stage polarization-independent delay waveguide and the reference waveguide is 2. k-1 ΔL, where ΔL is the length difference between the first-order polarization-independent delay waveguide and the polarization-independent reference waveguide. Therefore, for both TE0 and TM0 modes, a relative delay of 2 is introduced. k-1 (Δτ TE0 +Δτ TM0 ), where Δτ TE0 +Δτ TM0 This represents the relative delay between the first-order polarization-independent delay waveguide and the reference waveguide.

[0015] Furthermore, the polarization-independent N-bit path-selective integrated optical delay chip is characterized in that the polarization-independent delay waveguide and polarization-independent reference waveguide can also be converted from TM0 mode to other modes (e.g., TE1 mode), thereby achieving mode independence of the relative delay between TE0 mode and TE1 mode, only requiring the TE0-TM0 mode switch to be replaced with a TE0-TE1 mode switch.

[0016] Furthermore, the polarization-independent N-bit path-selective integrated optical delay chip is characterized in that the polarization-independent MZ optical switch unit comprises an input waveguide I1, an input waveguide I2, an output waveguide O1, an output waveguide O2, a first polarization-independent 3dB coupler, a polarization-independent phase shifter, and a second polarization-independent 3dB coupler; when light is input from the input waveguide I1 (or input waveguide I2) in TE0 (or TM0) mode, it is uniformly split into two beams by the polarization-independent 3dB coupler and then polarization-independent phase shifters are applied to the TE0 / TM0 modes respectively. After generating a phase difference of 0 or π, the two beams are combined by a second polarization-independent 3dB coupler. When the polarization-independent phase shifter generates a phase difference of 0, the two beams interfere constructively at the output waveguide O2 (or output waveguide O1) of the 2×2 polarization-independent MZ optical switch unit, thus making the 2×2 polarization-independent MZ optical switch unit work in the crossover state; when the polarization-independent phase shifter generates a phase difference of π, the two beams interfere constructively at the output waveguide O1 (or output waveguide O2) of the 2×2 polarization-independent MZ optical switch unit, thus making the 2×2 polarization-independent MZ optical switch unit work in the through state.

[0017] Furthermore, the polarization-independent N-bit path-selective integrated optical delay chip is characterized in that the first polarization-independent 3dB coupler and the second polarization-independent 3dB coupler are adiabatic couplers, multimode interferometers, or cascaded directional couplers.

[0018] Furthermore, the polarization-independent N-bit path-selective integrated optical delay chip is characterized in that the polarization-independent phase shifter is implemented based on the thermo-optical effect or the carrier dispersion effect.

[0019] Furthermore, the polarization-independent N-bit path-selective integrated optical delay chip of the polarization-independent Mach-Zehnder optical switch is characterized in that the TE0-TM0 mode switch includes multiple technical approaches, including active mode switches, passive Nanobeam waveguides, passive mode evolution polarization rotators, passive mode hybrid polarization rotators, and combinations of passive TE0-TE1 mode switches and TE1-TM0 mode converters.

[0020] On the other hand, the polarization-independent N-bit path-selective integrated optical delay chip is characterized in that its design and fabrication platform includes, but is not limited to, silicon (SOI), silicon nitride, (doped) silicon oxide, silicon oxynitride, thin-film lithium niobate, or indium phosphide.

[0021] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0022] 1) This invention addresses the polarization-independent characteristics of path-selective integrated optical delay lines by implementing a series of designs, particularly proposing a technical solution to eliminate the polarization dependence of delay in each stage of the delay unit: Each stage of the delay unit is divided into two identical delay (reference) waveguides, with a passive TE0-TM0 mode switch inserted between them. This switch converts the TE0 and TM0 mode optical signals transmitted in the first half of the delay (reference) waveguide into TM0 and TE0 modes, respectively, allowing them to continue transmission in the second half of the delay (reference) waveguide. This achieves transmission of the TE0 / TM0 components in the input signal to the next stage with approximately the same loss and delay. Combined with the proposed polarization-independent MZ switching unit, the path-selective delay line becomes polarization-insensitive, ensuring that the optical performance of the delay line chip does not deteriorate under unknown or time-varying input signal polarization conditions.

[0023] 2) The key components included in this invention have high process tolerance in their design, including polarization-independent optical switching units, polarization-independent delay (reference) waveguides, and TEO-TMO mode switches. It supports the design and implementation of multi-stage polarization-independent N-bit path-selective integrated optical delay lines.

[0024] 3) The polarization-independent N-bit path-selective integrated optical delay line chip proposed in this invention can overcome the polarization sensitivity limitation of integrated optoelectronic platforms, especially the 220nm SOI integrated platform. It can maximize the advantages of the platform such as CMOS compatibility, small size, and low loss to achieve a wide range and precise adjustable delay line. Attached Figure Description

[0025] Figure 1 This is a schematic diagram of the polarization-independent N-bit path-selective integrated optical delay line of the present invention;

[0026] Figure 2 This is a schematic diagram of the structure of a 2×2 polarization-independent MZ optical switch unit in an embodiment of the polarization-independent N-bit path-selective integrated optical delay line of the present invention.

[0027] Figure 3 This is a schematic diagram of the structure of a delay waveguide (reference waveguide) in an embodiment of the polarization-independent N-bit path-selective integrated optical delay line of the present invention;

[0028] Figure 4 This is a schematic diagram of the TE0-TM0 mode switch in the polarization-independent N-bit path-selective integrated optical delay line of the present invention.

[0029] Figure 5 This is a schematic diagram of the mode conversion structure in the TE0-TM0 mode switch of this invention;

[0030] Figure 6The diagram shows the operating state and transmission spectrum of the mode conversion structure under TE0 and TM0 mode input conditions, where (a) is the electric field distribution diagram of the mode conversion structure under TE0 mode input, (b) is the transmission and crosstalk spectrum under TE0 mode input, (c) is the electric field distribution diagram of the mode conversion structure under TM0 mode input, and (d) is the transmission and crosstalk spectrum under TM0 mode input.

[0031] Figure 7 The cross-sectional electric field distribution and simulated transmission spectrum of the TE0-TE1 mode switch are shown, where (a) is the structure of the mode switch, (b,c) are the cross-sections of electric field intensity and electric field y-component intensity under TE0 mode input, (d) are the transmission and crosstalk spectrum under TE0 mode input, (e,f) are the cross-sections of electric field intensity and electric field y-component intensity under TE1 mode input, and (g) are the transmission and crosstalk spectrum under TE1 mode input.

[0032] Figure 8 The cross-sectional electric field distribution and simulated transmission spectrum of the TE0-TM0 mode switch are shown, where (a) is the cross-sectional electric field of the mode switch under TE0 mode input, (b) is the transmission and mode crosstalk spectrum under TE0 mode input, (c) is the cross-sectional electric field of the mode switch under TM0 mode input, and (d) is the transmission and mode crosstalk spectrum under TM0 mode input.

[0033] Figure 9 This is a schematic diagram of a polarization-independent 4-bit path-selective integrated optical delay line embodiment.

[0034] Figure 10 It is a polarization-independent 4-bit path-selective integrated optical delay line lookup table for all delay states. Detailed Implementation

[0035] The present invention will be further described below with reference to the accompanying drawings and embodiments, but should not be construed as limiting the scope of protection of the present invention.

[0036] Figure 1This is a schematic diagram of the structure of the N-bit path-selective integrated optical delay line chip based on polarization-independent Mach-Zehnder optical switches of the present invention. In this example, N+1 polarization-independent MZ optical switch units (1.2) are connected in pairs. The first output terminal of the k-th stage (k = 1, 2, 3, ..., N) polarization-independent MZ optical switch unit and the first input terminal of the (k+1)-th stage polarization-independent MZ optical switch unit are connected by a polarization-independent delay waveguide (1.3); while the second output terminal of the k-th stage polarization-independent MZ optical switch unit and the second input terminal of the (k+1)-th stage polarization-independent MZ optical switch unit are connected by a polarization-independent reference waveguide (1.4). By adjusting the length difference between the k-th stage polarization-independent delay waveguide (1.3) and the polarization-independent reference waveguide (1.4), their relative delay with respect to the input optical signal can be configured. For TE0 polarization and TM0 polarization optical signals input to them, the same relative delay Δτ can be generated. k =2 k-1 Δτ, where Δτ is the relative delay between the first-stage polarization-independent delay waveguide (1.3) and the polarization-independent reference waveguide (1.4), i.e., the unit delay. Furthermore, the input waveguide (1.1) is connected to the input of the first-stage polarization-independent optical switch unit (1.2), and the output waveguide (1.5) is connected to the output of the (N+1)th-stage polarization-independent optical switch unit (1.2).

[0037] In this embodiment, the N-bit path-selective integrated optical delay line chip can be implemented on a silicon-based 220nm conventional waveguide process platform, wherein the ridge waveguide thickness is 90nm, supporting transverse electric mode (TEO) and transverse magnetic mode (TMO) transmission. It also supports implementation on platforms with other thicknesses such as SOI, silicon nitride, (doped) silicon oxide, silicon oxynitride, thin-film lithium niobate, and indium phosphide.

[0038] Figure 2This is a schematic diagram of an embodiment of the polarization-independent MZ optical switch unit in the N-bit path selection integrated optical delay line chip based on polarization-independent Mach-Zehnder optical switches of the present invention. As shown in the figure, the 2×2 polarization-independent MZ optical switch unit 1.2 consists of two input waveguides I1 (2.1) and I2 (2.2), two output waveguides O1 (2.3) and O2 (2.4), a first polarization-independent 3dB coupler (2.5), two polarization-independent phase shifters (2.6), and a second polarization-independent 3dB coupler (2.7). When light is input into waveguide (2.1) (or 2.2) from I1 (or I2) in TE0 (TM0) mode, it is uniformly split into two beams by the first polarization-independent 3dB coupler (2.5) and then input into two polarization-independent 3dB phase shifters (2.6). The two polarization-independent phase shifters (2.6) simultaneously generate a phase difference of 0 or π for the TE0 / TM0 modes, and then the beams are combined by the second unbalanced polarization-independent 3dB coupler (2.7). When the polarization-independent phase shifter ( 2.6) When a 0-phase difference is generated, the two beams of light interfere constructively at the output waveguide (2.4) (or 2.3) of the O2 (or O1) of the switching unit (1.1), and the switching unit operates in a cross state. When the polarization-independent phase shifter (2.6) generates a π-phase difference, the two beams of light interfere constructively at the output waveguide (2.3) (or 2.4) of the O1 (or O2) of the switching unit (1.1), and the switching unit operates in a bar state. The polarization-independent 3dB coupler can be implemented by adiabatic couplers, multimode interferometers, cascaded directional couplers, etc. The polarization-independent phase shifter can be implemented based on effects including but not limited to thermo-optical effects, carrier dispersion effects, and refractive index modulation characteristics during photo-induced and electro-induced phase transitions of phase change materials.

[0039] As shown in the embodiment, the polarization-independent delay waveguide (1.3) and polarization-independent reference waveguide (1.4) are used. For the k-th order polarization-independent delay (1.3) (reference (1.4)) waveguide, the first segment of length L... k The waveguide (L0) (1.3.1) [(1.4.1)], the TE0-TM0 mode switch (1.3.2) [(1.4.2)], and the second segment of length L k The waveguides (1.3.3) [(1.4.3)] of (L0) are cascaded together, and the length difference between them satisfies ΔL k =L k -L0=2 k-1 (L1-L0), the above waveguide supports low-loss transmission of TE0 and TM0 components, where L1 is the length of the first-stage delay polarization-independent delay waveguide.

[0040] When the TE0(TM0) component of the input signal passes through the polarization-independent delay waveguide (1.3), the delay is accumulated after passing through the first delay waveguide (1.3.1). After conversion from TE0-TM0 mode to TM0 (TE0) mode by the TE0-TM0 mode switch (1.3.2), the input delay is accumulated in the second delay waveguide (1.3.3). Therefore, the total delay of both the TE0 and TM0 components is Where τ ME This represents the delay of the TE0-TM0 mode switch. Similarly, when the TE0 (TM0) component of the input signal passes through the polarization-independent reference waveguide (1.4), the accumulated total delay is also... in Therefore, for the input TE0 and TM0 components, the relative delay between the k-th order delayed waveguide and the reference waveguide is... Where ng is the group refractive index of the waveguide, and c is the speed of light in vacuum. Depending on the configuration, L k -L0=2 k-1 (L1-L0), therefore

[0041] The TE0-TM0 mode switch (1.3.2) in the embodiment is as follows: Figure 4 As shown, it is composed of a first mode conversion structure (4.1), a second mode conversion structure (4.3), and a TE0-TE1 mode switch (4.2) cascaded together. Figure 5 The structure of the mode conversion structure (4.1) and (4.3) is given, which includes a mode converter (5.1) and an adiabatic tapered waveguide (5.2). The mode converter (5.1) has an input cross-section of 220nm × 500nm in a strip waveguide, a gradually linearly transitioning ridge waveguide with dimensions of 220nm × 600nm, and a planar layer size of 90nm × 600nm. The adiabatic tapered waveguide (5.2) has an input cross-section of 220nm × 600nm in a ridge waveguide, a planar layer size of 90nm × 600nm, and a gradually linearly transitioning ridge waveguide with dimensions of 220nm × 1μm. When the TE0 mode is input to the mode conversion structure, the TE0 mode output is maintained; when the TM0 mode is input to the mode conversion structure, the output is gradually converted to the TE1 mode. Figure 6 Simulated transmission spectra of one design example of this structure are presented. The TE0-TE1 mode switch (4.2) is implemented by an axisymmetric, nonlinearly variable width multimode waveguide. Figure 7 The cross-sectional electric field distribution and simulated transmission spectrum of the TE0-TE1 mode switch (4.2) are presented. It can be implemented through reverse engineering, simultaneously converting the input waveguide's TE0 / TE1 mode to TE0 / TE1 mode. In summary, Figure 8The cross-sectional electric field distribution of the TE0-TM0 mode switch (1.3.2) under the TE0 / TM0 mode input scenario is presented on the simulated transmission spectrum. The TE0-TM0 mode switch can also be designed and implemented based on schemes including reverse design, mode switching, passive mode evolution polarization rotator, and passive mode hybrid polarization rotator.

[0042] Figure 9 This is a schematic diagram illustrating the working principle of the N-bit path-selective integrated optical delay line chip based on a polarization-independent Mach-Zehnder optical switch according to the present invention. This embodiment uses N=4 as an example to illustrate its working principle as follows:

[0043] The polarization-independent MZ optical switch unit can switch the TE0 and TM0 components of the input signal to the same output port. The figure shows a delay path of a 4-bit path-selective integrated optical delay line. The first to fifth stage optical switch units are configured as crossover, straight-through, straight-through, straight-through, and crossover states, respectively. The TE0 and TM0 components pass through the first-stage reference waveguide, the second-stage delay waveguide, the third-stage reference waveguide, and the fourth-stage delay waveguide simultaneously before being output. Therefore, the accumulated relative delay is Δτ² + Δτ₄ = 2Δτ + 2. 3 Δτ = 10Δτ, where Δτ is the unit delay of the delay waveguide for the TE0 and TM0 components.

[0044] Similarly, by traversing the routing states of the first to fourth level polarization-independent MZ optical switch units, 16 different routing paths can be obtained, and the relative delays they can generate traverse the set {kΔτ, k = 0, 1, 2, ..., 15}. The fifth level polarization-independent MZ optical switch unit can be used to route the output signal to a specified port. The lookup table for all delay states of the polarization-independent 4-bit path selection integrated optical delay line chip is as follows: Figure 10 As shown.

Claims

1. A polarization-independent N-bit path-selective integrated optical delay chip, characterized in that, include: N+1 2×2 polarization-independent Mach-Zehnder (MZ) optical switch units are used to switch the path of optical signals; N polarization-independent delay waveguides, each of which is connected to the first output terminal of the k-th level 2×2 polarization-independent MZ optical switch unit and the first input terminal of the (k+1)-th level 2×2 polarization-independent MZ optical switch unit. N polarization-independent reference waveguides, each polarization-independent reference waveguide is connected to the second output terminal of the kth-level 2×2 polarization-independent MZ optical switch unit and the second input terminal of the (k+1)th-level 2×2 polarization-independent MZ optical switch unit; An input waveguide is connected to the input of the first-stage polarization-independent MZ optical switch unit; An output waveguide is connected to the output of the N+1th polarization-independent MZ optical switch unit; Where k is an integer from 1 to N, the relative delay of the polarization-independent delay waveguide and the polarization-independent reference waveguide is configured by adjusting the length difference between them, and the same relative delay is generated for both TE0 polarized and TM0 polarized optical signals.

2. The polarization-independent N-bit path-selective integrated optical delay chip according to claim 1, characterized in that, The 2×2 polarization-independent MZ optical switch unit includes an input waveguide I1, an input waveguide I2, an output waveguide O1, an output waveguide O2, a first polarization-independent 3dB coupler, a polarization-independent phase shifter, and a second polarization-independent 3dB coupler. When light is input from the input waveguide I1 or I2 in TE0 or TM0 mode, it is uniformly split into two beams by the first polarization-independent 3dB coupler and then passed through the polarization-independent phase shifters respectively. The two polarization-independent phase shifters simultaneously generate a phase difference of 0 or π for the TE0 / TM0 modes, and then the beams are combined by the second polarization-independent 3dB coupler to achieve the switching between crossover and through states.

3. The polarization-independent N-bit path-selective integrated optical delay chip according to claim 1, characterized in that, The polarization-independent delay waveguide consists of two waveguides of equal length and width connected in series with a TE0-TM0 mode switch. The two waveguides simultaneously support low-loss transmission in both TE0 and TM0 modes, with the TE0-TM0 mode switch inserted between the two waveguides.

4. The polarization-independent N-bit path-selective integrated optical delay chip according to claim 1, characterized in that, The polarization-independent reference waveguide consists of two waveguides of equal length and width connected in series with a TE0-TM0 mode switch. The two waveguides simultaneously support low-loss transmission in both TE0 and TM0 modes, with the TE0-TM0 mode switch inserted between the two waveguides.

5. The polarization-independent N-bit path-selective integrated optical delay chip according to claim 3 or 4, characterized in that, The TE0-TM0 mode switch is used to simultaneously convert the TE0 and TM0 mode optical signals of the input waveguide into TM0 and TE0 mode optical signals for output, respectively.

6. The polarization-independent N-bit path-selective integrated optical delay chip according to claim 1, characterized in that, Consider the k-th polarization-independent delay waveguide, where the TE0(TM0) component of the input optical signal passes through its first segment of length L0+2. k-1 When the waveguide is delayed by ΔL, the accumulated τ TE0 +2 k-1 Δτ TE0 (τ TM0 +2 k-1 Δτ TM0 The delay amount; the TE0-TM0 mode switch converts the TM0 (TE0) component into the second segment with the same length L0+2. k-1 The delayed waveguide of ΔL accumulates τ again. TM0 +2 k-1 Δτ TM0 (τ TE0 +2 k-1 Δτ TE0 The delay amount; the delay of the polarization-independent delay waveguide on the input signal TE0 and TM0 components is τ. TE0 +τ TM0 +2 k-1 Δτ TE0 +2 k-1 Δτ TM0 +τ ME , where τ ME The delay of the TE0-TM0 mode switch is given by the following relationship between the delay and the waveguide length: Where n g is the refractive index of the waveguide group.

7. The polarization-independent N-bit path-selective integrated optical delay chip according to claim 6, characterized in that, Considering the k-th order polarization-independent delay waveguide, when the TE0(TM0) component of the input optical signal passes through its first segment of the reference waveguide with length L0, it accumulates τ. TE0 (τ TM0 The delay amount; converted from TE0-TM0 mode by the switch to TM0 (TE0) component and entering the second reference waveguide of the same length L0, accumulating τ again. TM0 (τ TE0 The delay amount; the delay τ produced by the polarization-independent reference waveguide for the input signal TE0 and TM0 components is τ. TE0 +τ TM0 +τ ME Considering the input signal components TE0 and TM0, the relative delay between the k-th order reference waveguide and the delay waveguide is 2. k-1 (Δτ TE0 +Δτ TM0 ), where Δτ TE0(TM0) This represents the unit relative delay in TE0 (TM0) mode.

8. The polarization-independent N-bit path-selective integrated optical delay chip according to claim 1, characterized in that, The polarization-independent reference waveguides of each order have equal lengths; the length difference between the k-th order polarization-independent delay waveguide and the reference waveguide is 2. k-1 ΔL, where ΔL is the length difference between the first-order polarization-independent delay waveguide and the polarization-independent reference waveguide; the relative delay introduced is 2. k-1 (Δτ TE0 +Δτ TM0 ), where Δτ TE0 +Δτ TM0 This represents the relative delay between the first-order polarization-independent delay waveguide and the reference waveguide.

9. The polarization-independent N-bit path-selective integrated optical delay chip according to claim 8, characterized in that, The polarization-independent delay waveguide and polarization-independent reference waveguide can also be converted from TM0 mode to other modes (e.g., TE1 mode), thereby achieving mode independence of the relative delay between TE0 mode and TE1 mode. Only the TE0-TM0 mode switch needs to be replaced with a TE0-TE1 mode switch.

10. The polarization-independent N-bit path-selective integrated optical delay chip of the polarization-independent Mach-Zehnder optical switch according to claim 1, characterized in that, The TE0-TM0 mode switch includes various technical approaches, such as active mode switching, passive Nanobeam waveguide, passive mode evolution polarization rotator, passive mode hybrid polarization rotator, and combination of passive TE0-TE1 mode switch and TE1-TM0 mode converter.

11. The polarization-independent N-bit path-selective integrated optical delay chip according to claim 1, characterized in that, Its design and fabrication platforms include, but are not limited to, silicon (SOI), silicon nitride, (doped) silicon oxide, silicon oxynitride, thin-film lithium niobate, or indium phosphide.

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