System and method for data replication in memory devices

Abstract

Systems, methods, and apparatuses for data replication in memory devices are provided. In one or more examples, the systems, apparatuses, and methods include providing, to a host, an allocation of memory resources of a memory pool device, selecting a first memory module of a plurality of memory modules of the memory pool device as a primary memory resource of the allocation, selecting at least a second memory module of the plurality of memory modules as a secondary memory resource of the allocation, configuring, in a memory switch of the memory pool device and for the allocation, a virtual memory module as an interface between the host and the allocated memory modules, and executing a first command received at the virtual memory module from the host to read data based on the allocation.

Description

[0001] Cross-reference to related applications

[0002] This application claims the benefit of U.S. Provisional Patent Application No. 63 / 789,413, filed April 15, 2025, and U.S. Patent Application No. 19 / 281,557, filed July 25, 2025, which are incorporated herein by reference for all purposes. Technical Field

[0003] This disclosure generally relates to memory systems. In particular, this subject matter relates to systems and methods for copying data in memory devices. Background Technology

[0004] This background section is intended to provide context only, and the disclosure of any concepts in this section does not constitute an admission that the concepts are prior art.

[0005] Memory management is a form of resource management applied to computer memory. Some aspects of memory management involve dynamically allocating portions of memory to programs upon request and releasing those portions for reuse when they are no longer needed. Memory management provides functionality to computer systems by providing memory allocation to applications. However, improvements to memory management can be made for high-performance computing, artificial intelligence (AI) systems, and more. Summary of the Invention

[0006] In various embodiments, the systems and methods described herein include systems, methods, and apparatus for data replication in memory devices. In some aspects, the described method may include providing a memory resource allocation from a memory pool appliance to a host, selecting a first memory module as a primary memory resource and selecting at least a second memory module as a secondary memory resource for allocation, configuring a virtual memory module in a memory switch as an interface between the host and the allocated memory module, and executing commands received from the host at the virtual memory module to read data based on the allocation. In some embodiments, the method may involve reading data from the secondary memory module based on the states of the first and second memory modules determined by the memory switch. The memory switch is configured to select the secondary memory module when the state indicates that the first memory module is inaccessible or when the secondary memory module exhibits a lower load store frequency, reduced workload, lower memory capacity utilization, or lower temperature than the first memory module. In some embodiments, the method may include receiving commands from the host to write data to the allocation, writing a first copy of the data to the first memory module, writing a second copy to the second memory module, and presenting a logical representation of the allocation to the host via the virtual memory module. It can also generate a mapping table that associates virtual memory modules with allocated memory modules, and the allocation can also include memory modules from a second memory pool device, where all components operate using DRAM or hybrid memory modules in accordance with a cache coherence protocol.

[0007] In some embodiments, the described system may include a fabric manager for supplying memory resource allocations from a memory pool device to a host, and a memory switch configured to select a primary memory module and at least a secondary memory module from the memory pool device. The memory switch is also configured to establish a virtual memory module as an interface between the host and the allocated memory modules, and to execute commands received from the host for reading data from the allocation. The system may also involve reading data from the secondary memory module based on the memory module status of the two selected modules determined by the memory switch. When the primary memory module is inaccessible, the memory switch can select a secondary memory module and add the additional memory module to the allocation. Alternatively, the selection of the secondary memory module may be based on parameters such as a lower memory loading frequency relative to the primary memory module, workload, memory capacity utilization, or temperature. The system also supports receiving write commands from the host and writing copies of data to the primary and secondary memory modules, while the virtual memory module provides a logical view of the allocation.

[0008] In some embodiments, the described system may provide a non-transitory computer-readable medium storing instructions executable by a processor to manage the allocation of memory resources from a memory pool device to a host. The instructions cause the processor to select a primary memory module and at least a secondary memory module among a plurality of memory modules, configure a virtual memory module in a memory switch as an interface between the host and the selected memory module, and execute commands to read data from the allocation based on instructions received at the virtual memory module. Further instructions instruct the processor to read data from the secondary memory module based on the memory module status determined by the memory switch, wherein if the status indicates that the primary memory module is inaccessible, the secondary memory module is selected, and a prompt to add a third memory module to the allocation is provided.

[0009] A computer-readable medium is disclosed. This medium can store instructions that, when executed by a computer, cause the computer to perform operations substantially the same as or similar to those further disclosed herein. Similarly, non-transitory computer-readable media, devices, and systems for performing operations substantially the same as or similar to those described herein are further disclosed.

[0010] The systems and methods for data replication in memory devices (e.g., compute fast link (CXL) devices) described herein offer several advantages and benefits. For example, the data replication systems and methods described herein increase the reliability of the memory device. The systems and methods described herein improve the system-level reliability, availability, and maintainability (RAS) of the CXL device. For instance, the data replication systems and methods described herein can increase reliability when a CXL device fails within a CXL memory device. Furthermore, the data replication systems and methods described herein improve the performance of the memory device when selecting a memory device based on workload. Therefore, the systems and methods enable CXL memory devices and / or applications associated with CXL memory devices to continue operating and remain online when one or more memory devices within the CXL memory device fail. Attached Figure Description

[0011] The foregoing and other aspects of this system and method will be better understood when this application is read with reference to the following accompanying drawings, wherein like numerals denote similar or identical elements. Furthermore, the drawings provided herein are for illustrative purposes only; other embodiments, which may not be explicitly shown, are not excluded from the scope of this disclosure.

[0012] These and other features and advantages of this disclosure will be appreciated and understood by referring to the specification, claims and drawings, wherein:

[0013] Figure 1An example system according to one or more embodiments described herein is shown.

[0014] Figure 2 One or more embodiments according to the present document are shown. Figure 1 The details of the system.

[0015] Figure 3 An example system according to one or more embodiments described herein is shown.

[0016] Figure 4 An example mapping table is shown according to one or more embodiments described herein.

[0017] Figure 5 An example system according to one or more embodiments described herein is shown.

[0018] Figure 6 A flowchart illustrating an example method associated with the disclosed system according to an example implementation described herein is depicted.

[0019] Figure 7 A flowchart illustrating an example method associated with the disclosed system according to an example implementation described herein is depicted.

[0020] While the system and method are readily adaptable to various modifications and alternatives, specific embodiments thereof are illustrated by way of example in the accompanying drawings and will be described herein. The drawings may not be drawn to scale. However, it should be understood that the drawings and their detailed description are not intended to limit the system and method to the specific forms disclosed, but rather, the invention is intended to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the system and method as defined by the appended claims. Detailed Implementation

[0021] Details of one or more embodiments of the subject matter described herein are set forth in the accompanying drawings and the following description. Other features, aspects, and advantages of the subject matter will become apparent from the specification, drawings, and claims.

[0022] Various embodiments of this disclosure will now be described more fully below with reference to the accompanying drawings, which illustrate some, but not all, of the embodiments. In fact, this disclosure may be implemented in many forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided to enable this disclosure to meet applicable legal requirements. Unless otherwise stated, the term “or” is used herein in a substitute and connective sense. The terms “illustrative” and “example” are used for examples without an indication of quality level. The same reference numerals always denote the same elements. Arrows in each figure depict bidirectional data flow and / or bidirectional data flow capabilities. The terms “path,” “path,” and “route” are used interchangeably herein.

[0023] Embodiments of this disclosure can be implemented in various ways, including as an article of manufacture. A computer program product may include a non-transitory computer-readable storage medium storing application programs, programs, program components, scripts, source code, program code, object code, bytecode, compiled code, interpreted code, machine code, executable instructions, etc. (also referred to herein as executable instructions, instructions for execution, computer program product, program code, and / or similar terms used interchangeably herein). Such non-transitory computer-readable storage medium includes all computer-readable media (including volatile and non-volatile media).

[0024] In one embodiment, a non-volatile computer-readable storage medium may include a floppy disk, flexible disk, hard disk, solid-state storage device (SSS) (e.g., solid-state drive (SSD)), solid-state card (SSC), solid-state module (SSM), enterprise flash drive, magnetic tape, or any other non-transitory magnetic medium. Non-volatile computer-readable storage media may include punched cards, paper tape, optical marking sheets (or any other physical medium having a perforated pattern or other optically identifiable markings), optical disc read-only memory (CD-ROM), rewritable optical disc (CD-RW), digital versatile optical disc (DVD), Blu-ray disc (BD), or any other non-transitory optical medium. Such non-volatile computer-readable storage media may include read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), flash memory (e.g., serial, NAND, NOR, etc.), multimedia memory card (MMC), secure digital storage (SD) card, smart media card, compressed flash memory (CF) card, memory stick, etc. In addition, non-volatile computer-readable storage media may include conductive bridged random access memory (CBRAM), phase change random access memory (PRAM), ferroelectric random access memory (FeRAM), non-volatile random access memory (NVRAM), magnetoresistive random access memory (MRAM), resistive random access memory (RRAM), silicon-oxide-nitride-oxide-silicon memory (SONOS), floating junction gate random access memory (FJG RAM), millipede memory, racetrack memory, etc.

[0025] In one embodiment, a volatile computer-readable storage medium may include random access memory (RAM), dynamic random access memory (DRAM), static random access memory (SRAM), fast page mode dynamic random access memory (FPM DRAM), extended data output dynamic random access memory (EDO DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), double data rate type 2 synchronous dynamic random access memory (DDR2 SDRAM), double data rate type 3 synchronous dynamic random access memory (DDR3 SDRAM), Rambus dynamic random access memory (RDRAM), dual transistor RAM (TTRAM), thyristor RAM (T-RAM), zero capacitor (Z-RAM), Rambus through-hole memory device (RIMM), dual in-line memory device (DIMM), single in-line memory device (SIMM), video random access memory (VRAM), cache memory (including various levels), flash memory, register memory, etc. It should be understood that, in the case where the embodiments are described as using computer-readable storage media, other types of computer-readable storage media may be used in place of the computer-readable storage media described above or in addition to the computer-readable storage media described above.

[0026] It should be understood that various embodiments of this disclosure can be implemented as methods, apparatus, systems, computing devices, computing entities, etc. Thus, embodiments of this disclosure can take the form of apparatuses, systems, computing devices, computing entities, etc., that execute instructions stored on a computer-readable storage medium to perform certain steps or operations. Therefore, embodiments of this disclosure can take the form of hardware embodiments, computer program product embodiments, and / or embodiments including combinations of computer program products and hardware that perform certain steps or operations.

[0027] Embodiments of the present disclosure are described below with reference to block diagrams and flowcharts. Therefore, it should be understood that each block in the block diagrams and flowcharts can be implemented as a computer program product, hardware embodiment, combination of hardware and computer program products and / or apparatus, system, computing device, computing entity, etc., which executes instructions, operations, steps, and interchangeable similar terms (e.g., executable instructions, instructions for execution, program code, etc.) on a computer-readable storage medium for execution. For example, code retrieval, loading, and execution can be performed sequentially, such that one instruction is retrieved, loaded, and executed at a time. In some examples, retrieval, loading, and / or execution can be performed in parallel, such that multiple instructions are retrieved, loaded, and / or executed together. Thus, such embodiments can produce machines specifically configured to perform the steps or operations specified in the block diagrams and flowcharts. Therefore, the block diagrams and flowcharts support various combinations of embodiments for performing specified instructions, operations, or steps.

[0028] Throughout this specification, references to "an embodiment" or "an embodiment" mean that a particular feature, structure, or characteristic described in connection with that embodiment may include in at least one embodiment disclosed herein. Therefore, the phrases "in one embodiment," "in an embodiment," or "according to an embodiment" (or other phrases with similar meanings) appearing in various places throughout this specification may not necessarily refer to the same embodiment. Furthermore, particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In this regard, as used herein, the term "exemplary" means "serving as an example, instance, or illustration." Any embodiment described herein as "exemplary" should not be construed as necessarily preferred or advantageous over other embodiments. Additionally, particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. Moreover, depending on the context discussed herein, singular terms may include corresponding plural forms, and plural terms may include corresponding singular forms. Similarly, hyphenated terms (e.g., "two-dimensional", "pre-determined", "pixel-specific", etc.) may occasionally be used interchangeably with their non-hyphenated versions (e.g., "two dimensional", "predetermined", "pixel specific", etc.), and uppercase entries (e.g., "Counter Clock", "Row Select", "PIXOUT", etc.) may be used interchangeably with their non-uppercase versions (e.g., "counter clock", "row select", "pixout", etc.). This occasional interchangeability should not be considered inconsistent with each other.

[0029] Furthermore, depending on the context discussed herein, singular terms may include corresponding plural forms, and plural terms may include corresponding singular forms. It should also be noted that the various figures shown and discussed herein (including component diagrams) are for illustrative purposes only and are not drawn to scale. Similarly, various waveforms and timing diagrams are shown for illustrative purposes only. For example, the dimensions of some components may be enlarged relative to others for clarity. Additionally, reference numerals are repeated in the figures where appropriate to indicate corresponding and / or similar components.

[0030] The terminology used herein is for the purpose of describing some embodiments and is not intended to limit the claimed subject matter. As used herein, the singular forms “a,” “an,” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that, when used in this specification, the terms “comprising” and / or “including” specify the presence of the stated features, numbers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, numbers, steps, operations, elements, components, and / or combinations thereof.

[0031] It will be understood that when an element or layer is referred to as being on, "connected to," or "coupled to" another element or layer, the element or layer may be directly on, directly connected to, or directly coupled to the other element or layer, or there may be intermediate elements or layers. Conversely, when an element is referred to as being "directly on," "directly connected to," or "directly coupled to" another element or layer, there are no intermediate elements or layers. The same reference numerals always denote the same elements. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0032] As used herein, the terms “first,” “second,” etc., serve as labels for nouns that follow them and do not imply any kind of ordering (e.g., spatial, temporal, logical, etc.) unless explicitly defined as such. Furthermore, the same reference numerals may be used in two or more figures to refer to parts, components, blocks, circuits, units, or modules having the same or similar functions. However, this usage is merely for simplicity of description and ease of discussion; it does not imply that the construction or architectural details of these components or units are identical in all embodiments, or that these commonly referenced parts / modules are the only way to implement some of the embodiments disclosed herein.

[0033] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this subject pertains. It will be further understood that terms such as those defined in commonly used dictionaries shall be interpreted as having the same meaning as their meaning in the context of the relevant field, and shall not be interpreted in an idealized or overly formal sense unless expressly defined herein.

[0034] As used herein, the term "module" means any combination of software, firmware, and / or hardware configured to provide the functionality described herein in conjunction with modules. For example, software may be embodied as a software package, code, and / or instruction set or instructions, and the term "hardware" as used in any implementation described herein may, for example, individually or in any combination, include components, hardwired circuitry, programmable circuitry, state machine circuitry, and / or firmware storing instructions executed by programmable circuitry. Modules may be embodied collectively or individually as circuitry forming part of a larger system, such as, but not limited to, integrated circuits (ICs), system-on-a-chip (SoCs), components, etc.

[0035] The description provided is intended to enable those skilled in the art to make and use the subject matter disclosed herein and to apply it in the context of a particular application. While specific examples are given below, other and further examples may be devised without departing from its basic scope.

[0036] Various modifications and uses in different applications will be apparent to those skilled in the art, and the general principles defined herein can be applied to a wide range of embodiments. Therefore, the subject matter disclosed herein is not intended to be limited to the presented embodiments, but should be given the broadest scope consistent with the principles and novel features disclosed herein.

[0037] In the provided description, numerous specific details are set forth to provide a more thorough understanding of the subject matter disclosed herein. However, it will be apparent to those skilled in the art that the subject matter disclosed herein can be practiced without being limited to these specific details. In other instances, well-known structures and devices are shown in block diagram form rather than in detail to avoid obscuring the subject matter disclosed herein.

[0038] Unless otherwise expressly stated, all features disclosed in this specification (e.g., any appended claims, abstract, and drawings) may be replaced by alternative features for the same, equivalent, or similar purposes. Therefore, unless otherwise expressly stated, each disclosed feature is merely one example of a series of equivalent or similar features.

[0039] This document describes various features with reference to the accompanying drawings. It should be noted that the drawings are intended only to facilitate the description of the features. The various features described are not intended as an exhaustive description of the subject matter disclosed herein or as a limitation on the scope of the subject matter disclosed herein. Furthermore, the examples shown do not need to possess all the aspects or advantages shown. Aspects or advantages described in connection with a particular example are not necessarily limited to that example and can be practiced in any other example, even if not so shown or so explicitly described.

[0040] It should be noted that, if used, the labels left, right, front, back, top, bottom, forward, reverse, clockwise, and counterclockwise are for convenience only and are not intended to suggest any particular fixed direction. Rather, the labels are used to reflect the relative position and / or orientation between the various parts of an object.

[0041] Data processing may include data buffering, aligning incoming data from multiple communication channels, forward error correction (FEC), etc. For example, data may be received by an analog front-end (AFE) that can prepare the incoming data for digital processing. The digital portion of the transceiver (e.g., a digital signal processor (DSP)) can provide skew management, equalization, reflection cancellation, and / or other functions. It should be understood that the methods described herein can provide numerous benefits, including power and cost savings.

[0042] Furthermore, the terms "system," "component," "module," "interface," and "model" are generally intended to refer to computer-related entities, or hardware, a combination of hardware and software, software, or software in execution. For example, a component can be, but is not limited to, a process, processor, object, executable file, execution thread, program, and / or computer running on a processor. For illustration, both an application running on a controller and the controller itself can be components. One or more components may reside within a process and / or execution thread, and components may reside on one computer and / or be distributed across two or more computers.

[0043] Unless otherwise explicitly stated, each value and range can be interpreted as an approximation, as indicated by the words "about" or "approximately" preceding the value or range. Signals and their corresponding nodes or ports can be represented by the same name and are interchangeable here.

[0044] While embodiments may have been described with respect to circuit functionality, the embodiments of the subject matter disclosed herein are not limited. Possible implementations may be embodied in a single integrated circuit, a multi-chip module, a single card, a SoC, or a multi-card circuit package. It will be apparent to those skilled in the art that various embodiments may also be implemented as part of a larger system. Such embodiments may be used in conjunction with, for example, digital signal processors, microcontrollers, field-programmable gate arrays, application-specific integrated circuits, or general-purpose computers.

[0045] It will be apparent to those skilled in the art that the various functions of circuit elements can also be implemented as processing blocks in a software program. Such software can be employed in, for example, digital signal processors, microcontrollers, or general-purpose computers. Such software can be embodied in the form of program code embodied in a tangible medium, such as magnetic recording media, optical recording media, solid-state storage, floppy disks, CD-ROMs, hard disk drives, or any other non-transitory machine-readable storage medium, which, when loaded into and executed by a machine such as a computer, becomes an apparatus for practicing the subject matter disclosed herein. When implemented on a general-purpose processor, program code segments are combined with the processor to provide a unique device similar to the operation of a particular logic circuit. The described embodiments can also be represented in the form of bit streams or sequences of other signal values ​​transmitted electrically or optically through a medium, magnetic field changes stored in a magnetic recording medium generated using the methods and / or apparatus described herein, etc.

[0046] Compute Fast Link (CXL) memory can include techniques that extend memory capacity beyond what is available in some random access memory systems, such as dynamic random access memory (DRAM). CXL can allow for greater memory bandwidth and capacity by implementing high-speed, cache-coherent interconnects, thereby allowing processors (e.g., central processing units (CPUs)) to access shared memory on attached devices, effectively pooling and sharing memory resources. CXL can include high-speed, low-latency processor-to-device interconnect technologies built on the Fast Peripheral Component Interconnect (PCIe) physical layer.

[0047] Compute Fast Link (CXL) technology can include CXL memory modules. CXL memory modules can include CXL Memory DRAM Modules (CMM-D) of DRAM memory, CXL Memory Hybrid Modules (CMM-H) of DRAM and NAND flash memory, CXL Memory Module Boxes (CMM-B), etc. CMM-D or CMM-H can expand the memory capacity of a server and allow memory pooling and sharing across multiple servers. CMM-D or CMM-H can include memory expanders that provide increased memory capacity and bandwidth in a system without increasing the number of main CPU memory channels. CMM-D or CMM-H can be designed to address the limitations of traditional memory expansion in high-performance servers and can be used for memory-intensive workloads such as artificial intelligence (AI) workloads, machine learning (ML) workloads, high-performance computing (HPC) workloads, in-memory database workloads, etc. CMM-B can include storage devices that can include one or more CMM-Ds and / or one or more CMM-Hs. CMM-B can be configured to occupy a slot in a storage rack (e.g., a rack-mountable rack). For example, CMM-B can be a memory pooling device, or it can include a memory pooling device for rack computing. CMM-B can provide a memory pool that can be shared among multiple servers in a rack, thus providing flexible memory allocation and expansion decoupled from computing resources.

[0048] In some examples, the CMM-B can be connected to one or more hosts. The CMM-B may include memory resources and can provide dynamic allocation of these memory resources to one or more hosts. For example, the CMM-B can provide dynamic allocation of memory resources to applications running on a host. For example, the CMM-B can allocate at least a portion of the memory of the CMM-D and / or CMM-H to an application. In some systems, the CMM-B may experience application crashes and / or system crashes when a memory module in the CMM-B fails (e.g., a CMM-D fails and a CMM-H fails). For example, a CMM-D or CMM-H can provide memory resources to an application based on allocation, and when that CMM-D or CMM-H fails, the application and / or associated system (e.g., the CMM-B) may crash.

[0049] The systems and methods described herein enable data replication within memory devices (e.g., CMM-B, CMM-B's CXL switch, CMM-B's structure manager) to prevent application and / or system crashes when memory modules in the CMM-B fail (e.g., CMM-D or CMM-H fails). Data replication can be implemented transparently. For example, data replication can be implemented on the CMM-B without altering the CXL protocol, independently of the host, without host intervention, and the host is unaware of the data replication process.

[0050] In some cases, data replication may include the active storage module of the CMM-B and one or more standby storage modules of the CMM-B. For example, application allocation may be linked to the active storage module and one or more standby storage modules. When the active storage module fails, the CMM-B (e.g., in conjunction with a CXL switch and / or a structure manager) may use at least one of the standby storage modules to service the allocated storage operations. In some cases, the CMM-B may configure the active standby storage module as the new active storage module. In some cases, the CMM-B may configure an available storage module as the new active storage module, bring it online, and switch to the new active storage module for storage operations, while keeping the active standby storage module as the allocated standby storage module. When a standby storage module fails and the active storage module remains online, the CMM-B (e.g., in conjunction with a CXL switch and / or a structure manager) may configure another standby storage module to replace the failed standby storage module.

[0051] The described systems and methods may include: using an allocated available device (e.g., an available CMM-D) to serve data when another allocated device (e.g., a CMM-D) fails. Some systems may not consider availability enhancements, including data redundancy. Some systems may not implement policy-based service resource selection to serve requests. Some systems may achieve cluster-level availability through multiple switches.

[0052] The systems and methods described herein can leverage data redundancy and / or policy-based service resource selection to provide availability enhancements to serve requests. The systems and methods described herein can implement data replication within a single memory pool device (e.g., a single CXL memory cartridge).

[0053] The system may include a CXL switch configured to replicate data and write data to multiple CXL devices (e.g., CMM-D) within a CXL memory device (e.g., CMM-B). The data replication system and methods described herein may be based on an upstream port logical device (LD) to downstream port LD mapping table and / or a performance statistics management table. The data replication system and methods described herein may be based on a device selection policy and / or a data service policy. Memory device reliability improvements may be based on data replication across multiple memory devices (e.g., multiple CXL devices). When one or more devices fail, one of the available devices can be configured to serve the data.

[0054] Figure 1 An example system 100 according to one or more embodiments described herein is shown. Figure 1 The image shows machine 105, which can be referred to as a host, system, or server. Although Figure 1 Machine 105 is described as a tower computer, but embodiments of this disclosure can be extended to machines of any form factor or type. For example, machine 105 may be a rack server, blade server, desktop computer, tower computer, mini-tower computer, desktop server, laptop computer, notebook computer, tablet computer, etc.

[0055] Machine 105 may include processor 110, memory 115, and storage device 120. Processor 110 may be any type of processor. Note that, for ease of illustration, processor 110 and other components discussed below are shown as being external to the machine: embodiments of this disclosure may include these components within the machine. Although Figure 1 A single processor 110 is shown, but the machine 105 may include any number of processors, each of which may be a single-core or multi-core processor, each of which may implement a Reduced Instruction Set Computer (RISC) architecture or a Complex Instruction Set Computer (CISC) architecture (and other possibilities), and may be mixed in any desired combination.

[0056] Processor 110 may be coupled to memory 115. Memory 115 may be any type of memory, such as flash memory, DRAM, SRAM, persistent random access memory, ferroelectric random access memory (FRAM), or non-volatile random access memory (NVRAM), such as magnetoresistive random access memory (MRAM), phase-change memory (PCM), or resistive random access memory (ReRAM). Memory 115 may include volatile and / or non-volatile memory. Memory 115 may use any desired form factor: for example, single in-line memory module (SIMM), dual in-line memory module (DIMM), non-volatile DIMM (NVDIMM), etc. Memory 115 may be any desired combination of different memory types and may be managed by memory controller 125. Memory 115 may be used to store data that can be referred to as "short-term": that is, data that is not expected to be stored for a long time. Examples of short-term data may include temporary files, data used locally by the application (which may have been copied from other storage locations), etc.

[0057] Processor 110 and memory 115 can support various operating systems on which applications can run. These applications can issue requests (which may be referred to as commands) to read data from or write data to memory 115 or storage device 120. When storage device 120 is used to support applications that read or write data via a certain file system, device driver 130 can be used to access storage device 120. Although Figure 1 A storage device 120 is shown, but any number (one or more) of storage devices can be present in machine 105. Storage device 120 can support any desired protocol or protocol, including, for example, the Non-Volatile Memory Fast (NVMe®) protocol, the Serial Attached Small Computer System Interface (SCSI) (SAS) protocol, or the Serial AT Accessory (SATA) protocol. Storage device 120 can include any desired interface, including, for example, a Peripheral Component Interconnect Fast (PCIe®) interface or a Compute Fast Link (CXL®) interface. Storage device 120 can take any desired form factor, including, for example, U.2 form factor, U.3 form factor, M.2 form factor, Enterprise and Data Center Standard Form Factor (EDSFF) (including all its types, such as E1 Short, E1 Long, and E3 types), or Add-in Card (AIC).

[0058] Although Figure 1The term "storage device" is used, but embodiments of this disclosure may include any storage device format that can benefit from the use of computing storage units, examples of which may include hard disk drives, solid-state drives (SSDs), or persistent memory devices such as PCM, ReRAM, or MRAM. Any references to "storage device" or "SSD" below should be understood to include other embodiments of this disclosure and other kinds of storage devices. In some cases, the term "storage unit" may cover both storage device 120 and memory 115. Machine 105 may include power supply 135. Power supply 135 may provide power to machine 105 and its components.

[0059] Machine 105 may include a transmitter 145 and a receiver 150. The transmitter 145 or receiver 150 may be used to transmit or receive data, respectively. In some cases, the transmitter 145 and / or receiver 150 may be used to communicate with memory 115 and / or storage device 120. The transmitter 145 may include write circuitry 160, which may be used to write data into storage devices (such as registers) in memory 115 and / or storage device 120. Similarly, the receiver 150 may include read circuitry 165, which may be used to read data (such as registers) from storage devices in memory 115 and / or storage device 120. In some cases, the systems and methods described herein may be based on the transmitter 145, receiver 150, write circuitry 160, and / or read circuitry 165.

[0060] In the example shown, machine 105 may include timer 155, which can be used to time one or more operations, indicate or measure time periods (e.g., related to load / store frequency, device utilization, etc.), indicate the elapsed time, indicate expiration, indicate timeout, etc.

[0061] In one or more examples, machine 105 can be implemented using any type of device. Machine 105 can be configured as one or more servers (e.g., as its host), such as a computing server, storage server, storage node, network server, supercomputer, data center system, etc., or any combination thereof. Additionally or alternatively, machine 105 can be configured as one or more computers (e.g., as its host), such as a workstation, personal computer, tablet computer, smartphone, etc., or any combination thereof. Machine 105 can be implemented using any type of device, which can be configured to include, for example, accelerator devices, storage devices, network devices, memory expansion and / or buffer devices, central processing unit (CPU), graphics processing unit (GPU), neural processing unit (NPU), tensor processing unit (TPU), optical processing unit (OPU), etc., or any combination thereof.

[0062] Any communication between devices including machine 105 (e.g., host, compute storage device, and / or any intermediate device) can occur through an interface that can be implemented using any type of wired and / or wireless communication medium, interface, protocol, etc., including PCIe, NVMe, Ethernet, NVMe-oF, Compute Fast Link (CXL), and / or coherence protocols (such as CXL.mem, CXL.cache, CXL.IO, etc.), Gen-Z, Open Coherent Accelerator Processor Interface (OpenCAPI), Cache Coherent Interconnect for Accelerators (CCIX), Advanced Extensible Interface (AXI), etc. or any combination thereof, Transmission Control Protocol / Internet Protocol (TCP / IP), Fibre Channel, Unlimited Bandwidth, Serial AT Accessory (SATA), Small Computer System Interface (SCSI), Serial Attached SCSI (SAS), iWARP, any generation of wireless networks (including 2G, 3G, 4G, 5G, etc.), any generation of Wi-Fi, Bluetooth, Near Field Communication (NFC), etc., or any combination thereof. In some embodiments, the communication interface may include a communication structure, which includes one or more links, buses, switches, hubs, nodes, routers, converters, repeaters, etc. In some embodiments, system 100 may include one or more additional devices having one or more additional communication interfaces.

[0063] As shown in the figure, machine 105 may include a replication controller 140. In some examples, the replication controller 140 may include logic (e.g., logic circuitry, electrical circuitry), hardware (e.g., processing units, memory, storage devices), software, firmware, etc. In some cases, the replication controller 140 may perform one or more functions in conjunction with processor 110. In some cases, at least a portion of the replication controller 140 may be implemented by or by processor 110 and / or memory 115. One or more logic circuitry of the replication controller 140 may include any or a combination of multiplexers, registers, logic gates, arithmetic logic units (ALUs), caches, computer memory, microprocessors, processing units (CPUs, GPUs, NPUs, and / or TPUs), FPGAs, ASICs, etc., enabling the replication controller 140 to provide data replication in memory devices.

[0064] Any of the functions described herein, including host functions, device functions, replication controller 140 functions, etc., can be implemented in hardware, software, firmware, or any combination thereof, including, for example, hardware and / or software combinational logic, sequential logic, timers, counters, registers, state machines, volatile memory (such as at least one or any combination of: DRAM and / or SRAM, non-volatile memory including flash memory, persistent memory such as cross-grid non-volatile memory, memory with varying bulk resistance, PCM, etc., and / or any combination thereof), complex programmable logic devices (CPLDs), field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), CPUs, GPUs, NPUs, TPUs, OpUs, etc., including CISC processors (such as x86 processors) and / or RISC processors (such as RISC-V and / or advanced RISC machine (ARM) processors). Instructions stored in any type of memory are executed. In some embodiments, one or more components of replication controller 140 may be implemented as a SoC.

[0065] In one or more examples, replication controller 140 may be based on and / or may include a memory switch (e.g., a CXL switch) and / or a structure manager. Replication controller 140 may be implemented in a memory pooling device (e.g., a CMM-B) and / or a host (e.g., machine 105). In one or more examples, when one or more memory modules in the CXL memory pooling device fail, replication controller 140 can enable the CXL memory pooling device and / or applications associated with the CXL memory pooling device to continue operating and remain online.

[0066] Figure 2 Examples based on the description in this article are shown. Figure 1Details of machine 105 are provided. In the illustrated example, machine 105 may include processor 110. Processor 110 may include one or more processors and / or one or more dies. Processor 110 may include memory controller 125 (e.g., one or more memory controllers) and clock 205 (e.g., one or more clocks), which can be used to coordinate the operation of the machine's components. Processor 110 may be coupled to memory 115 (e.g., one or more memory chips, stacked memory, etc.), and as an example, memory 115 may include random access memory (RAM), read-only memory (ROM), or other state-saving media. Processor 110 may be coupled to storage device 120 (e.g., one or more storage devices) and to network connector 210, which may be, for example, an Ethernet connector or a wireless connector. Processor 110 may be connected to bus 215 (e.g., one or more buses), user interface 220 (e.g., one or more user interfaces), and input / output (I / O) interface ports that can be managed using I / O engine 225 (e.g., one or more I / O engines), as well as other components, which may be attached to bus 215. As shown in the figure, processor 110 can be coupled to replication controller 230, which can be... Figure 1 Example of replication controller 140. Alternatively or additionally, processor 110 may be connected to bus 215, and replication controller 230 may be attached to bus 215.

[0067] Figure 3 An example system 300 according to one or more embodiments described herein is illustrated. In some configurations, one or more aspects of system 300 may be comprised of a replication controller within a memory pool device and / or in combination with it. Figure 1 The replication controller 140 and / or Figure 2 The replication controller 230 is used to implement this. In some configurations, one or more aspects of the system 300 may be implemented by the machine 105, components of the machine 105, or any combination thereof, or may be implemented by combining the machine 105, components of the machine 105, or any combination thereof.

[0068] In the illustrated example, system 300 may include a memory pool device 305, N hosts (e.g., including host 310, where N is a positive integer, such as 1, 10, 100, 1000, etc.), and a structure manager 315. As shown, memory pool device 305 may be connected to one or more hosts (e.g., host 310). Memory pool device 305 may include a memory switch 320 and M memory modules. Memory switch 320 may be based on, incorporated into, and / or include a CXL switch. Memory switch 320 may be incorporated into the SoC. The depicted M memory modules may include one or more memory modules (e.g., memory module 325, memory module 330, memory module 335, etc.), where M is a positive integer (e.g., 1, 10, 100, 1000, etc.). The depicted M memory modules may include DRAM memory modules (e.g., CMM-D) and / or hybrid memory modules (e.g., CMM-H of DRAM and NAND flash memory).

[0069] Structure manager 315 may include application logic for system composition and resource allocation within the structure of system 300 (e.g., CXL structure). Structure manager 315 may be part of device firmware and run in a baseboard management controller (BMC) or microcontroller (e.g., replication controller 140). Structure manager 315 may reside on a host (e.g., host 310), a memory pool device (e.g., memory pool device 305), a server or rack device associated with a host or memory pool device, etc. Structure manager 315 can manage the allocation and utilization of resources within the structure of system 300, such as memory and device access. Structure manager 315 can manage memory pooling, binding ports to hosts, and / or allocating resources to virtual resources associated with system 300.

[0070] In some examples, host 310 (e.g., via structure manager 315) can generate memory allocations from at least one memory module of memory pool device 305 (e.g., allocations from memory module 325, memory module 330, and / or memory module 335). In some cases, allocations can be generated based on an application executed by host 310. Based on this allocation, memory switch 320 can link a host of system 300 (e.g., host 310) to at least one memory module (e.g., memory module 325, memory module 330, memory module 335, etc.). The link from the host to memory switch 320 can be referred to as an upstream link. The link from memory switch 320 to the memory module can be referred to as a downstream link.

[0071] Using CXL, a logical device (LD) can represent different units of memory or resources managed by the CXL device. When a CXL device manages an LD, a host or its application can use the LD (e.g., access memory resources via the LD) after it has been allocated by a structure manager (e.g., structure manager 315). An LD can be a virtual abstraction of a physical CXL device (e.g., memory module 325, memory module 330, memory module 335, etc.), thereby allowing flexible memory allocation and resource sharing among hosts. In some cases, multiple hosts can access different portions of the same physical memory module via logical devices, enabling memory pooling and sharing.

[0072] The solid line to memory module 325 indicates that, based on allocation, at least a portion of memory module 325 is configured or selected (e.g., via structure manager 315) as an active logical device of host 310. In some cases, memory switch 320 may select one or more additional memory modules as allocated backup logical devices. In the example shown, the dashed lines to memory modules 330 and 335 indicate that, based on allocation, at least a portion of memory modules 330 and 335 are respectively configured or selected (e.g., via structure manager 315) as backup logical devices of host 310. In some cases, a first portion of the memory resources of memory module 325 may be assigned as a first active logical device in a first allocation (e.g., assigned to host 310), and / or a second portion of the memory resources of memory module 325 (e.g., different from the first portion) may be assigned as a second active logical device in a second allocation. In some cases, a third portion of the memory resources of memory module 325 may be assigned as a first backup logical device in a first allocation, second allocation, or third allocation. In some cases, a fourth portion of the memory resources of memory module 325 may be assigned as a second backup logic device for a first allocation, a second allocation, a third allocation, or a fourth allocation.

[0073] Host 310 can perform one or more memory operations based on one or more memory modules allocated to memory pool device 305. For example, an application running on host 310 can perform load / store operations using at least one memory module (e.g., memory module 325, memory module 330, and / or memory module 335). The application can store or write application data to one or more memory modules, load or read application data from one or more memory modules, etc.

[0074] When host 310 executes an application, some data associated with executing the application may be stored in and / or loaded from an active logic device (e.g., memory module 325). If the active logic device fails or goes offline, then for some systems, the memory pool device may fail or go offline. In some cases, when the memory module of the memory pool device fails or goes offline, the application crashes and / or the system crashes (e.g., a crash of system 300, a crash of memory pool device 305, etc.). For example, an application running on host 310 may crash or fail due to an active logic device failure or going offline, which may occur because the application cannot access application data on the failed memory module.

[0075] The systems and methods described herein may include the allocation of memory resources. In some examples, a structure manager 315 may allocate memory to a host. For example, the structure manager 315 may create a memory allocation and license the memory allocation to a host 310 (e.g., via an upstream port of a memory switch 320). In some cases, based on the allocation, the structure manager 315 or the memory switch 320 may configure a virtual logical device (e.g., a vLD) as a logical representation of the allocation to the host 310. For example, the structure manager 315 or the memory switch 320 may configure a vLD 340 as an interface between the host 310 and the allocation (e.g., downstream logical devices of the allocation, such as an active LD, one or more standby LDs, etc.). Thus, the vLD 340 enables the host 310 to view, access, and / or interact with the allocated memory resources.

[0076] Based on the allocation permission, the memory switch 320 can select a memory module (e.g., an LD in a downstream port of the memory switch 320) as the active memory module or active LD for the allocation (e.g., memory module 325). In some cases, based on the allocation, the memory switch 320 can select one or more memory modules (e.g., one or more LDs in a downstream port of the memory switch 320) as one or more corresponding standby memory modules or standby LDs (e.g., memory module 330 and / or memory module 335, etc.). The number of standby memory modules can be configured based on default values, user-allocated values, and / or dynamically allocated values. For example, the memory switch 320 can select the initial number of standby memory modules based on the application (e.g., application type, amount of memory requested by the application, number of standby memory modules requested by the application), the amount of memory resources available for allocation, etc. In some cases, the memory switch 320 can increase or decrease the allocation based on the application's request, and / or the memory switch 320 monitors the allocation and determines that the application is not using all the allocations or that the application's performance will be improved by increasing the allocation. Multiple downstream LDs (e.g., active and standby LDs based on memory resources or at least a portion of memory module 325, memory module 330 and / or memory module 335) can be linked to an upstream vLD (e.g., vLD 340).

[0077] In some examples, the memory switch 320 can configure a mapping table based on the allocation and configuration of LDs. For example, the memory switch 320 can configure a mapping table that maps vLD 340 to an allocated active LD (e.g., memory module 325), and / or maps vLD 340 to at least one of the spare LDs (e.g., memory module 330, memory module 335, etc.). Therefore, when the host 310 sends a read command or write command to vLD 340, the mapping table allows the memory switch 320 to identify the downstream active LD and / or spare LD associated with vLD and execute the command based on the memory resources of the downstream active LD and / or spare LD. In some cases, the memory switch 320 can perform the allocation (e.g., based on the configuration mapping table). In some cases, the memory switch 320 can (e.g., to the host 310) indicate that the allocation has been configured and is available to the host.

[0078] The systems and methods described herein may include writing data to allocated memory resources. For example, host 310 may send a command to write data to vLD 340. Based on a mapping table, memory switch 320 may write data to the active LD (e.g., memory module 325) mapped to vLD 340. In some cases, based on the mapping table, memory switch 320 may identify one or more alternate LDs (e.g., memory module 325 and / or memory module 330) mapped to vLD 340 and copy the data from the write command to one or more alternate LDs.

[0079] The systems and methods described herein may include reading data from allocated memory resources. In some cases, host 310 may read data from the allocation based on a read command. For example, host 310 may send a read command to read data from vLD 340. Based on a mapping table, memory switch 320 may read the requested data from the active LD mapped to vLD 340 and provide the read data to host 310 (e.g., to the application of host 310).

[0080] The systems and methods described herein may include maintaining allocation based on memory module status (e.g., memory module failure, etc.). In some examples, host 310 may send a read command to vLD 340. Based on a mapping table, memory switch 320 may identify the active LD and / or at least one standby LD mapped to vLD 340. In some cases, memory switch 320 may determine that the active LD (e.g., memory module 325) is unavailable or inaccessible (e.g., memory module 325 does not respond, memory module 325 returns an error code or fault code, etc.). Based on the determination that the active LD is unavailable by memory switch 320, memory switch 320 may select a standby LD (e.g., memory module 330 or memory module 335) and read the requested data from the selected standby LD.

[0081] In some cases, memory switch 320 can remove the active LD from the mapping table entry used for the allocation. Memory switch 320 can promote an allocated spare LD (e.g., memory module 330 or memory module 335) to a new active LD. In some cases, based on promoting a spare LD to a new active LD, memory switch 320 can configure a new spare LD to replace the promoted spare LD in the allocation. Therefore, memory switch 320 can maintain the allocated active LD and the same number of spare LDs based on LD failure (e.g., failure of the active LD or a spare LD). Memory switch 320 can copy allocation data (e.g., data of the new active LD, data of one or more allocated spare LDs) to the new spare LD. The new spare LD can come from the same memory pool device as the active LD or from another memory pool device.

[0082] The systems and methods described herein can be based on and / or combined with device selection strategies. For example, memory switch 320 can implement a device selection strategy associated with a given allocation. The device selection strategy may include criteria for selecting logical devices (e.g., active or standby logical devices) based on memory operations (e.g., read commands, write commands, etc.) requested by host 310.

[0083] In some cases, device selection strategies can be based on workload-based criteria. For example, to serve memory requests from host 310, memory switch 320 can select idle logical devices or logical devices with relatively low workloads compared to other allocated logical devices (e.g., active LDs or standby LDs). In some cases, workload can be measured based on the average load / store frequency over a certain time period (e.g., 1 millisecond, 1 second, etc.).

[0084] In some cases, device selection strategies can be based on utilization-based criteria. For example, to serve memory requests from host 310, memory switch 320 can select logical devices (e.g., active LDs or standby LDs) with lower utilization (e.g., in terms of device capacity). For example, device selection can be based on memory switch 320 determining the device status of one or more logical devices (e.g., capacity, power usage, process utilization, throughput, busy rate, or average access over a period of time, average active time over a period of time, average idle time over a period of time, etc.) and selecting the logical device with the lowest utilization allocation.

[0085] In some cases, device selection strategies can be based on hybrid criteria. For example, memory switch 320 can select logical devices based on a hybrid value (e.g., hValue) of the logical device, where the hybrid value is based on a combination of performance and utilization, etc. For example, memory switch 320 can select a logical device to serve memory requests from host 310 based on the hValue of a logical device relative to the hValue of one or more other assigned logical devices. In some cases, hValue = α (IO frequency / sum of IO frequencies of LDs belonging to vLD) + β (Capacity utilization), where α can be a first weight or a first constant associated with the device workload metric, and β can be a second weight or a second constant associated with the device utilization metric. In some cases, α and / or β can be default values, user-selected values, etc.

[0086] In some cases, the device selection strategy can be based on service-based criteria. In some cases, the memory switch 320 may default to selecting the assigned active logical device (LD) to serve the host 310's memory requests. Additionally or alternatively, the memory switch 320 may select any assigned available logical device (e.g., active LD and / or standby LD) to serve the memory request. In some cases, the memory switch 320 may select two or more logical devices (e.g., active LD and / or one or more standby LDs) to serve the host 310's memory requests. In some cases, the memory switch 320 may select the logical device with the lowest workload, the least busy, or the least idle logical device among the assigned logical devices based on average or current performance (e.g., throughput, workload, utilization, etc.).

[0087] In some examples, the memory switch 320 may select a logical device (e.g., an active LD or a standby LD) to perform memory operations (e.g., read, write, etc.). When the memory switch 320 determines that the selected memory module (e.g., memory module 330) is unavailable, faulty, offline, or inaccessible, the memory switch 320 may select another allocated memory module (e.g., memory module 335) and use the other memory module to perform the memory operations in place of the selected memory module.

[0088] As shown in the figure, host 310 may include a replication controller (e.g., replication controller (RC) 345). Additionally or alternatively, host N may include a replication controller (e.g., RC 345) and / or storage switch 320 may include a replication controller (e.g., RC 345). RC 345 may represent a resource controller in one device or multiple resource controllers in multiple corresponding devices. One or more operations described herein may be performed at least in part by RC 345 in one or more devices of system 300. RC 345 may be... Figure 1 The replication controller 140 and / or Figure 2 The replication controller 230 is implemented or combined with it. In some examples, the RC 345 can provide the allocation of memory resources of the memory pool device 305 to the host of system 300 (e.g., host 310). The RC 345 can be configured to select a first memory module (e.g., memory module 325) from a plurality of memory modules of the memory pool device 320 as the primary memory resource for allocation. In some cases, the RC 345 can be configured to select at least a second memory module (e.g., memory module 330) from a plurality of memory modules as the secondary memory resource for allocation. In some implementations, the RC 345 can be in the memory switch 320 and for allocation, configuring a virtual memory module (e.g., vLD 340) as the interface between the host 310 and the allocated memory module. In some cases, the RC 345 can execute a first command based on a first command received at vLD 340 and from the host 310 to read data from the allocation.

[0089] Figure 4 An example mapping table 400 according to one or more embodiments described herein is shown. In some configurations, one or more aspects of the mapping table 400 may be implemented by a replication controller within a memory pool device, or in conjunction with... Figure 1 The replication controller 140 and / or Figure 2 The replication controller 230 is used in conjunction with it. In some configurations, one or more aspects of the mapping table 400 may be implemented by machine 105, components of machine 105, or any combination thereof, or in combination with machine 105, components of machine 105, or any combination thereof.

[0090] Mapping table 400 may be based on and / or include a logical device (LD) mapping table. As shown, mapping table 400 may include one or more fields. For example, mapping table 400 may include fields for virtual logical devices, active logical devices, standby logical devices, etc. As shown, mapping table 400 may include fields for virtual logical device (vLD) 405 (e.g., vLD340), active device ID (aDevID) 410, and active logical device ID (aLDid) 415. When a memory switch (e.g., memory switch 320) configures an active LD based on an allocation, an identifier may be assigned to the active LD (e.g., aLDid 415). The identifier of the active LD may be assigned by memory switch 320 and / or structure manager 315. In some cases, aDevID 410 may refer to the ID of the memory module associated with the active LD. For example, if the active LD is associated with memory module 325 (e.g., located in memory module 325, based on memory of memory module 325), then aDevID 410 can refer to the device ID of memory module 325.

[0091] In some cases, mapping table 400 may include fields for first standby device LD (s1DevID) 420, first standby logical device ID (s1LDid) 425, second standby device LD (s2DevID) 430, second standby logical device ID (s2LDid) 435, active workload (aWorkload) 440, first standby workload (s1Workload) 445, and second standby workload (s2Workload) 450. When a memory switch (e.g., memory switch 320) configures the first standby LD based on allocation, an identifier may be assigned to that first standby LD (e.g., s1LDid 425). The identifier of the first standby LD may be assigned by memory switch 320 and / or structure manager 315. In some cases, s1DevID 420 may refer to the ID of the memory module associated with the first standby LD. For example, if the first spare LD is associated with memory module 330 (e.g., located in memory module 330, based on the memory of memory module 330), then s1DevID 420 can refer to the device ID of memory module 330. Similar operations can be applied to s2DevID 430 and s2LDid 435 respectively.

[0092] As shown in the figure, mapping table 400 may include values ​​associated with the indicated fields. For example, mapping table 400 may include the value or identifier of vLD 405 (e.g., 111), the value or identifier of aDevID 410 (e.g., 1), the value or identifier of aLDid 415 (e.g., 2), etc. Mapping table 400 may include the value or identifier of aWorkload 440 (e.g., 100), the value or identifier of s1Workload 445 (e.g., 200), the value or identifier of s2Workload 450 (e.g., 150). In some cases, the workload values ​​in mapping table 400 may indicate performance metrics or benchmarks related to latency (e.g., in nanoseconds), bandwidth, average load / storage frequency (e.g., per millisecond, per second, etc. over a given time period). In some cases, workload may be measured via a performance monitoring unit of a host or storage pool device (e.g., a CXL performance monitoring unit (CPMU)).

[0093] In some cases, mapping table 400 may be associated with switch-level data replication (e.g., CXL switch-level data replication) within a memory pooling device (e.g., memory pool device 305), where switch-level data replication can provide increased system reliability and data security.

[0094] When the structure manager (e.g., structure manager 315) assigns a memory (e.g., vLD 405) to a host (e.g., host 310), the CXL switch (e.g., memory switch 320) can assign multiple LDs from separate CMM devices (e.g., CMM-D, CMM-H, etc.) to an upstream port (USP) logical device (e.g., vLD) and maintain a logical device mapping table from the USP logical device to the downstream port (DSP) LD with associated device information.

[0095] In some examples, the CXL switch can maintain a mapping table between the USP LD and the DSP LD (e.g., mapping table 400). When data arrives at the CXL switch via a USP (e.g., write command, store command), the CXL switch can store the data to one or more DSP devices (e.g., data replication). When a DSP device fails, data can be supplied from any assigned available DSP device, where the DSP device can be selected based on device status (e.g., workload, utilization, power, temperature, etc.).

[0096] Figure 5 An example system 500 according to one or more embodiments described herein is illustrated. In some configurations, one or more aspects of system 500 may be comprised of a replication controller within a memory pool device and / or in combination with it. Figure 1 The replication controller 140 and / or Figure 2 The replication controller 230 is used to implement this. In some configurations, one or more aspects of system 500 may be implemented by machine 105, components of machine 105, or any combination thereof, or in combination with machine 105, components of machine 105, or any combination thereof. System 500 may be associated with a cascaded switch topology.

[0097] In the illustrated example, system 500 may include a memory pool device 505 (e.g., a first memory pool device), N hosts (e.g., including host 510, where N is a positive integer, such as 1, 10, 100, 1000, etc.), and a structure manager 515. As shown, memory pool device 505 may be connected to one or more hosts (e.g., host 510). Memory pool device 505 may include a memory switch 520 and M memory modules. Memory switch 520 may be based on, incorporated into, and / or include a CXL switch. Memory switch 520 may be incorporated into the SoC. The depicted M memory modules may include one or more memory modules (e.g., memory module 525, memory module 530, memory module 535, etc.), where M is a positive integer (e.g., 1, 10, 100, 1000, etc.). The depicted M memory modules may include DRAM memory modules (e.g., CMM-D) and / or hybrid memory modules (e.g., CMM-H of DRAM and NAND flash memory). As shown in the figure, the memory switch 520 may include vLD 540, which can be configured for allocation (e.g., logical representation of allocation, host allocation interface).

[0098] As shown in the figure, system 500 may include a memory pool device 545 (e.g., at least a second memory pool device). In the illustrated example, memory pool device 545 may include a memory switch 550 and one or more memory modules. For example, memory pool device 545 may include L memory modules (e.g., memory module 555, memory module 560, memory module 565, etc.), where L is a positive integer (e.g., 1, 10, 100, 1000, etc.). The depicted L memory modules may include DRAM memory modules (e.g., CMM-D) and / or hybrid memory modules (e.g., CMM-H of DRAM and NAND flash). As shown in the figure, memory switch 550 may include a vLD 570 (e.g., a second virtual memory module) which can be configured for allocation (e.g., logical representation of allocation, host allocation interface). In some cases, vLD 540 may provide a logical representation including allocations of memory resources from memory pool device 505. In some examples, vLD 570 may provide a logical representation including allocations of memory resources from memory pool device 545 (e.g., identical allocations).

[0099] In some examples, the data replication system and method described herein can be extended to a cascaded switch topology (e.g., based on system 500). For example, active logical devices (aLDs) and / or standby logical devices (sLDs) can reside in a first memory pool device (e.g., memory pool device 505), a second memory pool device cascaded from the first memory pool device (e.g., memory pool device 545), etc. In some cases, the structure manager 515 can allocate memory resources of memory pool devices 505 and / or memory pool devices 545 to host 510 (e.g., to applications running on host 510). Memory switch 520 can select memory module 525 as the allocated active LD, memory module 530 as the first standby LD, and memory module 535 as the second standby LD. In some cases, memory switch 520 can select vLD 570 as the third standby LD. In some examples, memory switch 520 can determine that memory module 530 is unavailable or inaccessible (e.g., offline, faulty, power-down, etc.). In some examples, the memory switch 520 can be replaced by the vLD570 instead of the memory module 530.

[0100] From the perspective of memory switch 520, vLD 570 can be represented as an allocated memory module (e.g., a memory module), because vLD 540 can be represented as a memory module of host 510 (e.g., a memory module). From the perspective of memory switch 550, vLD 570 can be represented as a logical representation of memory modules (e.g., memory module 555, memory module 560) associated with the allocation of memory pool device 545. As shown, memory switch 550 can select memory module 555 as the active LD for memory operation requests received by vLD 570, and can select memory module 560 as the standby LD for memory operation requests received by vLD 570.

[0101] In some examples, memory switch 520 may receive memory operation requests from host 510 at vLD 540. Memory switch 520 may select memory module 525 to handle the memory operation request. Memory switch 520 may select memory module 525 based on whether memory module 525 is the active LD of vLD 540 and / or based on the device selection policy of vLD 540 (e.g., based on the workload, utilization, temperature, etc. of the corresponding memory module associated with the allocation of memory modules linked to vLD 540). In some cases, memory switch 550 may provide memory switch 520 with device selection policy metrics (e.g., the workload, utilization, temperature, etc. of memory modules linked to vLD 570). Device selection policy metrics may be based on metrics of memory modules linked to vLD 570 (e.g., memory module 555 and / or memory module 560, etc.). In some cases, memory switch 520 may configure vLD 570 as the active LD or standby LD of vLD 540. Therefore, when the memory switch 520 selects a memory module based on a device selection strategy metric, the memory switch 520 can select memory module 525, vLD 570, or memory module 535 based on the corresponding metric available to the memory switch 520.

[0102] In some examples, memory switch 520 may determine that memory module 525 is unavailable or inaccessible. Therefore, memory switch 520 may select vLD 570 instead of memory module 525 to handle memory operation requests (e.g., based on device selection policy metrics). Memory switch 550 may then select memory module 555 based on whether it is the active LD of vLD 570 and / or based on the device selection policy of vLD 570 (e.g., based on the workload, utilization, temperature, etc. of the corresponding memory module associated with the allocation and linked to vLD 570). In some cases, memory switch 550 may select memory module 560 or some other spare LD linked to vLD 570.

[0103] As shown in the figure, host 510 may include a replication controller (e.g., replication controller (RC) 575). Additionally or alternatively, host N may include a replication controller (e.g., RC 575, an instance of RC 575) and / or storage switch 520 may include a replication controller (e.g., RC 575, an instance of RC 575). Additionally or alternatively, storage switch 550 may include a replication controller (e.g., RC 575, an instance of RC 575). RC 575 may represent a resource controller in one device or multiple instances of resource controllers in multiple corresponding devices. One or more operations described herein may be performed at least in part by RC 575 in one or more devices of system 300. RC 575 may be... Figure 1 Replication controller 140 Figure 2 The replication controller 230 and / or Figure 3 The RC 575 can be implemented using or in combination with the RC 345. In some instances, the RC 575 can provide the allocation of memory resources of memory pool device 505 to the host of system 500 (e.g., host 510). The RC 575 can be configured to select a first memory module (e.g., memory module 525) from a plurality of memory modules of memory pool device 520 as the allocated primary memory resource. In some cases, the RC 575 can be configured to select at least a second memory module (e.g., memory module 530) from a plurality of memory modules as the allocated secondary memory resource. In some implementations, the RC 575 can configure a virtual memory module (e.g., vLD 540) in memory switch 520 and for allocation as the interface between host 510 and the allocated memory module. In some cases, the RC 575 can execute a first command based on a first command received at vLD 540 and from host 510 to read data from the allocation.

[0104] Figure 6A flowchart illustrating an example method 600 associated with the disclosed system according to an example implementation described herein is depicted. In some configurations, one or more aspects of method 600 may be derived from... Figure 1 The replication controller 140 and / or Figure 2 The replication controller 230 is used for implementation or in combination with it. In some cases, one or more aspects of method 600 may be implemented by a replication controller in a memory pool device, a replication controller inside a memory switch, and / or in combination with a replication controller on the host side. In some configurations, one or more aspects of method 600 may be implemented by machine 105, components of machine 105, or any combination thereof, or in combination with machine 105, components of machine 105, or any combination thereof. The depicted method 600 is merely one implementation, and one or more operations of method 600 may be rearranged, reordered, omitted, and / or otherwise modified to make other implementations possible and contemplated.

[0105] At 605, method 600 may include providing allocation to the host. For example, replication controller 140 (e.g., structure manager 315) may provide allocation of memory resources of memory pool device 305 to host 310.

[0106] At 610, method 600 may include selecting a first memory module as the allocated main memory resource. For example, replication controller 140 may select memory module 325 of memory pool device 305 as the allocated main memory resource.

[0107] At 615, method 600 may include selecting at least a second memory module as an allocated auxiliary memory resource. For example, replication controller 140 may select at least memory module 330 of memory pool device 305 as an allocated auxiliary memory resource.

[0108] At 620, method 600 may include configuring a virtual memory module as an interface between a host and an assigned memory module. For example, replication controller 140 may configure vLD 340 (e.g., configured in memory switch 320 of memory pool device 305 and used for allocation) as an interface between host 310 and the memory module assigned to it.

[0109] In 625, method 600 may include executing a first command based on the allocation. For example, replication controller 140 may execute a first command received at the virtual memory module and from the host to read data based on the allocation.

[0110] Figure 7A flowchart illustrating an example method 700 associated with the disclosed system according to an example implementation described herein is depicted. In some configurations, one or more aspects of method 700 may be derived from... Figure 1 The replication controller 140 and / or Figure 2 The replication controller 230 is used for implementation or in combination with it. In some cases, one or more aspects of method 700 may be implemented by a replication controller in a memory pool device, a replication controller inside a memory switch, and / or in combination with a replication controller on the host side. In some configurations, one or more aspects of method 700 may be implemented by machine 105, components of machine 105, or any combination thereof, or in combination with machine 105, components of machine 105, or any combination thereof. The depicted method 700 is merely one implementation, and one or more operations of method 700 may be rearranged, reordered, omitted, and / or otherwise modified to make other implementations possible and contemplated.

[0111] At 705, method 700 may include providing allocation to the host. For example, replication controller 140 (e.g., structure manager 315) may provide allocation of memory resources of memory pool device 305 to host 310.

[0112] At 710, method 700 may include selecting a first memory module as the allocated main memory resource. For example, replication controller 140 may select memory module 325 of memory pool device 305 as the allocated main memory resource.

[0113] At 715, method 700 may include selecting at least a second memory module as an allocated auxiliary memory resource. For example, replication controller 140 may select at least memory module 330 of memory pool device 305 as an allocated auxiliary memory resource.

[0114] At 720, method 700 may include using a second memory module to execute commands associated with the allocation. For example, replication controller 140 may receive commands from host 310 and select memory module 330 to execute those commands. In some cases, replication controller 140 may select memory module 330 to execute commands based on replication controller 140 determining that memory module 325 is inaccessible (e.g., memory module 325 is offline, memory module 325 has failed).

[0115] At 725, method 700 may include adding a third memory module to the allocation. For example, replication controller 140 may select a third memory module (e.g., memory module 335, memory module 565) to replace memory module 325 and add the third memory module to the allocation.

[0116] In the examples described herein, the configurations and operations are example configurations and operations, and various additional configurations and operations may be involved that are not explicitly shown. In some examples, one or more aspects of the configurations and / or operations shown may be omitted. In some embodiments, one or more operations may be performed by components other than those shown herein. Additionally or alternatively, the order and / or timing of operations may be changed.

[0117] Some embodiments may be implemented in one or a combination of hardware, firmware, and software. Other embodiments may be implemented as instructions stored on a computer-readable storage device that can be read and executed by at least one processor to perform the operations described herein. A computer-readable storage device may include any non-transitory memory structure for storing information in a machine-readable (e.g., computer) form. For example, a computer-readable storage device may include read-only memory (ROM), random access memory (RAM), disk storage media, optical storage media, flash memory devices, and other storage devices and media.

[0118] The term "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments. As used herein, the terms "computing device," "user equipment," "communication station," "station," "handheld device," "mobile device," "wireless device," and "user equipment" (UE) refer to wired and / or wireless communication devices such as switches, routers, network interface controllers, cellular phones, smartphones, tablets, netbooks, wireless terminals, laptops, femtocells, high data rate (HDR) subscriber stations, access points, printers, point-of-sale equipment, access terminals, or other personal communication system (PCS) devices. Such devices can be wireless, wired, mobile, and / or fixed.

[0119] As used in this document, the term "communication" is intended to include sending, or receiving, or both. Similarly, when only the functionality of one device is claimed, bidirectional data exchange between two devices (where both devices send and receive during the exchange) can be described as "communication." The term "communication" as used herein with respect to wired and / or wireless communication signals includes sending and / or receiving wired and / or wireless communication signals. For example, a communication unit capable of transmitting wired and / or wireless communication signals may include a wired / wireless transmitter to send communication signals to at least one other communication unit, and / or a wired / wireless receiver to receive communication signals from at least one other communication unit.

[0120] Some embodiments can be used with a variety of devices and systems, such as personal computers (PCs), desktop computers, mobile computers, laptop computers, notebook computers, tablet computers, server computers, handheld computers, handheld devices, personal digital assistant (PDA) devices, handheld PDA devices, airborne devices, non-airborne devices, hybrid devices, in-vehicle devices, non-in-vehicle devices, mobile or portable devices, consumer devices, non-mobile or non-portable devices, wireless communication stations, wireless communication devices, wireless access points (APs), wired or wireless routers, wired or wireless modems, video devices, audio devices, audio-video (A / V) devices, wired or wireless networks, wireless local area networks, wireless video local area networks (WVANs), local area networks (LANs), wireless LANs (WLANs), personal area networks (PANs), wireless PANs (WPANs), etc.

[0121] Some embodiments may be used in combination with the following: one-way and / or two-way radio communication systems, cellular wireless telephone communication systems, mobile phones, cellular phones, wireless phones, personal communication system (PCS) devices, PDA devices that include wireless communication devices, mobile or portable global positioning system (GPS) devices, devices that include GPS receivers or transceivers or chips, devices that include RFLD elements or chips, multiple-input multiple-output (MIMO) transceivers or devices, single-input multiple-output (SIMO) transceivers or devices, multiple-input single-output (MISO) transceivers or devices, devices with one or more internal antennas and / or external antennas, digital video broadcasting (DVB) devices or systems, multi-standard wireless devices or systems, wired or wireless handheld devices (e.g., smartphones), Wireless Application Protocol (WAP) devices, etc.

[0122] Some embodiments can be used in conjunction with one or more types of wireless communication signals and / or systems that conform to one or more wireless communication protocols, such as radio frequency (RF), infrared (IR), frequency division multiplexing (FDM), orthogonal FDM (OFDM), time division multiplexing (TDM), time division multiple access (TDMA), extended TDMA (E-TDMA), General Packet Radio Service (GPRS), extended GPRS, code division multiple access (CDMA), wideband CDMA (WCDMA), CDMA 2000, single-carrier CDMA, multi-carrier CDMA, multi-carrier modulation (MDM), discrete multi-tone (DMT), and Bluetooth. TMGlobal Positioning System (GPS), Wi-Fi, Wi-Max, ZigBee™, Ultra Wideband (UWB), Global System for Mobile Communications (GSM), 2G, 2.5G, 3G, 3.5G, 4G, 5G mobile networks, 3GPP, Long Term Evolution (LTE), LTE Advanced, Enhanced Data Rate GSM Evolution (EDGE), etc. Other embodiments can be used in a variety of other devices, systems, and / or networks.

[0123] Although an example processing system has been described above, embodiments of the subject matter and functional operation described herein can be implemented in other types of digital electronic circuits, or in computer software, firmware, or hardware, including the structures disclosed in this specification and their structural equivalents, or combinations thereof.

[0124] The embodiments of the subject matter and operation described herein can be implemented in digital electronic circuits, or in computer software, firmware, or hardware, including the structures disclosed herein and their structural equivalents, or combinations thereof. Embodiments of the subject matter described herein can be implemented as one or more computer programs (i.e., one or more components of computer program instructions) encoded on a computer storage medium for execution by or control of an information / data processing device. Alternatively or additionally, program instructions may be encoded on artificially generated propagating signals, such as machine-generated electrical, optical, or electromagnetic signals, generated to encode information / data for transmission to a suitable receiver device for execution by the information / data processing device. The computer storage medium may be or is included in a computer-readable storage device, a computer-readable storage substrate, a random or serial access memory array or device, or combinations thereof. Furthermore, while the computer storage medium is not a propagating signal, it may be a source or destination of computer program instructions encoded in an artificially generated propagating signal. The computer storage medium may also be or be included in one or more separate physical components or media (e.g., multiple CDs, disks, or other storage devices).

[0125] The operations described herein can be implemented as operations performed by an information / data processing device on information / data stored on one or more computer-readable storage devices or received from other sources.

[0126] The term "data processing apparatus" encompasses all kinds of devices, apparatuses, and machines used for processing data, including, for example, programmable processors, computers, systems-on-a-chip, or a combination of the foregoing. The apparatus may include dedicated logic circuitry, such as FPGAs or ASICs. In addition to hardware, the apparatus may also include code that creates an execution environment for the computer program in question, such as code constituting processor firmware, protocol stacks, database management systems, operating systems, cross-platform runtime environments, virtual machines, or combinations thereof. The apparatus and execution environment can implement a variety of different computing model infrastructures, such as web services, distributed computing, and grid computing infrastructures.

[0127] A computer program (also known as a program, software, software application, script, or code) can be written in any programming language, including compiled or interpreted languages, declarative or procedural languages, and can be deployed in any form, including as a standalone program—or as a component, part, subroutine, object, or other unit suitable for use in a computing environment. A computer program may, but does not necessarily, correspond to a file in a file system. A program may be stored as part of a file that holds other programs or information / data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple coordinating files (e.g., a file storing one or more components, subroutines, or code sections). A computer program can be deployed on a single computer or located at a single site or distributed across multiple sites and interconnected on multiple computers.

[0128] The processes and logical flows described herein can be executed by one or more programmable processors that execute one or more computer programs to perform actions by manipulating input information / data and generating output. As an example, processors suitable for executing computer programs include both general-purpose and special-purpose microprocessors, as well as any one or more processors of any kind of digital computer. Typically, the processor receives instructions and information / data from read-only memory or random access memory—or both. The basic elements of a computer are a processor for performing actions according to instructions and one or more memory devices for storing instructions and data. Typically, a computer will also include, or be operatively coupled to, receiving or transferring information / data—or both—to one or more mass storage devices (e.g., magnetic disks, magneto-optical disks, or optical disks) for storing data. However, a computer does not need to have such devices. Suitable devices for storing computer program instructions and information / data include all forms of non-volatile memory, media, and memory devices, including, for example, semiconductor memory devices such as EPROM, EEPROM, and flash memory devices; magnetic disks, such as internal hard disks or removable disks; magneto-optical disks; and CDR-OM and DVD-ROM discs. The processor and memory may be supplemented by or incorporated into special-purpose logic circuitry.

[0129] To provide interaction with the user, embodiments of the subject matter described herein can be implemented on a computer having a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor for displaying information / data to the user) and a keyboard and indicating device (e.g., a mouse or trackball) through which the user can provide input to the computer. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback, such as visual feedback, auditory feedback, or tactile feedback; and input from the user can be received in any form, including acoustic, voice, or tactile input. Additionally, the computer can interact with the user by sending documents to and receiving documents from the device used by the user; for example, by sending web pages to a web browser on the user's client device in response to a request received from a web browser.

[0130] Embodiments of the subject matter described herein can be implemented in a computing system that includes backend components (e.g., as an information / data server), middleware components (e.g., an application server), or frontend components (e.g., a client computer with a graphical user interface or web browser through which a user can interact with embodiments of the subject matter described herein), or any combination of one or more such backend, middleware, or frontend components. Components of the system can be interconnected via digital information / data communication (e.g., a communication network) of any form or medium. Examples of communication networks include local area networks (“LANs”) and wide area networks (“WANs”), interconnected networks (e.g., the Internet), and peer-to-peer networks (e.g., self-organizing peer-to-peer networks).

[0131] A computing system may include clients and servers. Clients and servers are typically geographically separated and usually interact via a communication network. The client-server relationship is established by means of computer programs running on respective computers and having a client-server relationship with each other. In some embodiments, the server sends information / data (e.g., HTML pages) to the client device (e.g., to display information / data to a user interacting with the client device and to receive user input from that user). Information / data generated at the client device (e.g., the result of user interaction) may be received at the server from the client device.

[0132] While this specification contains numerous details of specific embodiments, these should not be construed as limiting any embodiment or the scope of any possible claim, but rather as descriptions of features specific to particular embodiments. Certain features described herein in the context of individual embodiments may also be implemented in combination in a single embodiment. Conversely, the various features described in the context of a single embodiment may also be implemented individually or in any suitable sub-combination in multiple embodiments. Furthermore, although features may be described above as functioning in certain combinations and even initially claimed in this way, in some cases one or more features from the claimed combination may be removed from the combination, and the claimed combination may be for sub-combinations or variations thereof.

[0133] Similarly, although the operations are depicted in a specific order in the accompanying drawings, this should not be construed as requiring these operations to be performed in the specific order shown or sequentially, or to perform all the shown operations to achieve the desired result. In some cases, multitasking and parallel processing may be advantageous. Furthermore, the separation of the various system components in the above embodiments should not be construed as requiring such separation in all embodiments, and it should be understood that the described program components and systems can generally be integrated together in a single software product or packaged into multiple software products.

[0134] Therefore, specific embodiments of the subject matter have been described. Other embodiments are within the scope of the following claims. In some cases, the actions recited in the claims can be performed in a different order and still achieve the desired result. Furthermore, the processes depicted in the drawings do not necessarily require the specific order or sequential order shown to achieve the desired result. In some embodiments, multitasking and parallel processing may be advantageous.

[0135] Many modifications and other examples described herein will come to mind for those skilled in the art upon benefiting from the teachings presented in the foregoing description and the accompanying drawings. Therefore, it should be understood that the embodiments are not limited to the specific embodiments disclosed, and that modifications and other embodiments are intended to be included within the scope of the appended claims. Although specific terminology is used herein, it is used only in a general and descriptive sense and not for limiting purposes.

Claims

1. A method for copying data in a memory device, comprising: Provides the host with the allocation of memory resources for the memory pool devices; Select a first memory module from one or more memory modules of the memory pool device as the allocated main memory resource; Select at least a second memory module from the one or more memory modules as the allocated auxiliary memory resource; In the memory switch of the memory pool device and for the allocation, a virtual memory module is configured as an interface between the host and the one or more memory modules of the allocation; as well as The first command, received from the host and located at the virtual memory module, is executed to read data based on the allocation.

2. The method according to claim 1, wherein, Executing the first command further includes reading the data from the second memory module based on the memory module states of the first memory module and the second memory module, wherein the memory module states are determined by the memory switch.

3. The method according to claim 2, wherein: The memory switch selects the second memory module based on the memory module status indicating that the first memory module is inaccessible, and The memory switch adds a third memory module from the one or more memory modules to the allocation based on the fact that the first memory module is inaccessible.

4. The method according to claim 2, wherein, The memory switch selects the second memory module based on the memory module status indication that the second memory module has at least one of a lower load storage frequency, lower workload, or lower memory capacity utilization than the first memory module.

5. The method according to claim 2, wherein, The memory switch selects the second memory module based on the memory module status indication that the second memory module has a lower temperature than the first memory module.

6. The method according to claim 1, further comprising: Receive a second command from the host to write the second data into the allocation; as well as The first copy of the second data is written to the first memory module via the virtual memory module and based on the second command, and the second copy of the second data is written to the second memory module.

7. The method according to claim 1, wherein, The virtual memory module: Receive commands associated with the allocation from the host and execute the commands. Present the logical representation of the allocation to the host.

8. The method of claim 1, further comprising generating a mapping table via the memory switch, the mapping table mapping the virtual memory module to the allocated memory module, the allocated memory module including the first memory module and the second memory module.

9. The method according to claim 1, wherein: The allocation includes a fourth memory module of the second memory pool device, and The virtual memory module is linked to the first memory module and the second memory module of the memory pool device, and is also linked to the fourth memory module of the second memory pool device.

10. The method according to claim 1, wherein: The memory pool device, the memory switch, the allocated at least one memory module, and the virtual memory module operate according to a cache coherence protocol. The at least one memory module allocated includes a dynamic random access memory (DRAM) module configured to operate according to the cache coherence protocol or a hybrid memory module of DRAM and NAND flash memory configured to operate according to the cache coherence protocol.

11. A system for copying data in a memory device, comprising: The structure manager is used to allocate memory resources for memory pool devices to the host. and Memory switch, used for: The first memory module among the multiple memory modules of the memory pool device is selected as the allocated main memory resource; At least a second memory module from the plurality of memory modules is selected as the allocated auxiliary memory resource; In the memory switch and for the allocation, the virtual memory module is configured as the interface between the host and the allocated memory module; as well as The first command is executed based on the virtual memory module and the first command received from the host to read data from the allocation.

12. The system according to claim 11, wherein, The execution of the first command by the memory switch further includes the memory switch reading the data from the second memory module based on the memory module status of the first memory module and the second memory module, wherein the memory module status is determined by the memory switch.

13. The system according to claim 12, wherein: The memory switch selects the second memory module based on the memory module status indicating that the first memory module is inaccessible, and The memory switch adds a third memory module from the plurality of memory modules to the allocation based on the fact that the first memory module is inaccessible.

14. The system according to claim 12, wherein, The memory switch selects the second memory module based on the memory module status indication that the second memory module has at least one of the following: a lower load storage frequency, a lower workload, or a lower memory capacity utilization than the first memory module.

15. The system according to claim 12, wherein, The memory switch selects the second memory module based on the memory module status indication that the second memory module has a lower temperature than the first memory module.

16. The system according to claim 11, wherein, The memory switch is also configured to: Receive a second command from the host to write the second data into the allocation; as well as The first copy of the second data is written to the first memory module via the virtual memory module and based on the second command, and the second copy of the second data is written to the second memory module.

17. The system according to claim 11, wherein, The virtual memory module is configured as follows: Receive commands associated with the allocation from the host and execute the commands. Present the logical representation of the allocation to the host.

18. A non-transitory computer-readable medium storing code, the code comprising instructions executable by a processor to: Provides the host with the allocation of memory resources for the memory pool devices; The first memory module among the multiple memory modules of the memory pool device is selected as the allocated main memory resource; At least a second memory module from the plurality of memory modules is selected as the allocated auxiliary memory resource; In the memory switch of the memory pool device and for the allocation, the virtual memory module is configured as the interface between the host and the allocated memory module; as well as The first command is executed based on the virtual memory module and the first command received from the host to read data from the allocation.

19. The non-transitory computer-readable medium according to claim 18, wherein, The code for executing the first command also includes instructions executable by the processor to read the data from the second memory module based on the memory module states of the first and second memory modules, the memory module states being determined by the memory switch.

20. The non-transitory computer-readable medium according to claim 19, wherein: The memory switch selects the second memory module based on the memory module status indicating that the first memory module is inaccessible, and The memory switch adds a third memory module from the plurality of memory modules to the allocation based on the fact that the first memory module is inaccessible.

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