An optimization method of RGBA888 to RGB565 logic

Abstract

The application provides an optimization method of RGBA888 to RGB565 logic, wherein the method is used for obtaining corresponding r, g and b three groups of data from an RGBA image by using a SIMD instruction, each group of data is 16, 16 groups of data are calculated by using a SIMD instruction in parallel to obtain corresponding 16 groups of RGB565 data, and then the RGB565 pixels are split to obtain 32 groups of 8bit pixel data and store the 32 groups of 8bit pixel data into an output image. The method greatly optimizes time, and can be used in industry.

Description

Technical Field

[0001] This invention belongs to the field of image processing technology, and specifically relates to an optimization method for RGBA888 to RGB565 logic conversion. Background Technology

[0002] Currently, RGB565 is mainly used in applications where color accuracy requirements are not particularly high, such as image processing and display systems. RGBA888 is primarily used in applications requiring high color accuracy, such as professional image editing and printing. In practical applications, it is often necessary to compress images from high-bit to low-bit (8-bit to low-bit) to allow the images to be used in more scenarios, but this is currently implemented using C language, which is too slow for industrial use.

[0003] Therefore, the existing technology has the following drawbacks:

[0004] Converting RGBA888 images to RGB565 images using existing technologies is slow and unsuitable for industrial applications.

[0005] In addition, the technical terms in this field include:

[0006] 1. RGB565: Each pixel is represented by 16 bits, or 2 bytes. Red occupies 5 bits, green occupies 6 bits, and blue occupies 5 bits.

[0007] 2. RGBA888: Each pixel is represented by 32 bits, or 4 bytes. Red, green, and blue each occupy 8 bits, and ALPHA occupies one bit (generally without function).

[0008] 3. SIMD: Single Instruction Multiple Data, meaning that a single instruction can execute multiple data streams, thus improving program execution speed. (SIMD128: 128-bit width per register). Summary of the Invention

[0009] To address the aforementioned issues, the purpose of this application is to optimize the time using SIMD instructions, thereby enabling its industrial application.

[0010] Specifically, this invention provides an optimization method for RGBA888 to RGB565 logic conversion. The method uses SIMD instructions to obtain three sets of data (r, g, b) from an RGBA image, each set containing 16 data points. Then, SIMD instructions are used to perform parallel computation on these 16 data points to obtain the corresponding 16 RGB565 data points. The RGB565 pixels are then split to obtain 32 8-bit pixel data points, which are stored in the output image. The method further includes:

[0011] S1. Use the _mx128_lu1q instruction in the SIMD instruction to read 512 bits of RGBA888 data from the input image address in four separate reads and store them into four 128-bit registers vr_rgba0, vr_rgba1, vr_rgba2, and vr_rgba3 respectively.

[0012] S2. Extract the R, G, and B component data from the four registers in step S1 using SIMD shuffling instructions:

[0013] Use the relational register rgba_to_r to shuffle the R component data in vr_rgba0 and vr_rgba1 into the vr_r0 register, and shuffle the R component data in vr_rgba2 and vr_rgba3 into the vr_r1 register.

[0014] Use the relational register r0r1_to_r to shuffle the R component data in vr_r0 and vr_r1 into the vr_r register;

[0015] Repeat the above process to obtain G component and B component data, and store them into vr_g and vr_b registers respectively;

[0016] S3. Perform bitwise operations on the R, G, and B component data:

[0017] Shift the R component data right by 2 bits and then AND it with 0x1F;

[0018] Shift the G component data right by 2 bits and then AND it with 0x3F;

[0019] Shift the B component data 3 bits to the right and then AND it with 0x1F;

[0020] The right shift operation of component data is implemented using the _mx128_srli_b instruction.

[0021] The _mx128_andv instruction performs a bitwise AND operation with the mask;

[0022] S4. Convert the processed component data to RGB565 format:

[0023] Expand the 8-bit component data into 16-bit data;

[0024] Shift the R component data left by 11 bits and the G component data left by 5 bits.

[0025] The processed R, G, and B component data are added using SIMD addition instructions to obtain RGB565 format data; that is, the _mx128_shufv instruction is used to expand the 8-bit data to 16 bits.

[0026] The _mx128_slli_h instruction performs a left shift operation on the component data;

[0027] S5. Split the RGB565 data into high and low bytes and store them:

[0028] The RGB565 data is split into two parts: the high 8 bits and the low 8 bits.

[0029] Use SIMD shuffle instructions to combine high and low bytes in sequence;

[0030] The result is written to the output image address using SIMD storage instructions;

[0031] Specifically, the `_mx128_srli_h` and `_mx128_andv` instructions are used to separate the high and low bytes of RGB565 data, and the `_mx128_shufv` instruction is used to recombine the high and low bytes;

[0032] The _mx128_su1q instruction writes the final result to the output image address.

[0033] In step S1, v16u8 vr_rgba0 = _mx128_lu1q(&image888,0) reads 128 bits of data from the input address image and stores it in the vr_rgba0 register. This operation is repeated four times to read 512 bits of data from the image888 address and store the data in the vr_rgba0, vr_rgba1, vr_rgba2, and vr_rgba3 registers respectively; where v16u8 vr_rgba =

[0034] _mx128_lu1q(&image888,0) is a SIMD128 instruction that reads 128 bits of data from the address image888 and stores the data in the vr_rgba0 register. v16u8 represents 16 unsigned 8-bit data, which is exactly 128 bits of data.

[0035] Step S2 uses the _mx128_shufv instruction in conjunction with a relational register to extract and reassemble component data, and further includes:

[0036] The instructions `v16u8 vr_r0 = _mx128_shufv(vr_rgba0, vr_rgba1, rgba_to_r)` and `v16u8 vr_r1 = _mx128_shufv(vr_rgba2, vr_rgba3, rgba_to_r)` store a total of 8 r data from registers `vr_rgba0` and `vr_rgba1` into register `vr_r0`. Registers `vr_rgba0` and `vr_rgba1` each contain 4 r data. The instructions `vr_rgba2` and `vr_rgba3` store a total of 8 r data from registers `vr_r0` and `vr_rgba1` into register `vr_r0`. The `_mx128_shufv` instruction is a SIMD instruction that reads data from registers `vr_rgba0` and `vr_rgba1` through the relational register `rgba_to_r` and stores the data into register `vr_r0`.

[0037] Next, the instruction v16u8 vr_r=_mx128_shufv(vr_r0,vr_r1,r0r1_to_r) is used to store a total of 16 r data from the vr_r0 and vr_r1 registers into the vr_r register, where the vr_r0 and vr_r1 registers each contain 8 r data;

[0038] Furthermore, repeating the above operations for the G component and the B component respectively yields the data for the vr_g and vr_b registers.

[0039] Step S3 further includes:

[0040] The instruction `v16u8 vr_1f = _mx128_li_b(0x1F)` assigns the entire value of the `vr_1f` register to 0x1f. This instruction is a SIMD instruction that assigns the entire 16-bit value of the `vr_1f` register to 0x1F.

[0041] Similarly, we can obtain vr_3f, where all register data is 0x3f, and vr_0f, where all register data is 0xFF;

[0042] Next, the instruction v16u8 vr_r = _mx128_srli_b(vr_r,2) is used to shift the data in the vr_r register two bits to the right. Similarly, the vr_g and vr_b registers can be obtained. Among them, v16u8 = _mx128_srli_b(vr_r,2) is a SIMD instruction. This instruction will shift the data in the vr_r register two bits to the right and save the data back to the vr_r register.

[0043] Next, v16u8 vr_r = _mx128_andv(vr_r,vr_1f) is used to AND each element of vr_r with 0x1f. v16u8 vr_r = _mx128_andv(vr_r,vr_1f) is a SIMD instruction. This instruction ANDs the corresponding elements of the vr_r register with the corresponding elements of vr_1f and stores the data back into the vr_r register.

[0044] Step S4 further includes:

[0045] The instruction v8u16 vr_r16=(v8u16)_mx128_shufv(zero,vr_r,b_to_h) expands the vr_r register element from 8 bits to 16 bits and stores the data in the vr_r16 register;

[0046] Then, use v8u16 vr_r16=(v8u16)_mx128_slli_h(vr_r16,11) to shift the data in the vr_r16 register to the left by 11 bits. Similarly, shift the vr_g16 register to the left by 5 bits. Here, v8u16 vr_r16=(v8u16)_mx128_slli_h(vr_r16,11) is a SIMD instruction. This instruction shifts the data in the vr_r16 register to the left by 11 bits and stores the shifted data back into the vr_16 register.

[0047] The instructions `v8u16 RGB565 = _mx128_add_h(vr_r16, vr_g16)` and `RGB565 = _mx128_add_h(RGB565, vr_b16)` add the data in the three registers `vr_r16`, `vr_g16`, and `vr_b16` bitwise, and store the final result in the `RGB565` register. This register has completed the acquisition of the RGB565 image data. `v8u16 RGB565 = _mx128_add_h(vr_r16, vr_g16)` is a SIMD instruction that adds the data in the `vr_r16` and `vr_g16` registers bitwise and stores the corresponding data in the `RGB565` register.

[0048] Step S5 further includes:

[0049] The instructions v8u16 vr_RGB_h = _mx128_srli_h(RGB565, 8) and vr_RGB_h = _mx128_andv(vr_RGB_h, vr_0f) are used to right-shift the data in the RGB565 register by 8 bits, AND the shifted data with 0xFF, and save the data back to the vr_RGB_h register, which contains the high 8 bits of the RGB565 data.

[0050] The instruction v8u16 vr_RGB_l=_mx128_andv(RGB565,vr_0f) performs an AND operation between the data in the RGB565 register and the data in the 0xff register, and stores the resulting data in the vr_RGB_l register, which contains the lower 8 bits of the RGB565 data.

[0051] The function `v16u8 vr_out = _mx128_shufv(vr_RGB_l, vr_RGB_h, h_to_b)` stores the data from the `vr_RGB_l` and `vr_RGB_h` registers into the `vr_out` register in a low-to-high order.

[0052] Next, the instruction _mx128_su1q(vr_out,image,0) is used to store the data in the vr_out register into the image output address. Here, _mx128_su1q(vr_out,image,0) is a SIMD instruction that stores the data in the vr_out register into the image address, thereby obtaining the data required by the customer.

[0053] The method processes the RGBA8888 to RGB565 conversion of 16 pixels in parallel within a single SIMD processing cycle.

[0054] The method assumes the use of the Junzheng T32 chip, and the SIMD128 instruction can only store 128 bits of data in a single register.

[0055] Therefore, the SIMD-based data logic optimization proposed in this solution has the following advantages:

[0056] The SIMD instruction is used to compute 16 pixels in parallel, while existing technologies using C language can only compute a single pixel at a time. Compared to existing implementation methods, the current method has 95% time efficiency optimization and is more suitable for industrial use. Attached Figure Description

[0057] The accompanying drawings, which are provided to further illustrate the invention and form part of this application, are not intended to limit the scope of the invention.

[0058] Figure 1 This is a schematic diagram of the C language logic code for converting an RGBA888 image to an RGB565 image in existing technology.

[0059] Figure 2 This is a flowchart illustrating the method described in this application.

[0060] Figure 3 This is a schematic diagram illustrating the specific implementation logic of step S2 in the method of this application.

[0061] Figure 4 This is a schematic diagram illustrating the specific implementation logic of step S4 in the method of this application. Detailed Implementation

[0062] To better understand the technical content and advantages of the present invention, the present invention will now be described in further detail with reference to the accompanying drawings.

[0063] The existing C language logic for converting RGBA888 images to RGB565 images is as follows: Figure 1 As shown, it includes:

[0064] Calculate the total number of pixels in the input image: image_size = image_w * image_h;

[0065] The input data is traversed pixel by pixel, and the R, G, and B components are extracted sequentially while skipping the A channel.

[0066] By right shifting and masking operations, R (8 bits), G (8 bits), and B (8 bits) are converted to R5 (5 bits), G6 (6 bits), and B5 (5 bits) respectively;

[0067] The converted components are combined into 16-bit RGB565 data in the format R5<<11|G6<<5|B5.

[0068] Split the 16-bit data into the high 8 bits and the low 8 bits, and store them in big-endian order in the output buffer;

[0069] The output pointer is moved to continue processing subsequent pixels until all pixels have been converted.

[0070] In existing technologies, the main logic of RGBA888 to RGB565 conversion is as shown above: 8-bit pixels from the RGB channels are obtained from the input image (pixels 'a' are not color pixels and do not need to be read), and the 8-bit pixels from the r and b channels are compressed to 5-bit pixels, while the 8-bit pixels from the g channel are compressed to 6-bit pixels. Although this conversion from high to low precision will result in some loss of accuracy, low-precision images are widely used in industry; therefore, the demand for RGBA888 to RGB565 image conversion is significant in industry.

[0071] This invention provides an optimization method for RGBA888 to RGB565 conversion logic based on SIMD. The main optimization logic is to use SIMD instructions to obtain three sets of data (r, g, b, 16 data points per set) from an RGBA image, then use SIMD instructions to perform parallel calculations on these 16 data points to obtain the corresponding 16 RGB565 data points. The RGB565 pixels are then split to obtain 32 8-bit pixel data points, which are stored in the output image for subsequent industrial use. The specific operation is as follows: Figure 2 As shown, it includes:

[0072] S1. Using v16u8 vr_rgba0=_mx128_lu1q(&image888,0)

[0073] (v16u8 vr_rgba=_mx128_lu1q(&image888,0) is a SIMD128 instruction, which means reading 128 bits of data from the address image888 and storing the data into the vr_rgba0 register. v16u8 represents 16 unsigned 8-bit data, which is exactly 128 bits of data.)

[0074] Read 128 bits of data from the input address image and store it in the vr_rgba0 register. Repeat the above operation 4 times to read 512 bits of data from the image888 address and store the data in the vr_rgba0, vr_rgba1, vr_rgba2, and vr_rgba3 registers respectively (the SIMD128 instruction used by the T32 chip can only store 128 bits of data in a single register).

[0075] S2. Using v16u8 The instructions `vr_r0 = _mx128_shufv(vr_rgba0, vr_rgba1, rgba_to_r)` and `v16u8vr_r1 = _mx128_shufv(vr_rgba2, vr_rgba3, rgba_to_r)` (a SIMD instruction that reads data from registers `vr_rgba0` and `vr_rgba1` via the relational register `rgba_to_r` and stores the data into register `vr_r0`, as explained in detail later) store a total of 8 r data from registers `vr_rgba0` and `vr_rgba1` (each register `vr_rgba0` and `vr_rgba1` contains 4 r data) into register `vr_r0`, and store a total of 8 r data from registers `vr_rgba2` and `vr_rgba3` into register `vr_r1`. Then, `v16u8` is used... The instruction `vr_r = _mx128_shufv(vr_r0, vr_r1, r0r1_to_r)` stores 16 data points (8 data points each) from the vr_r0 and vr_r1 registers into the vr_r register. `r0r1_to_r` refers to the relational array that retrieves data from vr_r0 and vr_r1 and stores the data into the vr_r register.

[0076] Repeating the above operations yields data for the vr_g and vr_b registers; repeating the above operations involves shuffling the R component data from vr_g0 and vr_g1 into the vr_g register, and shuffling the R component data from vr_b0 and vr_b1 into the vr_b register, which is the same as the above operations.

[0077] Specific operations are as follows: Figure 3 As shown in the diagram: The data in the left-hand rgba0 register is numbered 1, 3, 5, 7, ..., 31 (a normal register can store 16 8-bit data entries, hence the numbers 1-32. However, due to space limitations...). Figure 3Only four data points are shown in the example. In the example, the rgba0 register stores data 1-16, and the rgba1 register stores data 17-32. The codes for each data point in the rgba1 register on the right are 0, 2, 4, 6, ..., 30. The data in the relational register rgba_to_r is the code. The corresponding code data is retrieved from the rgba0 and rgba1 registers. For example, if rgba_to_r[0] = 0, the data with code 0 will be stored in the vr_r[0] register. Therefore, when the relational register data is 1, 9, 17, 25, 0, 8, 16, 24, the data with code 1, 9, 17, 25 (corresponding to the four r data) will be selected from the rgba0 register and the data with code 0, 8, 16, 24 will be selected from the rgba1 register, and the data will be stored in the vr_r0 register.

[0078] S3. Use v16u8 vr_1f = _mx128_lib(0x1F) to assign all values ​​of 0x1f to the vr_1f register. (v16u8vr_1f = _mx128_lib(0x1F) is a SIMD instruction, which will assign all 16 bits of the vr_1f register to 0x1F). Similarly, we can obtain vr_3f (register data is all 0x3f) and vr_0f (register data is all 0xFF).

[0079] Next, the instruction v16u8 vr_r = _mx128_srli_b(vr_r,2) (v16u8 = _mx128_srli_b(vr_r,2) is a SIMD instruction that shifts the data in the vr_r register two bits to the right and saves the data back to the vr_r register) is used to shift the data in the vr_r register two bits to the right. Similarly, the vr_g and vr_b registers can be obtained.

[0080] Next, v16u8 vr_r = _mx128_andv(vr_r,vr_1f) (v16u8 vr_r = _mx128_andv(vr_r,vr_1f) is a SIMD instruction. This instruction ANDs the corresponding elements of the vr_r register with vr_1f and stores the corresponding data back into the vr_r register), and ANDs each element of vr_r with 0x1f.

[0081] S4. Next, the instruction `v8u16 vr_r16 = (v8u16)_mx128_shufv(zero, vr_r, b_to_h)` is used to expand the vr_r register element from 8 bits to 16 bits, and the data is stored in the vr_r16 register (the specific implementation logic is as follows). Figure 4 (as shown);

[0082] Then, using `v8u16 vr_r16=(v8u16)_mx128_slli_h(vr_r16,11)` (which is a SIMD instruction, this instruction shifts the data in register `vr_r16` left by 11 bits and stores the shifted data back into register `vr_r16`), we shift the data in register `vr_r16` left by 11 bits. Similarly, we shift register `vr_g16` left by 5 bits.

[0083] The instructions `v8u16 RGB565 = _mx128_add_h(vr_r16, vr_g16)` and `RGB565 = _mx128_add_h(RGB565, vr_b16)` (which are SIMD instructions that add the vr_r16 and vr_g16 registers bitwise and store the corresponding data in the RGB565 register) add the data of the vr_r16, vr_g16, and vr_b16 registers bitwise and save the final result into the RGB565 register. This register has completed the acquisition of the RGB565 image data.

[0084] S5. Use the instructions v8u16 vr_RGB_h = _mx128_srli_h(RGB565, 8) and vr_RGB_h = _mx128_andv(vr_RGB_h, vr_0f) to right-shift the data in the RGB565 register by 8 bits, AND the shifted data with 0xff, and save the data back to the vr_RGB_h register (which stores the high 8 bits of the RGB565 data);

[0085] The instruction v8u16 vr_RGB_l=_mx128_andv(RGB565,vr_0f) performs an AND operation between the data in the RGB565 register and the data in 0xff, and stores the resulting data in the vr_RGB_l register (which stores the lower 8 bits of the RGB565 data).

[0086] The function `v16u8 vr_out = _mx128_shufv(vr_RGB_l, vr_RGB_h, h_to_b)` stores the data from the `vr_RGB_l` and `vr_RGB_h` registers into the `vr_out` register in a low-to-high order.

[0087] Next, the instruction _mx128_su1q(vr_out,image,0) (_mx128_su1q(vr_out,image,0) is a SIMD instruction that stores the data in the vr_out register into the image address) is used to store the data in the vr_out register into the image output address, thereby obtaining the data required by the customer.

[0088] In summary, the SIMD optimization method using steps S1-S5 above can process 16 8-bit data simultaneously in parallel, greatly reducing the time of the RGBA to RGB565 conversion process (by 95%).

[0089] In summary, this invention proposes a novel logic optimization method for RGBA to RGB565 conversion based on SIMD instructions; compared with the latest methods, it achieves a significant improvement in time efficiency.

[0090] This technical solution can be applied to Junzheng T32 and T33 chips and similar chips.

[0091] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, various modifications and variations can be made to the embodiments of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. An optimization method for RGBA888 to RGB565 logic, characterized in that, The method uses SIMD instructions to obtain three sets of data (r, g, b) from an RGBA image, with 16 data points in each set. Then, SIMD instructions are used to perform parallel computation on these 16 data points to obtain 16 corresponding RGB565 data points. The RGB565 pixels are then split to obtain 32 8-bit pixel data points, which are stored in the output image. The method further includes: S1. Use the _mx128_lu1q instruction in the SIMD instruction to read 512 bits of RGBA888 data from the input image address in four separate reads and store them into four 128-bit registers vr_rgba0, vr_rgba1, vr_rgba2, and vr_rgba3 respectively. S2. Extract the R, G, and B component data from the four registers in step S1 using SIMD shuffling instructions: Use the relational register rgba_to_r to shuffle the R component data in vr_rgba0 and vr_rgba1 into the vr_r0 register, and shuffle the R component data in vr_rgba2 and vr_rgba3 into the vr_r1 register. Use the relational register r0r1_to_r to shuffle the R component data in vr_r0 and vr_r1 into the vr_r register; Repeat the above process to obtain G component and B component data, and store them into vr_g and vr_b registers respectively; S3. Perform bitwise operations on the R, G, and B component data: Shift the R component data right by 2 bits and then AND it with 0x1F; Shift the G component data right by 2 bits and then AND it with 0x3F; Shift the B component data 3 bits to the right and then AND it with 0x1F; The right shift operation of component data is implemented using the _mx128_srli_b instruction. The _mx128_andv instruction performs a bitwise AND operation with the mask; S4. Convert the processed component data to RGB565 format: Expand the 8-bit component data into 16-bit data; Shift the R component data left by 11 bits and the G component data left by 5 bits. The processed R, G, and B component data are added using SIMD addition instructions to obtain RGB565 format data; that is, the _mx128_shufv instruction is used to expand the 8-bit data to 16 bits. The _mx128_slli_h instruction performs a left shift operation on the component data; S5. Split the RGB565 data into high and low bytes and store them: The RGB565 data is split into two parts: the high 8 bits and the low 8 bits. Use SIMD shuffle instructions to combine high and low bytes in sequence; The result is written to the output image address using SIMD storage instructions; Specifically, the `_mx128_srli_h` and `_mx128_andv` instructions are used to separate the high and low bytes of RGB565 data, and the `_mx128_shufv` instruction is used to recombine the high and low bytes; The _mx128_su1q instruction writes the final result to the output image address.

2. The optimization method for RGBA888 to RGB565 logic according to claim 1, characterized in that, In step S1, v16u8 vr_rgba0 = The instruction `_mx128_lu1q(&image888,0)` reads 128 bits of data from the input address `image` and stores it in the `vr_rgba0` register. This operation is repeated four times to read 512 bits of data from the address `image888` and store this data in the registers `vr_rgba0`, `vr_rgba1`, `vr_rgba2`, and `vr_rgba3` respectively. Here, `v16u8 vr_rgba = _mx128_lu1q(&image888,0)` is a SIMD128 instruction, meaning it reads 128 bits of data from the address `image888` and stores it in the `vr_rgba0` register. `v16u8` represents 16 unsigned 8-bit data bytes, totaling 128 bits.

3. The optimization method for RGBA888 to RGB565 logic according to claim 1, characterized in that, Step S2 uses the _mx128_shufv instruction in conjunction with a relational register to extract and reassemble component data, and further includes: The instructions `v16u8 vr_r0 = _mx128_shufv(vr_rgba0, vr_rgba1, rgba_to_r)` and `v16u8 vr_r1 = _mx128_shufv(vr_rgba2, vr_rgba3, rgba_to_r)` store a total of 8 r data from registers `vr_rgba0` and `vr_rgba1` into register `vr_r0`. Registers `vr_rgba0` and `vr_rgba1` each contain 4 r data. The instructions `vr_rgba2` and `vr_rgba3` store a total of 8 r data from registers `vr_r0` and `vr_rgba1` into register `vr_r0`. The `_mx128_shufv` instruction is a SIMD instruction that reads data from registers `vr_rgba0` and `vr_rgba1` through the relational register `rgba_to_r` and stores the data into register `vr_r0`. Next, the instruction v16u8 vr_r=_mx128_shufv(vr_r0,vr_r1,r0r1_to_r) is used to store a total of 16 r data from the vr_r0 and vr_r1 registers into the vr_r register, where the vr_r0 and vr_r1 registers each contain 8 r data; Furthermore, repeating the above operations for the G component and the B component respectively yields the data for the vr_g and vr_b registers.

4. The optimization method for RGBA888 to RGB565 logic according to claim 1, characterized in that, Step S3 further includes: The v16u8 vr_1f = _mx128_li_b(0x1F) is used to assign the entire vr_1f register to the value 0x1f. v16u8vr_1f = _mx128_li_b(0x1F) is a SIMD instruction that will assign the entire 16 bits of the vr_1f register to the value 0x1F. Similarly, we can obtain vr_3f, where all register data is 0x3f, and vr_0f, where all register data is 0xFF; Next, the instruction v16u8 vr_r = _mx128_srli_b(vr_r,2) is used to shift the data in the vr_r register two bits to the right. Similarly, the vr_g and vr_b registers can be obtained. Among them, v16u8 = _mx128_srli_b(vr_r,2) is a SIMD instruction. This instruction will shift the data in the vr_r register two bits to the right and save the data back to the vr_r register. Next, v16u8 vr_r = _mx128_andv(vr_r,vr_1f) is used to AND each element of vr_r with 0x1f. v16u8 vr_r = _mx128_andv(vr_r,vr_1f) is a SIMD instruction. This instruction ANDs the corresponding elements of the vr_r register with the corresponding elements of vr_1f and stores the data back into the vr_r register.

5. The optimization method for RGBA888 to RGB565 logic according to claim 1, characterized in that, Step S4 further includes: The instruction v8u16 vr_r16=(v8u16)_mx128_shufv(zero,vr_r,b_to_h) expands the vr_r register element from 8 bits to 16 bits and stores the data in the vr_r16 register; Then, use v8u16 vr_r16=(v8u16)_mx128_slli_h(vr_r16,11) to shift the data in the vr_r16 register to the left by 11 bits. Similarly, shift the vr_g16 register to the left by 5 bits. Here, v8u16 vr_r16=(v8u16)_mx128_slli_h(vr_r16,11) is a SIMD instruction. This instruction shifts the data in the vr_r16 register to the left by 11 bits and stores the shifted data back into the vr_16 register. The instructions `v8u16 RGB565 = _mx128_add_h(vr_r16, vr_g16)` and `RGB565 = _mx128_add_h(RGB565, vr_b16)` add the data in the three registers `vr_r16`, `vr_g16`, and `vr_b16` bitwise, and store the final result in the `RGB565` register. This register has completed the acquisition of the RGB565 image data. `v8u16 RGB565 = _mx128_add_h(vr_r16, vr_g16)` is a SIMD instruction that adds the data in the `vr_r16` and `vr_g16` registers bitwise and stores the corresponding data in the `RGB565` register.

6. The optimization method for RGBA888 to RGB565 logic according to claim 1, characterized in that, Step S5 further includes: The instructions v8u16 vr_RGB_h = _mx128_srli_h(RGB565, 8) and vr_RGB_h = _mx128_andv(vr_RGB_h, vr_0f) are used to right-shift the data in the RGB565 register by 8 bits, AND the shifted data with 0xFF, and save the data back to the vr_RGB_h register, which contains the high 8 bits of the RGB565 data. The instruction v8u16 vr_RGB_l=_mx128_andv(RGB565,vr_0f) performs an AND operation between the data in the RGB565 register and the data in 0xFF, and stores the resulting data in the vr_RGB_l register, which contains the lower 8 bits of the RGB565 data. The function `v16u8 vr_out = _mx128_shufv(vr_RGB_l, vr_RGB_h, h_to_b)` stores the data from the `vr_RGB_l` and `vr_RGB_h` registers into the `vr_out` register in a low-to-high order. Next, the instruction _mx128_su1q(vr_out,image,0) is used to store the data in the vr_out register into the image output address. Here, _mx128_su1q(vr_out,image,0) is a SIMD instruction that stores the data in the vr_out register into the image address, thereby obtaining the data required by the customer.

7. The optimization method for RGBA888 to RGB565 logic according to claim 1, characterized in that, The method processes the RGBA8888 to RGB565 conversion of 16 pixels in parallel within a single SIMD processing cycle.

8. The optimization method for RGBA888 to RGB565 logic according to claim 1, characterized in that, The method assumes the use of the Junzheng T32 chip, and the SIMD128 instruction can only store 128 bits of data in a single register.

Images