Connection detection circuit
Patent Information
- Application Number
- CN202510679247.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2025-04-18
- Filing Date
- 2025-05-26
- Publication Date
- 2026-10-23
AI Technical Summary
在现有技术中,当自身电子装置进入省电模式后,连线侦测电路会维持运作而持续消耗能量
[0005]本发明的目的是在于提供一种能在一省电模式下以低功耗维持连线侦测功能的连线侦测电路。
Smart Images

Figure CN122963886A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to a connection detection circuit, and more particularly to a connection detection circuit that can maintain connection detection function with low power consumption in a power-saving mode. Background Technology
[0002] USB technology offers plug-and-play functionality and ease of use, boasting advantages such as low cost, wide functionality, and ease of development, making it the most widely used data transfer interface today. While traditional USB specifications offer insufficient power to devices and lack support for image processing applications, the next-generation USB Type-C connector supports simultaneous data, audio, and video transmission, reversible insertion, and high-efficiency charging. Combined with high compatibility and high transfer rates, it is widely used in information and communication technology (ICT) devices such as monitors, desktops, tablets, and mobile phones.
[0003] The USB Type-C specification defines different voltage divider behaviors for different connection states. USB Type-C compatible electronic devices typically have a dedicated connection detection circuit to detect the connection status with external devices. Existing connection detection circuits usually include components such as pull-up circuits, pull-down circuits, comparators, and analog-to-digital converters (ADCs). In existing technology, the connection detection circuit continues to operate and consume power even when the electronic device enters power-saving mode. If the connection detection circuit is turned off when the electronic device enters power-saving mode, the connection status with external devices cannot be detected in power-saving mode.
[0004] Therefore, a connection detection circuit is needed that can reduce power consumption in power-saving mode and detect connection status. Summary of the Invention
[0005] The purpose of this invention is to provide a connection detection circuit that can maintain connection detection function with low power consumption in a power-saving mode.
[0006] This invention provides a connection detection circuit, incorporated in a first electronic device, comprising a pre-detection circuit and a connection circuit. The pre-detection circuit is activated after the first electronic device switches from a normal mode to a power-saving mode to determine whether a second electronic device is inserted into the first electronic device. The connection circuit is activated when the first electronic device operates in normal mode to determine whether the second electronic device is inserted into the first electronic device; deactivated when the first electronic device switches from the normal mode to the power-saving mode; and activated when the first electronic device operates in power-saving mode and the pre-detection circuit determines that the second electronic device is inserted into the first electronic device to determine the connection status between the first electronic device and the second electronic device. The power consumption of the first electronic device operating in normal mode is higher than that operating in power-saving mode, the power consumption of the connection circuit operating is higher than that of the pre-detection circuit operating, and the accuracy of the connection circuit in detecting the connection status is higher than that of the pre-detection circuit in detecting the connection status. Attached Figure Description
[0007] Figure 1A and Figure 1B This is a functional block diagram of a connection detection circuit that can maintain connection detection function with low power consumption in power-saving mode, according to an embodiment of the present invention.
[0008] Figure 2A and Figure 2B This is a schematic diagram of the existing USB Type-C standard transmission interface.
[0009] Figure 3 This is a schematic diagram illustrating the implementation of the wiring circuit in the wiring detection circuit of this embodiment of the invention.
[0010] Figure 4 This is a schematic diagram illustrating the implementation of the pre-detection circuit in the wiring detection circuit of this embodiment of the invention.
[0011] Figure 5 This is a flowchart illustrating the operation of the wiring detection circuit in an embodiment of the present invention.
[0012] Figures 6A-6D For the present invention Figure 1A Schematic diagrams of different circuit states when the connection detection circuit is in operation in the embodiment.
[0013] Figures 7A-7D For the present invention Figure 1A Schematic diagrams of different circuit states when the connection detection circuit is in operation in the embodiment.
[0014] Figures 8A-8C For the present invention Figure 1B Schematic diagrams of different circuit states when the connection detection circuit is in operation in the embodiment.
[0015] Figures 9A-9C For the present invention Figure 1B Schematic diagrams of different circuit states when the connection detection circuit is in operation in the embodiment.
[0016] Figure 10 This is a signal diagram of the pre-detection circuit operating in DRP mode in an embodiment of the present invention.
[0017] Explanation of reference numerals in the attached diagram: 10A, 10B, 10C – Wiring circuit; 12 – Operation mode detection circuit; 14 – Switch control circuit; 20A, 20B – Pre-detection circuit; 24 – Control circuit; 30 – Connection interface; 100 – Wiring detection circuit; 121, CP1, CP2 – Comparators; 122 – State machine; 510-540 – Steps; M1 – First electronic device; M2 – Second electronic device; SW1-SW6, SW1', SW3' – Switching circuit; RP0, RP1-RP4 – Pull-up resistors; RD0-RD4, RD3' – Pull-down resistors; Tr1, Tr2 – Transistors; V CC1 V CC2 ~ Voltage; VDD, VSS ~ Bias voltage; V1, V2 ~ Comparator output voltage; S C0 -S C2 S1-S6 ~ Control signals; Vbus ~ Power supply pins; CC1 / CC2 ~ Configuration channel pins; GND ~ Grounding pins. Detailed Implementation
[0018] Figure 1A and Figure 1B This is a functional block diagram of a connection detection circuit 100 that maintains connection detection functionality with low power consumption in a power-saving mode, according to an embodiment of the present invention. The connection detection circuit 100 includes a connection circuit 10A and a pre-detection circuit 20A, and can be housed within a first electronic device M1. The first electronic device M1 can be coupled to an external device (e.g., a second electronic device M2 or a third electronic device M3) via a connection interface 30, and the connection detection circuit 100 is used to detect whether the second electronic device M2 or the third electronic device M3 is inserted into the first electronic device M1. Figure 1A In the illustrated embodiment, the second electronic device M2 includes a wiring circuit 10B and a pre-detection circuit 20B. Figure 1B In the illustrated embodiment, the third electronic device M3 includes a wiring circuit 10C.
[0019] In this embodiment of the invention, the connection interface 30 may adopt the USB Type-C specification. Figure 2A The pinout diagram of the USB Type-C socket is shown, while Figure 2BThe pinout diagram of the USB Type-C plug is shown. To support reversible insertion, both the USB Type-C socket and plug have two sets of symmetrical pins, designated A1-A12 and B1-B12 respectively. The differential signal transmission pairs TX1+ / TX1- / RX1+ / RX1- and TX2+ / TX2- / RX2+ / RX2- are used for data transmission. Vbus is the pin used for bus power supply, while Vconn is the pin used for powering the cable controller (located only on the USB Type-C plug). The configuration channel pins CC1 / CC2 are used to detect reversible insertion, detect connection status, determine the downstream facing port (DFP) and upstream facing port (UFP), configure the power supply pins Vbus and Vconn, configure other modes (alternate or accessory mode), and perform other related power delivery (PD) communication operations. The D+ / D- pins are used to support the USB 2.0 standard backward, the SBU1 / SBU2 pins are used to transmit auxiliary signals, and GND is the ground pin. The power supply will only supply power through its Vbus pin when a connected device is detected based on the configuration channel pins CC1 / CC2.
[0020] For example, the connector 30 could be a USB Type-C cable, with both ends having features such as... Figure 2B The USB Type-C plug is shown. On the other hand, the first electronic device M1, the second electronic device M2, and the third electronic device M3 are all equipped with... Figure 2A The USB Type-C socket shown is used. When the USB Type-C socket of the first electronic device M1 is connected to the USB Type-C plug at the first end of the USB Type-C cable, and the USB Type-C plug at the second end of the USB Type-C cable is connected to the USB Type-C socket of the second electronic device M2 or the third electronic device M3, data communication and power transfer can be performed between the two coupled electronic devices. For simplicity, Figure 1A and Figure 1B Only the power supply pin Vbus, configuration channel pins CC1 / CC2, and ground pin GND of the first electronic device M1, the second electronic device M2, the third electronic device M3, and the connection interface 30 are shown. Furthermore, the implementation of the connection interface 30 does not limit the scope of this invention.
[0021] In this invention, the connection circuit 10A in the connection detection circuit 100 can detect the load impedance of the channel pins CC1 and CC2 configured in the first electronic device M1, and thus determine the connection status with an external device (such as the second electronic device M2 or the third electronic device M3). Since different connection statuses have their own voltage division characteristics, a relatively complex circuit is required to detect these voltages. Therefore, the connection circuit 10A can provide highly accurate connection status detection, but it consumes a significant amount of power during operation.
[0022] In this invention, the pre-detection circuit 20A in the connection detection circuit 100 can detect the voltage value of the configured channel pin CC1 or CC2 in the first electronic device M1, and then determine whether an external device (such as the second electronic device M2 or the third electronic device M3) is inserted. Since it only needs to detect the voltage change of a single pin, the pre-detection circuit 20A consumes less power when operating, but it cannot accurately determine the connection status with the external device.
[0023] Figure 3 This is a schematic diagram illustrating the implementation of the interconnect circuit 10A in the interconnect detection circuit 100 of this embodiment of the invention. The interconnect circuit 10A includes switch circuits SW1 and SW2, pull-up resistors RP1 and RP2, pull-down resistors RD1 and RD2, an operation mode detection circuit 12, a switch control circuit 14, and transistors Tr1 and Tr2.
[0024] The first terminal of pull-up resistor RP1 can be selectively coupled to the configuration channel pin CC1 of the first electronic device M1 via switch circuit SW1, while the second terminal of pull-up resistor RP1 is coupled to a power supply potential (e.g., 5V). The first terminal of pull-down resistor RD1 can be selectively coupled to the configuration channel pin CC1 of the first electronic device M1 via switch circuit SW1, while the second terminal of pull-down resistor RD1 is coupled to the ground pin GND of the first electronic device M1. The first terminal of pull-up resistor RP2 can be selectively coupled to the configuration channel pin CC2 of the first electronic device M1 via switch circuit SW2, while the second terminal of pull-up resistor RP2 is coupled to a power supply potential (e.g., 5V). The first terminal of pull-down resistor RD2 can be selectively coupled to the configuration channel pin CC2 of the first electronic device M1 via switch circuit SW2, while the second terminal of pull-down resistor RD2 is coupled to the ground pin GND of the first electronic device M1. Simultaneously, the voltage V of the relevant configuration channel pin CC1... CC1 and the voltage V of the relevant configuration channel pin CC2 CC2 It will be supplied to the operation mode detection circuit 12 so that the connection circuit 10A can know the load impedance of the configuration channel pins CC1 / CC2 when it is in operation, and then determine the connection status with external devices (such as the second electronic device M2).
[0025] The operation mode detection circuit 12 includes a comparator 121 and a state machine 122. The comparator 121 can detect the voltage V of the relevant configuration channel pin CC1. CC1 and the voltage V of the relevant configuration channel pin CC2 CC2 The comparator 121 determines the load impedance of the configuration channel pins CC1 / CC2, and the state machine 122 can determine the connection status with external devices (such as the second electronic device M2 or the third electronic device M3) based on the judgment result of the comparator 121. Furthermore, the operation mode detection circuit 12 generates a control signal S. C0 -S C2 These are used to control the operation of the switch control circuit 14, transistor Tr1, and transistor Tr2, respectively.
[0026] According to the control signal S generated by the operation mode detection circuit 12 C0 The switch control circuit 14 can provide control signals S1 and S2 to control the operation of switch circuits SW1 and SW2 respectively. Specifically, if the first electronic device M1 operates as a power supply terminal, the control signals S1 and S2 output by the switch control circuit 14 will set switch circuits SW1 and SW2 to the first state respectively (e.g., ...). Figure 3 As shown), this means that the configuration channel pins CC1 and CC2 are coupled to the first terminals of pull-up resistors RP1 and RP2, respectively; if the first electronic device M1 operates as a power receiving terminal, the control signals S1 and S2 output by the switch control circuit 14 will set the switch circuits SW1 and SW2 to the second state (not shown in the diagram). Figure 3 This means that the configuration channel pins CC1 and CC2 are respectively coupled to the first terminals of pull-down resistors RD1 and RD2. In one embodiment, the switching circuits SW1 and SW2 can each be a single-pole double-throw (SPDT) switch, but the types of switching circuits SW1 and SW2 are not limited to the scope of this invention.
[0027] When it is determined that an external device has been inserted into the first electronic device M1 operating on the power supply terminal, the operation mode detection circuit 12 generates a control signal S. C1 and S C2 Transistor Tr1 and transistor Tr2 will be turned on and off respectively, thereby supplying power to external devices (such as the second electronic device M2 or the third electronic device M3) by connecting the power supply pin Vbus to a VBUS power supply terminal. When it is determined that an external device is inserted into the first electronic device M1 that is operating with the power receiving terminal, the operation mode detection circuit 12 generates a control signal S. C1 and S C2The transistor Tr1 will be turned off and the transistor Tr2 will be turned on respectively, so that the power supply pin Vbus can be connected to a Vbus power receiving terminal to receive power from an external device (such as a second electronic device M2 or a third electronic device M3).
[0028] In this embodiment of the invention, the wiring circuit 10B of the second electronic device M2 and the wiring circuit 10C of the third electronic device M3 may have the same structure as the wiring circuit 10A of the first electronic device M1, but are not limited thereto. The first electronic device M1, the second electronic device M2, and the third electronic device M3 may use wiring circuits with the same or different structures.
[0029] Figure 4 This is a schematic diagram illustrating the implementation of the pre-detection circuit 20A in the interconnection detection circuit 100 according to an embodiment of the present invention. The pre-detection circuit 20A includes switching circuits SW3 and SW4, pull-up resistors RP3 and RP4, pull-down resistors RD3 and RD4, and a control circuit 24. The first terminal of the pull-up resistor RP3 is coupled to a bias voltage VDD, and the second terminal is selectively coupled to the configuration channel pin CC1 of the first electronic device M1 via the switching circuit SW3. The first terminal of the pull-down resistor RD3 is selectively coupled to the configuration channel pin CC1 of the first electronic device M1 via the switching circuit SW4, and the second terminal is coupled to a bias voltage VSS, wherein the potential of the bias voltage VDD is higher than the potential of the bias voltage VSS (for example, the bias voltage VDD is a positive potential, while the bias voltage VSS is a negative potential or ground potential). The first terminal of the pull-up resistor RP4 is coupled to the bias voltage VDD, and the second terminal is selectively coupled to the configuration channel pin CC2 of the first electronic device M1 via the switching circuit SW5. The first terminal of pull-down resistor RD4 is selectively coupled to the configuration channel pin CC2 of the first electronic device M1 via switching circuit SW6, while the second terminal is coupled to the bias voltage VSS. The input terminal of comparator CP1 is coupled to the configuration channel pin CC1 of the first electronic device M1, while its output terminal is coupled to control circuit 24. The input terminal of comparator CP2 is coupled to the configuration channel pin CC2 of the first electronic device M1, while its output terminal is coupled to control circuit 24. Control circuit 24 can provide control signals S3-S6 to control the operation of switching circuits SW3-SW6 respectively.
[0030] In one embodiment of the present invention, comparators CP1 and CP2 can each be a positive feedback comparator circuit, such as a Schmitt trigger. When the potential at the input terminal of comparator CP1 is higher than its input high level ViH1, comparator CP1 outputs a logic 1 voltage; when the potential at the input terminal of comparator CP1 is lower than its input low level ViL1, comparator CP1 outputs a logic 0 voltage. Similarly, when the potential at the input terminal of comparator CP2 is higher than its input high level ViH2, comparator CP2 outputs a logic 1 voltage; when the potential at the input terminal of comparator CP2 is lower than its input low level ViL2, comparator CP2 outputs a logic 0 voltage. However, the implementation of comparators CP1 and CP2 does not limit the scope of the present invention.
[0031] In one embodiment of the present invention, the switching circuits SW3-SW6 may each be a single-pole single-throw (SPST) switch, a metal-oxide-semiconductor field-effect transistor (MOSFET), a bipolar junction transistor (BJT), or other components with similar functions, which can be respectively set to an on state or an off state by control signals S3-S6. However, the implementation of the switching circuits SW3-SW6 does not limit the scope of the present invention.
[0032] In this embodiment of the invention, the pre-detection circuit 20B of the second electronic device M2 and the pre-detection circuit 20A of the first electronic device M1 have the same structure. More specifically, the pre-detection circuit 20B may include switching circuits SW3' and SW4', pull-up resistors RP3' and RP4', pull-down resistors RD3 and RD4, and a control circuit 26, whose coupling method and operation are similar to... Figure 4 The pre-detection circuit 20A shown is the same, and will not be described again here.
[0033] Figure 5 This is a flowchart illustrating the operation of the wiring detection circuit 100 in an embodiment of the present invention. Figure 5 The flowchart shown includes the following steps:
[0034] Step 510: Determine the operating mode of the first electronic device M1? If it is determined that the first electronic device M1 is operating in normal mode, proceed to step 540; if it is determined that the first electronic device M1 is operating in power-saving mode, proceed to step 520.
[0035] Step 520: The connection detection circuit 100 shuts down the connection circuit 10A and turns on the pre-detection circuit 20A.
[0036] Step 530: Has the pre-detection circuit 20A detected the insertion of an external device? If yes, proceed to step 540; if no, proceed to step 510.
[0037] Step 540: The connection detection circuit 100 shuts down the pre-detection circuit 20A and turns on the connection circuit 10A; proceed to step 510.
[0038] In step 510, the present invention first determines the operating mode of the first electronic device M1. When the first electronic device M1 operates in normal mode, all components operate normally at preset performance levels, resulting in high system power consumption. When the first electronic device M1 enters power-saving mode, it first stores all data to the system memory or hard disk, and then shuts down some or all components to reduce system power consumption. In this embodiment of the invention, the power-saving mode can be a sleep mode or a hibernation mode, but is not limited to these.
[0039] If it is determined in step 510 that the first electronic device M1 is currently operating in power-saving mode, then step 520 is executed to turn off the high-power-consuming connection circuit 10A in the connection detection circuit 100 and turn on the low-power-consuming pre-detection circuit 20A. If it is determined in step 510 that the first electronic device M1 is currently operating in normal mode, then step 540 is executed to turn off the low-accuracy pre-detection circuit 20A in the connection detection circuit 100 and turn on the high-accuracy connection circuit 10A.
[0040] by Figure 4 The operation of the pre-detection circuit 20 is illustrated using the shown embodiment. In one embodiment, the control signals S3-S6 output by the control circuit 24 set the switching circuits SW3 and SW5 to the on state and the switching circuits SW4 and SW6 to the off state. That is, the second ends of the pull-up resistors RP3 and RP4 are coupled to the configuration channel pins CC1 and CC2, respectively, and the first ends of the pull-down resistors RD3 and RD4 are disconnected from the configuration channel pins CC1 and CC2, respectively. In this case, the configuration channel pins CC1 and CC2 of the first electronic device M1 are coupled to the bias voltage VDD via the pull-up resistors RP3 and RP4, respectively. At this time, the pre-detection circuit 20 can use the pull-up resistors RP3 and RP4 to detect whether an external device (e.g., the second electronic device M2 or the third electronic device M3) is inserted. As mentioned above, the voltage VDD of the relevant configuration channel pin CC1... CC1 and the voltage V of the relevant configuration channel pin CC2 CC2 It will vary due to the insertion of external devices or other reasons, when the voltage V CC1 When the value of VDD drops from VDD to a level below the low input level ViL1 of comparator CP1, comparator CP1 will output a voltage V1 with a logic 0 potential; when the voltage V...CC2 When the value of VDD drops to the level of the input terminal of comparator CP2, causing it to fall below its input low level ViL2, comparator CP2 will output a voltage V2 with a logic 0 potential. When control circuit 24 receives a voltage V1 or a voltage V2 with a logic 0 potential, it will determine in step 530 that an external device (e.g., a second electronic device M2 or a third electronic device M3) has been inserted, and then execute step 540 to wake up the connection circuit 10A, thereby providing connection status detection with high accuracy.
[0041] In one embodiment, the control signals S3-S6 output by the control circuit 24 set the switching circuits SW3 and SW5 to the off state and set the switching circuits SW4 and SW6 to the on state. This means that the second terminals of the pull-up resistors RP3 and RP4 are disconnected from the configuration channel pins CC1 and CC2, respectively, and the first terminals of the pull-down resistors RD3 and RD4 are coupled to the configuration channel pins CC1 and CC2, respectively. In this case, the configuration channel pins CC1 and CC2 of the first electronic device M1 are coupled to the bias voltage VSS via the pull-down resistors RD3 and RD4, respectively. At this time, the pre-detection circuit 20 can use the pull-down resistors RD3 and RD4 to detect whether an external device (e.g., the second electronic device M2 or the third electronic device M3) is inserted. As mentioned above, the voltage V of the relevant configuration channel pin CC1... CC1 and the voltage V of the relevant configuration channel pin CC2 CC2 It will vary due to the insertion of external devices or other reasons, when the voltage V CC1 When the value of VSS rises to a level that makes the potential at the input of comparator CP1 higher than its input high level ViH1, comparator CP1 will output a voltage V1 with a logic 1 potential; when the voltage V... CC2 When the value of VSS rises to a level that makes the potential at the input of comparator CP2 higher than its input high level ViH2, comparator CP2 will output a voltage V2 with a logic 1 potential. When control circuit 24 receives a voltage V1 or voltage V2 with a logic 1 potential, it will determine in step 530 that an external device (e.g., a second electronic device M2 or a third electronic device M3) has been inserted, and then execute step 540 to wake up the connection circuit 10, thereby providing connection status detection with high accuracy.
[0042] Figures 6A-6D For the present invention Figure 1AThis is a schematic diagram illustrating different circuit configurations when the connection detection circuit 100 operates. For illustrative purposes, it is assumed that the control signals S3-S6 output by the control circuit 24 will set the switch circuits SW3 and SW5 to the ON state and the switch circuits SW4 and SW6 to the OFF state. That is, the second ends of the pull-up resistors RP3 and RP4 are coupled to the configuration channel pins CC1 and CC2, respectively, and the first ends of the pull-down resistors RD3 and RD4 are disconnected from the configuration channel pins CC1 and CC2, respectively. In this case, the configuration channel pins CC1 and CC2 of the first electronic device M1 will be coupled to the bias voltage VDD via the pull-up resistors RP3 and RP4, respectively. At this time, the pre-detection circuit 20A of the first electronic device M1 can use the pull-up resistors RP3 and RP4 to detect whether an external device (e.g., the second electronic device M2) is inserted. Furthermore, it is assumed that the second electronic device M2 can also detect whether an external device (e.g., the first electronic device M1) is inserted in a similar manner using the pull-down resistors RD3' and RD4'. For simplicity, Figures 6A-6D Only the connection detection operation of the relevant configuration channel pin CC1 is shown. The connection detection operation of the configuration channel pin CC2 is similar and will not be described in detail here.
[0043] exist Figure 6A In the illustrated embodiment, the pull-up resistor RP3 of the pre-detection circuit 20A in the first electronic device M1 is smaller than the pull-down resistor RD3' of the pre-detection circuit 20B in the second electronic device M2. For example, the value of the pull-up resistor RP3 can be 75kΩ, while the value of the pull-down resistor RD3' can be 500kΩ.
[0044] like Figure 6B As shown, when the first electronic device M1 is not connected to the second electronic device M2, both devices use pre-detection circuits 20A and 20B respectively to determine if an external device is inserted, while wiring circuits 10A and 10B are turned off to reduce power consumption. At this time, the voltage V of the relevant configuration channel pin CC1 in the first electronic device M1... CC1 It will be pulled up to the bias voltage VDD via pull-up resistor RP3 (e.g., 75kΩ), and the voltage V of the relevant configuration channel pin CC1 in the second electronic device M2 will be... CC1 It will be pulled down to ground potential GND via pull-down resistor RD3 (e.g., 500kΩ). That is, when the first electronic device M1 is not connected to the second electronic device M2, the configuration channel pin CC1 of the first electronic device M1 has a high logic potential, while the configuration channel pin CC1 of the second electronic device M1 has a low logic potential.
[0045] like Figure 6CAs shown, when the first electronic device M1 is connected to the second electronic device M2, the configuration channel pin CC1 of the first electronic device M1 and the configuration channel pin CC1 of the second electronic device M2 have the same potential (V). CC1 =V CC1 Since the pull-up capability of the pull-up resistor RP3 (e.g., 75kΩ) is greater than the pull-down capability of the pull-down resistor RD3' (e.g., 500kΩ), the voltage V of the relevant configuration channel pin CC1 in the second electronic device M2 is... CC1 It will be pulled up from the ground potential GND. When the voltage V CC1 When the input level ViH1 of comparator CP1 is greater than the high level, the second electronic device M2 will determine the voltage V. CC1 The system has switched from a low logic potential to a high logic potential, indicating that an external device (e.g., the first electronic device M1) has been inserted. In this case, the second electronic device M2 disables the pre-detection circuit 20B (sets the switch circuit SW3' to the off state) and enables the wiring circuit 10B (sets the switch circuit SW1' to the on state) to provide highly accurate wiring status detection. At this time, the equivalent resistance of the wiring circuit 10B in the second electronic device M2 is the standard-defined pull-down resistor RD0 (e.g., 5.1kΩ).
[0046] like Figure 6D As shown, when the second electronic device M2 disables the pre-detection circuit 20B and enables the connection circuit 10B, since the pull-down resistor RD0 (e.g., 5.1kΩ) is less than the pull-up resistor RP3 (e.g., 75kΩ) of the pre-detection circuit 20A in the first electronic device M1, the pull-up capability of the pull-up resistor RP3 (e.g., 75kΩ) is less than the pull-down capability of the pull-down resistor RP0 (e.g., 5.1kΩ). At this time, the voltage V of the relevant configuration channel pin CC1 in the first electronic device M1... CC1 It will be pulled down. When the voltage V CC1 When the input level ViL1 of comparator CP1 is less than the low level, the first electronic device M1 will determine the voltage V. CC1 The system has switched from a high logic level to a low logic level, indicating that an external device (e.g., a second electronic device M2) has been inserted. In this case, the first electronic device M1 disables the pre-detection circuit 20A (sets the switching circuit SW3 to the off state) and enables the interconnect circuit 10A (sets the switching circuit SW1 to the on state) to provide highly accurate interconnect status detection. At this time, the equivalent resistance of the interconnect circuit 10A in the first electronic device M1 is the standard-defined pull-up resistor RP0 (e.g., 36kΩ).
[0047] as Figures 6A-6DAs shown, when the pre-detection circuit 20A of the first electronic device M1 and the pre-detection circuit 20A of the second electronic device M2 use pull-up resistors and pull-down resistors respectively to detect whether an external device is inserted, the present invention can set the pull-up resistor of the pre-detection circuit 20A to be less than the pull-down resistor of the pre-detection circuit 20B in the second electronic device M2 to provide the judgment condition V for the wake-up connection circuit 10B of the second electronic device M2. CC1 '>ViH1', and set the pull-up resistor of the pre-detection circuit 20A in the first electronic device M1 to be greater than the pull-down resistor defined in the specification of the second electronic device M2 to provide the judgment condition V for the wake-up connection circuit 10A of the first electronic device M1. CC1 <ViL1。
[0048] Similarly, when the pre-detection circuit 20A of the first electronic device M1 and the pre-detection circuit 20A of the second electronic device M2 use pull-down resistors and pull-up resistors respectively to detect whether an external device is inserted, the present invention can set the pull-down resistor of the pre-detection circuit 20A to be greater than the pull-up resistor of the pre-detection circuit 20B in the second electronic device M2 to provide the judgment condition V for the wake-up connection circuit 10A of the first electronic device M1. CC >ViH1, and set the pull-down resistor of the first electronic device M1 to be less than the pull-up resistor of the pre-detection circuit 20B in the second electronic device M2 to provide the judgment condition V for the wake-up connection circuit 10B of the second electronic device M2. CC1 ' <ViL1’。
[0049] Figures 7A-7D For the present invention Figure 1A This is a schematic diagram illustrating different circuit configurations when the connection detection circuit 100 operates. For illustrative purposes, it is also assumed that the control signals S3-S6 output by the control circuit 24 will set the switch circuits SW3 and SW5 to the ON state and the switch circuits SW4 and SW6 to the OFF state, that is, the second ends of the pull-up resistors RP3 and RP4 are coupled to the configuration channel pins CC1 and CC2, respectively, and the first ends of the pull-down resistors RD3 and RD4 are disconnected from the configuration channel pins CC1 and CC2, respectively. In this case, the configuration channel pins CC1 and CC2 of the first electronic device M1 will be coupled to the bias voltage VDD via the pull-up resistors RP3 and RP4, respectively. At this time, the pre-detection circuit 20A of the first electronic device M1 can use the pull-up resistors RP3 and RP4 to detect whether an external device (e.g., the second electronic device M2) is inserted. Furthermore, it is assumed that the second electronic device M2 can also detect whether an external device (e.g., the first electronic device M1) is inserted in a similar manner using the pull-down resistors RD3' and RD4'. For simplification, Figures 7A-7D Only the connection detection operation of the relevant configuration channel pin CC1 is shown. The connection detection operation of the configuration channel pin CC2 is similar and will not be described in detail here.
[0050] exist Figure 7A In the illustrated embodiment, the pull-up resistor RP3 of the pre-detection circuit 20A in the first electronic device M1 is greater than the pull-down resistor RD3' of the pre-detection circuit 20B in the second electronic device M2. For example, the value of the pull-up resistor RP3 can be 7500kΩ, while the value of the pull-down resistor RD3' can be 500kΩ.
[0051] like Figure 7B As shown, when the first electronic device M1 is not connected to the second electronic device M2, the first electronic device M1 and the second electronic device M2 respectively use pre-detection circuits 20A and 20B to determine whether an external device has been inserted, while the connection circuits 10A and 10B are turned off to reduce power consumption. At this time, the voltage V of the relevant configuration channel pin CC1 in the first electronic device M1 is... CC1 It will be pulled up to the bias voltage VDD via pull-up resistor RP3 (e.g., 7500kΩ), while the voltage V of the relevant configuration channel pin CC1 in the second electronic device M2 is... CC1 It will be pulled down to ground potential GND via pull-down resistor RD3 (e.g., 500kΩ). That is, when the first electronic device M1 is not connected to the second electronic device M2, the configuration channel pin CC1 of the first electronic device M1 has a high logic potential, while the configuration channel pin CC1 of the second electronic device M1 has a low logic potential.
[0052] like Figure 7C As shown, when the first electronic device M1 is connected to the second electronic device M2, the configuration channel pin CC1 of the first electronic device M1 and the configuration channel pin CC1 of the second electronic device M2 have the same potential (V). CC1 =V CC1 Since the pull-up capability of the pull-up resistor RP3 (e.g., 7500kΩ) is less than the pull-down capability of the pull-down resistor RP3' (e.g., 500kΩ), the voltage V of the relevant configuration channel pin CC1 in the first electronic device M1 is... CC1 It will be pulled down from the bias voltage VDD. When the voltage V CC1 When the input level ViL1 of comparator CP1 is less than the low level, the first electronic device M1 will determine the voltage V. CC1 The system has switched from a high logic level to a low logic level, indicating that an external device (e.g., a second electronic device M2) has been inserted. In this situation, the first electronic device M1 disables the pre-detection circuit 20A (sets the switching circuit SW3 to the off state) and enables the interconnect circuit 10A (sets the switching circuit SW1 to the on state) to provide highly accurate interconnect status detection. At this time, the equivalent resistance of the interconnect circuit 10A in the first electronic device M1 is the standard-defined pull-up resistor RP0 (e.g., 36kΩ).
[0053] As Figure 7D shown, when the first electronic device M1 turns off the pre-detection circuit 20A and turns on the connection circuit 10A, since the specification-defined pull-up resistor RP0 (for example, 36kΩ) is smaller than the pull-down resistor RD3' (for example, 500kΩ) of the pre-detection circuit 20B in the second electronic device M2, the pull-up capability of the specification-defined pull-up resistor RP0 (for example, 36kΩ) is greater than the pull-down capability of the pull-down resistor RD3' (for example, 500kΩ). At this time, the voltage V of the relevant configuration channel pin CC1 in the second electronic device M2 CC1 ' will be pulled up from the ground potential GND. When the voltage V CC1 ' is greater than the input high level ViH1' of the comparator CP1', the second electronic device M2 will determine that the voltage V CC1 ' has switched from a low logic potential to a high logic potential, and further determine that an external device (for example, the first electronic device M1) is inserted. In this case, the second electronic device M2 will turn off the pre-detection circuit 20B (set the switch circuit SW3' to the off state), and turn on the connection circuit 10B (set the switch circuit SW1' to the on state) to provide connection state detection with high accuracy. At this time, the equivalent resistance of the connection circuit 10B in the second electronic device M2 is the specification-defined pull-down resistor RD0 (for example, 5.1kΩ).
[0054] As Figures 7A-7D shown, in the case where the pre-detection circuit 20A of the first electronic device M1 and the pre-detection circuit 20A of the second electronic device M2 respectively use a pull-up resistor and a pull-down resistor to detect whether an external device is inserted, the present invention can set the pull-up resistor of the pre-detection circuit 20A to be greater than the pull-down resistor of the pre-detection circuit 20B in the second electronic device M2 to provide the judgment condition V for the first electronic device M1 to wake up the connection circuit 10A CC1 <ViL1, and set the specification-defined pull-up resistor of the first electronic device M1 to be smaller than the pull-down resistor of the pre-detection circuit 20B in the second electronic device M2 to provide the judgment condition V for the second electronic device M2 to wake up the connection circuit 10B CC1 '>ViH1'.
[0055] Similarly, in the case where the pre-detection circuit 20A of the first electronic device M1 and the pre-detection circuit 20A of the second electronic device M2 respectively use a pull-down resistor and a pull-up resistor to detect whether an external device is inserted, the present invention can set the pull-down resistor of the pre-detection circuit 20A to be smaller than the pull-up resistor of the pre-detection circuit 20B in the second electronic device M2 to provide the judgment condition V for the second electronic device M2 to wake up the connection circuit 10B CC1’<ViL1', and the pull-down resistor of the pre-detection circuit 20A in the first electronic device M1 is set to be larger than the standard-defined pull-up resistor of the second electronic device M2 to provide the judgment condition V for the first electronic device M1 to wake up the connection circuit 10A CC1 >ViH1.
[0056] Figures 8A-8C of the present invention Figure 1B is a schematic diagram of different circuit states during operation of the connection detection circuit 100 according to the embodiment. For illustrative purposes, it is also assumed that the control signals S3-S6 output by the control circuit 24 set the switch circuits SW3 and SW5 to the on state, and set the switch circuits SW4 and SW6 to the off state, that is, the second terminals of the pull-up resistors RP3 and RP4 are respectively coupled to the configuration channel pins CC1 and CC2, and the first terminals of the pull-down resistors RD3 and RD4 are respectively disconnected from the configuration channel pins CC1 and CC2. In this case, the configuration channel pins CC1 and CC2 of the first electronic device M1 are respectively coupled to the bias voltage VDD via the pull-up resistors RP3 and RP4, and at this time, the pre-detection circuit 20A of the first electronic device M1 can use the pull-up resistors RP3 and RP4 to detect whether an external device (for example, the third electronic device M3) is inserted. In addition, the third electronic device M3 uses the connection circuit 10C to detect whether an external device (for example, the first electronic device M1) is inserted. To simplify the description, Figures 8A-8C only the connection detection operation related to the configuration channel pin CC1 is shown, and the connection detection operation mode of the configuration channel pin CC2 is similar, which will not be repeated here.
[0057] in the Figure 8A illustrated embodiment, the pull-up resistor RP3 of the pre-detection circuit 20A in the first electronic device M1 is larger than the standard-defined pull-down resistor RD0 of the connection circuit 10C in the third electronic device M3. For example, the value of the pull-up resistor RP3 may be 75kΩ, and the value of the standard-defined pull-down resistor RD0 may be 5.1KΩ.
[0058] as shown in Figure 8B , when the first electronic device M1 is not connected to the third electronic device M3, the first electronic device M1 uses the pre-detection circuit 20A to determine whether an external device is inserted, and the connection circuit 10A is turned off to reduce power consumption. On the other hand, the third electronic device M3 uses the connection circuit 10C to detect whether an external device is inserted. At this time, the voltage V of the relevant configuration channel pin CC1 in the first electronic device M1 CC1 is pulled up to the bias voltage VDD via the pull-up resistor RP3 (for example, 75kΩ), and the voltage V of the relevant configuration channel pin CC1 in the third electronic device M3 CC1It will be pulled down to ground potential GND via the connection circuit 10C. That is, when the first electronic device M1 is not connected to the third electronic device M3, the configuration channel pin CC1 of the first electronic device M1 has a high logic potential, while the configuration channel pin CC1 of the third electronic device M3 has a low logic potential.
[0059] like Figure 8C As shown, when the first electronic device M1 is connected to the third electronic device M3, the configuration channel pin CC1 of the first electronic device M1 and the configuration channel pin CC1 of the second electronic device M2 have the same potential (V). CC1 =V CC1 Because the pull-up capability of the pull-up resistor RP3 (e.g., 75kΩ) is less than the pull-down capability of the pull-down resistor RD0 (e.g., 5.1kΩ) as defined by the specification, the voltage V of the relevant configuration channel pin CC1 in the first electronic device M1 is... CC1 It will be pulled down from the bias voltage VDD. When the voltage V CC1 When the input level ViL1 of comparator CP1 is less than the low level, the first electronic device M1 will determine the voltage V. CC1 The system has switched from a high logic level to a low logic level, indicating that an external device (e.g., a third electronic device M3) has been inserted. In this situation, the first electronic device M1 disables the pre-detection circuit 20A (sets the switching circuit SW3 to the off state) and enables the interconnect circuit 10A (sets the switching circuit SW1 to the on state) to provide highly accurate interconnect status detection. At this time, the equivalent resistance of the interconnect circuit 10A in the first electronic device M1 is the standard-defined pull-up resistor RP0 (e.g., 36kΩ).
[0060] as Figures 8A-8C As shown, when the pre-detection circuit 20A of the first electronic device M1 uses a pull-up resistor to detect whether an external device is inserted, the present invention can set the pull-up resistor of the pre-detection circuit 20A to be greater than the standard defined pull-down resistor of the second electronic device M2 to provide the judgment condition V for the wake-up connection circuit 10A of the first electronic device M1. CC1 <ViL1。
[0061] Figures 9A-9C For the present invention Figure 1BThis is a schematic diagram illustrating different circuit states when the interconnection detection circuit 100 operates. For illustrative purposes, it is assumed that the control signals S3-S6 output by the control circuit 24 will set the switch circuits SW3 and SW5 to the off state and the switch circuits SW4 and SW6 to the on state, that is, the first ends of the pull-down resistors RD3 and RD4 are coupled to the configuration channel pins CC1 and CC2 respectively, and the second ends of the pull-up resistors RP3 and RP4 are disconnected from the configuration channel pins CC1 and CC2 respectively. In this case, the configuration channel pins CC1 and CC2 of the first electronic device M1 will be coupled to the bias voltage VSS via the pull-down resistors RD3 and RD4 respectively. At this time, the pre-detection circuit 20A of the first electronic device M1 can use the pull-down resistors RD3 and RD4 to detect whether an external device (e.g., the third electronic device M3) is inserted. In addition, the third electronic device M3 will use the interconnection circuit 10B to detect whether an external device (e.g., the first electronic device M1) is inserted. For simplification, Figures 9A-9C Only the connection detection operation of the relevant configuration channel pin CC1 is shown. The connection detection operation of the configuration channel pin CC2 is similar and will not be described in detail here.
[0062] exist Figure 9A In the illustrated embodiment, the pull-down resistor RD3 of the pre-detection circuit 20A in the first electronic device M1 is greater than the pull-up resistor RP0 of the interconnect circuit 10C in the third electronic device M3, as defined by the specification. For example, the value of the pull-down resistor RD3 can be 500kΩ, while the value of the pull-up resistor RP0 can be 36kΩ as defined by the specification.
[0063] like Figure 9B As shown, when the first electronic device M1 is not connected to the third electronic device M3, the first electronic device M1 uses the pre-detection circuit 20A to determine if an external device is inserted, while the wiring circuit 10A is turned off to reduce power consumption. On the other hand, the third electronic device M3 uses the wiring circuit 10C to detect if an external device is inserted. At this time, the voltage V of the relevant configuration channel pin CC1 in the first electronic device M1... CC1 It will be pulled down to the negative bias voltage VSS via pull-down resistor RD3 (e.g., 500kΩ), while the voltage V of the relevant configuration channel pin CC1 in the third electronic device M3 is... CC1 It will be pulled up to the positive bias voltage VDD via the interconnect circuit 10C. That is, when the first electronic device M1 is not connected to the third electronic device M3, the configuration channel pin CC1 of the first electronic device M1 has a low logic potential, while the configuration channel pin CC1 of the third electronic device M3 has a high logic potential.
[0064] like Figure 9CAs shown, when the first electronic device M1 is connected to the third electronic device M3, the configuration channel pin CC1 of the first electronic device M1 and the configuration channel pin CC1 of the second electronic device M2 have the same potential (V). CC1 =V CC1 Because the pull-down capability of the pull-down resistor RD3 (e.g., 500kΩ) is less than the pull-up capability of the pull-up resistor RP0 (e.g., 36kΩ) as defined by the specification, the voltage V of the relevant configuration channel pin CC1 in the first electronic device M1 is... CC1 It will be pulled up from the negative bias voltage VSS. When the voltage V CC1 When the voltage V is greater than the high level ViH1 at the input of comparator CP1, the first electronic device M1 will determine the voltage V. CC1 The system has switched from a low logic potential to a high logic potential, indicating that an external device (e.g., a third electronic device M3) has been inserted. In this case, the first electronic device M1 will disable the pre-detection circuit 20A (set the switching circuit SW3 to the off state) and enable the connection circuit 10A (set the switching circuit SW1 to the on state) to provide highly accurate connection status detection. At this time, the equivalent resistance of the connection circuit 10A in the first electronic device M1 is the standard-defined pull-up resistor RP0 (e.g., 36kΩ).
[0065] as Figures 9A-9C As shown, when the pre-detection circuit 20A of the first electronic device M1 uses a pull-down resistor to detect whether an external device is inserted, the present invention can set the pull-down resistor of the pre-detection circuit 20A to be greater than the standard pull-up resistor of the second electronic device M2 to provide the judgment condition voltage V of the wake-up connection circuit 10A of the first electronic device M1. CC1 >ViH1.
[0066] In one embodiment, the control signals S3-S6 output by the control circuit 24 cause the switching circuits SW3-SW6 to operate in a manner similar to the Dual Role of Power (DRP) mode in the USB PD protocol. Figure 10 This is a signal diagram of the pre-detection circuit 20A operating in DRP mode according to an embodiment of the present invention. In this embodiment, the pre-detection circuit 20A periodically switches between using pull-up resistors RP3 / RP4 and pull-down resistors RD3 / RD4 to detect the insertion of an external device (e.g., a second electronic device M2 or a third electronic device M3). For example, in the first half of each cycle tDRP, the pull-up resistors RP3 / RP4 detect possible device connections, while in the second half of each cycle tDRP, the pull-down resistors RD3 / RD4 detect possible device connections. Figure 10 As shown.
[0067] by Figure 3The operation of the interconnect circuit 10A is illustrated using the shown embodiments. As previously described, in the embodiment where the first electronic device M1 is a power supply terminal, the interconnect circuit 10A uses pull-up resistors RP1 and RP2 to detect the interconnect status; in the embodiment where the first electronic device M1 is a power receiving terminal, the interconnect circuit 10A uses pull-down resistors RD1 and RD2 to detect the interconnect status; in another embodiment, the first electronic device M1 periodically switches between power supply and power receiving terminal roles in DRP mode, at which time the interconnect circuit 10A periodically switches between using pull-up resistors RP1 / RP2 and pull-down resistors RD1 / RD2 to detect the interconnect status, such as... Figure 10 As shown.
[0068] Table 1 below shows the CC1 / CC2 states defined for power supply devices in the USB specification. Those skilled in the art should be familiar with the details of each connection state, and will not be elaborated upon here. As mentioned earlier, comparator 121 determines the load impedance of the configuration channel pins CC1 / CC2, and state machine 122 stores data similar to that shown in Table 1 below. Therefore, it can determine whether the second electronic device M2 or the third electronic device M3 is inserted into the first electronic device M1 based on the result of comparator 121.
[0069] Table 1
[0070]
[0071] In this embodiment of the invention, the pre-detection circuit 20A may be implemented in a general purpose input / output (GPIO) pad of the first electronic device M1, but is not limited thereto.
[0072] In summary, the connection detection circuit 100 of the present invention can be equipped in the first electronic device M1. When the first electronic device M1 operates in power-saving mode, the connection detection circuit 100 will shut down the high-power-consuming connection circuit 10A and turn on the low-power-consuming pre-detection circuit 20A to determine whether the second electronic device or the third electronic device M3 is inserted into the first electronic device. When the first electronic device M1 operates in normal mode, or when the pre-detection circuit 20 determines that the second electronic device or the third electronic device M3 is inserted while operating in power-saving mode, the connection detection circuit 100 will shut down the low-accuracy pre-detection circuit 20A and turn on the high-accuracy connection circuit 10A. Therefore, the present invention provides a connection detection function that can maintain basic connection detection function with low power consumption in power-saving mode and wake up the complete connection status detection function when an external device is detected to be inserted.
[0073] The above description is only a preferred embodiment of the present invention. All equivalent changes and modifications made in accordance with the claims of the present invention should be included within the scope of the present invention.
Claims
1. A connection detection circuit capable of maintaining connection detection function with low power consumption in a power-saving mode, comprising a first electronic device, characterized in that, Include: A first pre-detection circuit is used to: The first electronic device is turned on after it switches from a normal mode to the power-saving mode in order to determine whether a second electronic device is inserted into the first electronic device. as well as The first connection circuit is used to: The first electronic device is turned on when it is operating in the normal mode; The first electronic device is turned off when it switches from the normal mode to the power-saving mode. as well as When the first electronic device operates in power-saving mode and the first pre-detection circuit determines that the second electronic device is plugged into the first electronic device and is then activated, the connection status of the first electronic device and the second electronic device is determined, wherein: The power consumption of the first electronic device is higher when it operates in the normal mode than when it operates in the power-saving mode. The power consumption of the first interconnect circuit during operation is higher than the power consumption of the first pre-detection circuit during operation; and The accuracy of the first connection circuit in detecting connection status is higher than that of the first pre-detection circuit in detecting connection status.
2. The connection detection circuit as described in claim 1, characterized in that: The second electronic device includes: A second pre-detection circuit is used to: The second electronic device is turned on after switching from the normal mode to the power-saving mode in order to determine whether the first electronic device is inserted into the second electronic device. as well as When it is determined in this power-saving mode that the first electronic device was turned off after the second electronic device was inserted at a first time point; and A second connection circuit is used to: The second electronic device is turned off after switching from the normal mode to the power-saving mode; and It was activated at that first point in time; When the first pre-detection circuit determines that the second electronic device is inserted into the first electronic device in the power-saving mode, the first electronic device shuts down the first pre-detection circuit and turns on the first connection circuit at a second time point to determine the connection status between the first electronic device and the second electronic device; and The second time point is after the first time point.
3. The connection detection circuit as described in claim 2, characterized in that: The first pre-detection circuit includes: First switching circuit; A second switching circuit; A first pull-up resistor, the first end of which is coupled to a first bias voltage, and the second end of which is selectively coupled to a first configuration channel pin of the first electronic device via the first switching circuit; A first pull-down resistor, the first end of which is selectively coupled to the first configuration channel pin of the first electronic device via the second switching circuit, and the second end of which is coupled to a second bias voltage; A first comparator, which includes: An input terminal is coupled to the first configuration channel pin of the first electronic device; and One output terminal is used to output a first voltage; and A first control circuit is used to: The first voltage is used to determine whether the second electronic device is inserted into the first electronic device; and A first control signal and a second control signal are provided to control the states of the first switching circuit and the second switching circuit respectively, thereby coupling the first configuration channel pin to the first bias voltage or the second bias voltage; and The second pre-detection circuit includes: A third switching circuit; A fourth switching circuit; A second pull-up resistor, the first end of which is coupled to the first bias voltage, and the second end of which is selectively coupled to a second configuration channel pin of the second electronic device via the third switching circuit; A second pull-down resistor, the first end of which is selectively coupled to the second configuration channel pin of the second electronic device via the fourth switching circuit, and the second end of which is coupled to the second bias voltage; A second comparator, comprising: An input terminal is coupled to the second configuration channel pin of the second electronic device; and One output terminal is used to output a second voltage; and A second control circuit is used to: The second voltage is used to determine whether the first electronic device is inserted into the second electronic device; and A third control signal and a fourth control signal are provided to control the state of the third switch circuit and the fourth switch circuit respectively, thereby coupling the second configuration channel pin to the first bias voltage or the second bias voltage.
4. The connection detection circuit as described in claim 3, characterized in that: The first pull-up resistor of the first pre-detection circuit is smaller than the second pull-down resistor of the second pre-detection circuit; The first pull-up resistor of the first pre-detection circuit is greater than the pull-down resistor of the second wiring circuit as defined by a specification; When the voltage level of the second configuration channel pin is higher than a high level input of the second comparator at the first time point, the second electronic device shuts down the second pre-detection circuit and turns on the second interconnection circuit; and When the voltage of the first configuration channel pin is lower than a low level input of the first comparator at the second time point, the first electronic device shuts down the first pre-detection circuit and turns on the first connection circuit.
5. The connection detection circuit as described in claim 1, characterized in that: When the first pre-detection circuit determines that the second electronic device is inserted into the first electronic device in the power-saving mode, the first electronic device turns off the first pre-detection circuit and turns on the first connection circuit at a first time point to determine the connection status of the first electronic device and the second electronic device. The second electronic device includes: A second pre-detection circuit is used to: The second electronic device is turned on after switching from the normal mode to the power-saving mode in order to determine whether the first electronic device is inserted into the second electronic device. as well as When the power-saving mode determines that the first electronic device is turned off after the second electronic device is inserted at a second time point; and A second connection circuit is used to: The second electronic device is turned off after switching from the normal mode to the power-saving mode; and It was activated at that second point in time; and The second time point is after the first time point.
6. The connection detection circuit as described in claim 5, characterized in that: The first pre-detection circuit includes: First switching circuit; A second switching circuit; A first pull-up resistor, the first end of which is coupled to a first bias voltage, and the second end of which is selectively coupled to a first configuration channel pin of the first electronic device via the first switching circuit; A first pull-down resistor, the first end of which is selectively coupled to the first configuration channel pin of the first electronic device via the second switching circuit, and the second end of which is coupled to a second bias voltage; A first comparator, which includes: An input terminal is coupled to the first configuration channel pin of the first electronic device; and One output terminal is used to output a first voltage; and A first control circuit is used to: The first voltage is used to determine whether the second electronic device is inserted into the first electronic device; and A first control signal and a second control signal are provided to control the states of the first switching circuit and the second switching circuit respectively, thereby coupling the first configuration channel pin to the first bias voltage or the second bias voltage; and The second pre-detection circuit includes: A third switching circuit; A fourth switching circuit; A second pull-up resistor, the first end of which is coupled to the first bias voltage, and the second end of which is selectively coupled to a second configuration channel pin of the second electronic device via the third switching circuit; A second pull-down resistor, the first end of which is selectively coupled to the second configuration channel pin of the second electronic device via the fourth switching circuit, and the second end of which is coupled to the second bias voltage; A second comparator, comprising: An input terminal is coupled to the second configuration channel pin of the second electronic device; and One output terminal is used to output a second voltage; and A second control circuit is used to: The second voltage is used to determine whether the first electronic device is inserted into the second electronic device; and A third control signal and a fourth control signal are provided to control the state of the third switch circuit and the fourth switch circuit respectively, thereby coupling the second configuration channel pin to the first bias voltage or the second bias voltage.
7. The connection detection circuit as described in claim 6, characterized in that: The first pull-up resistor of the first pre-detection circuit is greater than the second pull-down resistor of the second pre-detection circuit; The second connection circuit has a pull-up resistor defined by a standard that is smaller than the second pull-down resistor of the second pre-detection circuit; When the voltage level of the first configuration channel pin is lower than a low level input of the first comparator at the first time point, the first electronic device shuts down the first pre-detection circuit and turns on the first interconnect circuit; and When the voltage of the second configuration channel pin is higher than a high level input of the second comparator at the second time point, the second electronic device shuts down the second pre-detection circuit and turns on the second connection circuit.
8. The connection detection circuit as described in claim 1, characterized in that: The first pre-detection circuit includes: First switching circuit; A second switching circuit; A first pull-up resistor, the first end of which is coupled to a first bias voltage, and the second end of which is selectively coupled to a first configuration channel pin of the first electronic device via the first switching circuit; A first pull-down resistor, the first end of which is selectively coupled to the first configuration channel pin of the first electronic device via the second switching circuit, and the second end of which is coupled to a second bias voltage; A first comparator, which includes: An input terminal is coupled to the first configuration channel pin of the first electronic device; and One output terminal is used to output a first voltage; and A first control circuit is used to: The first voltage is used to determine whether the second electronic device is inserted into the first electronic device; and A first control signal and a second control signal are provided to control the states of the first switching circuit and the second switching circuit respectively, thereby coupling the first configuration channel pin to the first bias voltage or the second bias voltage; and The second electronic device includes a second wiring circuit for determining whether an external electronic device is inserted into the second electronic device.
9. The connection detection circuit as described in claim 8, characterized in that: The first pull-up resistor of the first pre-detection circuit is greater than the pull-down resistor of the second connection circuit as defined by a specification; and When the potential of the first configuration channel pin is lower than a low level of an input of the first comparator, the first electronic device shuts down the first pre-detection circuit and turns on the first connection circuit.
10. The connection detection circuit as described in claim 8, characterized in that: The first pull-down resistor of the first pre-detection circuit is greater than the pull-up resistor of the second connection circuit as defined by a standard; and When the potential of the first configuration channel pin is higher than a high level input of the first comparator, the first electronic device shuts down the first pre-detection circuit and turns on the first interconnect circuit.