Method and apparatus for comparing different versions of chip design constraint files

Abstract

The application provides a method and device for comparing constraint files of different versions of chip designs, and relates to the technical field of chip design. The method comprises the following steps: obtaining a first version file and a second version file, splitting the files to obtain a plurality of first-level subfiles corresponding to the first version file and the second version file; according to command information, performing secondary splitting on the first-level subfiles, and classifying the file contents of different types of constraint commands into different second-level subfiles; for the plurality of second-level subfiles corresponding to the first version file and the second version file, the second-level subfiles of the same type of constraint command are merged into corresponding third-level files; and according to file characteristic information, comparing the third-level files of the same type of constraint command corresponding to the first version file and the second version file to determine the difference contents existing between the files. The application can quickly and accurately compare the difference contents between different version files.

Description

Technical Field

[0001] This invention relates to the field of chip design technology, and more particularly to a method and apparatus for comparing different versions of chip design constraint documents. Background Technology

[0002] With the continuous development of integrated circuit design, chip design constraint documents (SDC documents) play a crucial role in the chip design process. Constraint documents define the timing, physical, and electrical constraints of the chip design, directly impacting chip performance, power consumption, and area. During chip design iterations, constraint documents are continuously updated as the design is optimized; therefore, it is necessary to compare different versions of constraint documents to ensure the accuracy and consistency of design changes.

[0003] Currently, existing technologies for comparing constraint files mainly include: parsing the data structure and comparing the data structures to determine if there are differences between constraint files; obtaining different versions of files corresponding to the same SDK and comparing the method and function names in their header files and static library files to generate a list of differences and difference files; and recursively comparing the current build directory with the target build directory to obtain a list of difference files.

[0004] However, existing technologies still have some problems when comparing different versions of chip design constraint files. For example, the conventional method usually compares the entire constraint file directly, which can easily miss real problems, resulting in inaccurate quality checks of the Flatten SDC file. Secondly, comparison often requires manual intervention, which consumes a lot of manpower and time in repetitive debugging processes, resulting in low efficiency. In addition, comparing different versions of FlattenSDC files also faces the following difficulties: due to file size and server memory limitations, it is impossible to read the entire file into the comparison, and Linux-based diff command-line tools or various Python comparison libraries cannot be used directly; the files are out of order, the position of each line is different, and the positions of port name, pin name, and clock name involved in each line are all different, finding the same commands in the two versions is a technical challenge; at the same time, the comparison time of the conventional method is long, which cannot meet the speed of Flatten SDC updates, resulting in poor timeliness and effectiveness of comparison results.

[0005] In summary, there is an urgent need for a technical solution that can overcome the above-mentioned technical deficiencies and enable more efficient and accurate comparison of different versions of chip design constraint files, so as to improve the quality and efficiency of chip design. Summary of the Invention

[0006] To address the problems existing in the prior art, this invention proposes a method and apparatus for comparing different versions of chip design constraint files.

[0007] In a first aspect of the present invention, a method for comparing different versions of chip design constraint files is proposed, the method comprising: Obtain the first version file and the second version file, split the file, and obtain multiple first-level sub-files corresponding to the first version file and the second version file respectively; Based on the command information, the first-level sub-files are split a second time, and the file contents of different types of constraint commands are classified into different second-level sub-files. For the first version file and the second version file, the second-level sub-files with the same type of constraint commands are merged into the corresponding third-level file. Based on the file feature information, the third-level files of the same type of constraint commands corresponding to the first version file and the second version file are compared to determine the differences between the files.

[0008] In this embodiment of the invention, the file is split to obtain multiple first-level sub-files corresponding to the first version file and the second version file, including: The first and second version files are divided into multiple first-level sub-files based on a preset number of lines; each first-level sub-file contains a preset number of lines of file content.

[0009] In this embodiment of the invention, the first-level sub-file is further split according to the command information, and the file contents of different types of constraint commands are respectively classified into different second-level sub-files, including: Parse the constraint commands in the first-level sub-file; The first-level sub-files are split according to the constraint commands. The file contents corresponding to the same type of constraint command are classified into the second-level sub-files corresponding to each type of constraint command. After classification, multiple second-level sub-files corresponding to the first version file and multiple second-level sub-files corresponding to the second version file are obtained.

[0010] In this embodiment of the invention, for multiple second-level sub-files corresponding to the first version file and the second version file, second-level sub-files with the same type of constraint commands are merged into the corresponding third-level file, including: After merging, multiple third-level files corresponding to the first version file and multiple third-level files corresponding to the second version file are obtained respectively; each third-level file includes the file content corresponding to the same type of constraint command.

[0011] In this embodiment of the invention, the third-level files of the same type of constraint commands corresponding to the first version file and the second version file are compared based on file feature information to determine the differences between the files, including: When the file feature information of the third-level file meets the first preset condition, the first type of comparison function is called for comparison processing. When the feature information meets the second preset condition, the second type of comparison function is called for comparison processing.

[0012] In this embodiment of the invention, the file feature information includes at least: file size and number of lines of content; When the file feature information of the third-level file meets the first preset condition, the first type of comparison function is called for comparison processing, including: When the file size of a third-level file is less than the capacity threshold and the number of lines of content is greater than the number of lines threshold, an array comparison method based on a numerical computing library is used to identify the differences. When the feature information meets the second preset condition, a second type of comparison function is invoked for comparison processing, including: In other cases, a comparison method based on string sorting is used to identify differences.

[0013] In this embodiment of the invention, an array comparison method based on a numerical computation library is used for difference identification, including: The NumPy library is used to create an array using np.array and the np.setdiff1d function is used to compare array differences and identify the constraint commands for adding, deleting, or modifying data.

[0014] In this embodiment of the invention, a comparison method based on string sorting is used for difference identification, including: For each line of command strings in the file, use the sorted command to reorder them; Record the size of each row; By comparing the capacity size, unmatched constraint rows are identified, and modifications are determined.

[0015] In this embodiment of the invention, the method further includes: The processes of merging second-level sub-files into corresponding third-level files, and comparing third-level files, are deployed and executed in parallel on a distributed computing cluster.

[0016] In a second aspect of the present invention, an apparatus for comparing different versions of chip design constraint files is provided, the apparatus comprising: The preparation module is used to obtain the first version file and the second version file, split the file, and obtain multiple first-level sub-files corresponding to the first version file and the second version file respectively. The splitting module is used to perform secondary splitting of the first-level sub-files based on command information, classifying the file contents of different types of constraint commands into different second-level sub-files; The merging module is used to merge the second-level sub-files with the same type of constraint commands into the corresponding third-level files for the first version file and the second version file, respectively. The comparison module is used to compare the third-level files of the same type of constraint commands corresponding to the first version file and the second version file based on file feature information, and to determine the differences between the files.

[0017] In a third aspect of the present invention, a computer device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement a method for comparing different versions of chip design constraint files.

[0018] In a fourth aspect of the present invention, a computer-readable storage medium is provided, the computer-readable storage medium storing a computer program that, when executed by a processor, implements a method for comparing different versions of chip design constraint files.

[0019] In a fifth aspect of the present invention, a computer program product is provided, the computer program product comprising a computer program that, when executed by a processor, implements a method for comparing different versions of chip design constraint files.

[0020] The method and apparatus for comparing different versions of chip design constraint files proposed in this invention can achieve efficient, fast, and accurate comparison of out-of-order, ultra-large files through block splitting, command-based classification and merging, and differential comparison. The comparison results allow for precise control over whether the constraint modifications after each version iteration meet expectations, significantly improving file delivery quality and effectively reducing the manpower and time costs of manual communication, confirmation, and repeated verification, thus providing strong technical support for chip development. Attached Figure Description

[0021] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the following description of the embodiments will be briefly introduced. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0022] Figure 1This is a flowchart illustrating a method for comparing different versions of chip design constraint files according to an embodiment of the present invention.

[0023] Figure 2 This is a schematic flowchart of a comparison process according to an embodiment of the present invention.

[0024] Figure 3 This is a schematic diagram of the device architecture for comparing different versions of chip design constraint files according to an embodiment of the present invention.

[0025] Figure 4 This is a schematic diagram comparing the relationship between different versions of chip design constraint files according to a specific embodiment of the present invention.

[0026] Figure 5 This is a schematic diagram of a computer device structure according to an embodiment of the present invention. Detailed Implementation

[0027] The principles and spirit of the invention will now be described with reference to several exemplary embodiments. It should be understood that these embodiments are given merely to enable those skilled in the art to better understand and implement the invention, and are not intended to limit the scope of the invention in any way. Rather, these embodiments are provided to make this disclosure more thorough and complete, and to fully convey the scope of this disclosure to those skilled in the art.

[0028] Those skilled in the art will recognize that embodiments of the present invention can be implemented as a system, apparatus, device, method, or computer program product. Therefore, this disclosure can be specifically implemented in the following forms: entirely hardware, entirely software (including firmware, resident software, microcode, etc.), or a combination of hardware and software.

[0029] According to an embodiment of the present invention, a method and apparatus for comparing different versions of chip design constraint documents are proposed, relating to the field of chip design technology.

[0030] In the embodiments of the present invention, the following terms need to be explained: SDC: Synopsys Design Constraints, a format for defining design constraints. It is primarily used in synthesis, place-and-route, and other electronic design automation (EDA) tools to ensure that designs meet timing, power, and area requirements.

[0031] Flatten: Flatten out a hierarchical design to facilitate timing convergence and resource allocation.

[0032] The principles and spirit of the present invention will be explained in detail below with reference to several representative embodiments.

[0033] Figure 1This is a schematic flowchart illustrating a method for comparing different versions of chip design constraint files according to an embodiment of the present invention. Figure 1 As shown, the method includes: S101, obtain the first version file and the second version file, split the files, and obtain multiple first-level sub-files corresponding to the first version file and the second version file respectively.

[0034] Specifically, taking the first version file File1 and the second version file File2 as examples, the first version file File1 is split into first-level sub-files File1-1, File1-2, and File1-3; the second version file File2 is split into first-level sub-files File2-1, File2-2, and File2-3. The splitting can be based on a preset number of lines, dividing the version file into multiple first-level sub-files, such as 50,000 lines or 100,000 lines. The specific number of lines can be adjusted according to the actual scenario. Each first-level sub-file after splitting includes the preset number of lines of text content.

[0035] S102, the first-level sub-file is split a second time according to the command information, and the file contents of different types of constraint commands are classified into different second-level sub-files.

[0036] Specifically, the first-level sub-files are further split according to different types of constraint commands. For example, the first-level sub-file File1-1 is split according to the first constraint command (C1) and the second constraint command (C2). The file content corresponding to the first constraint command (C1) is placed in the second-level sub-file File1-1-C1, and the file content corresponding to the second constraint command (C2) is placed in the second-level sub-file File1-1-C2. This example uses two constraint commands to illustrate that after splitting, two second-level sub-files can be obtained. In practical applications, each different type of constraint command can be split into a corresponding second-level sub-file.

[0037] Similarly, the other first-level sub-files are split according to different types of constraint commands, resulting in: The first-level sub-file File1-2 corresponds to the second-level sub-files File1-2-C1 and File1-2-C2; The first-level sub-file File1-3 corresponds to the second-level sub-files File1-3-C1 and File1-3-C2; The first-level sub-file File2-1 corresponds to the second-level sub-files File2-1-C1 and File2-1-C2; The first-level sub-file File2-2 corresponds to the second-level sub-files File1-2-C1 and File2-2-C2; The first-level sub-file File2-3 corresponds to the second-level sub-files File2-3-C1 and File2-3-C2; S103, for the first version file and the second version file, the second-level sub-files with the same type of constraint commands are merged into the corresponding third-level file.

[0038] Specifically, second-level sub-files are merged according to the same type constraint command to obtain third-level files. For example, for multiple second-level sub-files corresponding to the first-version file File1, the second-level sub-files File1-1-C1, File1-2-C1, and File1-3-C1 corresponding to C1 are merged to obtain the third-level file File1-C1.

[0039] Merge the second-level subfiles File1-1-C2, File1-2-C2, and File1-3-C2 corresponding to C2 to obtain the third-level file File1-C2.

[0040] Similarly, by merging, we can obtain the third-level files File2-C1 and File2-C2 corresponding to the second version file File2.

[0041] S104, compare the third-level files of the same type of constraint commands corresponding to the first version file and the second version file according to the file feature information to determine the differences between the files.

[0042] Specifically, the comparison function is called to compare the third-level files of the same type of constraint commands. For example, the third-level files File1-C1 and File2-C1 corresponding to C1 are compared to obtain the first comparison result; the third-level files File1-C2 and File2-C2 corresponding to C2 are compared to obtain the second comparison result; the first comparison result and the second comparison result are combined to obtain the differences between the two versions of the files.

[0043] The method and apparatus for comparing different versions of chip design constraint files proposed in this invention can achieve efficient, fast, and accurate comparison of out-of-order, ultra-large files through block splitting, command-based classification and merging, and differential comparison. The comparison results allow for precise control over whether the constraint modifications after each version iteration meet expectations, significantly improving file delivery quality and effectively reducing the manpower and time costs of manual communication, confirmation, and repeated verification, thus providing strong technical support for chip development.

[0044] To provide a clearer explanation of the method for comparing different versions of chip design constraint documents, each step will be explained in detail below.

[0045] In one embodiment, for S101, a first version file and a second version file are obtained, and the files are split to obtain multiple first-level sub-files corresponding to the first version file and the second version file, respectively.

[0046] Specifically, the first version file and the second version file are divided into multiple first-level sub-files according to a preset number of lines; each first-level sub-file includes a preset number of lines of file content.

[0047] When splitting the initial file according to a preset number of lines, the massive original file can be divided into multiple first-level sub-files of controllable size, allowing subsequent processing to be carried out within memory constraints. This provides a feasible entry point for processing extremely large files, thereby overcoming the situation where the file is too large to be read as a whole.

[0048] In one embodiment, for S102, the first-level sub-file is split a second time according to the command information, and the file contents of different types of constraint commands are classified into different second-level sub-files.

[0049] Specifically, it parses the constraint commands in the first-level sub-file; The first-level sub-files are split according to the constraint commands. The file contents corresponding to the same type of constraint command are classified into the second-level sub-files corresponding to each type of constraint command. After classification, multiple second-level sub-files corresponding to the first version file and multiple second-level sub-files corresponding to the second version file are obtained.

[0050] This step primarily involves a secondary split based on constraint command type. Building upon the initial split, constraints are further logically categorized according to command type (e.g., create_clock, set_max_delay). This splitting method effectively resolves the issue of completely out-of-order commands caused by SDC syntax, grouping commands of the same type together. This provides a foundation for accurate comparison of commands of the same type in the future, significantly reducing false matches and missed matches caused by out-of-order order.

[0051] In one embodiment, for S103, for the multiple second-level sub-files corresponding to the first version file and the second version file, the second-level sub-files with the same type of constraint commands are merged into the corresponding third-level file.

[0052] Specifically, after merging, multiple third-level files corresponding to the first version file and multiple third-level files corresponding to the second version file are obtained; each third-level file includes the file content corresponding to the same type of constraint command.

[0053] This step involves reorganizing similar commands scattered across different first-level sub-files after classification to obtain third-level files. This generates independent, content-focused comparison target files for each command type, ensuring that subsequent difference comparisons can be performed modularly and in parallel by command type, thus improving the clarity and efficiency of the overall processing logic.

[0054] In one embodiment, for S104, the third-level files of the same type of constraint commands corresponding to the first version file and the second version file are compared according to the file feature information to determine the differences between the files.

[0055] refer to Figure 2 Specific methods include: S104-1, When the file feature information of the third-level file meets the first preset condition, the first type of comparison function is called for comparison processing; S104-2, When the feature information meets the second preset condition, the second type of comparison function is called for comparison processing.

[0056] This step proposes adaptively selecting different comparison functions based on file feature information. For the merged third-level files with different characteristics (e.g., file size, number of lines, line complexity), a differentiated comparison strategy is adopted. By adapting different comparison processing mechanisms, the use of computational resources can be optimized while ensuring comparison accuracy. For example, fast array comparison is used for files with many lines but simple structure, while meticulous logical comparison is used for files with few lines but complex content, thus achieving a balance between speed and accuracy overall.

[0057] In one specific embodiment, the file feature information includes at least the file size. Accordingly, a first preset condition is set as: the file size is less than a capacity threshold. A second preset condition is any other condition besides satisfying the first preset condition, such as the file size being greater than or equal to the capacity threshold. In practical applications, the file feature information may also include the number of lines of content, etc., used as preset conditions to determine which comparison processing method to choose.

[0058] The specific method for selecting the comparison processing method when comparing file size with a capacity threshold is as follows: The specific process of S104-1 is as follows: when the file size of the third-level file is less than the capacity threshold and the number of lines of content is greater than the number of lines threshold (i.e., the first preset condition is met), the difference identification is performed by an array comparison method based on a numerical calculation library.

[0059] In one specific embodiment, the process of using an array comparison method based on a numerical computing library for difference identification is as follows: The NumPy library is used to create an array using np.array and the np.setdiff1d function is used to compare array differences and identify the constraint commands for adding, deleting, or modifying data.

[0060] Specifically, fine-grained comparison of constraint files is achieved through NumPy array operations.

[0061] First, the input arrays from both files are loaded and converted into NumPy arrays. Then, the `np.setdiff1d()` function is used to perform a bidirectional set difference operation. By comparing the results of `setdiff1d(arr2, arr1)` and `setdiff1d(arr1, arr2)`, the add commands that exist only in the new file and the delete commands that exist only in the old file are accurately identified. For modification operations, `np.intersect1d()` is first used to find the common commands in both files, and then the parameter content is compared line by line, marking the commands with different parameters as modification commands.

[0062] The processing includes: Step 1, Data preparation and preprocessing; Read both the old and new constraint files (e.g., .sdc and .tcl formats), and split them into a list of commands line by line; Perform standardization processing on each command: remove leading and trailing spaces, merge consecutive spaces, and unify case. Filter blank lines and comment lines (lines that begin with # or / / ).

[0063] Step 2: Array Conversion and Basic Comparison; # Convert to a NumPy array for easier vectorized operations. old_cmds = np.array(preprocess(old_file_content)) new_cmds = np.array(preprocess(new_file_content)) # Initial Difference Analysis: Identifying Significant Additions and Deletions raw_added = np.setdiff1d(new_cmds, old_cmds) # Completely add the command raw_deleted = np.setdiff1d(old_cmds, new_cmds) # Command to completely delete Step 3: Modify the command recognition strategy; The identification of modification commands requires more refined analysis, employing a three-level judgment logic: Command name matching: Extracts the base name of the command (e.g., create_clock, set_input_delay); Target object comparison: Compare the objects affected by the command (e.g., clock name, port name, pin name); Detailed parameter comparison: Compare values, conditions, options, etc., parameter by parameter.

[0064] Special scenario handling: For multi-line command processing, merge cross-line commands (e.g., constraints with line continuation characters) and then compare them.

[0065] When the file size is small, an array comparison method based on the numerical computing library (NumPy) can be used. For large text files with relatively regular structures and mainly consisting of single-line commands, the efficient vectorization capabilities of libraries such as NumPy can be used to quickly perform difference and intersection operations between arrays, thereby rapidly identifying added and deleted commands. This method has relatively controllable memory usage and its comparison speed far exceeds that of traditional line-by-line text comparison, making it particularly suitable for processing a large number of constrained lines with relatively uniform formatting after being categorized and merged.

[0066] The specific process of S104-2 is as follows: under other circumstances (i.e., when the second preset condition is met), a comparison method based on string sorting is used to identify differences.

[0067] In one specific embodiment, the process of using a comparison method based on string sorting for difference identification is as follows: For each line of command strings in the file, the sorted command is used to reorder them; the size of each line is recorded; by comparing the size, unmatched constraint lines are identified, and modified content is determined.

[0068] Compared to the comparison method in S104-1, a string-sorting-based comparison method can be used when the file size is medium or large. In fact, for large files or files with complex line structures, a stable comparison method can be constructed by normalizing and sorting the command strings of each line and recording their capacity. This method effectively handles situations where the order of parameters within a line differs, accurately capturing substantial modifications to the content by comparing capacity rather than the original strings, thus ensuring the robustness and accuracy of the comparison.

[0069] In practical applications, the processing of S101 to S104 can be encapsulated into four steps: prepare, split, merge, and diff. Since the merge and diff steps require multi-threaded parallel processing and involve large amounts of data, they may crash locally and therefore need to be run on a cluster. The main script calls this logic, which can be executed in parts or all at once. The main script uses the Python logging library to output logs, alerts, errors, and other information.

[0070] Specifically, the method also includes: the process of merging the second-level sub-files into the corresponding third-level files (S103) and the process of comparing the third-level files (S104) are deployed on a distributed computing cluster for parallel execution to ensure the stable execution of the comparison process.

[0071] In practical applications, for computationally intensive tasks such as merging multiple third-level files and file comparison, the parallel computing capabilities of the cluster can be leveraged to process multiple command types of files simultaneously, compressing the serial processing time that might have taken hours or even days into a very short time. This method ensures that the speed of the entire comparison process is far slower than the Flatten SDC update speed, enabling this invention to provide real-time difference analysis results in the rapid iteration of chip design, thus possessing extremely high practical value.

[0072] It should be noted that although the operation of the method of the present invention has been described in a specific order in the above embodiments and figures, this does not require or imply that the operations must be performed in that specific order, or that all the operations shown must be performed to achieve the desired result. Additionally or alternatively, certain steps may be omitted, multiple steps may be combined into one step, and / or one step may be broken down into multiple steps.

[0073] After introducing the method of exemplary embodiments of the present invention, the following references are made. Figure 3 An apparatus for comparing different versions of chip design constraint files according to an exemplary embodiment of the present invention is described.

[0074] The implementation of the apparatus for comparing different versions of chip design constraint documents can be found in the implementation of the method described above, and will not be repeated here. The terms "module" or "unit" used below can refer to a combination of software and / or hardware that implements a predetermined function. Although the apparatus described in the following embodiments is preferably implemented in software, hardware implementation, or a combination of software and hardware, is also possible and contemplated.

[0075] Based on the same inventive concept, this invention also proposes a device for comparing different versions of chip design constraint files, such as... Figure 3 As shown, the device includes: The preparation module 310 is used to obtain the first version file and the second version file, split the file, and obtain multiple first-level sub-files corresponding to the first version file and the second version file respectively. The splitting module 320 is used to perform secondary splitting of the first-level sub-files according to the command information, and classify the file contents of different types of constraint commands into different second-level sub-files. The merging module 330 is used to merge the second-level sub-files with the same type of constraint commands into the corresponding third-level files for the first version file and the second version file, respectively. The comparison module 340 is used to compare the third-level files of the same type of constraint commands corresponding to the first version file and the second version file based on file feature information, and to determine the differences between the files.

[0076] It should be noted that although several modules of the apparatus for comparing different versions of chip design constraint documents are mentioned in the detailed description above, this division is merely exemplary and not mandatory. In fact, according to embodiments of the invention, the features and functions of two or more modules described above can be embodied in a single module. Conversely, the features and functions of a single module described above can be further divided and embodied by multiple modules.

[0077] The following examples use different versions of Flatten SDC files, combined with Figures 1 to 3 The comparison is made using the method and apparatus proposed in this invention for comparing different versions of chip design constraint files.

[0078] In conjunction with S101, perform the prepare steps: Prepare two versions of Flatten SDC files to be compared, and use the Linux system command "split -l100000" to split them into first-level subfiles of 100,000 lines each.

[0079] refer to Figure 4 This is a schematic diagram illustrating the relationship between different versions of chip design constraint files according to a specific embodiment of the present invention. Figure 4 As shown, after splitting, multiple first-level sub-files Pre_split_sdc_1, ..., Pre_split_sdc_n can be obtained.

[0080] Combined with S102, perform the split step: The first-level sub-file is split a second time, and the contents of 100,000 lines in the first-level sub-file are split again according to the relevant SDC commands.

[0081] For example, put the content related to the "Create_clock" command in one file and the content related to the "Set_sense" command in another file; for the content related to other commands, they can be put into different files in sequence to get multiple second-level sub-files.

[0082] by Figure 4 For example, after splitting according to the relevant SDC commands, we get the second-level subfiles corresponding to each first-level subfile: Create_clock_A_t0, Create_clock_A_t1, Set_disable_timing_A_t0, Set_sense_B_t2, ..., Set_multicycle_path_A_t0, Set_false_path_dft_t1.

[0083] Combined with S103, perform the merge step: Merge the second-level sub-files to obtain the third-level file.

[0084] Specifically, the "Create_clock" related commands in each unit file are merged together; the "Set_sense" related files in each unit file are merged together, and so on, ultimately resulting in multiple third-level files corresponding to the first version of the Flatten SDC file, and multiple third-level files corresponding to the other version of the Flatten SDC file.

[0085] by Figure 4 For example, merge the second-level sub-files with the same command together to get the third-level files Create_clock_A_t0, Create_clock_A_t1, Set_disable_timing_A_t0, Set_sense_B_t2, ..., Set_multicycle_path_A_t0, Set_false_path_dft_t1, Other.

[0086] Combined with S104, perform the diff (comparison) step: Compare third-level files with the same type of commands to determine the differences.

[0087] by Figure 4For example, the third-level file (after the merge step) corresponding to the first version of Flatten SDC is compared with the third-level file (after the merge step) corresponding to the second version of Flatten SDC.

[0088] When comparing files, you can use either the standard comparison logic or the NumPy library to compare them, depending on the file size.

[0089] Taking a capacity threshold of 150MB as an example, the comparison processing method will be explained.

[0090] 1. If the file size is less than 150MB, use NumPy functions for comparison.

[0091] In practical applications, if the file size is small (less than the capacity threshold) but the number of lines is large (greater than the number of lines threshold), and each line is a single instruction constraint, NumPy functions can be called directly for comparison, and comparison results can be quickly obtained with less memory usage.

[0092] 2. If the file size is greater than or equal to 150MB, use a function with normal logic for comparison.

[0093] Although this comparison method is slower, it can accurately identify differences.

[0094] In practical applications, if the file size is medium or large (greater than or equal to the capacity threshold), but the number of lines is small (less than the number of lines threshold), and each line contains multiple instruction constraints, then a function with ordinary logic is used for comparison.

[0095] By comparing different versions of Flatten SDC files, we can more accurately determine whether the constraints of each Flatten SDC file modification meet expectations, greatly improving the delivery quality of Flatten SDC files. This allows for immediate confirmation that SDC modifications at the tile level (the level of each independent functional module in chip design) have been incorporated into the Flatten SDC, ensuring efficient iteration of the top-level STA (Static Timing Analysis). Furthermore, it reduces the top-level STA signoff time, allows real-time monitoring of the Flatten SDC modification status, and minimizes the time spent on manual communication and confirmation.

[0096] The aforementioned embodiments are mainly for comparing different versions of Flatten SDC files. In practical application scenarios, the above method can also be used to compare other out-of-order large files.

[0097] In practical applications, for the development of ultra-large-scale chips, comparing differences between different versions of Flatten SDC files using forward layered checks is prone to omissions, while reverse manual verification is extremely costly in terms of manpower and time when dealing with over 20GB of out-of-order Flatten SDC files. Version iterations require repeated full verification, resulting in low efficiency and poor accuracy. This invention overcomes the technical limitations of not being able to read ultra-large out-of-order files into memory as a whole and the failure of conventional comparison tools by using a block-splitting, SDC command type-based merging, elimination of out-of-order interference from inline constraint objects, and a multi-mode adaptation comparison process. This achieves efficient, accurate, and low-memory-consumption version difference comparison of ultra-large (tens of gigabytes) out-of-order Flatten SDC files.

[0098] Taking the existing technology that uses reverse engineering and waiver verification as an example: After generating the Flatten SDC file, each SDC command is broken down into the modules each designer is responsible for, and then manually verified. Once the final Flatten SDC file is obtained, breaking down the SDC commands into individual modules and having the module leaders review them is indeed a comprehensive verification method. However, the Flatten SDC file itself exceeds 20GB in size, and even after splitting, the SDC size for some individual IPs still exceeds 2GB. Furthermore, due to the SDC syntax, the order of each command is randomized, for example: First version: flatten sdc: set_max_delay 100 –to [get_pins {ABCDE}] Version 2: flatten sdc: set_max_delay 100 –to [get_pins {BCAED}] This results in a significant expenditure of manpower and time in checking every single SDC in each version. Furthermore, the Flatten SDC file is iterated repeatedly, and after Flattening, the paths between modules are intertwined. Even without updating the SDC, generic SDCs or DFT (Design for Testability) SDCs may appear in modules. Therefore, each version of the Flatten SDC file needs to be split and verified, thus doubling the workload and time required.

[0099] By combining the method for comparing different versions of chip design constraint files proposed in this invention, after completing the full verification of the initial version of the FlattenSDC file (i.e., the reverse check mentioned above), subsequent updates to the Flatten SDC file can be quickly compared to identify discrepancies in constraint content. In subsequent iterations, only newly added, deleted, and modified constraint content needs to be checked, completely avoiding the redundant workload of repetitive full manual verification. This allows for precise control over the constraint modification status of each version of the Flatten SDC and the merging of module-level SDC modifications, significantly improving the delivery quality of timing constraint files, reducing the risk of chip tape-out failures, and significantly shortening the chip top-level STA approval cycle, greatly reducing cross-team communication costs and the manpower and time investment in manual verification. Furthermore, this invention can be extended to adapt to comparison scenarios of other ultra-large-scale out-of-order text files, providing strong technical support for chip development scenarios.

[0100] Based on the aforementioned inventive concept, such as Figure 5 As shown, the present invention also proposes a computer device 500, including a memory 510, a processor 520, and a computer program 530 stored in the memory 510 and executable on the processor 520. When the processor 520 executes the computer program 530, it implements the aforementioned method for comparing different versions of chip design constraint files.

[0101] Based on the aforementioned inventive concept, the present invention proposes a computer-readable storage medium storing a computer program that, when executed by a processor, implements the aforementioned method for comparing different versions of chip design constraint files.

[0102] Based on the aforementioned inventive concept, the present invention proposes a computer program product, which includes a computer program that, when executed by a processor, implements a method for comparing different versions of chip design constraint files.

[0103] The method and apparatus for comparing different versions of chip design constraint files proposed in this invention can achieve efficient, fast, and accurate comparison of out-of-order, ultra-large files through block splitting, command-based classification and merging, and differential comparison. The comparison results allow for precise control over whether the constraint modifications after each version iteration meet expectations, significantly improving file delivery quality and effectively reducing the manpower and time costs of manual communication, confirmation, and repeated verification, thus providing strong technical support for chip development.

[0104] The acquisition, storage, use, and processing of data in the technical solution of this invention all comply with the relevant provisions of laws and regulations.

[0105] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0106] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0107] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0108] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0109] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above descriptions are merely specific embodiments of the present invention and are not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A method for comparing different versions of chip design constraint files, characterized in that, The method includes: Obtain the first version file and the second version file, split the file, and obtain multiple first-level sub-files corresponding to the first version file and the second version file respectively; Based on the command information, the first-level sub-files are split a second time, and the file contents of different types of constraint commands are classified into different second-level sub-files. For the first version file and the second version file, the second-level sub-files with the same type of constraint commands are merged into the corresponding third-level file. Based on the file feature information, the third-level files of the same type of constraint commands corresponding to the first version file and the second version file are compared to determine the differences between the files.

2. The method according to claim 1, characterized in that, The file is split into multiple first-level sub-files corresponding to the first version file and the second version file, including: The first version file and the second version file are divided into multiple first-level sub-files according to a preset number of lines; each first-level sub-file includes the preset number of lines of file content.

3. The method according to claim 1, characterized in that, The first-level sub-files are further split based on the command information, and the file contents of different types of constraint commands are classified into different second-level sub-files, including: Parse the constraint commands in the first-level sub-file; The first-level sub-files are split according to the constraint commands. The file contents corresponding to the same type of constraint command are classified into the second-level sub-files corresponding to each type of constraint command. After classification, multiple second-level sub-files corresponding to the first version file and multiple second-level sub-files corresponding to the second version file are obtained.

4. The method according to claim 1, characterized in that, For the first version file and the second version file, the second-level sub-files corresponding to the same type of constraint commands are merged into the corresponding third-level files, including: After merging, multiple third-level files corresponding to the first version file and multiple third-level files corresponding to the second version file are obtained respectively; each third-level file includes the file content corresponding to the same type of constraint command.

5. The method according to claim 1, characterized in that, Based on file characteristic information, the third-level files of the same type of constraint commands corresponding to the first version file and the second version file are compared to determine the differences between the files, including: When the file feature information of the third-level file meets the first preset condition, the first type of comparison function is called for comparison processing. When the feature information meets the second preset condition, the second type of comparison function is called for comparison processing.

6. The method according to claim 5, characterized in that, The file characteristic information includes at least: file size and number of lines of content; When the file feature information of the third-level file meets the first preset condition, the first type of comparison function is called for comparison processing, including: When the file size of the third-level file is less than the capacity threshold, an array comparison method based on a numerical computing library is used to identify differences. When the feature information meets the second preset condition, a second type of comparison function is invoked for comparison processing, including: In other cases, a comparison method based on string sorting is used to identify differences.

7. The method according to claim 6, characterized in that, Difference identification is performed using an array comparison method based on a numerical computation library, including: The NumPy library is used to create an array using np.array and the np.setdiff1d function is used to compare array differences and identify the constraint commands for adding, deleting, or modifying data.

8. The method according to claim 6, characterized in that, A comparison method based on string sorting is used for difference identification, including: For each line of command strings in the file, use the sorted command to reorder them; Record the size of each row; By comparing the capacity size, unmatched constraint rows are identified, and modifications are determined.

9. The method according to claim 1, characterized in that, The method also includes: The processes of merging second-level sub-files into corresponding third-level files, and comparing third-level files, are deployed and executed in parallel on a distributed computing cluster.

10. An apparatus for comparing different versions of chip design constraint files, characterized in that, The device includes: The preparation module is used to obtain the first version file and the second version file, split the file, and obtain multiple first-level sub-files corresponding to the first version file and the second version file respectively. The splitting module is used to perform secondary splitting of the first-level sub-files based on command information, classifying the file contents of different types of constraint commands into different second-level sub-files; The merging module is used to merge the second-level sub-files with the same type of constraint commands into the corresponding third-level files for the first version file and the second version file, respectively. The comparison module is used to compare the third-level files of the same type of constraint commands corresponding to the first version file and the second version file based on file feature information, and to determine the differences between the files.

11. A computer device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the method of any one of claims 1 to 9.

12. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the method of any one of claims 1 to 9.

13. A computer program product, characterized in that, The computer program product includes a computer program that, when executed by a processor, implements the method of any one of claims 1 to 9.

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