EDA design parameter optimization and analysis method, computer device and storage medium

CN122965407APending Publication Date: 2026-10-23XPEEDIC CO LTD
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Patent Information

Application Number
CN202611450545.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-09-18
Publication Date
2026-10-23

AI Technical Summary

Technical Problem

[0004]本发明的目的在于提供一种基于贝叶斯优化的EDA设计参数优化与分析方法、计算机设备及计算机可读存储介质,以解决现有贝叶斯优化在迭代后期由于强制执行超参数最大似然估计优化导致算法自身计算开销随样本量增加呈O(N³)级别急剧上升的技术问题

Benefits of technology

本发明将高斯过程代理模型的超参数最大似然估计优化与后验分布更新过程进行了解耦,提出了一种基于信任域状态的自适应超参数更新机制。在优化迭代过程中,本发明利用信任域边长是否发生改变来表征算法在局部区域内的搜索行为是否发生显著变化。当信任域边长保持稳定时,意味着模型超参数已趋于收敛,此时本发明跳过计算复杂度为O(N³)的超参数最大似然估计优化,仅执行计算复杂度较低(O(N2)级别)的后验分布更新;仅当信任域扩张或收缩时,才触发全量的超参数重新训练。该机制在保证代理模型精度的前提下,有效削减了优化迭代过程中的冗余训练计算,解决了传统贝叶斯优化在迭代中后期由于高斯过程训练复杂度过高导致的算力浪费问题,降低了算法自身的运行时间开销。

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Abstract

The application provides an EDA design parameter optimization and analysis method, a computer device and a storage medium. The method comprises the following steps: collecting an initial sample set in an EDA design parameter space and evaluating an index, and initializing a trust region parameter; a Gaussian process proxy model is constructed; in iterative optimization, the trust region state is judged according to the comparison result of the current and last round of trust region side length; when the trust region side length changes, the super parameter maximum likelihood estimation optimization is executed to re-solve the kernel function super parameter; when the trust region side length remains stable, the super parameter optimization is skipped and only the posterior distribution update is executed; the candidate parameter points are selected in the trust region by evaluating and collecting functions, and are submitted to an EDA tool to obtain a performance index value, and the sample set and the trust region side length are updated accordingly until the convergence condition is met and the result is output. The training and posterior update process of the Gaussian process are decoupled, the redundant calculation is avoided through adaptive judgment, and the problem of excessive algorithm overhead in the later stage of the existing Bayesian optimization is solved.
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Description

Technical Field

[0001] This invention belongs to the field of electronic design automation (EDA) and automatic optimization technology of circuit design. More specifically, it relates to an EDA design parameter optimization and analysis method based on Bayesian optimization, a computer device, and a computer-readable storage medium. Background Technology

[0002] As the complexity of integrated circuit design increases, numerous design parameters (such as transistor size, bias current, compensation capacitors, clock tree parameters, constraint parameters, process corner selection, and voltage and temperature conditions) require adjustment in tasks involving analog / mixed-signal circuits, digital circuit timing convergence, power / area optimization, and layout-related optimization. These parameters often exhibit nonlinear, strongly coupled, and black-box relationships with target performance metrics (such as gain, bandwidth, phase margin, power consumption, noise, delay, area, and yield). The evaluation of these metrics typically relies on circuit simulation (such as SPICE-based simulations) or EDA analysis processes (such as STA, power analysis, DRC / LVS, etc.), resulting in lengthy evaluation times and high verification costs.

[0003] To address the parameter optimization problem under high simulation costs, Bayesian optimization (BO) has become a commonly used method for solving black-box optimization problems due to its high sample efficiency. However, in practical engineering applications, the total time consumption of parameter optimization is usually composed of the algorithm's runtime and the time consumed in a single simulation multiplied by the number of iterations. As the number of iterations and the size of the evaluation samples increase, standard Bayesian optimization and its variants (such as traditional TuRBO trust domain Bayesian optimization) force the maximum likelihood estimation (MLE) optimization and posterior distribution update of the hyperparameters of the Gaussian process surrogate model in each iteration. Since the training time of the Gaussian process surrogate model increases at the O(N³) level (where N is the number of samples), frequent forced full updates lead to a sharp increase in the computational cost of the algorithm itself in the middle and later stages of optimization. This computational cost accounts for a significant proportion of the time, resulting in a large waste of computing power and becoming the efficiency bottleneck of the entire parameter optimization process. Summary of the Invention

[0004] The purpose of this invention is to provide a Bayesian optimization-based EDA design parameter optimization and analysis method, computer equipment, and computer-readable storage medium to solve the technical problem that in the later stages of existing Bayesian optimization, the computational cost of the algorithm itself increases sharply at the O(N³) level as the sample size increases due to the forced execution of hyperparameter maximum likelihood estimation optimization.

[0005] According to a first aspect of the present invention, a method for optimizing and analyzing EDA design parameters based on Bayesian optimization is provided, the method comprising the following steps: Step S100: Collect an initial sample set in the EDA design parameter space, send the initial sample set to the EDA simulation tool for simulation evaluation to obtain the corresponding performance index values, and construct the current sample set; initialize the trust domain parameters and hyperparameter update flags, wherein the trust domain parameters include the initial trust domain side length, the consecutive success threshold, and the consecutive failure threshold; Step S200: Construct a Gaussian process proxy model based on the current sample set; Step S300: Enter the iterative optimization process, obtain the current trust domain edge length of the current iteration, and compare the current trust domain edge length with the previous iteration's trust domain edge length: If the current trust domain side length is not equal to the previous trust domain side length, the trust domain state is determined to be a changed state, and the hyperparameter update flag is set to a change flag. The hyperparameter maximum likelihood estimation optimization is performed, and the kernel function hyperparameters of the Gaussian process surrogate model are re-solved based on the current sample set. If the current trust domain side length is equal to the previous trust domain side length, the trust domain state is determined to be stable, the hyperparameter update flag is set to stable flag, the hyperparameter maximum likelihood estimation optimization is skipped, the kernel function hyperparameters of the previous iteration remain unchanged, and only the posterior distribution update of the Gaussian process surrogate model is performed. Step S400: Evaluate the acquisition function within the defined parameter space and select the next candidate parameter point; Step S500: Submit the next candidate parameter point to the EDA simulation tool for simulation evaluation to obtain the corresponding candidate performance index value; add the next candidate parameter point and its corresponding candidate performance index value to the current sample set; update the consecutive success count or consecutive failure count according to the comparison result between the candidate performance index value and the current optimal value, and update the trust domain side length of the next iteration according to the consecutive success count, the consecutive failure count and the trust domain parameter. Step S600: Determine whether the preset convergence condition is met. If the convergence condition is met, output the optimal design parameter combination and the corresponding performance index value, and execute step S700. If the convergence condition is not met, return to step S300 to continue the next iteration. Step S700: After optimization convergence, the analysis engine based on the Gaussian process proxy model is reused to perform performance prediction and analysis of the design parameters without calling the EDA simulation tool.

[0006] Optionally, in step S100, the initial sample set is generated using Latin hypercube sampling or Sobol quasi-random sequences.

[0007] Optionally, in step S200, the kernel function of the Gaussian process surrogate model is either the Marton kernel function or the quadratic exponential kernel function; the hyperparameters of the kernel function include length scale, signal variance, and noise variance.

[0008] Optionally, step S300 may further include an early truncation process: Set the minimum sample threshold; Determine whether the number of samples in the current sample set is lower than the minimum sample threshold; if the number of samples is lower than the minimum sample threshold, then force the maximum likelihood estimation optimization of the hyperparameters. If the number of samples is greater than or equal to the minimum sample threshold, the current trust domain side length is compared with the previous trust domain side length, and a decision is made on whether to perform the hyperparameter maximum likelihood estimation optimization based on the comparison result.

[0009] Optionally, the acquisition strategy used in step S400 may include an expected improvement strategy or a trust domain strategy. When the desired improvement strategy is adopted, the desired improvement acquisition function is calculated in the global parameter space, and the candidate parameter point that maximizes the desired improvement is selected as the next candidate parameter point by combining the posterior mean and variance of the Gaussian process surrogate model. When the trust domain strategy is adopted, the acquisition function is calculated within a local hyperrectangular region defined by the side length of the current trust domain, and candidate parameter points are searched within the local hyperrectangular region as the next candidate parameter points.

[0010] Optionally, the trust domain parameters may also include the maximum side length and the minimum side length; In step S500, the specific process of updating the trust domain edge length for the next iteration includes: If the candidate performance index value is better than the current optimal value, the consecutive success count is incremented by one, and the consecutive failure count is reset to zero; when the consecutive success count reaches the consecutive success threshold, the trust domain side length of the next iteration is expanded, and the expanded side length does not exceed the maximum side length. If the candidate performance index value is not better than the current optimal value, the number of consecutive failures is incremented by one, and the number of consecutive successes is reset to zero; when the number of consecutive failures reaches the consecutive failure threshold, the trust domain side length of the next iteration is shrunk, and the shrunk side length is not lower than the minimum side length. If the number of consecutive successes does not reach the consecutive success threshold and the number of consecutive failures does not reach the consecutive failure threshold, then the trust domain side length in the next iteration remains equal to the current trust domain side length.

[0011] Optionally, in step S600, the convergence condition includes any one of the following: The number of iterations has reached the set maximum number of iterations; The performance index value corresponding to the optimal combination of design parameters meets the set design requirement threshold. The current trust domain side length has shrunk to the minimum side length, and the performance index value has not been better than the current optimal value within a continuously set number of iterations.

[0012] Optionally, in step S700, the performance prediction and analysis of the design parameters includes any one or more of the following: Arbitrary parameter prediction: Receive the input combination of parameters to be queried, and predict the posterior mean and confidence interval of the performance index value corresponding to the combination of parameters to be queried through the posterior distribution of the Gaussian process surrogate model; Parameter sensitivity analysis: Perturbations are applied to each design parameter within a defined neighborhood of the optimal design parameter combination. The Gaussian process surrogate model is used to predict the response changes of the performance index values, and the sensitivity coefficients of each design parameter are calculated. Robustness analysis: Based on Monte Carlo simulation, design parameters are sampled within the parameter tolerance range. The sampled design parameters are input into the Gaussian process surrogate model to predict the corresponding performance index values. The distribution characteristics of the performance index values ​​are statistically analyzed to evaluate robustness.

[0013] According to a second aspect of the present invention, a computer device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement any of the above-described Bayesian optimization-based EDA design parameter optimization and analysis methods.

[0014] According to a third aspect of the present invention, a computer-readable storage medium is provided having a computer program stored thereon, wherein the computer program, when executed by a processor, implements any of the above-described Bayesian optimization-based EDA design parameter optimization and analysis methods.

[0015] Compared with the prior art, the technical solution provided by this invention has the following advantages: This invention decouples the hyperparameter maximum likelihood estimation optimization and the posterior distribution update process of the Gaussian process surrogate model, proposing an adaptive hyperparameter update mechanism based on the trust domain state. During the optimization iteration, this invention uses the change in the trust domain edge length to characterize whether the algorithm's search behavior in the local region has changed significantly. When the trust domain edge length remains stable, it means that the model hyperparameters have converged. At this point, this invention skips the computationally complex (O(N³)) hyperparameter maximum likelihood estimation optimization and only performs the less computationally complex (O(N³)) optimization. 2The posterior distribution is updated at the trust level; full hyperparameter retraining is triggered only when the trust domain expands or shrinks. This mechanism effectively reduces redundant training computations in the optimization iteration process while ensuring the accuracy of the surrogate model. It solves the problem of wasted computing power caused by the high training complexity of the Gaussian process in the later stages of traditional Bayesian optimization, and reduces the runtime overhead of the algorithm itself. Attached Figure Description

[0016] The present invention can be better understood by referring to the following description taken in conjunction with the accompanying drawings, in which the same or similar reference numerals are used throughout the drawings to denote the same or similar parts.

[0017] Figure 1 The overall flowchart of the EDA design parameter optimization method based on Bayesian optimization provided in the embodiment of the present invention is shown; Figure 2 The flowchart illustrating the determination and execution of the Adaptive Hyperparameter Update Strategy (AHR) in an embodiment of the present invention is shown. Figure 3 This diagram illustrates a comparison of the GP hyperparameter MLE optimization and posterior update decoupling design in an embodiment of the present invention. Figure 4 This invention illustrates a system architecture diagram showing the closed-loop integration of the Bayesian optimization algorithm and the EDA simulation tool in an embodiment of the present invention. Figure 5 The diagram illustrates the structure and data flow of a What-If analysis engine based on a proxy model in an embodiment of the present invention. Detailed Implementation

[0018] To enable those skilled in the art to more fully understand the technical solutions of the present invention, exemplary embodiments of the present invention will be described more comprehensively and in detail below with reference to the accompanying drawings. Obviously, the one or more embodiments of the present invention described below are merely one or more specific ways to implement the technical solutions of the present invention, and are not exhaustive. It should be understood that other ways belonging to a general inventive concept can be used to implement the technical solutions of the present invention, and should not be limited to the embodiments described exemplary. Based on one or more embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0019] Example: This embodiment of the invention uses high-speed digital channel signal integrity (SI) optimization as an example to describe the complete implementation process of the method of the present invention in the EDA simulation tool ChannelExpert. Taking the SDR clock channel of MIPI RFFE (Radio Frequency Front-End Control Interface) as an example, the clock driver (IBIS model) drives multiple receiver loads through an RC termination network, and the component parameters of the termination network directly determine the quality of the clock waveform.

[0020] The optimization objective of this invention embodiment is to simultaneously meet the design constraints of the five signal quality indicators of the receiver waveform by adjusting the termination network parameters: overshoot ≤ 0.226, undershoot ≥ 0.216, rise time ≤ 3865ps, fall time ≥ 3960ps, and edge monotonicity ≤ 0.2.

[0021] In this application scenario, design parameter dimensions This includes four terminating capacitors (C1~C4, ranging from 0~10pF, with an initial value of 1pF) and four terminating resistors (R0~R3, ranging from 0~50Ω, with an initial value of 10Ω). A single evaluation is achieved by calling the EDA simulation tool to perform an IBIS transient simulation (OPT_TRAN). The objective function is composed of multiple waveform indices, exhibiting non-convexity and non-explicitly differentiable characteristics; traditional optimization algorithms often require hundreds or thousands of evaluations to converge.

[0022] Figure 4 The system architecture diagram of the closed-loop integration of the Bayesian optimization algorithm and the EDA simulation tool in an embodiment of the present invention is shown. Figure 4 As shown, the closed-loop integrated system architecture of this invention mainly includes the following modules: (1) Optimization Engine Module: This module implements the adaptive hyperparameter update acceleration Bayesian optimization algorithm of this invention, including GP agent model construction, AHR adaptive hyperparameter update logic, acquisition function (GPEI / TuRBO) calculation, and trust domain management. This module can be implemented using Python and the GPy modeling library.

[0023] (2) EDA simulation interface module: encapsulates the automated interaction interface with EDA simulation tools such as XDS (for RF circuit simulation and parameter scanning) and ChannelExpert, realizing the automatic distribution of candidate parameters, automatic triggering of simulation tasks, and automatic parsing and feedback of performance index results.

[0024] (3) Parameter Management Module: Used to manage the design parameter space definition (parameter name, range, constraint), read and write sample sets, and manage the trust domain status.

[0025] (4) Results visualization module: used to display data such as optimization convergence curve, parameter search trajectory and trust domain state change history in real time.

[0026] Figure 1 This diagram illustrates the overall flowchart of the EDA design parameter optimization method based on Bayesian optimization provided in an embodiment of the present invention. Figure 2 This diagram illustrates the determination and execution flowchart of the Adaptive Hyperparameter Update (AHR) strategy in an embodiment of the present invention. Combined with... Figure 1 and Figure 2 The specific execution flow of the EDA design parameter optimization method based on Bayesian optimization provided in this embodiment of the invention is as follows: Step S1: Initialization and initial sample collection.

[0027] In a predefined 8-dimensional parameter space, Latin hypercube sampling (LHS) is used to generate... Initial sample points were distributed to ChannelExpert for IBIS transient simulation. Five indicators were extracted: overshoot, undershoot, rise time, fall time, and edge monotonicity. A weighted composite objective function was constructed based on the constraint violation degree as the performance index values. Simultaneously, the trust domain parameters were initialized: initial trust domain side length... (Normalized side length), consecutive success threshold tau_succ=3, consecutive failure threshold tau_fail=5, maximum side length Minimum side length Set the hyperparameter update flag. The initial value is 0 (representing a stable state).

[0028] Step S2: Construct a Gaussian process proxy model.

[0029] A GP surrogate model is constructed based on a sample set consisting of 10 initial sample points. The kernel function is the Matern kernel (nu=2.5). The hyperparameters theta = {length scale l, signal variance sigma_f, noise variance sigma_n} of the kernel function are solved by maximum likelihood estimation (MLE).

[0030] Step S3: Enter the iterative optimization process and perform trust domain state determination and adaptive hyperparameter update (AHR).

[0031] like Figure 2 As shown, in the k-th iteration, the current trust domain side length L_k is read and compared with the previous trust domain side length L_{k-1}: (a) If L_k ≠ L_{k-1}, it indicates that the trust domain has expanded or shrunk, the search region has changed substantially, and the GP model needs to be re-adapted to the data distribution. In this case, setting flag_TR to 1 (change state) triggers a complete maximum likelihood estimation optimization of hyperparameters, and the optimal kernel function hyperparameter theta is re-solved based on the current sample set. The time complexity of this process is O(N³).

[0032] (b) If L_k = L_{k-1}, it indicates that the trust region edge length remains equal, the algorithm's search state in the current local area has not changed significantly, and the hyperparameters tend to converge. At this point, flag_TR is set to 0 (stable state), skipping the maximum likelihood estimation optimization of hyperparameters, keeping the hyperparameters unchanged from the previous round, and only performing the posterior distribution update calculation for the Gaussian process surrogate model. The time complexity of this operation is O(N). 2 ).

[0033] Furthermore, to prevent inaccuracies in the surrogate model due to insufficient sample size in the early stages of optimization, this embodiment of the invention sets a minimum sample threshold N_min=20. Maximum likelihood estimation optimization of hyperparameters is enforced when the total sample size is below 20; the AHR (Advanced Human Relationship Assessment) mechanism is activated only when the sample size exceeds 20.

[0034] Figure 3 A schematic diagram comparing the GP hyperparameter MLE optimization and posterior update decoupling design in an embodiment of the present invention is shown. (Refer to...) Figure 3 Compared to traditional TuRBO Bayesian optimization, which enforces MLE optimization and posterior update in all iterations, the decoupling mechanism of this invention skips the heavy MLE computation during the "stable" period of the trust domain (which typically accounts for about 60%-70% of the total iterations), thereby saving computing power.

[0035] Step S4: Evaluation of acquisition function and selection of candidate points.

[0036] This invention supports the Expected Improvement Indicator (GPEI) strategy and the Trust Domain Boolean (TuRBO) strategy, and employs a dynamic switching mechanism. In the early stages of optimization (e.g., the first 20 iterations), the GPEI strategy is used to compute the EI acquisition function in the global parameter space to enhance exploration; subsequently, it switches to the TuRBO strategy, which is based on the current trust domain. The acquisition function is calculated within the defined local hyperrectangular region to achieve a refined search of the local region (the upper confidence bound UCB, probability-improved PI, etc. can also be used as alternative acquisition functions).

[0037] Step S5: Candidate point evaluation and trust domain update.

[0038] The selected next candidate parameter point is submitted to ChannelExpert via the EDA simulation interface for transient simulation. The performance index value is extracted and added to the current sample set. Then, it is determined whether this performance index value is better than the current optimal value. If the result is better than the current best value, the consecutive success count is incremented by 1, and the consecutive failure count is reset to zero; when the consecutive success count reaches tau_succ, the trust domain side length for the next iteration is expanded to L_{k+1} = min(2 L_k, L_max).

[0039] If the value is not better than the current optimal value, the consecutive failure count is incremented by 1 and the consecutive success count is reset to zero. When the consecutive failure count reaches tau_fail, the trust domain side length of the next iteration shrinks to L_{k+1} = max(L_k / 2, L_min).

[0040] If none of the threshold trigger conditions are met, the trust domain side length remains unchanged, i.e., L_{k+1}=L_k.

[0041] Step S6: Convergence determination and result output.

[0042] This invention sets a maximum number of iterations. When all five signal quality indicators meet the design requirement thresholds, or when the trust domain side length shrinks to L_min and shows no improvement after multiple consecutive iterations, the convergence condition is considered met. If the convergence condition is met, the optimal combination of design parameters and corresponding performance index values ​​are output, and the parameters are written back to the EDA design file; if the convergence condition is not met, the process returns to step S3 to continue the next iteration.

[0043] Step S7: What-If analysis engine based on proxy model.

[0044] Figure 5 This diagram illustrates the structure and data flow of a What-If analysis engine based on a proxy model, as shown in an embodiment of the present invention. Figure 5 As shown, after optimization convergence or during optimization, the trained Gaussian process surrogate model is used as an independent What-If analysis engine. This engine provides the following analysis services without invoking simulation tools: (a) Arbitrary parameter prediction: Receive any combination of query parameters (e.g., manually fine-tune a capacitor value), and return the predicted waveform index and confidence interval directly within milliseconds through the GP posterior distribution, realizing interactive design query.

[0045] (b) Parameter Sensitivity Analysis: Within the neighborhood of the optimal design parameter point, small perturbations of ±2% were applied to each of the eight design parameters. The response changes were predicted, and the sensitivity coefficients were calculated. The results showed that the terminating resistor R1 and the terminating capacitor C2 were the design parameters with the highest sensitivity (sensitivity coefficients of 0.38 and 0.27, respectively). This calculation was completed within seconds.

[0046] (c) Robustness Analysis: A manufacturing tolerance range of ±5% was set for the termination capacitors and resistors. Monte Carlo simulation was used to sample 10 random units. 5 The parameters are input into the surrogate model one group at a time to predict the signal quality index. In this embodiment of the invention, the design yield rate of 96.8% with all five indicators meeting the standards is statistically obtained within minutes.

[0047] Other technical problems that the embodiments of the present invention can solve as a whole, and other beneficial effects they bring, are as follows: I. Significantly reduces the total optimization time of EDA and overcomes the local failure problem of traditional algorithms. In the actual test on the ChannelExpert platform of Chip and Semiconductor (test case OPT_TRAN case2), the total optimization time of the method of this invention is 50.331 seconds and 352.675 seconds under the LIST and MIN / MAX configurations, respectively. In comparison, under the same conditions, the time of Genetic Algorithm (GA) is 1761.34 seconds / 2007.19 seconds, Differential Evolution (DE) is 2084.27 seconds / 3773.21 seconds, and Simulated Annealing (SA) is 8487.22 seconds / 38727.4 seconds. The method of this invention, with the efficient guidance of the surrogate model, achieves an average speedup of about 50% compared to traditional algorithms at the same convergence accuracy (the speedup is several times to two orders of magnitude in actual tests); at the same time, it overcomes the pain point that traditional hybrid gradient descent, quasi-Newton and other algorithms report "optimization failure" in tests, which is a problem for the transient waveform index that cannot be explicitly differentiated.

[0048] Second, the algorithm's own operating efficiency has been further improved. Ablation experiments within Bayesian optimization show that, under the same initial conditions, thanks to the AHR strategy avoiding a large amount of redundant computation, the total optimization time of AHR-accelerated TuRBO is further reduced by 20% to 30% compared to the standard TuRBO.

[0049] Third, it has broad generalization value. The method of this invention is also applicable to various EDA tasks with nonlinear constraints and long simulation times, such as antenna matching network optimization, RF circuit power amplifier design, phase-locked loop parameter tuning, and analog circuit bias optimization.

[0050] Fourth, it provides design insight capabilities with zero additional simulation overhead. Traditional methods typically require hundreds to hundreds of thousands of additional simulations over several hours to several days to perform parameter sensitivity analysis and Monte Carlo yield analysis of the same scale; while this invention, by reusing proxy models, compresses the time required for the above analysis to the second / minute level, completely transforming the model into a sustainable and reusable analytical asset.

[0051] Accordingly, based on the Bayesian optimization-based EDA design parameter optimization and analysis method of the present invention, the present invention also provides a computer device, which includes a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the Bayesian optimization-based EDA design parameter optimization and analysis method provided in the present invention.

[0052] Accordingly, based on the Bayesian optimization-based EDA design parameter optimization and analysis method of the present invention, the present invention also provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the Bayesian optimization-based EDA design parameter optimization and analysis method provided in the present invention.

[0053] While one or more embodiments of the present invention have been described above, those skilled in the art will recognize that the present invention can be implemented in any other form without departing from its spirit and scope. Therefore, the embodiments described above are illustrative and not restrictive, and many modifications and substitutions will be apparent to those skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.

Claims

1. A Bayesian optimization-based EDA design parameter optimization and analysis method, characterized in that, Includes the following steps: Step S100: Collect an initial sample set in the EDA design parameter space, evaluate its corresponding performance index values, and construct the current sample set; Initialize the trust domain parameters and hyperparameter update flags, wherein the trust domain parameters include the initial trust domain side length, consecutive success threshold, and consecutive failure threshold; Step S200: Construct a Gaussian process surrogate model based on the current sample set; Step S300: Enter the iterative optimization process. Determine the state of the trust domain based on the comparison between the current and previous trust domain side lengths: When the trust domain side length changes, perform hyperparameter maximum likelihood estimation optimization and resolve the kernel function hyperparameters of the Gaussian process surrogate model; when the trust domain side length remains stable, skip the hyperparameter optimization and only perform posterior distribution update. Step S400: Evaluate the acquisition function within the defined parameter space and select the next candidate parameter point; Step S500: Add the next candidate parameter point and its corresponding candidate performance index value to the current sample set; update the number of consecutive successes or consecutive failures based on the comparison result between the candidate performance index value and the current optimal value, and update the trust domain side length of the next iteration based on the number of consecutive successes, the number of consecutive failures and the trust domain parameter. Step S600: Determine whether the convergence condition is met. If it is met, output the optimal design parameter combination and the corresponding performance index value, and execute step S700; if it is not met, return to step S300. Step S700: Reuse the analysis engine based on the Gaussian process proxy model to perform performance prediction and analysis on the design parameters without calling EDA simulation tools.

2. The EDA design parameter optimization and analysis method based on Bayesian optimization according to claim 1, characterized in that, In step S100, the initial sample set is generated using Latin hypercube sampling or Sobol quasi-random sequence. And / or, In step S100, the initial sample set is sent to the EDA simulation tool for simulation evaluation to obtain the corresponding performance index values.

3. The EDA design parameter optimization and analysis method based on Bayesian optimization according to claim 1, characterized in that, In step S200, the kernel function of the Gaussian process surrogate model is either the Marton kernel function or the quadratic exponential kernel function; the hyperparameters of the kernel function include length scale, signal variance, and noise variance.

4. The EDA design parameter optimization and analysis method based on Bayesian optimization according to claim 1, characterized in that, In step S300, when the trust domain edge length changes, the hyperparameter maximum likelihood estimation optimization is performed to resolve the kernel function hyperparameters of the Gaussian process surrogate model. Specifically, if the current trust domain edge length is not equal to the previous trust domain edge length, the trust domain state is determined to be in a changed state, and the hyperparameter update flag is set to a change flag. The hyperparameter maximum likelihood estimation optimization is then performed to resolve the kernel function hyperparameters of the Gaussian process surrogate model based on the current sample set. And / or, In step S300, when the trust domain side length remains stable, the hyperparameter optimization is skipped and only the posterior distribution update is performed. Specifically, if the current trust domain side length is equal to the previous trust domain side length, the trust domain state is determined to be stable, and the hyperparameter update flag is set to a stable flag. The hyperparameter maximum likelihood estimation optimization is skipped, the kernel function hyperparameters of the previous iteration remain unchanged, and only the posterior distribution update of the Gaussian process surrogate model is performed. And / or, Step S300 also includes an early truncation process: Set the minimum sample threshold; Determine whether the number of samples in the current sample set is lower than the minimum sample threshold; if the number of samples is lower than the minimum sample threshold, then force the maximum likelihood estimation optimization of the hyperparameters. If the number of samples is greater than or equal to the minimum sample threshold, the current trust domain side length is compared with the previous trust domain side length, and a decision is made on whether to perform the hyperparameter maximum likelihood estimation optimization based on the comparison result.

5. The EDA design parameter optimization and analysis method based on Bayesian optimization according to claim 1, characterized in that, In step S400, the acquisition strategy adopted includes the expected improvement strategy or the trust domain strategy. When the desired improvement strategy is adopted, the desired improvement acquisition function is calculated in the global parameter space, and the candidate parameter point that maximizes the desired improvement is selected as the next candidate parameter point by combining the posterior mean and variance of the Gaussian process surrogate model. When the trust domain strategy is adopted, the acquisition function is calculated within a local hyperrectangular region defined by the side length of the current trust domain, and candidate parameter points are searched within the local hyperrectangular region as the next candidate parameter points.

6. The EDA design parameter optimization and analysis method based on Bayesian optimization according to claim 1, characterized in that, The trust domain parameters also include the maximum side length and the minimum side length; In step S500, the specific process of updating the trust domain edge length for the next iteration includes: If the candidate performance index value is better than the current optimal value, the consecutive success count is incremented by one, and the consecutive failure count is reset to zero; when the consecutive success count reaches the consecutive success threshold, the trust domain side length of the next iteration is expanded, and the expanded side length does not exceed the maximum side length. If the candidate performance index value is not better than the current optimal value, the number of consecutive failures is incremented by one, and the number of consecutive successes is reset to zero; when the number of consecutive failures reaches the consecutive failure threshold, the trust domain side length of the next iteration is shrunk, and the shrunk side length is not lower than the minimum side length. If the number of consecutive successes does not reach the consecutive success threshold and the number of consecutive failures does not reach the consecutive failure threshold, then the trust domain side length in the next iteration remains equal to the current trust domain side length.

7. The EDA design parameter optimization and analysis method based on Bayesian optimization according to claim 6, characterized in that, In step S600, the convergence condition includes any one of the following: The number of iterations has reached the set maximum number of iterations; The performance index value corresponding to the optimal combination of design parameters meets the set design requirement threshold. The current trust domain side length has shrunk to the minimum side length, and the performance index value has not been better than the current optimal value within a continuously set number of iterations.

8. The EDA design parameter optimization and analysis method based on Bayesian optimization according to claim 1, characterized in that, In step S700, the performance prediction and analysis of the design parameters includes any one or more of the following: Arbitrary parameter prediction: Receive the input combination of parameters to be queried, and predict the posterior mean and confidence interval of the performance index value corresponding to the combination of parameters to be queried through the posterior distribution of the Gaussian process surrogate model; Parameter sensitivity analysis: Perturbations are applied to each design parameter within a defined neighborhood of the optimal design parameter combination. The Gaussian process surrogate model is used to predict the response changes of the performance index values, and the sensitivity coefficients of each design parameter are calculated. Robustness analysis: Based on Monte Carlo simulation, design parameters are sampled within the parameter tolerance range. The sampled design parameters are input into the Gaussian process surrogate model to predict the corresponding performance index values. The distribution characteristics of the performance index values ​​are statistically analyzed to evaluate robustness.

9. A computer device, comprising a memory and a processor, characterized in that, The memory stores a computer program, and when the processor executes the computer program, it implements the EDA design parameter optimization and analysis method based on Bayesian optimization as described in any one of claims 1 to 8.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the Bayesian optimization-based EDA design parameter optimization and analysis method as described in any one of claims 1 to 8.