Voltage limiter and method of implementing the same

Abstract

According to a first aspect of the disclosure, there is provided a voltage limiter for use in a radio frequency identification (RFID) tag, the voltage limiter comprising: a first voltage line coupled to an output of a rectifier of the RFID tag, wherein the voltage limiter is configured to receive an output voltage of the rectifier on the first voltage line; a first shunt element comprising an input and an output, wherein the output of the first shunt element is coupled to ground; a second shunt element comprising an input and an output, wherein the input of the second shunt element is coupled to the first voltage line and the output of the second shunt element is coupled to the input of the first shunt element; a series regulating element comprising a first input, a second input and an output, wherein the first input of the series regulating element is coupled to the first voltage line and the output of the series regulating element is coupled to a supply voltage node of one or more circuits of the RFID tag; and a second voltage line coupled to the output of the second shunt element and the second input of the series regulating element.

Description

Technical Field

[0001] This disclosure relates to a pressure limiter. Furthermore, this disclosure relates to a corresponding method for implementing the pressure limiter. Background Technology

[0002] The backscatter power level of a Radio Frequency Identification (RFID) transponder (commonly referred to as an "RFID tag") is a crucial parameter for achieving stable communication between the transponder and the reader device. Therefore, the performance of an RFID tag is often evaluated based on this backscatter power level. Furthermore, requirements may be established to specify minimum values ​​for this backscatter power level. However, ensuring that RFID tags meet these requirements can be challenging. Summary of the Invention

[0003] According to a first aspect of this disclosure, a voltage limiter is provided for use in a radio frequency identification (RFID) tag, the voltage limiter comprising: a first voltage line coupled to the output of a rectifier of the RFID tag, wherein the voltage limiter is configured to receive the output voltage of the rectifier on the first voltage line; a first shunt element including an input and an output, wherein the output of the first shunt element is coupled to ground; a second shunt element including an input and an output, wherein the input of the second shunt element is coupled to the first voltage line, and the output of the second shunt element is coupled to the input of the first shunt element; a series regulating element including a first input, a second input, and an output, wherein the first input of the series regulating element is coupled to the first voltage line, and the output of the series regulating element is coupled to a power supply voltage node of one or more circuits of the RFID tag; and a second voltage line coupled to the output of the second shunt element and the second input of the series regulating element.

[0004] In one or more embodiments, the voltage limiter further includes a biasing element coupled between the first voltage line and the second voltage line, wherein the biasing element is configured to provide a bias current to the second voltage line.

[0005] In one or more embodiments, the biasing element is implemented as a current mirror, a current source, or a resistor.

[0006] In one or more embodiments, when the RFID tag operates in a predefined mode, the second shunt element, the series regulating element, and / or the bias element are configured to be bypassed.

[0007] In one or more embodiments, the bias current is designed to be greater than the intrinsic bias current of the first shunt element.

[0008] In one or more embodiments, the first shunt element and the second shunt element are implemented as diodes.

[0009] In one or more embodiments, the second shunt element is implemented as a pn junction diode or as a metal-oxide-semiconductor (MOS) transistor configured as a diode.

[0010] In one or more embodiments, the series modulation element is implemented as an N-channel metal-oxide-semiconductor (NMOS) transistor.

[0011] In one or more embodiments, the voltage limiter further includes one or more power supply buffer capacitors coupled to the first voltage line, the second voltage line, and / or the power supply voltage node.

[0012] In one or more embodiments, the RFID tag includes a pressure limiter of the type described.

[0013] According to a second aspect of this disclosure, a method for implementing a voltage limiter in a radio frequency identification (RFID) tag is contemplated, the method comprising: providing a first voltage line to the voltage limiter, the first voltage line being coupled to an output of a rectifier of the RFID tag, wherein the voltage limiter is configured to receive an output voltage of the rectifier on the first voltage line; providing a first shunt element to the voltage limiter, the first shunt element including an input and an output, wherein the output of the first shunt element is coupled to ground; providing a second shunt element to the voltage limiter, the second shunt element including an input and an output, wherein the input of the second shunt element is coupled to the first voltage line, and the output of the second shunt element is coupled to the input of the first shunt element; providing a series regulating element to the voltage limiter, the series regulating element including a first input, a second input, and an output, wherein the first input of the series regulating element is coupled to the first voltage line, and the output of the series regulating element is coupled to a power supply voltage node of one or more circuits of the RFID tag; and providing a second voltage line to the voltage limiter, the second voltage line being coupled to the output of the second shunt element and the second input of the series regulating element.

[0014] In one or more embodiments, the method further includes providing a bias element to the voltage limiter, the bias element being coupled between the first voltage line and the second voltage line, wherein the bias element is configured to provide a bias current to the second voltage line.

[0015] In one or more embodiments, the method further includes implementing the biasing element as a current mirror, a current source, or a resistor.

[0016] In one or more embodiments, when the RFID tag operates in a predefined mode, the second shunt element, the series regulating element, and / or the bias element are configured to be bypassed.

[0017] In one or more embodiments, the method further includes implementing the first shunt element and the second shunt element as diodes. Attached Figure Description

[0018] The embodiments will be described in more detail with reference to the accompanying drawings.

[0019] Figure 1 The relationship between the normalized input resistance and the normalized tag forward power (POTF) of the RFID tag integrated circuit (IC) is shown.

[0020] Figure 2 The relationship between normalized tag reverse power (POTR) and normalized POTF is shown.

[0021] Figure 3 An example of a radio frequency identification (RFID) front end for an RFID tag IC is shown.

[0022] Figure 4 An example of voltage limiting implementation in an RFID front end is shown.

[0023] Figure 5 An illustrative embodiment of voltage limiting implementation in an RFID front end is shown.

[0024] Figure 6 An illustrative embodiment of a method for implementing a pressure limiter in an RFID tag is shown.

[0025] Figure 7 Another illustrative embodiment of voltage limiting implementation in an RFID front end is shown.

[0026] Figure 8 The relationship between different voltages within the voltage limiter and the output current of the RF charge pump is shown. Detailed Implementation

[0027] Figure 1 The relationship between the input resistance of an RFID tag integrated circuit (IC) and the tag forward power (POTF) is shown 100. Specifically, the backscatter power level of an ultra-high frequency (UHF) RFID tag can be referred to as the tag reverse power (POTR). This parameter has a significant impact on the communication stability between the RFID tag and the reader device. Therefore, the performance of RFID tags is often evaluated based on POTR, and certain requirements may be established to specify the minimum value of POTR at a specific level of POTF. Figure 1The equivalent parallel input resistance (R) of the UHF RFID tag IC is shown. P The power level decreases significantly as the received power level corresponding to the POTF increases above the minimum required operating power level of the tag, POTF0. More specifically, Figure 1 The normalized R is shown P The relationship with the normalized POTF. It can be seen that the increase in the maximum voltage vcp (i.e., the increase in the maximum voltage output of the RFID tag's charge pump) equal to or greater than V1 produces an increase in R at the increased level of POTF. P .

[0028] Figure 2 The relationship between normalized tag reverse power (POTR) and POTF is shown in Figure 200. As curve 202 shows, due to R... P As POTF increases, POTR decreases relative to POTF. The R of the RFID tag IC changes. P The reduction is caused on the one hand by the nonlinear behavior of the rectifier (more specifically, by the RF charge pump), which provides the internal power supply to the RFID tag IC based on the received reader signal, and on the other hand by the necessary limitation of the internal supply voltage level to prevent overvoltage conditions at the circuit elements of the RFID tag IC. As shown in curve 204, increasing the maximum charge pump output voltage vcp enables an increase in POTR at the elevated POTF level. However, increasing the maximum charge pump output voltage to enhance the backscatter power level of the RFID tag IC while maintaining the internal supply voltage of the RFID tag IC within the safe operating range at the elevated receive power level can be difficult.

[0029] Figure 3An example of an RFID front-end 300 for an RFID tag IC is shown. The RFID front-end 300 includes a first antenna terminal 302, a second antenna terminal 304, an electrostatic discharge (ESD) protection block 306, a radio frequency (RF) limiter 308, an antenna tuning block 310, a modulator 312, a demodulator 314, an RF charge pump 316, a voltage limiter 318, and a power supply voltage node 320 for the RFID tag circuitry (i.e., one or more functional circuits of the RFID tag IC). The RF charge pump 316 is configured to rectify and convert the RF voltage received from the antenna through the antenna terminals 302 and 304, and to provide a DC power supply voltage to the core circuitry of the chip (not shown) (i.e., the tag IC) (e.g., the digital portion of the tag IC and the non-volatile memory). The modulator 312 is configured to modulate the input impedance to modulate the signal scattered back from the antenna to transmit information to an external RFID reader (not shown). Furthermore, the demodulator 314 is configured to demodulate the amplitude-modulated signal transmitted by the reader. Antenna tuning block 310 is configured to tune the chip input capacitor to maximize power transfer from the antenna to the chip input. ESD protection block 306 is typically implemented using anti-parallel pn junction diodes. RF limiter 308 is configured to limit the RF voltage amplitude at antenna terminals 302, 304 under high received power levels on the connected antenna. Furthermore, voltage limiter 318 is configured to limit the output voltage (i.e., voltage vcp) of the RF charge pump to prevent degradation or damage to the connected core circuitry due to overvoltage. While voltage limiter 318 effectively protects the connected core circuitry, it may also result in insufficient backscatter power levels.

[0030] Figure 4 An example of a voltage limiting implementation 400 in an RFID front end is shown. In this typical implementation, voltage limiter 404 includes a parallel regulator 406 configured to limit the output voltage vcp, i.e., the output voltage of the RF charge pump 402. In most cases, the output voltage vcp corresponds to the supply voltage vdd of the core circuitry of the tag IC at supply voltage node 410. The supply voltage vdd should be kept below the maximum rated voltage of the circuitry used to prevent damage and avoid circuit reliability risks. Other series regulators (not shown) may be present to provide additional regulated supply voltage below voltage vdd for specific circuit sections (e.g., the digital section of the tag IC). Furthermore, a power supply buffer capacitor 408 connected to the voltage line where voltage vcp is present temporarily supplies power to the core circuitry of the tag IC during short periods when the signals received at RF1 and RF2 drop to low levels. For example, this can occur during modulation pauses in the communication cycle between the tag and the reader device. As mentioned above, while voltage limiter 404 effectively protects the connected core circuitry, it may also result in insufficient backscatter power levels.

[0031] This paper discusses voltage limiters used in RFID tags and corresponding methods for implementing voltage limiters, which facilitates an increase in the backscatter power level of the RFID tag while maintaining the internal power supply voltage of the RFID tag within a safe operating range under the increased receive power level.

[0032] Figure 5An illustrative embodiment of a voltage limiting implementation 500 in an RFID front end is shown. The voltage limiting implementation 500 includes a currently disclosed voltage limiter 504 coupled to the output of a rectifier (more specifically, an RF charge pump 502). Specifically, the voltage limiter 504 includes a first voltage line 514 coupled to the output of the charge pump 502, wherein the voltage limiter 504 is configured to receive the output voltage of the charge pump 502 on the first voltage line 514. Furthermore, the voltage limiter 504 includes a first shunt element 506, which includes an input and an output, wherein the output of the first shunt element 506 is coupled to ground. Additionally, the voltage limiter 504 includes a second shunt element 508, which includes an input and an output, wherein the input of the second shunt element 508 is coupled to the first voltage line 514, and the output of the second shunt element 508 is coupled to the input of the first shunt element 506. Furthermore, voltage limiter 504 includes a series regulating element 510, which includes a first input, a second input, and an output. The first input of series regulating element 510 is coupled to a first voltage line 514, and the output of series regulating element 510 is coupled to a power supply voltage node 518 of one or more circuits (not shown) of the RFID tag. Therefore, series regulating element 510 is a regulating element coupled in series between RF charge pump 502 and power supply voltage node 518. Additionally, voltage limiter 504 includes a second voltage line 516, which is coupled to the output of second shunt element 508 and the second input of series regulating element 510. Furthermore, voltage limiter 504 includes a bias element 512 coupled between the first voltage line 514 and the second voltage line 516, wherein the bias element 512 is configured to provide a bias current to the second voltage line 516. By adding a second shunt element 508 and a series regulating element 510, the backscatter power level of the RFID tag can be increased while maintaining the internal supply voltage of the RFID tag within a safe operating range under elevated receive power levels. Specifically, the backscatter power level of the RFID tag can be increased due to the increased maximum output voltage of the tag IC's internal rectifier (i.e., charge pump 502) caused by the second shunt element 508. Simultaneously, the series regulating element 510 maintains the internal supply voltage at the supply voltage node 518 within a safe operating range by limiting the maximum occurrence voltage at this node. It should be noted that the bias element 512 is an optional component of the voltage limiter 504. For example, the RFID tag IC can sense the receive power level and, depending on the power level, only turn on the second shunt element 508 and / or the series regulating element 510. The optional bias element 512 helps ensure that the voltage at the second voltage line 516, and thus the voltage at the supply voltage node 518, is substantially equal to the voltage at the first voltage line 514 under low receive power levels.Therefore, the second shunt element 508 and the series regulating element 510 advantageously do not increase internal power consumption at low receive power levels and do not negatively affect the performance of the RFID tag IC.

[0033] In one or more embodiments, the bias element 512 is implemented as a current mirror, current source, or resistor. This provides a practical implementation of the bias element 512 with relatively low complexity and low layout area cost. In one or more embodiments, the second shunt element 508, series regulating element 510, and / or bias element 512 are configured to be bypassed when the RFID tag operates in a predefined mode. This allows the RFID tag IC to be flexibly configured such that the second shunt element 508, series regulating element 510, and bias element 512 may be active or inactive, for example, during the transmission, reception, or power-on phases of the RFID tag IC. Furthermore, in one or more embodiments, the first shunt element 506 and the second shunt element 508 are implemented as diodes. This provides a practical implementation of the first shunt element 506 and the second shunt element 508 with relatively low complexity and low layout area cost. Furthermore, in one or more embodiments, the second shunt element 508 is implemented as a pn junction diode or as a metal-oxide-semiconductor (MOS) transistor configured as a diode. In this way, a practical implementation of the second shunt element 508 is achieved, which has relatively low complexity and low layout area cost. Furthermore, in one or more embodiments, the series regulating element 510 is implemented as an N-channel metal-oxide-semiconductor (NMOS) transistor. In this way, a practical implementation of the series regulating element 510 is achieved, which has relatively low complexity and low layout area cost. In one or more embodiments, the voltage limiter 504 further includes one or more power supply buffer capacitors 520, 522 coupled to the first voltage line 514, the second voltage line 516, and / or the power supply voltage node 518. In this way, power can be temporarily supplied to the core circuitry of the RFID tag if the amplitude of the received signal drops below a threshold during operation (e.g., during the reception of an amplitude-modulated signal from an RFID reader or during backscatter modulation via the RFID tag IC to transmit data to the RFID reader). For example, the first shunt element 506, the second shunt element 508, the bias element 512, and / or the series regulating element 510 may share associated sub-circuitries, such as reference voltage generation or reference current generation circuitry.

[0034] More specifically, Figure 5The voltage limiter 504 shown can operate as follows: A first shunt element 506 limits the voltage injected into node vsh at the rising current level (i.e., on the second voltage line 516) to a defined value by conducting current from node vsh to ground. A second shunt element 508, connected between the RF charge pump output vcp (i.e., the first voltage line 514) and vsh, limits the voltage between vcp and vsh at the rising RF charge pump output current by conducting current from vcp to vsh or from vcp to ground, or alternatively, limits the voltage between vcp and ground. It should be noted that the first shunt element 506 and the second shunt element 508 can be implemented by a basic device such as a diode, or alternatively, implemented as a more complex circuit including multiple devices. A bias element 512 provides a bias current Ib to node vsh. The level of Ib can be proportional to the differential voltage between vcp and vsh. Furthermore, when the voltage between vcp and vsh exceeds a predefined threshold voltage, the bias current Ib can approach a predefined constant value. It should be noted that the bias element 512 can be implemented using a basic device such as a resistor, or alternatively, implemented as a more complex circuit including multiple devices. The bias current Ib is designed to be greater than the intrinsic bias current of the first shunt element 506 to ensure that the voltage at node vsh is close to the voltage at node vcp at a low receive power level corresponding to a low level of RF charge pump output current and voltage. The voltage between vcp and vsh increases rapidly with the rising RF charge pump output current due to the limited bias current Ib until the second shunt element becomes active, thereby limiting the voltage between vcp and vsh. A series regulating element 510 connected between vcp and vdd receives the voltage at vsh as a reference voltage. The series regulating element 510 regulates the voltage at node vdd by adjusting the series impedance between nodes vcp and vdd with reference to vsh. It should be noted that the series regulating element 510 can be implemented using a basic device such as an NMOS transistor, or alternatively, implemented as a more complex circuit including multiple devices. The second shunt element 508, bias element 512, and / or series regulating element 510 can be configured to be in a bypass state in certain modes of the RFID tag IC, for example, by closing a switching element connected between vcp and vsh, between vcp and vdd, and / or between vsh and vdd. For example, vcp and vsh, and vcp and vdd, can be connected via a switch during the power-up phase of the RFID tag IC, in the test mode of the RFID tag IC, or in response to a command received by the RFID tag IC. The bypass state of the second shunt element 508, bias element 512, and / or series regulating element 510 can be deactivated in certain modes of the RFID tag IC (e.g., in a transmission mode where data is transmitted to an RFID reader).In addition, the bypass state can be controlled based on the received power level or, more precisely, based on a voltage or current signal proportional to the received power level of the RFID tag IC.

[0035] Figure 6 An illustrative embodiment of a method 600 for manufacturing a voltage limiter for use in an RFID tag is shown. Method 600 includes the following steps: At step 602, a first voltage line is provided to the voltage limiter, the first voltage line being coupled to the output of a charge pump of the RFID tag, wherein the voltage limiter is configured to receive the output voltage of the charge pump on the first voltage line. At step 604, a first shunt element is provided to the voltage limiter, the first shunt element including an input and an output, wherein the output of the first shunt element is coupled to ground. Furthermore, at step 606, a second shunt element is provided to the voltage limiter, the second shunt element including an input and an output, wherein the input of the second shunt element is coupled to the first voltage line, and the output of the second shunt element is coupled to the input of the first shunt element. Furthermore, at step 608, a series regulating element is provided to the voltage limiter, the series regulating element including a first input, a second input, and an output, wherein the first input of the series regulating element is coupled to the first voltage line, and the output of the series regulating element is coupled to a power supply voltage node of one or more circuits of the RFID tag. Furthermore, at step 610, a second voltage line is provided to the voltage limiter, the second voltage line being coupled to the output of the second shunt element and the second input of the series regulating element. (Refer to the above text.) Figure 5 As mentioned in the corresponding voltage limiter shown, by adding a second shunt element and a series regulating element, the backscatter power level of the RFID tag can be increased, while maintaining the internal power supply voltage of the RFID tag within the safe operating range under the increased receive power level.

[0036] Figure 7 Another illustrative embodiment of a voltage limiting implementation 700 in an RFID front end is shown. The voltage limiting implementation 700 includes a voltage limiter 704 of the illustrated type, coupled to the output of an RF charge pump 702. The voltage limiter 704 includes a first shunt element implemented as a parallel regulator 706 and a second shunt element implemented as a diode 708. Specifically, the diode 708 is connected in series with the parallel regulator 706 between the RF charge pump output vcp (i.e., the first voltage line 714) and ground. The parallel regulator 706 limits the voltage at node vsh (i.e., the second voltage line 716) to a predefined value vsh. maxA bias current 712 is provided between vcp and vsh, bypassing diode 708. Furthermore, transistor 710 (more specifically, an NMOS device) is connected between vcp and the internal power supply rail vdd (i.e., supply voltage node 718) of the RFID tag IC. Note that the gate of transistor 710 is connected to vsh. Transistor 710 thus acts as a series regulating element, limiting the maximum voltage at vdd to vsh. max Subtract the gate-source voltage V of transistor 710 GS, M1 The bias current 712 can be implemented in the actual circuit, for example, through a PMOS current mirror that receives the reference bias current or through a resistor. Alternatively, an extremely low or negative threshold voltage V is shown. th Depletion-type NMOS devices or those exhibiting near-zero V th or positive V th The depletion-mode PMOS device can be used to provide the bias current 712. In typical CMOS technology used in RFID tag ICs, the so-called intrinsic or zero V has the characteristics described above. th The device is available. Diode 708 can be implemented in an actual circuit as a pn junction diode or a MOS transistor configured as a diode. In some embodiments, diode 708 can be functionally implemented by a more complex circuit including multiple circuit elements. Series regulating transistor 710 can be implemented via intrinsic or zero V. th The device is implemented in a practical circuit. In this case, considering VDD... max =vsh max - V GS, M1 , corresponding to vdd max The maximum voltage at vdd is approximately equal to vsh. max It should be noted that V GS, M1 This can be, for example, within a range of + / - 10 mV. Additionally, voltage limiter 704 includes optional power supply buffer capacitors 720 and 722 connected to nodes vcp and vdd. Voltage limiter 704 may include an additional power supply buffer capacitor (not shown) connected to node vsh.

[0037] Figure 8 The relationship between different voltages 800 within the voltage limiter and the output current of the RF charge pump is shown. Specifically, Figure 8 It shows Figure 7The diagram illustrates how the voltages 806 at node vsh, 802 at node vcp, and 804 at node vdd of the voltage limiter behave with changes in the output current of the RF charge pump. It can be seen that when the output current exceeds the load current idd at node vdd and potentially exceeds the intrinsic bias current of the parallel regulator, the voltage 802 at node vcp increases sharply. During this operating region, the voltages 806 and 804 at node vdd closely follow vcp. As the current increases further, the voltage 806 at node vsh approaches the constant level vsh defined by the parallel regulator. max The voltage at node vdd, 804, follows vsh and stabilizes at vsh. max and series regulating elements (i.e., Figure 7 The constant level Vdd is defined by transistor 710 in the transistor. max When the RF charge pump current exceeds the bias current level Ib plus idd, the voltage 802 at node vcp increases further. In this embodiment, the bias current Ib is designed to be greater than the intrinsic bias current that may exist in the parallel regulator. As the gradually increasing RF charge pump output current approaches the level of the second shunt element (i.e., Figure 7 The maximum voltage level VCP is defined by the diode 708 in the diagram. max At that time, the characteristics of VCP eventually flatten out.

[0038] It should be noted that the above embodiments have been described with reference to different subjects. Specifically, some embodiments may have been described with reference to method-type technical solutions, while others may have been described with reference to device-type technical solutions. However, those skilled in the art will understand from the foregoing that, unless otherwise stated, any combination of features related to different subjects, specifically combinations of features of method-type technical solutions and features of device-type technical solutions, are also considered to be disclosed together with this document, except for any combination of features belonging to one type of subject matter.

[0039] Additionally, it should be noted that the drawings are illustrative. Similar or identical elements have the same reference numerals in different drawings. Furthermore, it should be noted that, in order to provide a concise description of illustrative embodiments, implementation details that are customary to those skilled in the art may not be described. It should be understood that in the development of any such implementation, as in any engineering or design project, numerous implementation-specific decisions must be made to achieve the developer's specific objectives, such as complying with system-related and business-related constraints, which may differ in different implementations. Furthermore, it should be understood that such development work can be complex and time-consuming, but is merely a routine task for those skilled in the art in designing, manufacturing, and producing.

[0040] Finally, it should be noted that those skilled in the art should be able to devise numerous alternative embodiments without departing from the scope of the appended claims. Any reference numerals placed between parentheses in the claims should not be construed as limiting the scope of the technical solutions. The word "comprise(s) / comprising" does not exclude the presence of elements or steps other than those listed in the technical solution. The word "a / an" preceding an element does not exclude the presence of a plurality of such elements. The measures described in the claims can be implemented by means of hardware comprising several different elements and / or by means of a suitably programmed processor. In a device technical solution listing several components, several of these components may be embodied by the same item of hardware. The fact that certain measures are described in mutually different subsidiary technical solutions does not indicate that combinations of these measures cannot be advantageously used.

[0041] List of reference numerals

[0042] Relationship between 100 normalized input resistance and normalized tag forward power (POTF)

[0043] The maximum voltage (VCP) output by the 102 charge pump at the first level.

[0044] 104 is at the second level of maximum VCP

[0045] Relationship between 200 Normalized Tag Reverse Power (POTR) and Normalized Tag Forward Power (POTF)

[0046] 202 is at the maximum VCP of the first level

[0047] 204 is at the second level of maximum VCP

[0048] 300 Radio Frequency Identification (RFID) Front End

[0049] 302 First Antenna Terminal

[0050] 304 Day 2 Line End

[0051] 306 Electrostatic Discharge (ESD) Protection

[0052] 308 Radio Frequency (RF) Limiter

[0053] 310 antenna tuning

[0054] 312 modulator

[0055] 314 demodulator

[0056] 316RF charge pump

[0057] 318 voltage limiter

[0058] 320 RFID tag circuit power supply voltage node

[0059] Voltage limiting implementation in 400RFID front end

[0060] 402RF charge pump

[0061] 404 pressure limiter

[0062] 406 Parallel Regulator

[0063] 408 power supply buffer capacitor

[0064] 410 RFID tag circuit power supply voltage node

[0065] Voltage limiting implementation in 500 RFID front end

[0066] 502RF charge pump

[0067] 504 pressure limiter

[0068] 506 First Shunt Element

[0069] 508 Second Shunt Component

[0070] 510 series regulating element

[0071] 512 bias element

[0072] 514 First Voltage Line

[0073] 516 Second Voltage Line

[0074] 518 RFID tag circuit power supply voltage node

[0075] 520 power supply buffer capacitor

[0076] 522 power supply buffer capacitor

[0077] 600 Method for implementing a pressure limiter

[0078] 602 provides a first voltage line to the voltage limiter, the first voltage line being coupled to the output of the charge pump of the RFID tag, wherein the voltage limiter is configured to receive the output voltage of the charge pump on the first voltage line.

[0079] 604 provides a first shunt element to the voltage limiter, the first shunt element including an input and an output, wherein the output of the first shunt element is coupled to ground.

[0080] 606 provides a second shunt element to the voltage limiter, the second shunt element including an input and an output, wherein the input of the second shunt element is coupled to the first voltage line, and the output of the second shunt element is coupled to the input of the first shunt element.

[0081] 608 provides a series regulating element to the voltage limiter, the series regulating element including a first input, a second input, and an output, wherein the first input of the series regulating element is coupled to the first voltage line, and the output of the series regulating element is coupled to a power supply voltage node of one or more circuits of the RFID tag.

[0082] 610 provides a second voltage line to the voltage limiter, the second voltage line being coupled to the output of the second shunt element and the second input of the series regulating element.

[0083] Voltage limiting implementation in 700 RFID front end

[0084] 702RF charge pump

[0085] 704 pressure limiter

[0086] 706 Parallel Regulator

[0087] 708 diode

[0088] 710 series regulated transistor

[0089] 712 bias current

[0090] 714 First Voltage Line

[0091] 716 Second Voltage Line

[0092] 718 RFID tag circuit power supply voltage node

[0093] 720 power supply buffer capacitor

[0094] 722 power supply buffer capacitor

[0095] Relationship between voltage in the 800 voltage limiter and output current of the RF charge pump

[0096] Voltage (VCP) on the first voltage line of 802

[0097] Voltage (Vdd) at the 804 power supply node

[0098] The voltage (vsh) on the second voltage line of 806.

Claims

1. A voltage limiter for use in radio frequency identification (RFID) tags, characterized in that, The pressure limiter includes: A first voltage line is coupled to the output of the rectifier of the RFID tag, wherein the voltage limiter is configured to receive the output voltage of the rectifier on the first voltage line; A first shunt element includes an input and an output, wherein the output of the first shunt element is coupled to ground; A second shunt element includes an input and an output, wherein the input of the second shunt element is coupled to the first voltage line, and the output of the second shunt element is coupled to the input of the first shunt element; A series regulating element includes a first input, a second input, and an output, wherein the first input of the series regulating element is coupled to a first voltage line, and the output of the series regulating element is coupled to a power supply voltage node of one or more circuits of the RFID tag; and A second voltage line is coupled to the output of the second shunt element and the second input of the series regulating element.

2. The pressure limiter according to claim 1, characterized in that, It further includes a biasing element coupled between the first voltage line and the second voltage line, wherein the biasing element is configured to provide a bias current to the second voltage line.

3. The pressure limiter according to claim 2, characterized in that, The biasing element is implemented as a current mirror, a current source, or a resistor.

4. The pressure limiter according to claim 2 or 3, characterized in that, When the RFID tag operates in a predefined mode, the second shunt element, the series regulating element, and / or the bias element are configured to be bypassed.

5. The pressure limiter according to any one of claims 2 to 4, characterized in that, The bias current is designed to be greater than the intrinsic bias current of the first shunt element.

6. The pressure limiter according to any one of the preceding claims, characterized in that, The first shunt element and the second shunt element are implemented as diodes.

7. The pressure limiter according to any one of the preceding claims, characterized in that, The second shunt element is implemented as a pn junction diode or as a metal-oxide-semiconductor MOS transistor configured as a diode.

8. The pressure limiter according to any one of the preceding claims, characterized in that, It further includes one or more power supply buffer capacitors coupled to the first voltage line, the second voltage line and / or the power supply voltage node.

9. An RFID tag, characterized in that, Includes the pressure limiter according to any of the preceding claims.

10. A method for implementing a voltage limiter in a radio frequency identification (RFID) tag, characterized in that, The method includes: A first voltage line is provided to the voltage limiter, the first voltage line being coupled to the output of the rectifier of the RFID tag, wherein the voltage limiter is configured to receive the output voltage of the rectifier on the first voltage line; A first shunt element is provided to the voltage limiter, the first shunt element including an input and an output, wherein the output of the first shunt element is coupled to ground; A second shunt element is provided to the voltage limiter, the second shunt element including an input and an output, wherein the input of the second shunt element is coupled to the first voltage line, and the output of the second shunt element is coupled to the input of the first shunt element; A series regulating element is provided to the voltage limiter, the series regulating element including a first input, a second input, and an output, wherein the first input of the series regulating element is coupled to the first voltage line, and the output of the series regulating element is coupled to a power supply voltage node of one or more circuits of the RFID tag; and A second voltage line is provided to the voltage limiter, the second voltage line being coupled to the output of the second shunt element and the second input of the series regulating element.

Images