Pixel, display device including the pixel, and electronic device including the display device

Abstract

Embodiments of the present disclosure provide a pixel, a display apparatus including the pixel, and an electronic apparatus including the display apparatus. The display apparatus includes a pixel array having a plurality of pixels and a bias circuit configured to transmit a plurality of bias voltages to the pixels. Each of the pixels includes a micro light emitting diode (LED), a driving circuit including at least one current source transistor configured to provide a driving current to the micro LED based on the bias voltage, a control circuit including a plurality of memory devices configured to generate a pulse width modulation (PWM) signal, and a control transistor configured to provide a voltage to the driving circuit in response to the PWM signal. The separation of the control circuit and the current source transistor enables reduction of the use of high voltage transistors and improvement of pixel integration.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2025-0052650, filed on April 22, 2025, with the Korean Intellectual Property Office, and Korean Patent Application No. 10-2025-0144180, filed on October 1, 2025, with the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference. Technical Field

[0003] The embodiments of this disclosure described herein relate to pixels including micro light-emitting diodes (LEDs), display devices including such pixels, and electronic devices including such display devices. Background Technology

[0004] Today, display devices require high resolution, low power consumption, and improved image quality. Various display technologies are being developed to meet these requirements. Among display technologies, micro-LED technology is attracting attention due to its advantages such as high brightness, fast response speed, and excellent reliability.

[0005] Various technical challenges exist in achieving precise pixel integration at high resolution. For example, highly integrated micro-LED pixel structures and driving technologies are needed for small-sized display devices such as augmented reality (AR) glasses. Summary of the Invention

[0006] Embodiments of this disclosure provide a micro LED pixel capable of improving the integration of pixel driving elements, a display device including the micro LED pixel, and an electronic device including the display device.

[0007] According to an embodiment, a pixel may include: a micro-LED that receives a drive current; a drive circuit that includes at least one current source transistor that provides drive current to the micro-LED based on a plurality of bias voltages; a control circuit that includes a plurality of memory devices and outputs a PWM signal; and a control transistor that supplies a power supply voltage to the drive circuit based on the PWM signal input to the gate terminal of the control transistor.

[0008] According to an embodiment, the display device may include a pixel array in which a plurality of pixels are arranged, and a bias circuit that sends a plurality of bias voltages to each of the plurality of pixels. Each of the plurality of pixels may include: a miniature light-emitting diode (LED) that receives a drive current; a drive circuit that includes at least one current source transistor that provides a drive current to the miniature LED based on the plurality of bias voltages; a control circuit that includes a plurality of memory devices and outputs a pulse width modulation (PWM) signal; and a control transistor that supplies a power supply voltage to the drive circuit based on the PWM signal input to the gate terminal of the control transistor.

[0009] According to an embodiment, an electronic device may include: a display device comprising a pixel array in which a plurality of pixels are arranged; and a processor that transmits image data to the display device and controls the display device. Each of the plurality of pixels may include: a micro-LED that receives a drive current; a drive circuit that includes at least one current source transistor that provides a drive current to the micro-LED based on a plurality of bias voltages; a control circuit that includes a plurality of memory devices and outputs a pulse width modulation (PWM) signal; and a control transistor that supplies a power supply voltage to the drive circuit based on the PWM signal input to the gate terminal of the control transistor. Attached Figure Description

[0010] The above and other objects and features of this disclosure will become apparent from the detailed description of embodiments thereof with reference to the accompanying drawings.

[0011] Figure 1 This is a block diagram illustrating a display device according to one or more embodiments of the present disclosure.

[0012] Figure 2 It is a diagram depicting pixels according to one or more embodiments of the present disclosure.

[0013] Figure 3 This is a diagram depicting pixels according to an embodiment of an available alternative technology.

[0014] Figure 4 This is a diagram illustrating a control circuit for a pixel according to one or more embodiments of the present disclosure.

[0015] Figure 5 It is a timing diagram used to describe the operation of pixels according to one or more embodiments of the present disclosure.

[0016] Figure 6 This is a diagram illustrating a driving circuit for a pixel according to one or more embodiments of the present disclosure.

[0017] Figure 7 This is a diagram illustrating a bias circuit according to one or more embodiments of the present disclosure.

[0018] Figure 8 This is a diagram illustrating a driving circuit for a pixel according to one or more embodiments of the present disclosure.

[0019] Figure 9 It is a description based on Figure 8 A diagram of the selection circuit for the drive circuit in an embodiment.

[0020] Figure 10 This is a diagram illustrating a bias circuit according to one or more embodiments of the present disclosure.

[0021] Figure 11 This is a block diagram describing the configuration of an electronic device according to one or more embodiments of the present disclosure.

[0022] Figure 12 This is a diagram illustrating a display device according to one or more embodiments of the present disclosure. Detailed Implementation

[0023] The embodiments of this disclosure will now be described in detail and clearly so that those skilled in the art can readily implement this disclosure.

[0024] Figure 1 This is a block diagram illustrating a display device according to one or more embodiments of the present disclosure.

[0025] Reference Figure 1 The display device 10 may include a pixel array 100 and a pixel driving unit 200.

[0026] The pixel array 100 can display an image in response to a data signal received from the data driver 230 via the data line DL and a scan signal received from the scan driver 220 via the row line RL.

[0027] Pixel array 100 may include a plurality of pixels PX connected to row lines RL and data lines DL. In an embodiment, Figure 1 Nine pixels PX are shown, but the display device 10 according to embodiments of the present disclosure is not limited thereto. For example, the display device 10 according to embodiments of the present disclosure may include pixels PX, the number of which may be less than or greater than nine.

[0028] Pixels PX can be selected horizontally in response to a scan signal supplied to any of the row lines RL. Each of the pixels PX selected by the scan signal can receive a data signal from the data line DL connected to it. Each pixel PX receiving a data signal can emit light with a given brightness corresponding to the data signal. The data signal can be capable of displaying 1 to 1000 pixels. A range of n-bit digital image signals. Each pixel PX can emit light of a single color. For example, each pixel PX can output a light signal of one of the following: red, blue, green, and white. Each pixel PX can also output a light signal of a color different from the colors mentioned above.

[0029] Pixels PX can be located in pixel array 100 in a preset pattern (e.g., in various patterns such as diamond pattern, matrix pattern and zigzag pattern).

[0030] Each pixel (PX) may include a light-emitting element. The light-emitting element may be an LED, and for example, a micro-LED. The light-emitting element may be an LED with dimensions of a few micrometers or tens of micrometers. Alternatively, the light-emitting element may be a nanometer-sized LED. The light-emitting element may emit light with a single peak wavelength or may emit light with multiple peak wavelengths. The light-emitting element may be controlled based on a pulse width modulation (PWM) signal.

[0031] Each of the pixels (PX) may also include pixel circuitry connected to the light-emitting element. The pixel circuitry may include at least one transistor and / or at least one memory device. The pixel circuitry may be implemented on a substrate in a semiconductor stack structure. For example, the substrate on which the light-emitting element is located and the substrate on which the pixel circuitry is located may be different substrates.

[0032] The pixel driving unit 200 can drive and control the pixel array 100. The pixel driving unit 200 may include a timing controller 210, a scan driver 220, a data driver 230, and a bias circuit 240. The data driver 230 can drive the pixel array 100 column by column. The scan driver 220 can drive the pixel array 100 row by row.

[0033] The timing controller 210 can receive image data, synchronization signals, and clock signals used to control the display of image data. The timing controller 210 can correct the image data received from the outside to suit the image display of the pixel array 100, and can send the corrected image data "DATA" to the data driver 230.

[0034] The timing controller 210 can output a data control signal DCS for controlling the operating timing of the data driver 230 and a scan control signal SCS for controlling the operating timing of the scan driver 220.

[0035] In an embodiment, timing controller 210 can generate a clock signal CLK to be provided to pixel PX, and can provide the clock signal CLK to scan driver 220. For example, timing controller 210 can generate a data clock D_CLK to be used for pixel PX to receive and store data, and a PWM clock P_CLK to output the stored data as a PWM signal, which will refer to... Figure 4 Describe it.

[0036] The scan driver 220 can sequentially send scan signals to the row lines RL in response to the scan control signal SCS of the timing controller 210. The scan signals can be used to select pixels PX electrically connected to each of the row lines RL.

[0037] The scan driver 220 can generate clock signals and control signals for driving and controlling the pixel array 100. The control signals for driving and controlling the pixel array 100 may include enable signals. For example, control signals may include a write enable signal WR_EN for activating the writing of data to the memory device of pixel PX, a clock selection signal CK_SEL for selecting the clock signal to be input to pixel PX, a PWM enable signal P_EN for activating the PWM signal, etc. Control signals can be sent to the pixel array 100 using row lines RL.

[0038] The data driver 230 can be electrically connected to the pixel PX via multiple data lines DL, and can transmit data signals to the pixel array 100 via the data lines DL. The data driver 230 can generate data signals (or data voltages) in response to a data control signal DCS, and can transmit the generated data signals to the pixel array 100 via the data lines DL during a horizontal period. The data driver 230 can receive frames of image data from an external device (e.g., a graphics processing unit), can extract grayscale values ​​from the received image data for each pixel PX, and can convert the extracted grayscale values ​​into digital data including bits, the number of bits being predetermined.

[0039] The data driver 230 can send converted digital data to each of the pixels PX column by column. In an embodiment, the data driver 230 can send digital data to each pixel PX in a preset order from the most significant bit (hereinafter referred to as "MSB") to the least significant bit (hereinafter referred to as "LSB"). The data driver 230 can send the bit values ​​of the digital data to each pixel PX for each frame.

[0040] The bias circuit 240 can send multiple bias voltages to each of the pixels PX via the bias line BL. The current source transistor of each pixel PX can provide drive current to the light-emitting element based on the multiple bias voltages.

[0041] In an embodiment, the bias circuit 240 may include a plurality of bias blocks BB1, BB2, and BB3. Each of the plurality of bias blocks BB1, BB2, and BB3 may provide a plurality of bias voltages to pixels in the pixel array 100 located in a corresponding row. For example, a first pixel and a second pixel located in the first row may receive a plurality of bias voltages from the first bias block BB1 corresponding to the first row through the same line.

[0042] The components of the pixel driving unit 200 can be implemented as independent integrated circuit chips or as a single integrated circuit chip. The components of the pixel driving unit 200 can be implemented together on the substrate where the pixel array 100 is located; alternatively, the components of the pixel driving unit 200 can be implemented in an independent integrated circuit chip and then electrically connected to the substrate where the pixel array 100 is located. According to an embodiment, some components of the pixel driving unit 200 can be implemented together on the substrate where the pixel array 100 is located, and the remaining components can be implemented in an integrated circuit chip independent of the substrate where the pixel array 100 is located.

[0043] Each of the pixels PXs according to one or more embodiments of this disclosure may include: a driving circuit that outputs a driving current based on a bias voltage received from a bias circuit located outside the pixel; in each of the pixels PXs, a control circuit that outputs a PWM signal may be separated from the light-emitting element. With the above-described structure of the pixel circuit, the number of transistors requiring high operating voltages in the pixel PX can be reduced or not increased. Therefore, even if the number of transistors in the pixel PX increases, the active area of ​​the pixel PX can be reduced or not increased. (Refer to...) Figure 2 This will be described in detail.

[0044] Figure 2 This is a diagram illustrating a pixel PX according to one or more embodiments of the present disclosure.

[0045] A display device according to one or more embodiments of the present disclosure may include pixels PX comprising micro-LEDs. In each of the pixels PX, a control circuit 110 that outputs a PWM signal for controlling light emission may be electrically connected to the micro-LED via a drive circuit 130 including a current source transistor. (Refer to...) Figure 2 Detailed description of a pixel PX according to one or more embodiments of the present disclosure.

[0046] Reference Figure 2 A pixel PX according to one or more embodiments of the present disclosure may include a control circuit 110, a control transistor 120, a driving circuit 130, and a micro LED.

[0047] The miniature LED can receive driving current from the driving circuit 130. The miniature LED can emit light based on the received driving current.

[0048] The driving circuit 130 can electrically connect the control transistor 120 to the miniature LED. The driving circuit 130 can provide driving current to the miniature LED.

[0049] The driver circuit 130 can determine the substantial magnitude of the drive current to be supplied to the micro LED. The driver circuit 130 can output the drive current based on multiple bias voltages BA. The driver circuit 130 can output a drive current based on at least one of the multiple bias voltages BA in response to a bias control signal BA_CTRL.

[0050] For example, the drive circuit 130 may include at least one current source transistor configured to output a drive current based on at least one of a plurality of bias voltages BA.

[0051] The control transistor 120 can receive a PWM signal PWM from the control circuit 110. The control transistor 120 can supply the power supply voltage ELVDD to the drive circuit 130 based on the PWM signal PWM input from the control circuit 110 to the gate node.

[0052] For example, when the PWM signal PWM is at the first level indicating activation, the control transistor 120 can be turned on and the power supply voltage ELVDD can be sent to the drive circuit 130, and the drive circuit 130 can output a drive current based on the power supply voltage ELVDD. The micro LED can emit light based on the received drive current. When the PWM signal PWM is at the second level indicating deactivation, the control transistor 120 can be turned off and the power supply voltage ELVDD cannot be sent to the drive circuit 130, and the drive circuit 130 can not output a drive current. Therefore, the micro LED can not emit light. The light emission time of the micro LED can be controlled depending on the on and off times of the control transistor 120.

[0053] The control circuit 110 may include multiple memory devices, and these memory devices may store data. This data may, for example, be a signal obtained by performing pulse width modulation on grayscale values ​​extracted from image data. The multiple memory devices may include any of latches, flip-flops, and static random access memory (SRAM). For example, the multiple memory devices may include multiple SRAM elements connected in series.

[0054] In each of the pixels PX according to one or more embodiments of the present disclosure, the drive circuit 130 that outputs drive current based on the bias voltage BA received from the bias circuit located outside the pixel PX can separate the control transistor 120 that provides the power supply voltage ELVDD based on the PWM signal PWM and the control circuit 110 that outputs the PWM signal PWM from the micro LED LED.

[0055] Therefore, the current source transistor directly connected to the driver circuit 130 of the micro LED may require a high operating voltage, while the other components can operate at a low operating voltage. (Refer to...) Figure 6 and Figure 8 This will be described in detail.

[0056] Furthermore, the transistors and / or control transistors 120 of the control circuit 110, which are separated from the micro-LED by the drive circuit 130, can operate at low operating voltages. Transistors configured to operate at a second operating voltage higher than the first operating voltage require a larger active area than transistors configured to operate at the first operating voltage. For example, the channel length of a transistor configured to operate at the second operating voltage can be longer than the channel length of a transistor configured to operate at the first operating voltage.

[0057] Pixels PX according to one or more embodiments of this disclosure do not include a large number of transistors requiring high operating voltages. Therefore, due to the reduced number of transistors requiring high operating voltages, the active area of ​​the pixel PX can be reduced or not increased. The active area ensured by reducing the number of transistors requiring high operating voltages can be used for multiple memory devices of the control circuit 110. The multiple memory devices can store data for multiple subframes.

[0058] Figure 3 This is a diagram illustrating the pixel PX_R according to an embodiment of an available alternative technology.

[0059] Reference Figure 3 The transistor SWr, which receives the PWM signal output from the data storage device MD, connects the miniature LED to a constant current source CSr that provides the drive current.

[0060] Due to the high forward voltage of the micro-LED, each of the transistor SWr and the data storage device MD that outputs the PWM signal to drive the transistor SWr requires a high operating voltage for stable operation of the pixel PX_R. This means that a pixel PX_R, which includes multiple transistors operating at high voltages, requires a large active area. Because multiple transistors operate at high voltages, it is difficult to reduce the size of the pixel PX_R and to achieve a high-resolution display device with a small area.

[0061] Figure 4 This is a diagram illustrating a control circuit 110 for a pixel according to one or more embodiments of the present disclosure. Figure 4 The control circuit 110 can correspond to Figure 2 The control circuit 110.

[0062] Reference Figure 4 The control circuit 110 may include multiple memory devices 111, pixel gate elements 112, and write selection circuit 113. The drive circuit 130 may be electrically connected to the clock selection circuit 211, and the multiple memory devices 111 may store and output data including data transmitted via data line DL from... Figure 1 The data driver 230 receives bits in the data DT.

[0063] In an embodiment, multiple memory devices 111 may sequentially store the MSB to LSB values ​​of data DT in either MSB-to-LSB order or LSB-to-MSB order. Alternatively, the multiple memory devices 111 may store bits corresponding to subframes of data DT in a preset order. Figure 4 The diagrams differ, and multiple memory devices 111 can receive or output data DT in parallel.

[0064] Data DT can be input to multiple memory devices 111 via write selection circuit 113. Data DT and data stored in the last memory device SN among the multiple memory devices 111, serving as feedback data FB, can be provided to write selection circuit 113. Write selection circuit 113 can output one of the received data DT and the received feedback data FB based on the write enable signal WR_EN.

[0065] Multiple memory devices 111 can receive clock signals from a clock selection circuit 211 located outside the pixel PX. The clock selection circuit 211 can receive the output of the row gate element 212 and the PWM clock P_CLK. The row gate element 212 can receive the write enable signal WR_EN and the data clock D_CLK, and the clock selection circuit 211 can output one of the output of the row gate element 212 and the PWM clock P_CLK based on the clock selection signal CK_SEL.

[0066] In each of the plurality of memory devices 111, memory devices S1, S2, ..., SN can store data DT based on a data clock D_CLK. The plurality of memory devices 111 can output a PWM signal P_SIG based on a PWM clock P_CLK. The PWM clock P_CLK can switch each subframe included in a frame during a frame. In response to a clock signal received from clock selection circuit 211, each of the plurality of memory devices 111, memory devices S1, S2, ..., SN, can store data DT or feedback data FB, or can output the PWM signal P_SIG. The plurality of memory devices 111 can store the bit value of data DT during a data write period and can output the PWM signal P_SIG based on the stored bit value and the PWM clock P_CLK during a transmit period.

[0067] The PWM signal P_SIG output from multiple memory devices 111 can be input to the pixel gate element 112. The pixel gate element 112 can output the PWM signal P_SIG based on the PWM enable signal P_EN.

[0068] With reference Figure 4 Depending on the given description, the driving circuit 130 can be implemented using any other circuit structure. For example, data stored in a memory device immediately preceding the last memory device SN can be used as feedback data FB. In this case, the connection relationship of the elements providing the clock signal can be changed. That is, the driving circuit of a pixel according to one or more embodiments of this disclosure may include multiple memory devices, and the multiple memory devices may be implemented in various structures, wherein bit values ​​of data are stored during a data write period, and a PWM signal P_SIG is output based on the stored bit values ​​during a transmit period.

[0069] Figure 5 It is a timing diagram used to describe the operation of pixels according to one or more embodiments of the present disclosure. Figure 5 It is used for display Figure 1 The pixel PX of the display device 10 is a timing diagram based on the data displayed in one frame.

[0070] A frame may include multiple subframes. When the display device 10 displays n-bit image data, a frame may include "n" subframes. Each of the "n" subframes may correspond to each bit of the n-bit image data. Subframes may have different time periods. For example, the time period of the subframe corresponding to the MSB of the digital data may be set to the longest, and the time period of the subframe corresponding to the LSB of the digital data may be set to the shortest. The order of the digital data from MSB to LSB may correspond to the order from the first subframe to the nth subframe, but the order of the subframes may be set in various ways.

[0071] Reference Figure 5 A frame period FR1 can include a data write period P1 and a transmit period P2. The first time period "T" can represent the length of the transmit time period P2. The transmit time period P2 can include multiple subframes S1 to S8. The multiple subframes S1 to S8 can have different time periods.

[0072] During the data writing period P1, Figure 1 In the pixel PX, the bit values ​​of data D0 to D7 can be stored based on the write enable signal WR_EN and the data clock D_CLK. Figure 4 In multiple memory devices 111. For ease of description, Figure 5 The example shown is that the bit values ​​of data D0 to D7 are "10101010", but the bit values ​​of data D0 to D7 can be set differently based on the image data.

[0073] During launch phase P2 Figure 4 Multiple memory devices 111 can output a PWM signal P_SIG based on a PWM clock P_CLK and data D0 to D7. For example, the multiple memory devices 111 can output the PWM signal P_SIG based on data bits with a value of "1", the level of which is activated during the subframe corresponding to each bit. During the transmit period P2, the PWM clock P_CLK can be switched for each subframe.

[0074] For ease of description, for example, Figure 5 The PWM signal P_SIG is shown as a PWM signal based on data D0 to D7 with bit values ​​“10101010”, but the PWM signal P_SIG can be set differently based on the bit values ​​of data D0 to D7.

[0075] Figure 6 This is a diagram illustrating a pixel driving circuit 130A according to one or more embodiments of the present disclosure. Figure 6 The drive circuit 130A can correspond to Figure 2 The driving circuit 130.

[0076] Reference Figure 6 The driving circuit 130A can be configured to provide at least one of a plurality of driving currents to the micro LED.

[0077] The driving circuit 130A may include multiple current paths between nodes N1 and N2 between the control transistor 120 and the micro LED. Figure 6 Two current paths are shown as examples, but the drive circuit according to embodiments of this disclosure may include three or more current paths.

[0078] Each of the multiple current paths may include a switch and a current source transistor that connects one end of the switch to a miniature LED.

[0079] For example, refer to Figure 6 The first current path may include a first switch SW1 and a first current source transistor CS1 connected between the first node N1 and the second node N2. The second current path may include a second switch SW2 and a second current source transistor CS2 connected between the first node N1 and the second node N2. The first node N1 may be connected to one end of the control transistor 120, and the second node N2 may be connected to the anode of the miniature LED.

[0080] A first current source transistor CS1 can be connected to a first switch SW1 and a miniature LED, and a second current source transistor CS2 can be connected to a second switch SW2 and a miniature LED. The first current source transistor CS1 can receive a first bias voltage BA1 through its gate terminal, and the second current source transistor CS2 can receive a second bias voltage BA2 through its gate terminal. The first current source transistor CS1 and the second current source transistor CS2 can provide the first bias voltage BA1 and the second bias voltage BA2 to the miniature LED through a second node N2, based on the first bias voltage BA1 and the second bias voltage BA2.

[0081] In this embodiment, the magnitude of the first bias voltage BA1 can be the same as the magnitude of the second bias voltage BA2, or the magnitude of the first bias voltage BA1 can be different from the magnitude of the second bias voltage BA2. The magnitude of the first drive current can be determined based on the first bias voltage BA1, and the magnitude of the second drive current can be determined based on the second bias voltage BA2. Therefore, the magnitude of the first drive current can be the same as the magnitude of the second drive current, or the magnitude of the first drive current can be different from the magnitude of the second drive current.

[0082] The first switch SW1 can connect the control transistor 120 and the first current source transistor CS1, and the second switch SW2 can connect the control transistor 120 to the second current source transistor CS2. The first switch SW1 can be controlled by the first control memory device 131A, and the second switch SW2 can be controlled by the second control memory device 132A.

[0083] For example, refer to Figure 6Each of the first control memory device 131A and the second control memory device 132A may include a memory device storing at least one bit. The memory device of each of the first control memory device 131A and the second control memory device 132A may include any one of a latch, a flip-flop, and SRAM. The first control memory device 131A may receive a first bias control signal BA_CTRL1 and may store the received first bias control signal BA_CTRL1 in its memory device, and the second control memory device 132A may receive a second bias control signal BA_CTRL2 and may store the received second bias control signal BA_CTRL2 in its memory device. The first control memory device 131A may output a bias control signal B1 to the gate node of the first switch SW1 based on the stored first bias control signal BA_CTRL1, and the second control memory device 132A may output a bias control signal B2 to the gate node of the second switch SW2 based on the stored second bias control signal BA_CTRL2.

[0084] The first current path can be activated by the first bias control signal BA_CTRL1, and the second current path can be activated by the second bias control signal BA_CTRL2. The first drive current and the second drive current can be provided to the micro LED via the first current path and the second current path based on the PWM signal.

[0085] In this embodiment, the first current path and the second current path can be selectively activated based on the first bias control signal BA_CTRL1 and the second bias control signal BA_CTRL2, or both the first current path and the second current path can be activated based on the first bias control signal BA_CTRL1 and the second bias control signal BA_CTRL2. For example, the first bias control signal BA_CTRL1 and the second bias control signal BA_CTRL2 can be configured to turn on both the first switch SW1 and the second switch SW2, or to turn on either the first switch SW1 or the second switch SW2.

[0086] Therefore, a first driving current can be provided to the micro LED through a first current path, a second driving current can be provided to the micro LED through a second current path, or both the first and second driving currents can be provided to the micro LED through both the first and second current paths. In other words, the magnitude of the driving current to be provided to the micro LED can be adjusted (or controlled) by controlling the first switch SW1 and the second switch SW2.

[0087] The display device can reduce the emission non-uniformity of the micro-LEDs caused by the distribution of the micro-LEDs in pixel PX and / or the distribution of the driving circuitry in pixel PX by using a first bias control signal BA_CTRL1 and a second bias control signal BA_CTRL2. Therefore, the display device can reduce at least part of the emission non-uniformity of the micro-LEDs by using a first control memory device 131A and a second control memory device 132A, each with a small storage capacity and belonging to one of the pixels PX.

[0088] To reduce the luminous non-uniformity of micro-LEDs, multiple transistors can be used to implement control memory devices for activating multiple current paths. When the display device is implemented as a component with a very small form factor (e.g., AR type) and a high-definition display is required, it is essential to ensure the active areas where the control memory devices for the pixels of the display device will be implemented.

[0089] Since the control memory device of the pixel according to the embodiments of the present disclosure controls the switching independently of the current source transistor connected to the micro LED, the control memory device can be implemented using a transistor that operates at a low operating voltage.

[0090] In other words, since the remaining components of the pixel driving circuit are separated from the micro-LED by using current source transistors CS1 and CS2, only current source transistors CS1 and CS2 can be implemented using transistors that operate at high operating voltages, and the remaining components besides current source transistors CS1 and CS2 can be implemented using transistors that operate at low operating voltages. In the driving circuit 130A, the remaining components besides current source transistors CS1 and CS2 that provide driving current to the micro-LED (e.g., the transistors constituting the first switch SW1 and the second switch SW2, and the first control memory device 131A and the second control memory device 132A that control the first switch SW1 and the second switch SW2) can also operate at low operating voltages.

[0091] In addition, as referenced Figure 2 and Figure 4As described, the multiple memory devices of the control circuit 110 can also be implemented using transistors that operate at low operating voltages. That is, since the remaining components of the pixel driving circuit are separated from the micro-LEDs by using current-source transistors, only current-source transistors can be implemented using transistors that operate at high operating voltages, and the remaining components can be implemented using transistors that operate at low operating voltages. Therefore, an effective area for implementing the various memory devices for the pixels can be ensured, and even if a memory device is provided for each pixel, a high-resolution display device can be achieved using a small area.

[0092] Furthermore, the bias voltages that provide multiple bias voltages to the current source transistors can be located outside the pixel, thus enabling high-resolution display devices to be achieved using a small area.

[0093] Figure 7 This is a diagram illustrating a bias circuit according to one or more embodiments of the present disclosure. Figure 7 The bias circuit can correspond to Figure 1 The bias circuit 240.

[0094] Reference Figure 7 The bias circuit 240A may include multiple bias transistors CSB1 and CSB2. In bias transistor CSB1, either the source or drain terminal can be connected to the gate terminal, and the gate terminal can be connected to the bias voltage output node ON1; in bias transistor CSB2, either the source or drain terminal can be connected to the gate terminal, and the gate terminal can be connected to the bias voltage output node ON2. The multiple bias transistors CSB1 and CSB2 can output bias voltages BA1 and BA2 through bias voltage output nodes ON1 and ON2, respectively.

[0095] In bias transistor CSB1, either the source or drain terminal can be connected to a constant current source CSS1, and the other can be connected to the first transistor SB1; in bias transistor CSB2, either the source or drain terminal can be connected to a constant current source CSS2, and the other can be connected to the second transistor SB2. Each of the first transistor SB1 and the second transistor SB2 can receive a power supply voltage ELVDD through transistor CB1.

[0096] Figure 7 The 240A bias circuit can be used with Figure 6 The pixel driving circuit 130A's current source transistors CS1 and CS2, the first switch SW1 and the second switch SW2, and the control transistor 120 constitute a current mirror circuit. Each transistor in the bias circuit 240A can operate as a reference transistor, and Figure 6 Each of the current source transistors CS1 and CS2, the first switch SW1 and the second switch SW2, and the control transistor 120 in the pixel driving circuit 130A can operate as a mirror transistor.

[0097] For example, transistor CB1 of bias circuit 240A can have the same aspect ratio as control transistor 120. Each of the first transistor SB1 and the second transistor SB2 can have the same aspect ratio as each of the first switch SW1 and the second switch SW2. Each of the plurality of bias transistors CSB1 and CSB2 can have the same aspect ratio as each of the current source transistors CS1 and CS2. Each of the plurality of bias transistors CSB1 and CSB2 can be configured to operate at a high operating voltage.

[0098] The bias circuit 240A, which provides multiple bias voltages, can be implemented as a current mirror outside the pixel and provide multiple bias voltages to the pixel. Therefore, a high-resolution display device can be achieved using a small area.

[0099] Figure 8 This is a diagram illustrating a pixel driving circuit 130B according to one or more embodiments of the present disclosure. Figure 8 The drive circuit 130B can correspond to Figure 2 The driving circuit 130 will be omitted. Figure 6 The embodiments given are described identically to avoid redundancy. The main description will be... Figure 6 Implementation examples and Figure 8 Differences between the embodiments.

[0100] Reference Figure 8 The driver circuit 130B can be configured to control the magnitude of the driving current supplied to the micro LED.

[0101] Reference Figure 8 ,and Figure 6 In different embodiments, the drive circuit 130B may include only one current path. The current source transistor CS3 in the current path can be connected to the control circuit 110 and the miniature LED. The current source transistor CS3 can receive a bias voltage BA3, and the selection circuit 133B outputs the bias voltage BA3 to the gate terminal of the current source transistor CS3. The current source transistor CS3 can be controlled by the bias voltage BA3, thereby adjusting the magnitude of the drive current.

[0102] The selector circuit 133B can receive multiple bias voltages BA4, BA5, BA6, and BA7. As an example, in... Figure 8The diagram shows four bias voltages BA4, BA5, BA6 and BA7, but the selector circuit 133B can receive three or fewer bias voltages or four or more bias voltages.

[0103] Reference Figure 8 The selection circuit 133B can select one of the bias voltages BA4, BA5, BA6, and BA7 based on the bias control signals B[0] and B[1]. The selection circuit 133B may include a multiplexer. The selected bias voltage can be provided to the current source transistor CS3.

[0104] The control memory device 131B can store the first bias control signal BA_CTRL1 and can output the bias control signal B[0], and the control memory device 132B can store the second bias control signal BA_CTRL2 and can output the bias control signal B[1].

[0105] The bias voltages BA4, BA5, BA6, and BA7 input to the selection circuit 133B can have different magnitudes. Therefore, the magnitude of the bias voltage to be supplied to the current source transistor CS3 can be controlled by the bias control signals B[0] and B[1], and thus the magnitude of the drive current to be supplied to the micro LED can be controlled. Therefore, different magnitudes of drive current can be supplied to the micro LED without using multiple current source transistors within the pixel.

[0106] Reference Figure 8 Except for the current source transistor CS3, the other transistors can be implemented to operate at low operating voltages. Therefore, with Figure 6 Similarly, in the embodiment, since the remaining components of the pixel driving circuit are separated from the micro-LED by using the current source transistor CS3, the current source transistor CS3 alone can be implemented using a transistor that operates at a high operating voltage, and the remaining components can be implemented using transistors that operate at a low operating voltage. That is, in the driving circuit 130B, all components except the current source transistor CS3 that provides driving current to the micro-LED can operate at a low operating voltage. For example, the transistors constituting the selection circuit 133B, as well as the control memory devices 131B and 132B that control the selection circuit 133B, can also operate at a low operating voltage.

[0107] Figure 9 It is a description based on Figure 8 The diagram shows the selection circuit 133B of the driving circuit 130B in the embodiment.

[0108] The selection circuit 133B may include multiple multiplexers M1 and M2. Each of the multiple multiplexers M1 and M2 may include multiple switches.

[0109] For example, the first multiplexer M1 may include multiple switches SW3, SW4, SW5, and SW6 that connect input terminals receiving multiple bias voltages BA4, BA5, BA6, and BA7 to two output terminals. The second multiplexer M2 may include multiple switches SW7 and SW8 that connect input terminals receiving the output of the first multiplexer M1 to one output terminal.

[0110] The first multiplexer M1 can output two of the multiple bias voltages BA4, BA5, BA6 and BA7 based on the first bias control signal B[0], and the second multiplexer M2 can output one of the two bias voltages output from the first multiplexer M1 as the bias voltage BA3 based on the second bias control signal B[1].

[0111] Because multiple multiplexers M1 and M2 pass through Figure 8 The gate node of the current source transistor CS3 controls the current magnitude in an analog manner, so multiple multiplexers M1 and M2 can be implemented by using components that operate at low operating voltages.

[0112] Figure 10 This is a diagram illustrating a bias circuit according to one or more embodiments of the present disclosure. Figure 10 The bias circuit can correspond to Figure 1 The bias circuit 240 will be omitted. Figure 7 The embodiments given are described identically to avoid redundancy. The main description will be... Figure 7 Implementation examples and Figure 10 Differences between the embodiments.

[0113] Figure 10 The bias circuit 240B can be used with Figure 8 The pixel driving circuit 130B's current source transistor CS3 and control transistor 120 constitute a current mirror circuit. Each transistor in the bias circuit 240B can operate as a reference transistor, and Figure 8 Each of the current source transistor CS3 and the control transistor 120 in the pixel driving circuit 130B can operate as a mirror transistor.

[0114] For example, transistor CB2 of bias circuit 240B can have the same aspect ratio as control transistor 120. Each of the plurality of bias transistors CSB4, CSB5, CSB6, and CSB7 can have the same aspect ratio as current source transistor CS3. Each of the plurality of bias transistors CSB4, CSB5, CSB6, and CSB7 can be configured to operate at a high operating voltage.

[0115] Figure 11 This is a block diagram illustrating the configuration of an electronic device 1000 according to one or more embodiments of the present disclosure.

[0116] Electronic device 1000 may include processor 1100, memory device 1200, storage device 1300, display device 1400, user interface 1500, and network interface 1600.

[0117] Processor 1100 can control electronic device 1000 using at least one instruction loaded into and temporarily stored in memory device 1200. Processor 1100 can send image data stored in memory device 1300 or image data received from any other peripheral device (e.g., camera device) to display device 1400. Processor 1100 can control display device 1400 such that image data is displayed on display device 1400.

[0118] In one embodiment, the display device 1400 may include an optical waveguide 1700 configured to guide light signals from the micro-LEDs of a pixel into a predetermined display area. The optical waveguide 1700 can receive light signals emitted by the micro-LEDs and guide the light signals into the predetermined display area.

[0119] For example, the optical waveguide 1700 may be made of glass or polymer forming a grating structure, and the optical waveguide 1700 may include a waveguide structure using a grating structure. The optical waveguide 1700 may be implemented using various known optical waveguide structures, and the optical waveguide 1700 according to embodiments of this disclosure is not limited to such optical waveguide structures.

[0120] In this embodiment, the preset display area can be the display area of ​​a perspective display device. A perspective display device can be a display device that projects digital images or information while the user directly views the external environment of the screen.

[0121] The display device 1400 can be connected to the optical waveguide 1700 via the optical interface OI.

[0122] For example, an optical interface (OI) may include various optical elements that refract, reflect, and decompose optical signals, such as lenses, beam splitters, and mirrors. An optical interface (OI) can be implemented using a variety of known optical elements, and the optical interface (OI) according to embodiments of this disclosure is not limited to the optical elements used therein.

[0123] The processor 1100 can temporarily store user input received through the user interface 1500 in the memory device 1200.

[0124] The processor 1100 may include an AI-based accelerator to accelerate deep learning or machine learning computations. The accelerator may include a graphics processing unit (GPU), a tensor processor, a neural processing unit (NPU), or a digital signal processor (DSP).

[0125] The memory device 1200 can temporarily store code for the operation of the electronic device 1000, data for the operation of the processor 1100, etc. The memory device 1200 may include dynamic random access memory (DRAM) and / or SRAM.

[0126] Storage device 1300 can store image data. Storage device 1300 can store trained learning models. The learning model can be an on-device learning model. For example, the learning model can be a lightweight learning model that allows electronic device 1000 to perform inference operations. The learning model can be implemented by hardware, software, or a combination of hardware and software, and when some or all of the learning model is implemented by software, one or more parameters and / or hyperparameters constituting the learning model can be stored in storage device 1300.

[0127] Storage device 1300 may include a computer-readable storage medium. Storage media include all types of recording devices storing data that can be read by a computer. Storage media may include at least one of hard disk drives (HDDs), solid-state drives (SSDs), silicon disk drives (SDDs), read-only memory (ROMs), CD-ROMs, magnetic tape, floppy disks, and optical data storage devices. Storage media may include non-volatile memory devices. For example, storage media may include different types of non-volatile memory, such as NAND flash memory, vertical NAND (V-NAND) flash memory, NOR flash memory, magnetic RAM (MRAM), phase-change RAM (PRAM), ferroelectric random access memory (FRAM), spin-transfer torque random access memory (STT-RAM), and / or resistive RAM (RRAM).

[0128] Electronic device 1000 can communicate with external devices via network interface 1600.

[0129] Figure 12This is a figure illustrating a display device 1400A according to one or more embodiments of the present disclosure. Figure 12 The display device 1400A can be corresponding to Figure 1 The display device 10 and Figure 11 The display device 1400.

[0130] The pixels of the display device 1400A can be implemented on a substrate using a semiconductor stacking structure.

[0131] Reference Figure 12 The display device 1400A may include a first substrate 1410A and a second substrate 1420A. The first substrate 1410A and the second substrate 1420A may be stacked sequentially in a direction D3 perpendicular to the plane of the substrate (parallel to the surfaces of D1 and D2).

[0132] In one embodiment, at least some components of the pixel circuit PIX_D may be implemented on a substrate different from that of the light-emitting element PIX_L.

[0133] For example, the light-emitting element PIX_L of each pixel can be formed in the first substrate 1410A, and at least a portion of the pixel circuit PIX_D electrically connected to the light-emitting element PIX_L can be formed in the second substrate 1420A. For example, according to reference... Figures 1 to 10 At least one of the control circuit, drive circuit, and control transistor in the described embodiment may be located in a second substrate 1420A, which is different from the first substrate 1410A where the light-emitting element PIX_L is located.

[0134] The shapes in which some pixel circuits are disposed in the first substrate 1410A and the second substrate 1420A are not limited thereto.

[0135] The first substrate 1410A and the second substrate 1420A can be electrically connected to each other.

[0136] In this embodiment, the first substrate 1410A and the second substrate 1420A can be connected using a hybrid copper bonding method. The light-emitting element PIX_L and the pixel circuit PIX_D can exchange electrical signals through the hybrid copper bonding.

[0137] The micro-LED pixels, the display device including the micro-LED pixels, and the electronic device including the display device according to embodiments of the present disclosure can improve the pixel integration.

[0138] According to embodiments of the present disclosure, the micro-LED pixel, the display device including the micro-LED pixel, and the electronic device including the display device can reduce the active area of ​​the micro-LED pixel.

[0139] Although this disclosure has been described with reference to its embodiments, those skilled in the art will understand that various changes and modifications can be made thereto without departing from the spirit and scope of this disclosure as set forth in the following claims.

Claims

1. A display device, comprising: A pixel array, comprising multiple pixels; and A bias circuit is configured to send a plurality of bias voltages to each of the plurality of pixels. Each of the plurality of pixels includes: Miniature light-emitting diodes (LEDs) are configured to receive drive current; A driving circuit includes at least one current source transistor, the at least one current source transistor being configured to provide the driving current to the microLED based on the plurality of bias voltages; The control circuit includes multiple memory devices and is configured to output a pulse width modulation (PWM) signal; and A control transistor is configured to provide a power supply voltage to the drive circuit based on the PWM signal input to the gate terminal of the control transistor.

2. The display device according to claim 1, wherein, The plurality of memory devices are configured to store data, and The control circuit is configured to output the PWM signal based on the stored data.

3. The display device according to claim 1, wherein, The drive circuit is configured to receive the plurality of bias voltages and provide the drive current based on at least one of the plurality of bias voltages.

4. The display device according to claim 1, wherein, The driving circuit includes at least one current source transistor that receives any one of the plurality of bias voltages. The control transistor is configured to operate at a first operating voltage, and The at least one current source transistor is configured to operate at a second operating voltage greater than the first operating voltage.

5. The display device according to claim 1, wherein, The plurality of memory devices include at least one of latches, flip-flops, and static random access memory (SRAM).

6. The display device according to claim 1, wherein, The driving circuit is configured to provide at least one of a plurality of driving currents to the microLED based on the plurality of bias voltages.

7. The display device according to claim 1, wherein, The driving circuit includes: Multiple current paths are configured to connect the control transistor to the microLED; Multiple switches are respectively disposed on the multiple current paths; and Multiple switch control memory devices are configured to control the multiple switches respectively.

8. The display device according to claim 1, wherein, The driving circuit includes: A first current source transistor is configured to receive a first bias voltage among the plurality of bias voltages through the gate terminal of the first current source transistor and output a first drive current based on the first bias voltage. The second current source transistor is configured to receive a second bias voltage among the plurality of bias voltages through the gate terminal of the second current source transistor and output a second drive current based on the second bias voltage. A first switch is configured to connect the control transistor to the first current source transistor; A second switch is configured to connect the control transistor to the second current source transistor; A first memory device is configured to send a first control signal to the first switch; and The second memory device is configured to send a second control signal to the second switch.

9. The display device according to claim 8, wherein, The first bias voltage and the second bias voltage are either equal to or different from each other.

10. The display device according to claim 8, wherein, The first control signal and the second control signal are configured to selectively activate both the first switch and the second switch or only one of the first switch and the second switch.

11. The display device according to claim 1, wherein, The driving circuit includes: The selection circuit is configured to select any one of the plurality of bias voltages; At least one control memory device is configured to control the selection circuit; and The first current source transistor is configured to receive any one of the bias voltages from the selection circuit through the gate terminal of the first current source transistor, receive a power supply voltage through the first terminal of the first current source transistor, and output the drive current through the second terminal of the first current source transistor.

12. The display device according to claim 11, wherein, The multiple bias voltages have different magnitudes.

13. The display device according to claim 1, wherein, The bias circuit includes: A plurality of bias transistors, each of the plurality of bias transistors including a source terminal, a drain terminal, and a gate terminal connected to either the source terminal or the drain terminal, wherein the gate terminal is connected to either of the bias voltage output nodes; and Multiple constant current sources are respectively connected to the multiple bias transistors.

14. The display device according to claim 13, wherein, The bias circuit is configured to form a current mirror circuit with the at least one current source transistor and the control transistor of the drive circuit.

15. The display device according to claim 13, wherein, The pixel array includes a first pixel and a second pixel located in the same row, and The first pixel and the second pixel are connected to multiple lines that transmit the plurality of bias voltages output from the bias circuit.

16. A pixel, comprising: Miniature light-emitting diodes (LEDs) are configured to receive drive current; A driving circuit includes at least one current source transistor, the at least one current source transistor being configured to provide the driving current to the microLED based on a plurality of bias voltages; The control circuit includes multiple memory devices and is configured to output a pulse width modulation (PWM) signal. and A control transistor is configured to provide a power supply voltage to the drive circuit based on the PWM signal input to the gate terminal of the control transistor.

17. The pixel according to claim 16, wherein, The driving circuit is connected to a line that transmits the plurality of bias voltages from a bias circuit located outside the pixel.

18. The pixel according to claim 16, wherein, The driving circuit includes at least one current source transistor that receives any one of the plurality of bias voltages. The control transistor is configured to operate at a first operating voltage, and The at least one current source transistor is configured to operate at a second operating voltage greater than the first operating voltage.

19. An electronic device comprising: A display device, comprising a pixel array in which multiple pixels are arranged; and The processor is configured to send image data to the display device and control the display device. Each of the plurality of pixels includes: Miniature light-emitting diodes (LEDs) are configured to receive drive current; A driving circuit includes at least one current source transistor, the at least one current source transistor being configured to provide the driving current to the microLED based on a plurality of bias voltages; The control circuit includes multiple memory devices and is configured to output a pulse width modulation (PWM) signal; and A control transistor is configured to provide a power supply voltage to the drive circuit based on the PWM signal input to the gate terminal of the control transistor.

20. The electronic device of claim 19, further comprising: An optical waveguide is configured to receive optical signals from the micro-LED based on the image data and guide the optical signals to a preset display area.

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