A display method, device, electronic equipment and storage medium
Patent Information
- Application Number
- CN202510495780.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-21
- Publication Date
- 2026-10-23
AI Technical Summary
[0004]然而,目前的显示流程中,通过一组RGB接口只能驱动一个LCD显示模组,从而导致许多实际应用场景中存在局限性
[0046]在本发明实施例中,可以确定第一个帧缓冲区的第一像素数据和第二个帧缓冲区的第二像素数据,然后基于预设信号采集第一像素数据以输出给第一显示装置,以及,采集第二像素数据以输出给第二显示装置。也就是说,在本发明实施例中,基于两个帧缓冲区可以分别缓存两个显示装置的像素数据,且使用帧同步信号来分别采集两个显示装置所待显示的有效数据或使用数据使能控制信号来分别采集两个显示装置所待显示的有效数据,从而实现一组RGB接口使用像素点交叉刷新的方式同时驱动两个LCD显示模组的目的,且由于是一组RGB接口驱动两个LCD显示模组,相比相关技术中两组RGB接口驱动两个LCD显示模组的方式,可以降低硬件成本,减少电路板空间的占用,同时可以降低系统的复杂性和功耗,且提升系统的稳定性。
Smart Images

Figure CN122967601A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of display technology, and more particularly to a display method, apparatus, electronic device, and storage medium. Background Technology
[0002] Currently, with the continuous development of liquid crystal technology, liquid crystal displays (LCDs) have been widely used. Because LCD drivers based on RGB interfaces can transmit data quickly and directly write displayed data onto the screen, RGB interfaces are widely used in LCD drivers.
[0003] Specifically, a segment of space in Double Data Rate Synchronous Dynamic Random Access Memory (DDR) can be allocated to store a complete frame buffer data. The display processing unit then retrieves the data from the frame buffer and performs rotation, scaling, and compositing processing as needed. Data communication with the LCD is then established via the RGB display interface, allowing the LCD to display a frame of data in real time, resulting in the desired image.
[0004] However, in current display processes, a single RGB interface can only drive one LCD display module, leading to limitations in many practical applications. For example, in commercial displays or industrial control, different information needs to be displayed to different users. If each piece of information requires a separate RGB interface, it will not only increase hardware costs and occupy more circuit board space, but also increase system complexity, instability, and power consumption. Summary of the Invention
[0005] This invention provides a display method, device, electronic device, and storage medium for driving two LCD display modules through a set of RGB interfaces, thereby achieving dual-screen display, reducing hardware costs, minimizing circuit board space usage, reducing system complexity and power consumption, and improving system stability.
[0006] In a first aspect, embodiments of the present invention provide a display method, the method comprising:
[0007] Determine the first pixel data of the first frame buffer and the second pixel data of the second frame buffer;
[0008] The first pixel data is acquired based on a preset signal and output to a first display device, and the second pixel data is acquired and output to a second display device; wherein the preset signal is a frame synchronization signal or a data enable control signal.
[0009] In one possible implementation, if the preset signal is a frame synchronization signal, then acquiring first pixel data based on the preset signal and outputting it to the first display device, and acquiring second pixel data and outputting it to the second display device, includes:
[0010] First pixel data is acquired based on the rising edge of the frame synchronization signal and output to the first display device; and,
[0011] The second pixel data is acquired based on the falling edge of the frame synchronization signal and output to the second display device.
[0012] In one possible implementation, if the preset signal is a frame synchronization signal, then acquiring first pixel data based on the preset signal and outputting it to the first display device, and acquiring second pixel data and outputting it to the second display device, includes:
[0013] First pixel data is acquired based on the falling edge of the frame synchronization signal and output to the first display device; and...
[0014] The second pixel data is acquired based on the rising edge of the frame synchronization signal and output to the second display device.
[0015] In one possible implementation, if the preset signal is a frame synchronization signal, then acquiring first pixel data based on the preset signal and outputting it to the first display device, and acquiring second pixel data and outputting it to the second display device, includes:
[0016] First pixel data is acquired based on the rising edge of the first frame synchronization signal and output to the first display device; and,
[0017] The second pixel data is acquired based on the rising edge of the second frame synchronization signal and output to the second display device.
[0018] In one possible implementation, if the preset signal is a frame synchronization signal, then acquiring first pixel data based on the preset signal and outputting it to the first display device, and acquiring second pixel data and outputting it to the second display device, includes:
[0019] First pixel data is acquired based on the falling edge of the first frame synchronization signal and output to the first display device; and...
[0020] The second pixel data is acquired based on the falling edge of the second frame synchronization signal and output to the second display device.
[0021] In one possible implementation, if the preset signal is a data enable control signal, then acquiring first pixel data based on the preset signal to output to the first display device, and acquiring second pixel data to output to the second display device, includes:
[0022] Based on the first data enable control signal, first pixel data is acquired and output to the first display device; and...
[0023] The second pixel data is acquired based on the second data enable control signal and output to the second display device.
[0024] In a second aspect, embodiments of the present invention provide a display device, the device comprising:
[0025] A determining unit is used to determine the first pixel data of the first frame buffer and the second pixel data of the second frame buffer;
[0026] The display unit is configured to acquire first pixel data based on a preset signal and output it to a first display device, and to acquire second pixel data and output it to a second display device; wherein the preset signal is a frame synchronization signal or a data enable control signal.
[0027] In one possible implementation, if the preset signal is a frame synchronization signal, then the display unit is used to:
[0028] First pixel data is acquired based on the rising edge of the frame synchronization signal and output to the first display device; and,
[0029] The second pixel data is acquired based on the falling edge of the frame synchronization signal and output to the second display device.
[0030] In one possible implementation, if the preset signal is a frame synchronization signal, then the display unit is used to:
[0031] First pixel data is acquired based on the falling edge of the frame synchronization signal and output to the first display device; and...
[0032] The second pixel data is acquired based on the rising edge of the frame synchronization signal and output to the second display device.
[0033] In one possible implementation, if the preset signal is a frame synchronization signal, then the display unit is used to:
[0034] First pixel data is acquired based on the rising edge of the first frame synchronization signal and output to the first display device; and,
[0035] The second pixel data is acquired based on the rising edge of the second frame synchronization signal and output to the second display device.
[0036] In one possible implementation, if the preset signal is a frame synchronization signal, then the display unit is used to:
[0037] First pixel data is acquired based on the falling edge of the first frame synchronization signal and output to the first display device; and...
[0038] The second pixel data is acquired based on the falling edge of the second frame synchronization signal and output to the second display device.
[0039] In one possible implementation, if the preset signal is a data enable control signal, then the display unit is used to:
[0040] Based on the first data enable control signal, first pixel data is acquired and output to the first display device; and...
[0041] The second pixel data is acquired based on the second data enable control signal and output to the second display device.
[0042] Thirdly, embodiments of the present invention provide an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps included in any of the methods in the first aspect.
[0043] Fourthly, embodiments of the present invention provide a computer-readable storage medium including program code, which, when the program product is run on an electronic device, causes the electronic device to perform the steps included in any of the methods in the first aspect.
[0044] Fifthly, embodiments of the present invention provide a computer program product, the computer program product comprising: computer program code, which, when executed on an electronic device, causes the electronic device to perform the steps included in any of the methods in the first aspect.
[0045] The technical solutions provided by the embodiments of the present invention bring at least the following beneficial effects:
[0046] In this embodiment of the invention, the first pixel data of the first frame buffer and the second pixel data of the second frame buffer can be determined. Then, the first pixel data is collected based on a preset signal and output to the first display device, and the second pixel data is collected and output to the second display device. That is, in this embodiment of the invention, the pixel data of the two display devices can be cached by the two frame buffers respectively, and the effective data to be displayed by the two display devices can be collected by the frame synchronization signal or by the data enable control signal, thereby achieving the purpose of driving two LCD display modules simultaneously by a set of RGB interfaces using pixel cross-refresh. Since it is a set of RGB interfaces driving two LCD display modules, compared with the method of driving two LCD display modules by two sets of RGB interfaces in related technologies, it can reduce hardware costs, reduce the occupation of circuit board space, reduce system complexity and power consumption, and improve system stability.
[0047] Other features and advantages of the invention will be set forth in the description which follows, and will be apparent in part from the description, or may be learned by practice. The objects and other advantages of the invention may be realized and obtained by means of the structures particularly pointed out in the written description, claims, and drawings.
[0048] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit the invention. Attached Figure Description
[0049] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention, but do not constitute an undue limitation of the invention.
[0050] Figure 1 A schematic diagram illustrating pixel data acquisition for related technologies;
[0051] Figure 2 A schematic diagram for related technologies;
[0052] Figure 3 A flowchart of a display method provided in an embodiment of the present invention;
[0053] Figure 4 A schematic diagram of a display provided in an embodiment of the present invention;
[0054] Figure 5 This is a schematic diagram of pixel data acquisition provided in an embodiment of the present invention;
[0055] Figure 6 This is a schematic diagram illustrating another pixel data acquisition method provided in an embodiment of the present invention;
[0056] Figure 7 This is a schematic diagram illustrating another method of pixel data acquisition provided in an embodiment of the present invention;
[0057] Figure 8 A structural block diagram of a display device provided in an embodiment of the present invention;
[0058] Figure 9 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention. Detailed Implementation
[0059] To make the objectives, technical solutions, and advantages of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention. Without conflict, the embodiments and features in the embodiments of the present invention can be arbitrarily combined with each other. Furthermore, although a logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in a different order than that shown here. The term "comprising" and any variations thereof in the specification and claims of the present invention are intended to cover non-exclusive protection. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or devices.
[0060] In this embodiment of the invention, "and / or" describes the relationship between associated objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following associated objects have an "or" relationship.
[0061] Furthermore, unless otherwise stated, the ordinal numbers such as "first" and "second" mentioned in the embodiments of the present invention are used to distinguish multiple objects and are not used to limit the size, content, order, timing, priority, or importance of the multiple objects. For example, "first display device" and "second display device" are only used to distinguish display devices and do not indicate that the two display devices are different in size, priority, or importance.
[0062] The following description, in conjunction with the accompanying drawings, illustrates exemplary embodiments of the present invention, including various details to aid understanding. These are to be considered merely exemplary. Therefore, those skilled in the art will recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope of the invention. Similarly, for clarity and brevity, descriptions of well-known functions and structures are omitted in the following description. It should be noted that in the embodiments of the present invention, references may be made to existing industry solutions such as software, components, and models. These should be considered exemplary, intended only to illustrate the feasibility of implementing the technical solutions of the present invention, and do not imply that the applicant has already used or necessarily used such solutions.
[0063] In the technical solution of this invention, the collection, dissemination, use, and display of various types of data all comply with the requirements of relevant national laws and regulations.
[0064] To facilitate understanding of the technical solutions provided in the embodiments of the present invention, some key terms used in the embodiments of the present invention will be explained here first:
[0065] Liquid Crystal Display (LCD): A display technology that uses liquid crystal materials and controls the alignment of liquid crystal branches through an electric field to change the light transmittance and thus display images.
[0066] RGB interface: The RGB interface is a standard for transmitting the three primary colors of red, green, and blue. Through this interface, digital or analog RGB signals can be transmitted to a display device to display color images.
[0067] Pixel Clock (PCLK): Provides a synchronization clock signal for data transmission. The frequency of the pixel clock signal determines the data transmission rate; the higher the speed, the greater the amount of data transmitted per unit time. For example, in high-resolution display scenarios, a higher frequency PCLK is required to ensure sufficient transmission bandwidth for smooth image display.
[0068] Horizontal Sync (HS): Used to identify the start and end of a line of data. Within a single frame, the HS signal changes according to a fixed period, and its frequency depends on the number of lines and refresh rate of the display. For example, on a 1080P resolution display with a 30Hz refresh rate, the HS signal frequency is 30Hz * 1080 = 32.4kHz.
[0069] Vertical Sync (VS) signal: Used to identify the start and end of a frame of data. The period between two falling / rising edges represents a complete frame of data, and the frequency of the VS signal determines the refresh rate of the display. For example, a common 30Hz refresh rate means that the frequency of the VS signal is 30Hz.
[0070] Data Enable (DE) signal: Used to control the effective transmission of data. During the active period of the DE signal (which can be active high or low), the data to be displayed is transmitted to the LCD screen so that the LCD screen can display the corresponding pixels. In conjunction with the HS and VS signals, the DE signal ensures that the data for each pixel is transmitted to the display screen at the correct time.
[0071] The 24-bit data signal [DATA23-DATA0] is used to transmit the RGB color information of each pixel, with red (Read), green (Green), and blue (Blue) each occupying 8 bits, i.e., 888 format, which can achieve rich and realistic image display effects.
[0072] For example, see Figure 1 As shown, Figure 1 This is the timing diagram for the RGB interface. VS represents frame synchronization data; two falling edges represent one entire frame. HS represents line synchronization data, and DE is the data enable control signal, mapping the data to be displayed to the LCD's display pixels. For example, in 1080P: one frame synchronization data cycle consists of 1080 valid DE+HS synchronized data points. PCLK is the data transmission clock signal, acquiring data on the rising edge of valid DE and HS synchronized data. DATA represents display data, with D1 representing one pixel. For example, in 1080P: one line synchronization data cycle contains 1920 valid pixel data points, i.e., Dn = D1920.
[0073] Each pixel transmits RGB888 data in parallel using a 24-bit DATA signal. The correspondence between the DATA signal and the RGB888 data transmission is shown in Table 1 below:
[0074]
[0075] Table 1
[0076] Double Data Rate Synchronous Dynamic Random Access Memory (DDR): Double Data Rate Synchronous Dynamic Random Access Memory is a type of memory used to store data such as images and audio.
[0077] Frame buffer: A memory area used to store image data. In a display system, it stores complete image information for one frame, including the color value of each pixel. The display processing unit reads data from the frame buffer and transmits it to the display device for display. Its capacity and read / write speed directly affect the performance and display effect of the display system.
[0078] The display processor unit (DPU) is a functional module specifically designed to process display-related data. Common functions include rotation, scaling, and compositing. The DPU can convert raw image data into a format that meets the requirements of the display device and transmit the data to the display device according to the device's timing requirements, achieving high-quality and efficient image presentation.
[0079] LCD data output port (LCD Port): An interface used to transmit display data to the LCD screen. For example, an RGB data output port.
[0080] As mentioned above, see Figure 2 , Figure 2 This is a schematic diagram illustrating a data display in related technologies. Specifically, the DDRframe buffer can store the data of one frame, for example, frame data A. Frame data A is, for example, 1080P, meaning it contains 1920 valid pixel data. Then, the display processing unit (i.e., Figure 2 The DPU (Data Processing Unit) in the system can acquire data from the frame buffer and perform rotation, scaling, and compositing processing. Then, it communicates with the LCD via the RGB display interface, allowing the LCD to display the image corresponding to frame data A stored in the frame buffer in real time.
[0081] In the current display process, only one LCD display module can be driven through a set of RGB interfaces.
[0082] In view of this, the present invention provides a display method. This method determines first pixel data in a first frame buffer and second pixel data in a second frame buffer. Then, based on a preset signal, the first pixel data is acquired and output to a first display device, and the second pixel data is acquired and output to a second display device. Therefore, in this embodiment of the invention, pixel data from two display devices can be cached using two frame buffers respectively. A frame synchronization signal is used to acquire the valid data to be displayed by each of the two display devices, or a data enable control signal is used to acquire the valid data to be displayed by each of the two display devices, thereby achieving the goal of simultaneously driving two LCD display modules using a pixel-by-pixel cross-refresh method with a set of RGB interfaces.
[0083] In other words, this invention proposes a technical improvement for dual-screen display using a single RGB physical interface, achieved through optimized timing signals and memory management. Based on the traditional RGB interface hardware architecture, it adopts a dual-frame buffer dynamic switching mechanism and pixel / frame synchronization signal multiplexing technology to break through the limitation that a single physical interface can only drive a single display module. While maintaining the electrical characteristics of the interface, this solution achieves dual-channel data transmission capability through pixel / frame signal timing logic, thereby achieving efficient resource utilization and cost reduction.
[0084] Specifically, since one set of RGB interfaces drives two LCD display modules, compared with the method of two sets of RGB interfaces driving two LCD display modules in related technologies, it can reduce hardware costs, reduce the space occupied on the circuit board, reduce system complexity and power consumption, and improve system stability.
[0085] In this embodiment of the invention, the dual-screen display technology solution provided by this invention can be applied to commercial display and control panels, industrial control consoles, etc.
[0086] For example, a dual-screen display solution designed using the AD102 can be used in various POS systems such as milk tea shops, clothing stores, and restaurants that require dual-screen displays. This way, cashiers enter product information into the merchant's inventory management software. Not only can the cashier view inventory management information on the POS system, but they can also simultaneously view brief information such as product details and prices for customers. Thus, two different roles—the cashier and the customer—can see different content at the same time.
[0087] For example, in a factory production line, a control device can be used to monitor the output, yield rate, and operating status of multiple production lines in real time from multiple directions, thereby improving production efficiency and reducing the cost of equipment use and maintenance.
[0088] To further illustrate the display method provided in the embodiments of the present invention, a detailed description is provided below in conjunction with the accompanying drawings and specific implementation methods. Although the embodiments of the present invention provide method operation steps as shown in the following embodiments or drawings, more or fewer operation steps may be included in the method based on conventional or non-inventive methods. In steps where there is no logically necessary causal relationship, the execution order of these steps is not limited to the execution order provided in the embodiments of the present invention. In actual processing or when the device executes the method, it may be executed in the order shown in the embodiments or drawings, or in parallel (e.g., in an application environment with parallel processors or multi-threaded processing).
[0089] The following combination Figure 3 The flowchart shown illustrates the method in this embodiment of the invention. The method can be executed by an electronic device, and the specific implementation flow of the method is as follows:
[0090] Step 301: Determine the first pixel data of the first frame buffer and the second pixel data of the second frame buffer.
[0091] In this embodiment of the invention, the single-frame frame buffer in the related art can be set as a dual-frame frame buffer. That is, in this embodiment of the invention, dual-frame frame buffers are used to buffer frame data separately.
[0092] For example, see Figure 4 As shown, Figure 4This is a schematic diagram of data display in an embodiment of the present invention. DDR frame buffer 1 can store one frame of data, such as frame data A, and DDR frame buffer 2 can store one frame of data, such as frame data B.
[0093] Optionally, DDR frame buffer 1 can store one frame of data from LCD display module 1, and DDR frame buffer 2 can store one frame of data from LCD display module 2. Of course, it is also possible that DDR frame buffer 1 can store one frame of data from LCD display module 2, and DDR frame buffer 2 can store one frame of data from LCD display module 1; this is not limited in this embodiment of the invention. Figure 4 The example shown uses DDR frame buffer1 to store one frame of data from LCD1 and DDR frame buffer2 to store one frame of data from LCD2, thus allowing the determination of the first frame buffer (e.g. Figure 4 The first pixel data (e.g., frame data A) and the second frame buffer (e.g., DDR frame buffer 1) in the DDR frame buffer 1 are used for the second pixel data (e.g., frame data A). Figure 4 The second pixel data (e.g., frame data B) in DDRframe buffer2.
[0094] Please continue reading Figure 4 Display processing unit (i.e.) Figure 4 The DPU (Data Processing Unit) can acquire data from DDR frame buffer1 and DDR frame buffer2 and perform rotation, scaling, and compositing processing. Then, it communicates with the LCD via the RGB display interface, so that LCD1 can display the image corresponding to frame data A stored in DDR frame buffer1 in real time, and LCD2 can display the image corresponding to frame data B stored in DDR frame buffer1 in real time.
[0095] Step 302: Output the first pixel data to the first display device based on the preset signal, and output the second pixel data to the second display device.
[0096] In this embodiment of the invention, data corresponding to two display devices can be collected based on frame synchronization signals or data enable control signals and transmitted to the two display devices to achieve simultaneous display on the two display devices.
[0097] The following section introduces a scheme for simultaneously displaying data on two display devices by acquiring data corresponding to the frame synchronization signal and transmitting it to the two display devices.
[0098] In this embodiment of the invention, pixel data can be collected based on the rising edge and falling edge of the frame synchronization signal, thereby achieving dual-screen display.
[0099] In one possible implementation, first pixel data can be output to a first display device based on the falling edge of the frame synchronization signal; and second pixel data can be output to a second display device based on the rising edge of the frame synchronization signal.
[0100] In one possible implementation, first pixel data can be output to a first display device based on the rising edge of the frame synchronization signal; and second pixel data can be output to a second display device based on the falling edge of the frame synchronization signal.
[0101] For example, see Figure 5 As shown, Figure 5 This is a schematic diagram illustrating pixel data acquisition in an embodiment of the present invention. Figure 5 In the process, valid display data of the first display device LCD1, such as D1, D2, D3, ..., Dn, is acquired through the rising edge of VS. Figure 5 (not shown in the image), and transmits it to LCD1; valid display data of the second display device LCD2, such as P1, P2, P3, ..., Pn, is acquired through the falling edge of VS. Figure 5 (not shown in the image), and transmit it to LCD2, where n is a positive integer.
[0102] It can be seen that, in Figure 5 In this process, the first rising edge of VS represents the start of frame data for LCD1. At this time, the level of VS is high, and the first frame of pixel data in buffer1 is transmitted to the LCD1 module for LCD1 to display one frame of data. At this time, although the LCD2 module can also collect data on the DATA data line, since the VS of LCD2 is configured to be active low, LCD2 is in an invalid state and therefore does not collect data on the DATA data line.
[0103] The falling edge of VS indicates the end of the frame data of LCD1 and the beginning of the frame data of LCD2. At this time, the level of VS is low, and the first complete frame of data in buffer2 is transmitted to the LCD2 module for display. Although the LCD1 module can also collect data on the DATA line at this time, because the VS of LCD1 is configured to be active high, LCD1 is in an invalid state and therefore does not collect data on the DATA line.
[0104] The second rising edge of VS indicates the end of the frame data of LCD2 and the beginning of the second frame data of LCD1. At this time, the VS level is high, and the transmission of the second frame data in buffer1 to the LCD1 module begins.
[0105] By repeating this process, and utilizing the different levels of the VS signal, frame data from two LCD display modules can be transmitted alternately on the same set of RGB interfaces, thereby achieving dual-screen display.
[0106] In this embodiment of the invention, a set of frame synchronization signals can be added to collect pixel data, thereby realizing dual-screen display.
[0107] In one possible implementation, the first pixel data can be output to the first display device based on the falling edge portion of the first frame synchronization signal; and the second pixel data can be output to the second display device based on the falling edge portion of the second frame synchronization signal.
[0108] In one possible implementation, the first pixel data can be output to the first display device based on the rising edge of the first frame synchronization signal; and the second pixel data can be output to the second display device based on the falling edge of the second frame synchronization signal.
[0109] In one possible implementation, the first pixel data can be output to the first display device based on the falling edge of the first frame synchronization signal; and the second pixel data can be output to the second display device based on the rising edge of the second frame synchronization signal.
[0110] In one possible implementation, the first pixel data can be output to the first display device based on the rising edge of the first frame synchronization signal; and the second pixel data can be output to the second display device based on the rising edge of the second frame synchronization signal.
[0111] For example, see Figure 6 As shown, Figure 6 This is a schematic diagram illustrating pixel data acquisition in an embodiment of the present invention. Figure 6 In the process, valid display data of the first display device LCD1, such as D1, D2, D3, ..., Dn, is acquired through the falling edge of VS1. Figure 6 (not shown in the image), and transmits it to LCD1; the effective display data of the second display device LCD2, such as P1, P2, P3, ..., Pn, is acquired through the falling edge of VS2. Figure 6 (not shown in the image), and transmit it to LCD2, where n is a positive integer.
[0112] It can be seen that, in Figure 6In the process, the first falling edge of VS1 and VS2 triggers the start of frame data, and the second falling edge triggers the end of frame data. First, VS2 remains high, and VS1 generates the first falling edge to trigger the transmission of the first frame of image data from buffer1 to the LCD1 module for display. Next, VS1 generates the second falling edge, indicating the end of the first frame data transmission from LCD1, and simultaneously generates the first falling edge to trigger the transmission of the first frame of image data from buffer2 to the LCD2 module for display. Then, VS2 generates the second falling edge, indicating the end of the first frame data transmission from LCD2, and simultaneously VS1 generates the third falling edge, triggering the transmission of the second frame of image data from buffer1 to the LCD1 module for display.
[0113] By repeating this process, and by adding a set of VS control signals, the frame data of the two LCD modules are alternately transmitted on the same set of RGB interfaces, thereby achieving dual-screen display.
[0114] As can be seen, in this embodiment of the invention, dual-screen display is achieved by adding a set of frame buffers and combining different acquisition methods of frame synchronization VS signals to perform pixel cross-refresh.
[0115] In this embodiment of the invention, an additional set of data enable control signals can be added to acquire pixel data, thereby achieving dual-screen display.
[0116] In this embodiment of the invention, first pixel data can be output to a first display device based on a first data enable control signal; and second pixel data can be output to a second display device based on a second data enable control signal.
[0117] For example, see Figure 7 As shown, Figure 7 This is a schematic diagram illustrating pixel data acquisition in an embodiment of the present invention. Figure 7 In the process, the effective display data of the first display device LCD1 of DE1, such as D1, D2, D3, ..., Dn, is displayed. Figure 7 (not shown in the image), and transmits it to LCD1; the valid display data of the second display device LCD2, such as P1, P2, P3, ..., Pn, is acquired through DE2. Figure 7 (not shown in the image), and transmit it to LCD2, where n is a positive integer.
[0118] It can be seen that, in Figure 7In the configuration, the DE level of LCD1 / LCD2 modules is active high. During the active VS period, HS triggers the first falling edge, setting DE1 high and DE2 low, triggering the transmission of the first row of pixel data from buffer1 to LCD1 module for display. HS triggers the second falling edge, setting DE1 low and DE2 high, triggering the transmission of the first row of pixel data from buffer2 to LCD2 module for display. HS triggers the third falling edge, setting DE2 high and low, triggering the transmission of the second row of pixel data from buffer1 to LCD1 module for display.
[0119] By repeating this process, and by adding a set of DE control signals, the row data of the two LCD display modules can be alternately transmitted on the same set of RGB interfaces, thereby achieving dual-screen display.
[0120] As can be seen, in this embodiment of the invention, dual-screen display is achieved by adding a set of frame buffers and using different implementation methods of VS or DE signals for frame data cross-refresh. Compared with existing solutions, this method has the following advantages: 1. Reduced hardware costs: This invention can drive dual LCD display modules with a single chip, thereby reducing the number of main control chips, correspondingly reducing related peripheral components, and lowering the design complexity and manufacturing costs of the circuit board. 2. Improved system stability: This invention drives dual LCD display modules with a single chip, reducing the development difficulty and maintainability of the system, reducing data transmission and information synchronization between multiple devices, and improving device stability. 3. Easy to promote and implement: The solution provided by this invention is easy to upgrade and modify on existing hardware, enhancing the scalability of the display system.
[0121] Based on the same inventive concept, embodiments of the present invention provide a display device capable of implementing the functions corresponding to the aforementioned display method. The display device can be a hardware structure, a software module, or a hardware structure plus a software module. The display device can be implemented using a chip system, which can consist of chips or include chips and other discrete components. Please refer to [link to previous document]. Figure 8 As shown, the display device includes:
[0122] The determining unit 801 is used to determine the first pixel data of the first frame buffer and the second pixel data of the second frame buffer;
[0123] Display unit 802 is used to acquire first pixel data based on a preset signal and output it to a first display device, and to acquire second pixel data and output it to a second display device; wherein the preset signal is a frame synchronization signal or a data enable control signal.
[0124] In one possible implementation, if the preset signal is a frame synchronization signal, then the display unit 802 is used to:
[0125] First pixel data is acquired based on the rising edge of the frame synchronization signal and output to the first display device; and,
[0126] The second pixel data is acquired based on the falling edge of the frame synchronization signal and output to the second display device.
[0127] In one possible implementation, if the preset signal is a frame synchronization signal, then the display unit 802 is used to:
[0128] First pixel data is acquired based on the falling edge of the frame synchronization signal and output to the first display device; and...
[0129] The second pixel data is acquired based on the rising edge of the frame synchronization signal and output to the second display device.
[0130] In one possible implementation, if the preset signal is a frame synchronization signal, then the display unit 802 is used to:
[0131] First pixel data is acquired based on the rising edge of the first frame synchronization signal and output to the first display device; and,
[0132] The second pixel data is acquired based on the rising edge of the second frame synchronization signal and output to the second display device.
[0133] In one possible implementation, if the preset signal is a frame synchronization signal, then the display unit 802 is used to:
[0134] First pixel data is acquired based on the falling edge of the first frame synchronization signal and output to the first display device; and...
[0135] The second pixel data is acquired based on the falling edge of the second frame synchronization signal and output to the second display device.
[0136] In one possible implementation, if the preset signal is a data enable control signal, then the display unit 802 is used to:
[0137] Based on the first data enable control signal, first pixel data is acquired and output to the first display device; and...
[0138] The second pixel data is acquired based on the second data enable control signal and output to the second display device.
[0139] All relevant content of each step involved in the aforementioned embodiments of the display method can be referenced to the functional description of the corresponding functional module of the display device in the embodiments of the present invention, and will not be repeated here.
[0140] The module division in this embodiment of the invention is illustrative and represents only one logical functional division. In actual implementation, other division methods may be used. Furthermore, the functional modules in the various embodiments of the invention can be integrated into a single controller, exist as separate physical entities, or be integrated into a single module. The integrated modules described above can be implemented in hardware or as software functional modules.
[0141] Based on the same inventive concept, embodiments of the present invention provide an electronic device, please refer to... Figure 9 As shown, the electronic device includes at least one processor 901 and a memory 902 connected to the at least one processor. In this embodiment of the invention, the specific connection medium between the processor 901 and the memory 902 is not limited. Figure 9 Taking the connection between processor 901 and memory 902 via bus 900 as an example, bus 900 in... Figure 9 The connections between other components are indicated by thick lines and are for illustrative purposes only, not as limiting information. The Bus 900 can be divided into address bus, data bus, control bus, etc., for ease of representation. Figure 9 The symbol is represented by a single thick line, but this does not indicate that there is only one bus or one type of bus. In addition, the display device includes a communication interface 903 for receiving or sending data.
[0142] In this embodiment of the invention, the memory 902 stores instructions that can be executed by at least one processor 901. By executing the instructions stored in the memory 902, at least one processor 901 can perform the steps included in the aforementioned display method.
[0143] The processor 901 is the control center of the electronic device. It can connect to various parts of the electronic device through various interfaces and lines. By running or executing instructions stored in the memory 902 and calling data stored in the memory 902, it can monitor the various functions and data processing of the electronic device as a whole.
[0144] Optionally, processor 901 may include one or more processing units. Processor 901 may integrate an application processor and a modem processor, wherein the application processor mainly handles the operating system, user interface, and applications, and the modem processor mainly handles wireless communication. It is understood that the modem processor may not be integrated into processor 901. In some embodiments, processor 901 and memory 902 may be implemented on the same chip; in some embodiments, they may be implemented separately on independent chips.
[0145] The processor 901 can be a general-purpose processor, such as a central processing unit (CPU), digital signal processor, application-specific integrated circuit, field-programmable gate array or other programmable logic device, discrete gate or transistor logic device, or discrete hardware component, capable of implementing or executing the methods, steps, and logic block diagrams disclosed in the embodiments of this invention. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of this invention can be directly manifested as being executed by a hardware processor, or executed by a combination of hardware and software modules within the processor.
[0146] Memory 902, as a non-volatile computer-readable storage medium, can be used to store non-volatile software programs, non-volatile computer-executable programs, and modules. Memory 902 may include at least one type of storage medium, such as flash memory, hard disk, multimedia card, card-type memory, random access memory (RAM), static random access memory (SRAM), programmable read-only memory (PROM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), magnetic storage, magnetic disk, optical disk, etc. Memory 902 can be any other medium capable of carrying or storing desired program code in the form of instructions or data structures that can be accessed by a computer, but is not limited thereto. In embodiments of the present invention, memory 902 can also be a circuit or any other device capable of implementing storage functions for storing program instructions and / or data.
[0147] By designing and programming the processor 901, the code corresponding to the display method described in the foregoing embodiments can be embedded into the chip, thereby enabling the chip to execute the steps of the aforementioned display method during operation. How to design and program the processor 901 is a well-known technique to those skilled in the art, and will not be elaborated here.
[0148] Based on the same inventive concept, embodiments of the present invention also provide a computer-readable storage medium including program code, which, when the program product is run on an electronic device, is used to cause the electronic device to perform the steps of the aforementioned display method.
[0149] In some possible implementations, aspects of the display method provided by the present invention can also be implemented as a computer program product or computer program, which includes computer instructions stored in a computer-readable storage medium. A processor of an electronic device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the electronic device to perform the steps in the display method according to various exemplary embodiments of the present invention described above.
[0150] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage and optical storage) containing computer-usable program code.
[0151] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable display device to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable display device, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.
[0152] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable display device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.
[0153] These computer program instructions may also be loaded onto a computer or other programmable display device to cause a series of operational steps to be performed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable device for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.
[0154] Obviously, those skilled in the art can make various modifications and variations to this invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this invention and their equivalents, this invention also intends to include these modifications and variations.
Claims
1. A display method, characterized in that, The method includes: Determine the first pixel data of the first frame buffer and the second pixel data of the second frame buffer; The system acquires first pixel data based on a preset signal and outputs it to a first display device, and acquires second pixel data and outputs it to a second display device; wherein the preset signal is a frame synchronization signal or a data enable control signal.
2. The method according to claim 1, characterized in that, If the preset signal is a frame synchronization signal, then acquiring first pixel data based on the preset signal and outputting it to the first display device, and acquiring second pixel data and outputting it to the second display device, includes: First pixel data is acquired based on the rising edge of the frame synchronization signal and output to the first display device; and, The second pixel data is acquired based on the falling edge of the frame synchronization signal and output to the second display device.
3. The method according to claim 1, characterized in that, If the preset signal is a frame synchronization signal, then acquiring first pixel data based on the preset signal and outputting it to the first display device, and acquiring second pixel data and outputting it to the second display device, includes: First pixel data is acquired based on the falling edge of the frame synchronization signal and output to the first display device; and... The second pixel data is acquired based on the rising edge of the frame synchronization signal and output to the second display device.
4. The method according to claim 1, characterized in that, If the preset signal is a frame synchronization signal, then acquiring first pixel data based on the preset signal and outputting it to the first display device, and acquiring second pixel data and outputting it to the second display device, includes: First pixel data is acquired based on the rising edge of the first frame synchronization signal and output to the first display device; and, The second pixel data is acquired based on the rising edge of the second frame synchronization signal and output to the second display device.
5. The method according to claim 1, characterized in that, If the preset signal is a frame synchronization signal, then acquiring first pixel data based on the preset signal and outputting it to the first display device, and acquiring second pixel data and outputting it to the second display device, includes: First pixel data is acquired based on the falling edge of the first frame synchronization signal and output to the first display device; and... The second pixel data is acquired based on the falling edge of the second frame synchronization signal and output to the second display device.
6. The method according to claim 1, characterized in that, If the preset signal is a data enable control signal, then acquiring first pixel data based on the preset signal and outputting it to the first display device, and acquiring second pixel data and outputting it to the second display device, includes: Based on the first data enable control signal, first pixel data is acquired and output to the first display device; and... The second pixel data is acquired based on the second data enable control signal and output to the second display device.
7. A display device, characterized in that, The device includes: A determining unit is used to determine the first pixel data of the first frame buffer and the second pixel data of the second frame buffer; The transmission unit is configured to acquire first pixel data based on a preset signal and output it to a first display device, and to acquire second pixel data and output it to a second display device; wherein the preset signal is a frame synchronization signal or a data enable control signal.
8. An electronic device, characterized in that, The computer device includes: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the computer program, when executed by the processor, implements the method as described in any one of claims 1-6.
9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the method as described in any one of claims 1-6.
10. A computer program product, characterized in that, The computer program product includes: computer program code, which, when run on an electronic device, causes the electronic device to perform the method described in any one of claims 1-6.