An over-temperature protection driving circuit and method applied to a single-phase BLDC motor

Abstract

The application discloses a kind of over-temperature protection drive circuit and method applied to single-phase BLDC motor, including first half-bridge drive structure, second half-bridge drive structure, first high-end pre-driver module, second high-end pre-driver module, first low-end pre-driver module, second low-end pre-driver module, the magnetic field of rotor of single-phase BLDC motor is detected by Hall sensor and exports logic signal hlogic;Over-temperature protection circuit detects the temperature of H bridge drive chip and exports tsd signal;Load current is zero detection circuit, and it is connected with single-phase BLDC motor, after triggering over-temperature protection high level signal, whether the load current of single-phase BLDC motor is zero is detected, and exports low_current signal;Over-temperature logic processing circuit drives control first high-end pre-driver module, second high-end pre-driver module, first low-end pre-driver module and second low-end pre-driver module according to tsd signal, low_current signal, pulse width modulation signal and logic signal hlogic.

Description

Technical Field

[0001] This invention relates to the field of drive protection circuit technology, and in particular to an over-temperature protection drive circuit and method for single-phase BLDC motors. Background Technology

[0002] Single-phase BLDC (brushless DC) motors often use H-bridge drives. H-bridge drive chips with integrated power transistors frequently incorporate over-temperature protection circuits. These circuits shut down the H-bridge power transistors when the ambient temperature is too high or the load current is too large, protecting the chip from overheating damage. Currently, the commonly used over-temperature protection logic in existing H-bridge technologies integrates an over-temperature detection circuit. When the chip temperature is detected to be higher than a set point, the four power transistors of the H-bridge are immediately shut down to reduce power consumption. However, since the driven load is an inductive load, this protection method has the following two drawbacks: First, when an over-temperature condition is triggered, the load current is often very large. After directly shutting down the power transistor, the inductor current will freewheel through the lower transistor on one half-bridge and the upper transistor on the other half-bridge. Regardless of whether it is the upper or lower transistor, due to the parasitic structure of the power transistor itself, when the body diode freewheels, the parasitic NPN or PNP device will conduct, further leading to a sudden increase in power consumption, which can damage the chip in severe cases. Second, after directly shutting down the power transistor, the inductor current will reverse charge the power supply through the freewheeling path of the upper transistor on one half-bridge. A large capacitor must be used to stabilize the power supply voltage. If a small capacitor is used, the power supply voltage may be excessively high due to the load current backflow, damaging the chip. The above method is similar to the technology disclosed in "Patent Publication No. CN119448833A, entitled H-bridge Motor Driver Chip Based on Segmented Current Drive Technology". It integrates an over-temperature protection module on the H-bridge driver chip. This over-temperature protection module generates an over-temperature current limiting signal and an over-temperature shutdown signal. The over-temperature shutdown signal has hysteresis characteristics and generates a positive temperature coefficient current to reduce the over-current threshold of the over-current protection module at high temperatures.

[0003] Therefore, there is an urgent need for a simple and reliable over-temperature protection drive circuit for single-phase BLDC motors. This circuit can suppress the freewheeling current of the upper half-bridge transistor on one side when over-temperature is triggered, while also avoiding the generation of backflow current, thus effectively protecting the chip. Summary of the Invention

[0004] To address the above problems, the present invention aims to provide an over-temperature protection drive circuit and method for single-phase BLDC motors. The technical solution adopted by the present invention is as follows: The first part of this technology provides an over-temperature protection drive circuit for a single-phase BLDC motor, which provides drive protection for the single-phase BLDC motor. This over-temperature protection drive circuit includes a first half-bridge drive structure composed of power transistors MHN1 and MHN2, a second half-bridge drive structure composed of power transistors MHN3 and MHN4, a first high-side pre-drive module connected to power transistor MHN1, a second high-side pre-drive module connected to power transistor MHN3, a first low-side pre-drive module connected to power transistor MHN2, and a second low-side pre-drive module connected to power transistor MHN4; wherein the first and second half-bridge drive structures are mounted on an H-bridge driver chip. Additionally, the over-temperature protection drive circuit also includes: A Hall sensor is installed inside a single-phase BLDC motor to detect the magnetic field of the rotor of the single-phase BLDC motor and output a logic signal hlogic corresponding to the magnetic field of the rotor. An over-temperature protection circuit is installed on the H-bridge driver chip to detect the temperature of the H-bridge driver chip and output a TSD signal. If the temperature of the H-bridge driver chip is higher than a preset temperature threshold, the TSD signal is high; otherwise, the TSD signal is low. The zero load current detection circuit is connected to a single-phase BLDC motor. After the over-temperature protection high-level signal is triggered, it detects whether the load current of the single-phase BLDC motor has reached zero and outputs a low_current signal. If the load current is zero, the low_current signal is high; otherwise, the low_current signal is low. The over-temperature logic processing circuit is connected to the over-temperature protection circuit and the load current zero detection circuit, and is externally connected to a pulse width modulation signal; the over-temperature logic processing circuit drives and controls the first high-end pre-drive module, the second high-end pre-drive module, the first low-end pre-drive module and the second low-end pre-drive module according to the TSD signal, the low_current signal, the pulse width modulation signal and the logic signal Hlogic.

[0005] Furthermore, the over-temperature protection circuit includes a temperature sensing unit, a temperature hysteresis generation unit, and a comparator connected in sequence; the comparator is externally connected to a reference voltage of the over-temperature threshold, compared with the voltage output by the temperature sensing unit, and outputs a TSD signal.

[0006] Furthermore, the temperature sensing unit is composed of transistor MP1, transistor MP2 and PNP transistor Q1; the gate of transistor MP1 is connected to the drain of transistor MP2 and is connected to an external zero-temperature bias current; the drain of transistor MP1 is connected to the emitter of PNP transistor Q1 and outputs VEB voltage to the comparator.

[0007] Furthermore, the temperature hysteresis generation unit consists of transistors MN1, MN2, and MN3; transistor MN1 is connected to transistor MP2 via transistor MP3, and the drain-source bias current of transistor MN1 is generated by transistor MP3 mirroring the zero-temperature coefficient bias current flowing into transistor MP2; the gate of transistor MN1 is connected to the gate of transistor MN2, forming a pair of current mirrors; the source of transistor MN3 is connected to the drain of transistor MN2, and the drain of transistor MN3 is connected to a comparator.

[0008] Furthermore, the comparator includes a first-stage resistive load differential amplifier circuit and a second-stage differential gain circuit connected in sequence; the first-stage resistive load differential amplifier circuit is externally connected to a reference voltage exceeding the temperature threshold and compared with the VEB voltage output by the PNP transistor Q1; the second-stage differential gain circuit is externally connected to a positive temperature coefficient bias current and amplifies the output of the first-stage resistive load differential amplifier circuit to obtain the TSD signal.

[0009] Furthermore, the zero load current detection circuit includes a positive threshold comparator and a negative threshold comparator, transistors MN5a and MN6a whose sources are both connected to the positive and negative threshold comparators, a NAND gate I5b connected to the positive and negative threshold comparators, and an inverter I6b connected to the output of the NAND gate I5b; the gate of transistor MN5a is connected to the output of the Hall sensor via inverter I1a; the gate of transistor MN6a is connected to the output of the Hall sensor; the drain of transistor MN5a is connected to one end of the single-phase BLDC motor via transistor MHN5, and the drain of transistor MN6a is connected to the other end of the single-phase BLDC motor via transistor MHN6.

[0010] Furthermore, the positive threshold comparator includes a first-stage resistive load differential circuit, a second-stage gain circuit, and a third-stage common-source amplifier connected in sequence; the third-stage common-source amplifier is connected to a NAND gate I5b.

[0011] Furthermore, the over-temperature logic processing circuit includes a first high-end pre-drive signal generation circuit, a second high-end pre-drive signal generation circuit, a first low-end pre-drive signal generation circuit, and a second low-end pre-drive signal generation circuit, all connected in parallel and externally connected to a pulse width modulation signal; a logic signal hlogic input circuit connected to the first high-end pre-drive signal generation circuit, the second high-end pre-drive signal generation circuit, the first low-end pre-drive signal generation circuit, and the second low-end pre-drive signal generation circuit; and a TSD signal input circuit connected to the first high-end pre-drive signal generation circuit, the second high-end pre-drive signal generation circuit, the first low-end pre-drive signal generation circuit, the second low-end pre-drive signal generation circuit, and the logic signal hlogic input circuit.

[0012] The second part of this technology provides an over-temperature protection method for single-phase BLDC motors, which employs an over-temperature protection drive circuit for single-phase BLDC motors for over-temperature protection. This over-temperature protection method includes the following steps: A Hall sensor is used to detect the magnetic field of the rotor of a single-phase BLDC motor and output a logic signal hlogic corresponding to the magnetic field of the rotor. The temperature of the H-bridge driver chip is detected by an over-temperature protection circuit, and a TSD signal is output. If the temperature of the H-bridge driver chip is higher than the preset temperature threshold, the TSD signal is high; otherwise, the TSD signal is low. The load current of a single-phase BLDC motor winding is detected using a zero-load current detection circuit. After the over-temperature protection high-level signal is triggered, the load current of the single-phase BLDC motor winding is checked to see if it has reached zero, and a low_current signal is output. If the load current is zero, the low_current signal is high; otherwise, the low_current signal is low. The over-temperature logic processing circuit acquires the TSD signal, low_current signal, pulse width modulation signal, and logic signal Hlogic to drive and control the first high-end pre-drive module, the second high-end pre-drive module, the first low-end pre-drive module, and the second low-end pre-drive module.

[0013] Compared with the prior art, the present invention has the following beneficial effects: This invention uses a Hall sensor to detect the magnetic field of the rotor of a single-phase BLDC motor. The magnetic field information output by the Hall sensor is used to drive and control the commutation of the motor, and the logic signal hlogic is input to the over-temperature logic processing circuit.

[0014] This invention uses an over-temperature protection circuit to detect the temperature of the H-bridge driver chip and a zero-load current detection circuit to detect the load current of the single-phase BLDC motor winding. The over-temperature logic processing circuit of this invention, in conjunction with the TSD signal output from the over-temperature protection circuit, the low_current signal output from the zero-load current detection circuit, the Hlogic logic signal output from the Hall sensor, and the pulse width modulation signal, drives the first high-side pre-drive module, the second high-side pre-drive module, the first low-side pre-drive module, and the second low-side pre-drive module. This over-temperature driving method avoids the parasitic device conduction caused by the freewheeling current in the power transistor body diodes due to immediately shutting down all power transistors when the temperature exceeds a certain point, which would lead to a sudden increase in chip power consumption and a sudden rise in power supply voltage due to backflow current. This effectively protects the chip. Attached Figure Description

[0015] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope of protection. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0016] Figure 1 This is a schematic diagram of the present invention.

[0017] Figure 2 This is a schematic diagram of the over-temperature protection circuit in this invention.

[0018] Figure 3 This is a schematic diagram of the zero load current detection circuit in this invention.

[0019] Figure 4 This is a schematic diagram of the hlogic input circuit for the logic signal in this invention.

[0020] Figure 5 This is a schematic diagram of the TSD signal input circuit in this invention.

[0021] Figure 6 This is a schematic diagram of the high and low end pre-drive signal generation circuit in this invention.

[0022] Figure 7 for Figure 6 The logic waveform of the medium delay unit.

[0023] Figure 8 This is a waveform diagram of the state when over-temperature is not triggered in this invention.

[0024] Figure 9 This is a waveform diagram of over-temperature triggering and deactivation in this invention. Detailed Implementation

[0025] To make the objectives, technical solutions, and advantages of this application clearer, the present invention will be further described below with reference to the accompanying drawings and embodiments. The embodiments of the present invention include, but are not limited to, the following embodiments. All other embodiments obtained by those skilled in the art based on the embodiments in this application without inventive effort are within the scope of protection of this application.

[0026] The terms "first" and "second," etc., used in the specification and claims of this embodiment are used to distinguish different objects, not to describe a specific order of objects. For example, "first target object" and "second target object," etc., are used to distinguish different target objects, not to describe a specific order of target objects.

[0027] In the embodiments of this application, the terms "exemplary" or "for example" are used to indicate that something is an example, illustration, or description. Any embodiment or design that is described as "exemplary" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design. Specifically, the use of the terms "exemplary" or "for example" is intended to present the relevant concepts in a specific manner.

[0028] In the description of the embodiments in this application, unless otherwise stated, "multiple" means two or more. For example, multiple processing units means two or more processing units; multiple systems means two or more systems.

[0029] like Figure 1 As shown, this embodiment provides an over-temperature protection drive circuit for a single-phase BLDC motor. Power transistors MHN1 and MHN2 form a first half-bridge drive structure, with its output terminal being out1. Power transistors MHN3 and MHN4 form a second half-bridge drive structure, with its output terminal being out2. The first and second half-bridge drive structures together form an H-bridge drive structure, where M represents the single-phase BLDC motor. The motor winding output terminals are connected to the half-bridge outputs out1 and out2, respectively.

[0030] This embodiment uses a Hall sensor installed inside a single-phase BLDC motor to detect the magnetic field of the motor's rotor and output a logic signal hlogic corresponding to that magnetic field. For example, when the rotor's N pole is close to the Hall sensor, the Hall sensor outputs hlogic at a high level; when the rotor's S pole is close, the Hall sensor outputs hlogic at a low level.

[0031] This embodiment uses a zero-load current detection circuit connected to a single-phase BLDC motor and a Hall sensor. After triggering an over-temperature condition, it checks whether the load current has reached zero. If the load current is zero, the output low_current is high; if the load current is not zero, the output low_current is low.

[0032] In this embodiment, the over-temperature protection circuit is installed on the H-bridge driver chip to detect the temperature of the H-bridge driver chip. When the chip temperature exceeds the set high threshold, the over-temperature protection circuit outputs a high-level TSD signal; when the chip temperature is below the set low threshold, the over-temperature protection circuit outputs a low-level TSD signal.

[0033] In this embodiment, the over-temperature logic processing circuit is connected to the over-temperature protection circuit and the zero-load current detection circuit, and is externally connected to a pulse width modulation signal (i.e., the input signal pwm_in). The over-temperature logic processing circuit, based on the TSD signal output by the over-temperature protection circuit, the input pulse width modulation signal pwm_in, the low_current output signal from the zero-load current detection circuit, and the hlogic output signal from the Hall sensor, performs logical operations and outputs the logic drive signals hson1, lson1, hson2, and lson2 for the H-bridge, thereby driving and controlling the first high-end pre-drive module, the second high-end pre-drive module, the first low-end pre-drive module, and the second low-end pre-drive module. In this embodiment, the input signal pwm_in is a pulse width modulation signal, used to set the output duty cycle of the half-bridge output terminals out1 and out2 when over-temperature and other protections are not triggered. It should be noted that the first high-end pre-drive module, the second high-end pre-drive module, the first low-end pre-drive module, and the second low-end pre-drive module in this embodiment are existing mature circuits and will not be described in detail here.

[0034] The following details the driving control process of logic drive signals hson1, lson1, hson2, and lson2: hson1 outputs to the first high-side pre-drive module to control the on and off of power transistor MHN1 (i.e., a high level of hson1 corresponds to power transistor MHN1 being on, and a low level of hson1 corresponds to power transistor MHN1 being off). hson2 outputs to the second high-side pre-drive module to control the on and off of power transistor MHN3 (i.e., a high level of hson2 corresponds to power transistor MHN3 being on, and a low level of hson1 corresponds to power transistor MHN3 being off). lson1 controls the on and off of power transistor MHN2 and transistor MHN5 through the first low-side pre-drive module (i.e., a high level of lson1 corresponds to power transistor MHN2 and transistor MHN5 being on, and a low level of lson1 corresponds to power transistor MHN2 and transistor MN5 being off). lson2 controls the turn-on and turn-off of power transistors MHN4 and MHN6 through the second low-side pre-drive module (i.e., a high level on lson1 corresponds to the turn-on of power transistors MHN4 and MHN6, and a low level on lson2 corresponds to the turn-off of power transistors MHN4 and MHN6). Transistor MHN5 turns on with a delay after power transistor MHN2 turns on, transmitting the voltage information at the half-bridge output out1 to the load current zero detection module. Transistor MHN6 turns on with a delay after power transistor MHN4 turns on, transmitting the voltage information at the half-bridge output out2 to the load current zero detection circuit.

[0035] like Figure 2As shown, in the over-temperature protection circuit, the input signal `ibias_ptat` is the positive temperature bias current input, the input signal `ibias_ztc` is the zero temperature bias current input, and the input signal `vref` is the reference voltage for setting the over-temperature threshold. The output signal `tsd` is the over-temperature logic indicator output; a high level of `tsd` indicates that the chip temperature exceeds the set high threshold, and a low level of `tsd` indicates that the chip temperature is below the set low threshold. The input signal `vcca` is the power supply input, and the input signal `agnd` is the module ground input.

[0036] The over-temperature protection circuit in this embodiment consists of a temperature sensing unit, a temperature hysteresis generation unit, and a comparator. The temperature sensing unit comprises transistors MP2, MP1, and PNP transistor Q1. Transistors MP2 and MP1 form a pair of current mirrors. The drain terminal of transistor MP1 outputs a current proportional to ibias_ztc, which flows through PNP transistor Q1. The emitter-base voltage difference VEB of PNP transistor Q1 exhibits a negative temperature characteristic (VEB decreases as temperature increases). The emitter of PNP transistor Q1 is connected to the comparator, which compares the acquired VEB voltage of PNP transistor Q1 with the reference voltage vref and generates the corresponding logic output signal tsd.

[0037] Furthermore, the temperature hysteresis generation unit consists of transistors MN1, MN2, and MN3. The drain-source bias current of transistor MN1 is generated by the zero-temperature bias current flowing into transistor MP2, mirrored by transistor MP3. Transistors MN1 and MN2 form a current mirror pair, and transistor MN3 is a switching transistor. When the gate of transistor MN3 is high, the current mirrored by transistor MN2 from transistor MN1 flows into the node where the drain of transistor MP6 is connected to resistor R1.

[0038] The comparator in this embodiment consists of two stages. The first stage is a resistive load differential amplifier circuit composed of transistors MP6 and MP7, resistors R1 and R2. Here, transistors MP6 and MP7 form the first-stage differential pair, and resistors R1 and R2 form the differential pair load. Transistors MP4 and MP5 are a pair of current mirrors, with the drain of transistor MP5 connected to the source of transistors MP6 and MP7, providing bias current to transistors MP6 and MP7.

[0039] The second stage consists of transistors MP9, MP10, MN4, MN5, MN6, MN7, MP11, and MP12. Transistors MP6 and MP10 form the second-stage differential pair; MN4 and MN5 are a current mirror pair; MN6 and MN7 are a current mirror pair; and MP11 and MP12 are current mirror loads, responsible for converting the differential input signal to a single-ended output at the drain of transistor MP12. Transistor MP8 provides bias current to transistors MP9 and MP10.

[0040] In this embodiment, the first stage of the comparator is a pre-amplification stage, and the second stage is a gain stage. A larger gain is obtained through these two amplification stages. Here, capacitor C1 is used to set the comparator's delay time. It should be noted that this embodiment does not improve the parameter setting calculations of the basic components; conventional techniques can be used to achieve this.

[0041] When VEB(Q1) rises below the reference voltage vref as the temperature increases, the comparator output tsd will change from low to high, where the high threshold temperature point is defined by the following formula: VEB_tr=vref Where VEB_tr is the emitter-base voltage of PNP transistor Q1 at temperature tr.

[0042] When the chip temperature exceeds the threshold temperature (tr), and then drops back to the temperature point (tf), the comparator output (tsd) will toggle from high to low. The low threshold temperature is defined by the following formula: VEB_tf=(vref+I_MN3 / gm6) Where VEB_tf is the emitter-base voltage of PNP transistor Q1 at temperature tf. I_MN3 is the drain-source current of transistor MN3 when it is turned on. Transistor MN3 is turned on when I2 output is high, i.e., tsd is high. gm6 is the transconductance of transistor MP6. Since the input signal ibias_ptat is a positive temperature coefficient current, the current of transistor MP4, mirrored by transistor MP5, is also a positive temperature coefficient current. Therefore, the transconductance gm6 of transistor MP6 can be set to be close to zero temperature coefficient. I_MN3 is obtained by mirroring the input current signal ibias_ztc through the current mirrors formed by transistors MP2 and MP3, and the current mirrors formed by transistors MN1 and MN2. Therefore, I_MN3 is a zero temperature coefficient current. Thus, I_MN3 / gm6 is a voltage value close to zero temperature coefficient. Based on this, (vref+I_MN3 / gm6) changes little with process angle and temperature. Therefore, the high threshold temperature point tr and the low threshold temperature point tf are relatively stable with changes in process angle and temperature.

[0043] like Figure 3 As shown, in the zero-load-current detection circuit, the input signal hlogic is connected to the Hall sensor output hlogic, and the input signals sns1 and sns2 are respectively connected to... Figure 1 The sources of transistors MN5a and MN6a are connected, and the output signal low_current is... Figure 1 The intermediate temperature logic processing circuit is connected.

[0044] The zero-load current detection circuit in this embodiment mainly consists of a positive threshold comparator and a negative threshold comparator. The positive threshold comparator comprises three stages: the first stage is a resistive load differential circuit consisting of transistors MP17a and MP18a, resistors R1a and R2a. Transistors MP17a and MP18a form the first-stage differential pair, and resistors R1a and R2a form the resistive load. Transistors MP1a and MP2a are a pair of current mirrors, with transistor MP2a providing bias current to transistors MP17a and MP18a. The second stage consists of transistors MP7a, MP8a, MN3a, and MN4a. Transistors MP7a and MP8a form the second-stage differential pair, and transistors MN3a and MN4a form a current mirror load. Transistor MP4a mirrors the current of transistor MP1a and provides bias current to transistors MP7a and MP8a. The third stage consists of transistors MN16a and MP6a. The third stage is a common-source amplifier, where transistor MP6a provides bias current to common-source transistor MN16a.

[0045] In this embodiment, the first stage of the positive threshold comparator is a pre-amplification stage, and the second and third stages are high-gain stages. The second stage provides high gain and also offers differential input to single-ended output conversion. The second and first stages are cascaded to convert the differential output of the first stage to the single-ended output of the second stage. The single-ended output point is the gate of the transistor MN16P. In this embodiment, capacitor C1a is used to set the delay time of the positive threshold comparator and can be used to shield against noise interference.

[0046] Here, resistor RP is connected between the source of transistor MP18a and the drain of transistor MP2a to set the positive threshold of the comparator, since the gate of transistor MP18a is connected to 0 potential. When the gate potential of transistor MP17a is lower than 0 + V_RP, the output pos of the positive threshold comparator will change from low to high. Where V_RP is the voltage across resistor RP, obtained from the following formula: V_RP=RP*(I_MP2a / 2) Where RP is the resistance value of resistor RP, and I_MP2a is the drain-source current of transistor MP2a.

[0047] The negative threshold comparator implemented here has a similar structure to the positive threshold comparator, except that the connection methods of resistors RN and RP are different. In the negative threshold comparator, resistor RN is connected to the source of transistor MP19b and the drain of transistor MP10b, and the gate of transistor MP19b is connected to the gate of transistor MP17a in the positive threshold comparator. Since the gate of transistor MP20b is grounded, when the gate potential of transistor MP19a is higher than (0-V_RN), the output neg of the negative threshold comparator will flip from low to high. Here, V_RN is the voltage across resistor RN, obtained from the following formula: V_RN=RN*(I_MP10b / 2) Wherein, RN represents the resistance value of resistor RN, and I_MP10b represents the drain-source current of transistor MP10b.

[0048] when Figure 1 When transistor MHN5 or transistor MHN6 is turned on, the voltage at outlet1 or outlet2 will be sampled. Figure 3 The sns1 or sns2 terminal is used. Therefore, when the voltage V_out1 or V_out2 is greater than (-V_RN) and less than V_RP, the positive threshold comparator output node pos and the negative threshold output node neg will be high simultaneously. Thus, the load current zero detection circuit outputs low_current at a high level. That is, a high low_current level requires the following formula to be satisfied: -RN*(I_MP10b / 2) <V_out<RP*(I_MP2a / 2) Where V_out represents Figure 1 The voltage at node out1 or out2 of the middle half-bridge output. When the above formula is satisfied, that is, when V_out is greater than the negative setting threshold and less than the positive setting threshold, it can be inferred that V_out is near zero voltage, that is, the load current is zero. The detection circuit outputs low_current at a high level, indicating that the current of the motor M winding is close to zero.

[0049] like Figures 4 to 6 As shown, in the over-temperature logic processing circuit, the input signal pwm_in is a pulse width modulation signal, and the input signal tsd is... Figure 1 The over-temperature protection circuit output is connected, and the input signal hlogic is connected to... Figure 1 The output of the Hall sensor is connected, and the input signal low_current is connected to it. Figure 1 The output of the zero-load-current detection circuit is connected. The output signal hson1 is passed through... Figure 1The switching on and off of the mid-to-high-end pre-drive control power transistor MN1, and the output signal lson1 through Figure 1 The low-to-mid-range pre-drive control power transistors MN2 and MN5 are turned on and off, and the output signal hson2 is transmitted through... Figure 1 The switching on and off of the mid-to-high-end pre-drive control power transistor MN3, and the output signal lson2 are transmitted through... Figure 1 The low-to-mid-range pre-drive control transistors MN4 and MN6 are turned on and off. The logic function waveforms of the delay unit are as follows: Figure 7 As shown, it employs a falling edge delay to set the dead time between hson1 and lson1, and between hson2 and lson2. It should be noted that the delay unit in this embodiment uses a conventional circuit, which will not be described in detail here.

[0050] like Figure 8 As shown, when the chip temperature is below the set low threshold, the input signal tsd is low. The input signal tsd is connected to one end of NAND gate I9 and NAND gate I11. After passing through NAND gate I9 and inverter I10, the output out1_hz is low. After passing through NAND gate I11 and inverter I12, the output out2_hz is low. At the same time, the output of inverter I14 connected to the input signal tsd is high, which resets the D flip-flop I13 connected to it. As a result, the Q output h_off of the D flip-flop is low. At this time, the output signals hson1, lson1, hson2, and lson2 follow the high and low states of the input signal hlogic, with one phase outputting the carrier and the other phase having the lower transistor high (this phase refers to hson1, lson1 or hson2, lson2).

[0051] like Figure 9As shown, when the chip temperature exceeds the set high threshold, the input signal tsd becomes high. Assume that at this time, the input signal hlogic is high and the input signal low_current is low. After passing through inverters I7 and I8, inverter I7 outputs hn low, and inverter I8 outputs hp high. This, in turn, passes through NAND gate I9 and inverter I10 to output out1_hz high, and through NAND gate I11 and inverter I12 to output out2_hz low. out1_hz is connected to one end of AND-OR-NOT gates I18 and I28. After passing through NAND gate I18 and inverter I19, inverter I19 outputs high, causing NAND gate I20 to output low. Finally, after passing through NAND gate I22 and inverter I23, hson1 outputs low. Similarly, the output lson1, after passing through NOR gate I28, inverter I29, NOR gate I30, NAND gate I32, and inverter I33, is at a low level. Since the D flip-flop I13 was previously reset by the input signal tsd being low, the Q output h_off remains low. The output hp of inverter I8 is connected to one end of NOR gate I35 and NOR gate I46. Because hp is currently high, the output hson2, after passing through NOR gate I35, inverter I36, NOR gate I37, inverter I38, NOR gate I39, NAND gate I40, and inverter I41, remains constant at a low level. The output lson2, after passing through NOR gate I46, inverter I47, NOR gate I48, inverter I49, NOR gate I50, NAND gate I51, and inverter I52, remains constant at a high level. Thus, both output signals hson1 and lson2 are low, making... Figure 1 Medium power transistor MHN1, power transistor MHN2, and transistor MHN5 are in the off state. Output signal hson2 is low, making... Figure 1 With the medium-power transistor MHN3 in the off state, the output signal lson2 is high, making... Figure 1 The medium power transistor MHN6 and transistor MHN4 are in the on state.

[0052] When the load current is zero, the detection circuit detects that the motor winding current is close to zero, and the output low_current signal becomes high. At this time, the CLK terminal of the D flip-flop I13 receives the rising edge signal of low_current, and the output h_off signal of the Q terminal of the D flip-flop I13 will become high. h_off is connected to one end of NOR gate I20, NOR gate I30, NOR gate I39, and NOR gate I50. The output hson1 signal of NOR gate I20, NAND gate I22, and inverter I23 is kept low. The output lson1 signal of NOR gate I30, NAND gate I32, and inverter I33 is kept low. The output hson2 signal of NOR gate I39, NAND gate I40, and inverter I41 is kept low. The output lson2 signal of NOR gate I50, NAND gate I51, and inverter I52 becomes low. At this point, the output signals hson1, lson1, hson2, and lson2 are all at low level, which will cause power transistors MHN1, MHN2, MHN5, MHN3, MHN4, and MHN6 to be in the off state.

[0053] When the chip temperature drops below the set low threshold, Figure 1 The over-temperature protection circuit outputs a TSD signal that goes low. Figure 8 The input signal tsd is connected to one end of NAND gates I9 and I11. After passing through NAND gate I9 and inverter I10, the output out1_hz becomes low. After passing through NAND gate I11 and inverter I12, the output out2_hz becomes low. The input signal tsd is then connected to the input of inverter I14. When the output of inverter I14 becomes high again, it resets D flip-flop I13, causing its Q output h_off to go low. At this point, out1_hz, out2_hz, and h_off all become low as the input signal tsd becomes low, and the chip continues to operate normally.

[0054] Using the above method, when the chip detects an overtemperature, Figure 1 In this H-bridge driver, power transistors MHN1, MHN2, MHN3, and MHN4 are not simultaneously turned off. Instead, based on the Hall sensor output signal, the upper and lower power transistors on one half of the bridge are turned off, while the upper power transistor on the other half remains on. Once the load current reaches zero, all power transistors in the H-bridge are then turned off. This over-temperature driving method avoids the parasitic device conduction caused by the freewheeling current in the power transistor body diodes, which would otherwise lead to a sudden increase in chip power consumption and a sudden rise in power supply voltage due to backflow current, thus effectively protecting the chip.

[0055] The above embodiments are merely preferred embodiments of the present invention and are not intended to limit the scope of protection of the present invention. Any changes made based on the design principles of the present invention, or any non-creative modifications made thereon, shall fall within the scope of protection of the present invention.

Claims

1. An over-temperature protection drive circuit for a single-phase BLDC motor, providing drive protection for the single-phase BLDC motor, comprising a first half-bridge drive structure composed of power transistors MHN1 and MHN2, a second half-bridge drive structure composed of power transistors MHN3 and MHN4, a first high-side pre-drive module connected to power transistor MHN1, a second high-side pre-drive module connected to power transistor MHN3, a first low-side pre-drive module connected to power transistor MHN2, and a second low-side pre-drive module connected to power transistor MHN4, wherein the first and second half-bridge drive structures are disposed on an H-bridge driver chip, characterized in that... Also includes: A Hall sensor is installed inside a single-phase BLDC motor to detect the magnetic field of the rotor of the single-phase BLDC motor and output a logic signal hlogic corresponding to the magnetic field of the rotor. An over-temperature protection circuit is installed on the H-bridge driver chip to detect the temperature of the H-bridge driver chip and output a TSD signal. If the temperature of the H-bridge driver chip is higher than a preset temperature threshold, the TSD signal is high; otherwise, the TSD signal is low. The zero load current detection circuit is connected to a single-phase BLDC motor. After the over-temperature protection high-level signal is triggered, it detects whether the load current of the single-phase BLDC motor has reached zero and outputs a low_current signal. If the load current is zero, the low_current signal is high; otherwise, the low_current signal is low. The over-temperature logic processing circuit is connected to the over-temperature protection circuit and the load current zero detection circuit, and is externally connected to a pulse width modulation signal; the over-temperature logic processing circuit drives and controls the first high-end pre-drive module, the second high-end pre-drive module, the first low-end pre-drive module and the second low-end pre-drive module according to the TSD signal, the low_current signal, the pulse width modulation signal and the logic signal Hlogic.

2. The over-temperature protection drive circuit for a single-phase BLDC motor according to claim 1, characterized in that, The over-temperature protection circuit includes a temperature sensing unit, a temperature hysteresis generation unit, and a comparator connected in sequence; the comparator is externally connected to a reference voltage of the over-temperature threshold, compared with the voltage output by the temperature sensing unit, and outputs a TSD signal.

3. The over-temperature protection drive circuit for a single-phase BLDC motor according to claim 2, characterized in that, The temperature sensing unit consists of transistor MP1, transistor MP2 and PNP transistor Q1; the gate of transistor MP1 is connected to the drain of transistor MP2 and is connected to an external zero-temperature bias current; the drain of transistor MP1 is connected to the emitter of PNP transistor Q1 and outputs VEB voltage to the comparator.

4. The over-temperature protection drive circuit for a single-phase BLDC motor according to claim 3, characterized in that, The temperature hysteresis generation unit consists of transistors MN1, MN2, and MN3. Transistor MN1 is connected to transistor MP2 via transistor MP3, and the drain-source bias current of transistor MN1 is generated by transistor MP3 mirroring the zero-temperature coefficient bias current flowing into transistor MP2. The gate of transistor MN1 is connected to the gate of transistor MN2, forming a pair of current mirrors. The source of transistor MN3 is connected to the drain of transistor MN2, and the drain of transistor MN3 is connected to a comparator.

5. The over-temperature protection drive circuit for a single-phase BLDC motor according to claim 4, characterized in that, The comparator includes a first-stage resistive load differential amplifier circuit and a second-stage differential gain circuit connected in sequence; the first-stage resistive load differential amplifier circuit is externally connected to a reference voltage that exceeds the temperature threshold and is compared with the VEB voltage output by the PNP transistor Q1. The second-stage differential gain circuit is connected to an external positive temperature coefficient bias current to amplify the output of the first-stage resistive load differential amplifier circuit, thereby obtaining the TSD signal.

6. An over-temperature protection drive circuit for a single-phase BLDC motor according to any one of claims 1 to 5, characterized in that, The zero load current detection circuit includes a positive threshold comparator and a negative threshold comparator, transistors MN5a and MN6a whose sources are both connected to the positive and negative threshold comparators, a NAND gate I5b connected to the positive and negative threshold comparators, and an inverter I6b connected to the output of the NAND gate I5b. The gate of transistor MN5a is connected to the output of a Hall sensor via inverter I1a. The gate of transistor MN6a is connected to the output of a Hall sensor. The drain of transistor MN5a is connected to one end of a single-phase BLDC motor via transistor MHN5, and the drain of transistor MN6a is connected to the other end of a single-phase BLDC motor via transistor MHN6.

7. The over-temperature protection drive circuit for a single-phase BLDC motor according to claim 6, characterized in that, The positive threshold comparator includes a first-stage resistive load differential circuit, a second-stage gain circuit, and a third-stage common-source amplifier connected in sequence; the third-stage common-source amplifier is connected to a NAND gate I5b.

8. The over-temperature protection drive circuit for a single-phase BLDC motor according to claim 7, characterized in that, The over-temperature logic processing circuit includes a first high-end pre-drive signal generation circuit, a second high-end pre-drive signal generation circuit, a first low-end pre-drive signal generation circuit, and a second low-end pre-drive signal generation circuit, all connected in parallel and externally connected to a pulse width modulation signal; a logic signal hlogic input circuit connected to the first high-end pre-drive signal generation circuit, the second high-end pre-drive signal generation circuit, the first low-end pre-drive signal generation circuit, and the second low-end pre-drive signal generation circuit; and a TSD signal input circuit connected to the first high-end pre-drive signal generation circuit, the second high-end pre-drive signal generation circuit, the first low-end pre-drive signal generation circuit, the second low-end pre-drive signal generation circuit, and the logic signal hlogic input circuit.

9. An over-temperature protection method for a single-phase BLDC motor, characterized in that, It employs the over-temperature protection drive circuit for single-phase BLDC motors as described in claims 1-8; the over-temperature protection method includes the following steps: A Hall sensor is used to detect the magnetic field of the rotor of a single-phase BLDC motor and output a logic signal hlogic corresponding to the magnetic field of the rotor. The temperature of the H-bridge driver chip is detected by an over-temperature protection circuit, and a TSD signal is output. If the temperature of the H-bridge driver chip is higher than the preset temperature threshold, the TSD signal is high; otherwise, the TSD signal is low. The load current of a single-phase BLDC motor winding is detected using a zero-load current detection circuit. After the over-temperature protection high-level signal is triggered, the load current of the single-phase BLDC motor winding is checked to see if it has reached zero, and a low_current signal is output. If the load current is zero, the low_current signal is high; otherwise, the low_current signal is low. The over-temperature logic processing circuit acquires the TSD signal, low_current signal, pulse width modulation signal, and logic signal Hlogic to drive and control the first high-end pre-drive module, the second high-end pre-drive module, the first low-end pre-drive module, and the second low-end pre-drive module.

Images