High-voltage protection device and method for a multi-resonant circuit, multi-wire disc electromagnetic cooker and dielectric

Abstract

The application discloses a high-voltage protection device and method of a multi-resonance loop, a multi-wire disc electromagnetic range and a medium, and relates to the technical field of electromagnetic range control. The high-voltage protection device of the multi-resonance loop comprises a synchronous detection module located in each resonance loop in a resonance loop combination, a first output end and a second output end of the synchronous detection module are combined through an OR gate circuit respectively, and a first combined output end and a second combined output end corresponding to the resonance loop combination are formed. A control chip is connected to the first combined output end and the second combined output end corresponding to the resonance loop combination through each interrupt port, is used for determining the level state of the first combined output end and the level state of the second combined output end, and accordingly, the power switch tube of each resonance loop in each resonance loop combination is protected from high voltage. The application can realize low-cost high-voltage protection of the multi-resonance loop.

Description

Technical Field

[0001] This application relates to the field of electromagnetic cooker control technology, and in particular to a high-voltage protection device, method, multi-coil electromagnetic cooker and medium for a multi-resonant circuit. Background Technology

[0002] For multi-coil induction cooktops, a single chip is needed to control multiple resonant circuits simultaneously. Each resonant circuit typically requires two independent interrupt trigger ports to provide high-voltage protection for the power switching transistors on the resonant circuit. At the same time, the chip also needs to perform other functions, thus requiring it to have a large number of I / O ports.

[0003] However, the number of I / O ports provided by conventional chips is usually insufficient to meet the above requirements, while chips with more I / O ports are expensive. This results in relatively high costs when implementing high-voltage protection functions for multi-resonant circuits. Summary of the Invention

[0004] The main objective of this application is to provide a high-voltage protection device, method, multi-coil induction cooker, and medium for multi-resonant circuits, aiming to achieve high-voltage protection for multi-resonant circuits at low cost.

[0005] To achieve the above objectives, this application proposes a high-voltage protection device with multiple resonant circuits, wherein the resonant circuits are combined to form multiple resonant circuit combinations. The high-voltage protection device with multiple resonant circuits includes:

[0006] A synchronization detection module is located in each of the resonant circuits in each of the resonant circuit combinations. The first-level output terminal and the second-level output terminal of the synchronization detection module are combined through an OR gate circuit to form the first-level combined output terminal and the second-level combined output terminal corresponding to each of the resonant circuit combinations.

[0007] The control chip has its interrupt ports connected to the first-level and second-level merging output terminals corresponding to each of the resonant circuit combinations. It is used to determine the voltage level of the first-level and second-level merging output terminals corresponding to each of the resonant circuit combinations, and to provide high-voltage protection for the power switching transistors of each resonant circuit in each resonant circuit combination based on the voltage level of the first-level and second-level merging output terminals corresponding to each of the resonant circuit combinations.

[0008] In one embodiment, the high-voltage protection device of the multi-resonant circuit further includes multiple current-limiting modules;

[0009] Each of the first-level merged output terminals and each of the second-level merged output terminals is connected to the interrupt port of the control chip through the current limiting module.

[0010] In one embodiment, the current limiting module includes a first resistor, a second resistor, and a capacitor;

[0011] The first end of the first resistor is connected to the power supply, the second end of the first resistor is connected to the first-level combined output terminal or the second-level combined output terminal, the second end of the first resistor is also connected to the first end of the second resistor, the second end of the second resistor and the first end of the capacitor are connected to the interrupt port of the control chip, and the second end of the capacitor is grounded.

[0012] In addition, to achieve the above objectives, this application also provides a high-voltage protection method for multiple resonant circuits. Each resonant circuit is combined to form multiple resonant circuit combinations. The first-level output terminal and the second-level output terminal of the synchronization detection module of each resonant circuit in each resonant circuit combination are respectively combined through an OR gate circuit to form the first-level combined output terminal and the second-level combined output terminal corresponding to each resonant circuit combination. The first-level combined output terminal and the second-level combined output terminal corresponding to each resonant circuit combination are respectively connected to the interrupt ports of the control chip.

[0013] The high-voltage protection method for the multi-resonant circuit includes:

[0014] Determine the level state of the first-stage merging output terminal and the level state of the second-stage merging output terminal corresponding to each of the aforementioned resonant circuit combinations;

[0015] Based on the voltage level of the first-stage merging output terminal and the voltage level of the second-stage merging output terminal corresponding to each of the resonant circuit combinations, high-voltage protection is provided for the power switching transistors of each resonant circuit in each of the resonant circuit combinations.

[0016] In one embodiment, the step of providing high-voltage protection for the power switches of each resonant circuit in each resonant circuit combination based on the voltage level of the first-stage merging output terminal and the voltage level of the second-stage merging output terminal corresponding to each resonant circuit combination includes:

[0017] For any of the resonant circuit combinations, the voltage protection level triggered by the resonant circuit combination is determined based on the level state of the first-level combined output terminal and the level state of the second-level combined output terminal corresponding to the resonant circuit combination.

[0018] Based on the voltage protection level triggered by the resonant circuit combination, high-voltage protection is provided for the power switching transistors of each resonant circuit in the resonant circuit combination.

[0019] In one embodiment, the step of providing high-voltage protection for the power switches of each resonant circuit in the resonant circuit combination based on the voltage protection level triggered by the resonant circuit combination includes:

[0020] For the power switch of any resonant circuit in the resonant circuit combination, when the voltage protection level triggered by the resonant circuit combination is the first-level protection level, the duty cycle of the power switch is reduced based on the preset duty cycle reduction amount to obtain the target duty cycle;

[0021] The power switch is controlled to operate at the target duty cycle, and after a preset time, the duty cycle of the power switch is gradually increased until the duty cycle of the power switch reaches the original duty cycle.

[0022] In one embodiment, the step of providing high-voltage protection for the power switching transistors of each resonant circuit in the resonant circuit combination based on the voltage protection level triggered by the resonant circuit combination further includes:

[0023] When the voltage protection level triggered by the resonant circuit combination is the first-level protection level, determine the number of times the resonant circuit combination triggers the first-level protection level within a preset period before the current time.

[0024] If the number of triggers is greater than or equal to a preset threshold, the power switch is controlled to operate at a preset duty cycle; the preset duty cycle is less than the target duty cycle.

[0025] In one embodiment, the step of determining the level state of the first-stage merging output terminal and the level state of the second-stage merging output terminal corresponding to each of the resonant circuit combinations includes:

[0026] For any of the resonant circuit combinations, if any one of the first-stage output terminals corresponding to the resonant circuit combination outputs a valid level signal, then the level state of the first-stage combined output terminal corresponding to the resonant circuit combination is determined to be a valid level state.

[0027] If each first-stage output terminal corresponding to the resonant circuit combination outputs an invalid level signal, then the level state of the first-stage combined output terminal corresponding to the resonant circuit combination is determined to be an invalid level state.

[0028] If any one of the secondary output terminals corresponding to the resonant circuit combination outputs a valid level signal, then the level state of the secondary combined output terminal corresponding to the resonant circuit combination is determined to be a valid level state.

[0029] If each secondary output terminal corresponding to the resonant circuit combination outputs an invalid level signal, then the level state of the secondary combined output terminal corresponding to the resonant circuit combination is determined to be an invalid level state.

[0030] In addition, to achieve the above objectives, this application also proposes a multi-coil induction cooker, which includes: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the computer program is configured to implement the steps of the high-voltage protection method for the multi-resonant circuit as described above.

[0031] In addition, to achieve the above objectives, this application also provides a computer-readable storage medium storing a computer program that is executed by a processor to implement the steps of the high-voltage protection method for the multi-resonant circuit as described above.

[0032] In addition, to achieve the above objectives, this application also provides a computer program product, which includes a computer program that, when executed by a processor, implements the steps of the high-voltage protection method for the multi-resonant circuit as described above.

[0033] This application provides a high-voltage protection device for multiple resonant circuits, wherein the resonant circuits are combined to form multiple resonant circuit combinations. The device includes: a synchronization detection module located in each resonant circuit of each resonant circuit combination; the first-level output terminal and the second-level output terminal of the synchronization detection module are combined through OR gate circuits to form the first-level combined output terminal and the second-level combined output terminal corresponding to each resonant circuit combination; and a control chip, wherein each interrupt port of the control chip is connected to the first-level combined output terminal and the second-level combined output terminal corresponding to each resonant circuit combination, and is used to determine the level state of the first-level combined output terminal and the level state of the second-level combined output terminal corresponding to each resonant circuit combination, and to perform high-voltage protection on the power switching transistors of each resonant circuit in each resonant circuit combination based on the level state of the first-level combined output terminal and the level state of the second-level combined output terminal corresponding to each resonant circuit combination.

[0034] Therefore, this application utilizes an OR gate circuit to merge the first-stage and second-stage outputs of the synchronization detection modules of each resonant circuit in the resonant circuit combination, so that each resonant circuit in the resonant circuit combination corresponds to a single first-stage merged output and a single second-stage merged output. Thus, the control chip only needs to connect to the first-stage and second-stage merged outputs corresponding to the resonant circuit combination to provide high-voltage protection for the power switches of each resonant circuit in the resonant circuit combination.

[0035] In summary, the technical solution provided in this application utilizes two independent interrupt trigger ports for each resonant circuit combination, meaning that multiple resonant circuits in the same combination share two independent interrupt trigger ports, thus achieving high-voltage protection for multiple resonant circuits. Therefore, compared to conventional methods where each resonant circuit requires two independent interrupt trigger ports, it eliminates the need for the control chip to have a large number of I / O ports, achieving high-voltage protection for multiple resonant circuits at a low cost. Attached Figure Description

[0036] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0037] Figure 1 A circuit diagram of a multi-coil induction cooker provided in an embodiment of this application;

[0038] Figure 2 A schematic diagram of the module structure of the high-voltage protection device for the multi-resonant circuit provided in the first embodiment of this application;

[0039] Figure 3 A schematic diagram of the circuit structure of the synchronization detection module provided in the first embodiment of this application;

[0040] Figure 4 A schematic diagram of the module structure of the high-voltage protection device for the multi-resonant circuit provided in the second embodiment of this application;

[0041] Figure 5 A schematic diagram of the circuit structure of the current limiting module provided in the second embodiment of this application;

[0042] Figure 6 A schematic diagram of the circuit structure of a high-voltage protection device for a multi-resonant circuit provided in an embodiment of this application;

[0043] Figure 7 A flowchart illustrating the high-voltage protection method for a multi-resonant circuit provided in this application embodiment;

[0044] Figure 8 A schematic diagram of the hardware operating environment for the high-voltage protection method of the multi-resonant circuit provided in the embodiments of this application.

[0045] The purpose, features, and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings.

[0046] Explanation of icon numbers:

[0047] 10. Synchronous detection module; 20. Current limiting module; 11. First-stage voltage divider unit; 12. First-stage comparator unit; 13. Second-stage voltage divider unit; 14. Second-stage comparator unit; U1. Control chip; R1~R11. Resistors; C1~C2. Capacitors; U1D~U2D. Comparators; COILX1~COILX2. Resonant circuit; V1~V2. Voltage of resonant circuit; Vref1. First preset voltage threshold; Vref2. Second preset voltage threshold; INT_PPG1. First-stage merged output terminal; INT_PPG2. Second-stage merged output terminal; GND. Ground;

[0048] 101. Processing device; 102. Read-only memory; 103. Storage device; 104. Random access memory; 105. Bus; 106. Input / output interface; 107. Input device; 108. Output device; 109. Communication device. Detailed Implementation

[0049] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0050] It should be noted that all directional indicators (such as up, down, left, right, front, back, etc.) in the embodiments of this application are only used to explain the relative positional relationship and movement of each component in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indicator will also change accordingly.

[0051] Furthermore, the use of terms such as "first" and "second" in this application is for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. Additionally, the technical solutions of the various embodiments can be combined with each other, but only on the basis of being achievable by those skilled in the art. When the combination of technical solutions is contradictory or impossible to implement, such a combination of technical solutions should be considered non-existent and not within the scope of protection claimed in this application.

[0052] For a detailed circuit diagram of a multi-coil induction cooker, please refer to [link / reference]. Figure 1 ,Depend on Figure 1As can be seen, for multi-coil induction cookers, a single chip is needed to control multiple resonant circuits simultaneously. Each resonant circuit typically requires two independent interrupt trigger ports to achieve high-voltage protection for the power switching transistors on the resonant circuit. At the same time, the chip also needs to perform other functions, thus requiring the chip to have a large number of I / O ports.

[0053] However, the number of I / O ports provided by conventional chips is usually insufficient to meet the above requirements, while chips with more I / O ports are expensive. This results in relatively high costs when implementing high-voltage protection functions for multi-resonant circuits.

[0054] Based on this, this application proposes a high-voltage protection device with multiple resonant circuits. The resonant circuits are combined to form multiple resonant circuit combinations. Please refer to... Figure 2 The high-voltage protection device for this multi-resonant circuit may include:

[0055] The synchronization detection module 10 is located in each resonant circuit of each resonant circuit combination. The first-level output terminal and the second-level output terminal of the synchronization detection module 10 are combined through OR gate circuits to form the first-level combined output terminal and the second-level combined output terminal corresponding to each resonant circuit combination.

[0056] The control chip U1 has its interrupt ports connected to the first-level and second-level merging output terminals corresponding to each resonant circuit combination. It is used to determine the voltage level of the first-level and second-level merging output terminals corresponding to each resonant circuit combination, and to provide high-voltage protection for the power switching transistors of each resonant circuit in each resonant circuit combination based on the voltage level of the first-level and second-level merging output terminals corresponding to each resonant circuit combination.

[0057] It should be noted that when multiple resonant circuits are combined to form a resonant circuit combination, they can be combined in pairs, or in groups of three or more. This embodiment does not impose any specific limitations on this. The level state can be an active level state or an inactive level state. Generally, one resonant circuit is connected to one synchronization detection module 10, and one synchronization detection module 10 has one primary output terminal and one secondary output terminal.

[0058] In one feasible implementation, the synchronization detection module 10 may include:

[0059] The input terminal of the first-stage voltage divider unit 11 is connected to the voltage detection terminal of the resonant circuit, and is used to divide the voltage of the resonant circuit to obtain the first-stage voltage divider.

[0060] The first-level comparison unit 12 has its first input terminal connected to the output terminal of the first-level voltage divider unit 11, and its second input terminal connected to the first preset voltage threshold. The output terminal of the first-level comparison unit 12 serves as the first-level output terminal corresponding to the synchronous detection module. It is used to compare the magnitude of the first-level voltage divider voltage with the first preset voltage threshold, and outputs an effective level signal when it is determined that the first-level voltage divider voltage is greater than the first preset voltage threshold.

[0061] The input terminal of the second-stage voltage divider unit 13 is connected to the output terminal of the first-stage voltage divider unit 11, and is used to divide the first-stage voltage to obtain the second-stage voltage.

[0062] The second-level comparison unit 14 has its first input terminal connected to the output terminal of the second-level voltage divider unit 13, and its second input terminal connected to a second preset voltage threshold. The output terminal of the second-level comparison unit 14 serves as the second-level output terminal corresponding to the synchronization detection module. It is used to compare the magnitude of the second-level voltage divider voltage with the second preset voltage threshold, and outputs a valid level signal when it is determined that the second-level voltage divider voltage is greater than the second preset voltage threshold.

[0063] It should be noted that both the first-stage voltage divider unit 11 and the second-stage voltage divider unit 13 can be voltage divider circuits composed of resistors, voltage divider circuits composed of other circuit elements, or other devices with voltage divider functions, etc., and this embodiment does not specifically limit them. Both the first-stage comparison unit 12 and the second-stage comparison unit 14 can be comparators, comparison circuits, or other devices with comparison functions, etc., and this embodiment does not specifically limit them.

[0064] Since the outputs of multiple comparators are electrically connected, they can automatically form an OR gate circuit. Therefore, when both the first-level comparator unit 12 and the second-level comparator unit 14 are comparators, the first-level outputs and second-level outputs of each resonant circuit in the resonant circuit combination can be directly connected to achieve the merging of the first-level outputs and the merging of the second-level outputs.

[0065] In one feasible implementation, please refer to Figure 3 The first-stage voltage divider unit 11 may include resistors R3 to R9, the first-stage comparator unit 12 may be a first comparator U1D, the second-stage voltage divider unit 13 may include a second capacitor C2, a tenth resistor R10 and an eleventh resistor R11, and the second-stage comparator unit 14 may be a second comparator U2D.

[0066] The third resistor R3, the fourth resistor R4, the fifth resistor R5, the sixth resistor R6, the seventh resistor R7, the eighth resistor R8, and the ninth resistor R9 are connected in series. The third resistor R3 is connected to the voltage detection terminal of the resonant circuit. The ninth resistor R9 is connected to the first terminal of the second capacitor C2, the first terminal of the tenth resistor R10, and the negative input terminal of the first comparator U1D. The positive input terminal of the first comparator U1D is connected to the first preset voltage threshold Vref1. The first terminal of the first comparator U1D is connected to the power supply, and the second terminal is grounded to GND. The second terminal of the tenth resistor R10 is connected to the first terminal of the eleventh resistor R11 and the negative input terminal of the second comparator U2D. The positive input terminal of the second comparator U2D is connected to the second preset voltage threshold Vref2. The first terminal of the second comparator U2D is connected to the power supply, and the second terminal is grounded to GND. The second terminal of the second capacitor C2 and the second terminal of the eleventh resistor R11 are grounded to GND.

[0067] It should be noted that the first preset voltage threshold Vref1, used as the basis for determining whether to trigger the first-level protection level, can be a default value or can be flexibly set by the user according to the actual situation. This embodiment does not impose specific limitations on this. The second preset voltage threshold Vref2, used as the basis for determining whether to trigger the second-level protection level, can also be a default value or can be flexibly set by the user according to the actual situation. This embodiment does not impose specific limitations on this. The second preset voltage threshold Vref2 can be greater than or equal to the first preset voltage threshold Vref1. The effective level signal output by the first-level comparison unit 12 can be a high-level signal or a low-level signal; similarly, the effective level signal output by the second-level comparison unit 14 can be a high-level signal or a low-level signal. Specifically:

[0068] When the positive input terminal of the first-level comparator unit 12 is connected to the output terminal of the first-level voltage divider unit 11, and its negative input terminal is connected to the first preset voltage threshold Vref1, the effective level signal output by the first-level comparator unit 12 is a high-level signal; similarly, when the positive input terminal of the second-level comparator unit 14 is connected to the output terminal of the second-level voltage divider unit 13, and its negative input terminal is connected to the second preset voltage threshold Vref2, the effective level signal output by the second-level comparator unit 14 is a high-level signal.

[0069] When the negative input terminal of the first-level comparison unit 12 is connected to the output terminal of the first-level voltage divider unit 11, and its positive input terminal is connected to the first preset voltage threshold Vref1, the effective level signal output by the first-level comparison unit 12 is a low-level signal; similarly, when the negative input terminal of the second-level comparison unit 14 is connected to the output terminal of the second-level voltage divider unit 13, and its positive input terminal is connected to the second preset voltage threshold Vref2, the effective level signal output by the second-level comparison unit 14 is a low-level signal.

[0070] As can be seen from the above, this embodiment utilizes an OR gate circuit to merge the first-level and second-level output terminals of the synchronization detection module 10 of each resonant circuit in the resonant circuit combination, so that each resonant circuit in the resonant circuit combination corresponds to a first-level merged output terminal and a second-level merged output terminal. Therefore, the control chip U1 only needs to connect to the first-level and second-level merged output terminals corresponding to the resonant circuit combination to provide high-voltage protection for the power switching transistors of each resonant circuit in the resonant circuit combination.

[0071] In summary, the technical solution provided in this embodiment utilizes two independent interrupt trigger ports for each resonant circuit combination, meaning that multiple resonant circuits in the same combination share two independent interrupt trigger ports, thus achieving high-voltage protection for multiple resonant circuits. Therefore, compared to conventional methods where each resonant circuit requires two independent interrupt trigger ports, it eliminates the need for the control chip U1 to have a large number of I / O ports, achieving high-voltage protection for multiple resonant circuits at a low cost.

[0072] Based on the first embodiment described above, a second embodiment of the high-voltage protection device for multi-resonant circuits of this application is proposed. For the second embodiment, please refer to... Figure 4 The high-voltage protection device for the multi-resonant circuit may also include multiple current-limiting modules 20;

[0073] Each primary merge output and each secondary merge output are connected to the interrupt port of the control chip U1 via the current limiting module 20.

[0074] It should be noted that the current limiting module 20 can be a current limiting circuit or other devices with current limiting function, and this embodiment does not specifically limit it.

[0075] In one feasible implementation, please refer to Figure 5 The current limiting module 20 may include a first resistor R1, a second resistor R2, and a first capacitor C1;

[0076] The first end of the first resistor R1 is connected to the power supply, the second end of the first resistor R1 is connected to the first-level or second-level combined output terminal, the second end of the first resistor R1 is also connected to the first end of the second resistor R2, the second end of the second resistor R2 and the first end of the first capacitor C1 are connected to the interrupt port of the control chip U1, and the second end of the first capacitor C1 is grounded to GND.

[0077] In this embodiment, by configuring each primary and secondary merging output terminal to be connected to the interrupt port of the control chip U1 via the current limiting module 20, the current input to the control chip U1 from the primary and secondary merging output terminals is limited. This prevents the control chip U1 from burning out due to excessive current input from either the primary or secondary merging output terminal.

[0078] For example, taking the combination of each resonant circuit in pairs to form multiple resonant circuit combinations as an example, the high-voltage protection device for multiple resonant circuits formed by combining the implementation methods in the above embodiments can be specifically referred to. Figure 6 . Specifically:

[0079] The voltage V1 of resonant circuit COILX1 and the voltage V2 of resonant circuit COILX2 are divided by their respective first-stage voltage divider units 11 to obtain the first-stage voltage divider voltages corresponding to resonant circuit COILX1 and COILX2. The first-stage comparator unit 12 corresponding to resonant circuit COILX1 outputs a level signal by comparing its corresponding first-stage voltage divider voltage with the first preset voltage threshold Vref1. At the same time, the first-stage comparator unit 12 corresponding to resonant circuit COILX2 also outputs a level signal by comparing its corresponding first-stage voltage divider voltage with the first preset voltage threshold Vref1. When the level signal output by one of the first-stage comparator units 12 corresponding to resonant circuit COILX1 and COILX2 is a valid level signal, the combined output terminal INT_PPG1 formed by the two will be in a valid level state.

[0080] The voltage V1 of resonant circuit COILX1 and the voltage V2 of resonant circuit COILX2 are divided simultaneously by their respective first-stage voltage divider unit 11 and second-stage voltage divider unit 13 to obtain the second-stage voltage divider voltages corresponding to resonant circuit COILX1 and COILX2. The second-stage comparator unit 14 corresponding to resonant circuit COILX1 outputs a level signal by comparing its corresponding second-stage voltage divider voltage with the second preset voltage threshold Vref2. At the same time, the second-stage comparator unit 14 corresponding to resonant circuit COILX2 also outputs a level signal by comparing its corresponding second-stage voltage divider voltage with the second preset voltage threshold Vref2. When the level signal output by one of the second-stage comparator units 14 corresponding to resonant circuit COILX1 and COILX2 is a valid level signal, the combined second-stage output terminal INT_PPG2 will be in a valid level state.

[0081] It should be noted that this example is only for the purpose of assisting in understanding this application and does not constitute a limitation on the high voltage protection device of the multi-resonant circuit of this application. Any simple modifications based on this technical concept are within the protection scope of this application.

[0082] Furthermore, this application embodiment also provides a high-voltage protection method for multiple resonant circuits. Each resonant circuit is combined to form multiple resonant circuit combinations. The primary and secondary output terminals of the synchronization detection module of each resonant circuit in each resonant circuit combination are combined using OR gate circuits to form the primary and secondary combined output terminals corresponding to each resonant circuit combination. The primary and secondary combined output terminals corresponding to each resonant circuit combination are respectively connected to the interrupt ports of the control chip. Please refer to... Figure 7 The high-voltage protection method for a multi-resonant circuit may include steps S10 to S20:

[0083] Step S10: Determine the level state of the first-stage merging output terminal and the level state of the second-stage merging output terminal corresponding to each resonant circuit combination;

[0084] In one feasible implementation, step S10 may include steps S11 to S14:

[0085] Step S11: For any resonant circuit combination, if any one of the first-stage output terminals corresponding to the resonant circuit combination outputs an effective level signal, then the level state of the first-stage combined output terminal corresponding to the resonant circuit combination is determined to be an effective level state.

[0086] Step S12: If each first-stage output terminal corresponding to the resonant circuit combination outputs an invalid level signal, then the level state of the first-stage combined output terminal corresponding to the resonant circuit combination is determined to be an invalid level state.

[0087] Step S13: If any one of the secondary output terminals corresponding to the resonant circuit combination outputs a valid level signal, then the level state of the secondary combined output terminal corresponding to the resonant circuit combination is determined to be a valid level state.

[0088] Step S14: If each secondary output terminal corresponding to the resonant circuit combination outputs an invalid level signal, then the level state of the secondary combined output terminal corresponding to the resonant circuit combination is determined to be an invalid level state.

[0089] Understandably, since the first-stage merged output is formed by combining multiple first-stage outputs using an OR gate circuit, when any one of the first-stage outputs corresponding to the resonant circuit combination outputs a valid level signal, the first-stage merged output corresponding to the resonant circuit combination will be in a valid level state. Similarly, when any one of the second-stage outputs corresponding to the resonant circuit combination outputs a valid level signal, the second-stage merged output corresponding to the resonant circuit combination will be in a valid level state.

[0090] Step S20: Based on the level state of the first-stage merging output terminal and the level state of the second-stage merging output terminal corresponding to each resonant circuit combination, perform high-voltage protection on the power switching transistors of each resonant circuit in each resonant circuit combination.

[0091] In one feasible implementation, step S20 may include steps S21 to S22:

[0092] Step S21: For any resonant circuit combination, determine the voltage protection level triggered by the resonant circuit combination based on the level state of the first-level merging output terminal and the level state of the second-level merging output terminal corresponding to the resonant circuit combination.

[0093] It should be noted that voltage protection levels can include primary protection level and secondary protection level. Primary protection level is mainly for mitigating the risk of instantaneous overvoltage caused by power grid fluctuations, sudden load changes, etc., to prevent damage to the power switching transistors. Secondary protection level is mainly for emergency protection against continuous overvoltage caused by hardware failures, severe load anomalies, etc., to prevent damage to the power switching transistors.

[0094] Additionally, it should be noted that when determining the voltage protection level triggered by the resonant circuit combination based on the level states of the first-level and second-level combined output terminals corresponding to the resonant circuit combination, if the level state of the first-level combined output terminal corresponding to the resonant circuit combination is an active level and the level state of the second-level combined output terminal corresponding to the resonant circuit combination is an inactive level, then the voltage protection level is determined to be level one; if both the level states of the first-level and second-level combined output terminals corresponding to the resonant circuit combination are active levels, then the voltage protection level is determined to be level two.

[0095] Step S22: Based on the voltage protection level triggered by the resonant circuit combination, perform high-voltage protection on the power switching transistors of each resonant circuit in the resonant circuit combination.

[0096] It should be noted that when performing high-voltage protection on the power switching transistors of each resonant circuit in the resonant circuit combination based on the voltage protection level triggered by the resonant circuit combination, when the voltage protection level triggered by the resonant circuit combination is the first-level protection level, the duty cycle of the power switching transistors of each resonant circuit in the resonant circuit combination can be reduced to reduce the output power of the multi-coil induction cooker; when the voltage protection level triggered by the resonant circuit combination is the second-level protection level, the power switching transistors of each resonant circuit in the resonant circuit combination can be controlled to be disconnected to stop the power output of the multi-coil induction cooker.

[0097] It is understandable that when reducing the duty cycle of the power switching transistors in each resonant circuit of the resonant circuit combination, directly reducing it to a very small duty cycle will cause the multi-coil induction cooker to be unable to maintain a large power output, thereby affecting the user experience. Therefore, in a feasible implementation, step S22 may include steps S221 to S222:

[0098] Step S221: For any power switch in the resonant circuit combination, when the voltage protection level triggered by the resonant circuit combination is the first-level protection level, the duty cycle of the power switch is reduced based on the preset duty cycle reduction amount to obtain the target duty cycle.

[0099] It should be noted that the preset duty cycle reduction amount can be a default value or can be flexibly set by the user according to the actual situation; this embodiment does not impose specific limitations on this. In one feasible implementation, to ensure that the multi-coil induction cooker can still achieve maximum power output after the function switch is operating at the target duty cycle, the minimum duty cycle required for the power switch to achieve maximum power output of the multi-coil induction cooker can be obtained and used as the duty cycle threshold. Based on this, the target duty cycle can be set to be greater than or equal to this duty cycle threshold.

[0100] Step S222: Control the power switch to operate at the target duty cycle, and after a preset time, gradually increase the duty cycle of the power switch until the duty cycle of the power switch reaches the original duty cycle.

[0101] It should be noted that the preset duration can be a default value or can be flexibly set by the user according to the actual situation. This embodiment does not impose specific limitations on this. The original duty cycle is the duty cycle initially used by the power switch.

[0102] This implementation method, by setting the voltage protection level triggered by the resonant circuit combination to the first-level protection level, appropriately reduces the duty cycle of the power switch transistor by utilizing a preset duty cycle reduction. At this time, because the reduction in the duty cycle of the power switch transistor is small, the multi-coil induction cooker can still maintain a relatively high power output. This not only mitigates the risk of overvoltage but also ensures a good user experience for the multi-coil induction cooker.

[0103] Furthermore, in this embodiment, after the power switch transistor operates at an appropriately reduced duty cycle for a period of time, the duty cycle of the power switch transistor will be gradually increased so that the duty cycle of the power switch transistor is restored to the original duty cycle. This will restore the output power of the multi-coil induction cooker to the power level under normal operating conditions, thereby further ensuring the user's experience with the multi-coil induction cooker.

[0104] In one feasible implementation, step S22 may further include steps S223 to S224:

[0105] Step S223: When the voltage protection level triggered by the resonant circuit combination is the first-level protection level, determine the number of times the resonant circuit combination triggers the first-level protection level within the preset period before the current moment.

[0106] It should be noted that the preset period can be a default period or can be flexibly set by the user according to the actual situation. This embodiment does not make specific limitations on this.

[0107] Step S224: If the number of triggers is greater than or equal to the preset number threshold, then control the power switch to operate at the preset duty cycle; the preset duty cycle is less than the target duty cycle.

[0108] It should be noted that the preset number threshold is used as the basis for determining whether the resonant circuit combination frequently triggers the first level of protection. It can be a default value or it can be flexibly set by the user according to the actual situation. This embodiment does not make specific limitations on this.

[0109] Understandably, when the resonant circuit combination frequently triggers the first-level protection, it indicates that reducing the duty cycle of the power switching transistor by the preset duty cycle reduction method is not effective in mitigating the overvoltage risk. In this case, the duty cycle of the power switching transistor in each resonant circuit of the resonant circuit combination can be directly reduced to a very small duty cycle (i.e., the preset duty cycle), thereby effectively mitigating the overvoltage risk.

[0110] The high-voltage protection method for multi-resonant circuits provided in this application can achieve high-voltage protection for multi-resonant circuits at low cost. Compared with the prior art, the beneficial effects of the high-voltage protection method for multi-resonant circuits provided in this application are the same as those of the high-voltage protection device for multi-resonant circuits provided in the above embodiments, and other technical features in this high-voltage protection method for multi-resonant circuits are the same as those disclosed in the above embodiments, and will not be repeated here.

[0111] In addition, this application embodiment also provides a multi-coil induction cooker, which may include a processor and a memory. The memory stores a soft-start control program, which is called by the processor to implement the high-voltage protection method of the multi-resonant circuit provided in the above embodiment.

[0112] The following is for reference. Figure 8 It shows a structural schematic diagram of a multi-coil induction cooker suitable for implementing the embodiments of this application. Figure 8 The multi-coil induction cooker shown is merely an example and should not impose any limitations on the functionality and scope of use of the embodiments of this application.

[0113] like Figure 8As shown, the multi-coil induction cooker may include a processing unit 101 (e.g., a central processing unit, a graphics processing unit, etc.), which can perform various appropriate actions and processes according to a program stored in a read-only memory 102 or a program loaded from a storage device 103 into a random access memory 104. The random access memory 104 also stores various programs and data required for the operation of the multi-coil induction cooker. The processing unit 101, the read-only memory 102, and the random access memory 104 are interconnected via a bus 105. An input / output interface 106 is also connected to the bus 105. Typically, the following systems can be connected to the input / output interface 106: input devices 107 including, for example, a touch screen, touchpad, keyboard, mouse, image sensor, microphone, accelerometer, gyroscope, etc.; output devices 108 including, for example, a liquid crystal display (LCD), speaker, vibrator, etc.; storage devices 103 including, for example, magnetic tape, hard disk, etc.; and communication devices 109. The communication device 109 allows the multi-coil induction cooker to communicate wirelessly or wiredly with other devices to exchange data. Although the diagram shows a multi-panel induction cooker with various systems, it should be understood that it is not required to implement or have all of the systems shown, and it is possible to implement or have more or fewer systems instead.

[0114] In particular, according to embodiments of this disclosure, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, embodiments of this disclosure include a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via a communication device, or installed from storage device 103, or installed from read-only memory 102. When the computer program is executed by processing device 101, it performs the functions defined in the methods of the embodiments of this application.

[0115] The multi-coil induction cooker provided in this application embodiment can achieve high-voltage protection for multi-resonant circuits at low cost. Compared with the prior art, the beneficial effects of the multi-coil induction cooker provided in this application embodiment are the same as the beneficial effects of the high-voltage protection method for multi-resonant circuits provided in the above embodiments, and will not be repeated here.

[0116] It should be understood that various parts of the embodiments of this application can be implemented using hardware, software, firmware, or a combination thereof. In the description of the above embodiments, specific features, structures, materials, or characteristics can be combined in any suitable manner in one or more embodiments or examples.

[0117] The above description is merely a specific implementation of the embodiments of this application, but the protection scope of the embodiments of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the protection scope of the embodiments of this application. Therefore, the protection scope of the embodiments of this application should be determined by the protection scope of the above claims.

[0118] Furthermore, embodiments of this application also provide a computer-readable storage medium storing a computer program that can run on a processor, the computer program being used to execute the high-voltage protection method for the multi-resonant circuit described in the above embodiments.

[0119] The computer-readable storage medium provided in this application embodiment may be, for example, a USB flash drive, but is not limited to, electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems or devices, or any combination thereof. More specific examples of computer-readable storage media may include, but are not limited to: electrical connections having one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof. In this embodiment, the computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, system, or device. The program code contained on the computer-readable storage medium may be transmitted using any suitable medium, including but not limited to: wires, optical cables, RF (Radio Frequency), etc., or any suitable combination thereof.

[0120] The aforementioned computer-readable storage medium may be included in the multi-coil induction cooker; or it may exist independently and not assembled into the multi-coil induction cooker.

[0121] The aforementioned computer-readable storage medium carries one or more programs. When the aforementioned one or more programs are executed by the multi-coil induction cooker, the multi-coil induction cooker: determines the level state of the first-stage merging output terminal and the level state of the second-stage merging output terminal corresponding to each resonant circuit combination; and performs high-voltage protection on the power switching transistors of each resonant circuit in each resonant circuit combination based on the level state of the first-stage merging output terminal and the level state of the second-stage merging output terminal corresponding to each resonant circuit combination.

[0122] Computer program code for performing the operations of this disclosure can be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, and C++, and conventional procedural programming languages ​​such as the "C" language or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or can be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0123] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this application. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0124] The modules described in the embodiments of this application can be implemented in software or hardware. The names of the modules do not necessarily limit the functionality of the unit itself.

[0125] The computer-readable storage medium provided in this application embodiment stores computer-readable program instructions for executing the above-described high-voltage protection method for multi-resonant circuits, enabling low-cost high-voltage protection of multi-resonant circuits. Compared with the prior art, the beneficial effects of the computer-readable storage medium provided in this application embodiment are the same as the beneficial effects of the high-voltage protection method for multi-resonant circuits provided in the above embodiments, and will not be repeated here.

[0126] Furthermore, this application also provides a computer program product, including a computer program that, when executed by a processor, implements the high-voltage protection method for the multi-resonant circuit as described above.

[0127] The computer program product provided in this application embodiment can achieve high voltage protection for multi-resonant circuits at low cost. Compared with the prior art, the beneficial effects of the computer program product provided in this application embodiment are the same as the beneficial effects of the high voltage protection method for multi-resonant circuits provided in the above embodiments, and will not be repeated here.

[0128] The above description is merely a preferred embodiment of this application and does not limit the patent scope of this application. Any equivalent structural transformations made based on the content of this application's specification and drawings under the concept of this application, or direct / indirect applications in other related technical fields, are included within the patent protection scope of this application.

Claims

1. A high-voltage protection device with multiple resonant circuits, characterized in that, Each resonant circuit is combined to form multiple resonant circuit combinations, and the high-voltage protection device for the multiple resonant circuits includes: A synchronization detection module is located in each of the resonant circuits in each of the resonant circuit combinations. The first-level output terminal and the second-level output terminal of the synchronization detection module are combined through an OR gate circuit to form the first-level combined output terminal and the second-level combined output terminal corresponding to each of the resonant circuit combinations. The control chip has its interrupt ports connected to the first-level and second-level merging output terminals corresponding to each of the resonant circuit combinations. It is used to determine the voltage level of the first-level and second-level merging output terminals corresponding to each of the resonant circuit combinations, and to provide high-voltage protection for the power switching transistors of each resonant circuit in each resonant circuit combination based on the voltage level of the first-level and second-level merging output terminals corresponding to each of the resonant circuit combinations.

2. The high-voltage protection device for multi-resonant circuits as described in claim 1, characterized in that, The high-voltage protection device of the multi-resonant circuit also includes multiple current-limiting modules; Each of the first-level merged output terminals and each of the second-level merged output terminals is connected to the interrupt port of the control chip through the current limiting module.

3. The high-voltage protection device for a multi-resonant circuit as described in claim 2, characterized in that, The current limiting module includes a first resistor, a second resistor, and a capacitor; The first end of the first resistor is connected to the power supply, the second end of the first resistor is connected to the first-level combined output terminal or the second-level combined output terminal, the second end of the first resistor is also connected to the first end of the second resistor, the second end of the second resistor and the first end of the capacitor are connected to the interrupt port of the control chip, and the second end of the capacitor is grounded.

4. A high-voltage protection method for a multi-resonant circuit, characterized in that, Each resonant circuit is combined to form multiple resonant circuit combinations. The first-level output and second-level output of the synchronization detection module of each resonant circuit in each resonant circuit combination are combined by an OR gate circuit to form the first-level combined output and second-level combined output corresponding to each resonant circuit combination. The first-level combined output and second-level combined output corresponding to each resonant circuit combination are respectively connected to the interrupt ports of the control chip. The high-voltage protection method for the multi-resonant circuit includes: Determine the level state of the first-stage merging output terminal and the level state of the second-stage merging output terminal corresponding to each of the aforementioned resonant circuit combinations; Based on the voltage level of the first-stage merging output terminal and the voltage level of the second-stage merging output terminal corresponding to each of the resonant circuit combinations, high-voltage protection is provided for the power switching transistors of each resonant circuit in each of the resonant circuit combinations.

5. The high-voltage protection method for a multi-resonant circuit as described in claim 4, characterized in that, The step of providing high-voltage protection for the power switches of each resonant circuit in each resonant circuit combination based on the voltage level of the first-stage merging output terminal and the voltage level of the second-stage merging output terminal corresponding to each resonant circuit combination includes: For any of the resonant circuit combinations, the voltage protection level triggered by the resonant circuit combination is determined based on the level state of the first-level combined output terminal and the level state of the second-level combined output terminal corresponding to the resonant circuit combination. Based on the voltage protection level triggered by the resonant circuit combination, high-voltage protection is provided for the power switching transistors of each resonant circuit in the resonant circuit combination.

6. The high-voltage protection method for a multi-resonant circuit as described in claim 5, characterized in that, The step of providing high-voltage protection for the power switching transistors of each resonant circuit in the resonant circuit combination based on the voltage protection level triggered by the resonant circuit combination includes: For the power switch of any resonant circuit in the resonant circuit combination, when the voltage protection level triggered by the resonant circuit combination is the first-level protection level, the duty cycle of the power switch is reduced based on the preset duty cycle reduction amount to obtain the target duty cycle; The power switch is controlled to operate at the target duty cycle, and after a preset time, the duty cycle of the power switch is gradually increased until the duty cycle of the power switch reaches the original duty cycle.

7. The high-voltage protection method for a multi-resonant circuit as described in claim 6, characterized in that, The step of providing high-voltage protection for the power switching transistors of each resonant circuit in the resonant circuit combination based on the voltage protection level triggered by the resonant circuit combination further includes: When the voltage protection level triggered by the resonant circuit combination is the first-level protection level, determine the number of times the resonant circuit combination triggers the first-level protection level within a preset period before the current time. If the number of triggers is greater than or equal to a preset threshold, the power switch is controlled to operate at a preset duty cycle; the preset duty cycle is less than the target duty cycle.

8. The high-voltage protection method for a multi-resonant circuit as described in any one of claims 5 to 7, characterized in that, The step of determining the level state of the first-stage merging output terminal and the level state of the second-stage merging output terminal corresponding to each of the resonant circuit combinations includes: For any of the resonant circuit combinations, if any one of the first-stage output terminals corresponding to the resonant circuit combination outputs a valid level signal, then the level state of the first-stage combined output terminal corresponding to the resonant circuit combination is determined to be a valid level state. If each first-stage output terminal corresponding to the resonant circuit combination outputs an invalid level signal, then the level state of the first-stage combined output terminal corresponding to the resonant circuit combination is determined to be an invalid level state. If any one of the secondary output terminals corresponding to the resonant circuit combination outputs a valid level signal, then the level state of the secondary combined output terminal corresponding to the resonant circuit combination is determined to be a valid level state. If each secondary output terminal corresponding to the resonant circuit combination outputs an invalid level signal, then the level state of the secondary combined output terminal corresponding to the resonant circuit combination is determined to be an invalid level state.

9. A multi-coil induction cooker, characterized in that, The multi-coil induction cooker includes: a memory, a processor, and a computer program stored in the memory and executable on the processor, the computer program being configured to implement the steps of the high-voltage protection method for the multi-resonant circuit as described in any one of claims 4 to 8.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the high-voltage protection method for a multi-resonant circuit as described in any one of claims 4 to 8.

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