Power sharing control method and system for grid-forming multi-machine parallel inverter

Abstract

The application discloses a network-constructing type multi-machine parallel inverter power sharing control method and system, belongs to the technical field of network-constructing type inverter control, and is used for solving the problem that reactive power is unevenly distributed due to line impedance mismatch of multiple network-constructing type inverters in an island micro-grid and the problem that existing methods rely on communication or accurate impedance parameters. The method simultaneously adds a virtual impedance value to each inverter at a system steady state, so that reactive power is redistributed; after a new steady state is reached, each inverter increases or decreases the local virtual impedance according to the change direction of the local reactive power, and the adjusted virtual impedance is used for virtual impedance voltage drop compensation, and the iteration is repeated until the reactive power iteration error of two adjacent times is less than a preset threshold, so that the reactive power sharing is realized.

Description

Technical Field

[0001] This application belongs to the field of grid-connected inverter control technology, and relates to a power sharing control method and system for grid-connected multi-machine parallel inverters. Background Technology

[0002] With the increasing penetration rate of new energy power generation, distributed power sources, represented by wind power and photovoltaics, are playing an increasingly important role in islanded microgrids. Grid-connected inverters, as the core equipment for the construction and stable operation of islanded systems, not only provide voltage and frequency references for the system but also possess the ability to autonomously regulate active and reactive power, making them a key technological guarantee for the stable operation of islanded microgrids. In practical applications, to meet the capacity requirements of islanded systems and improve power supply reliability, multiple grid-connected inverters are typically connected in parallel.

[0003] In islanded operation mode, the system lacks the support and regulation of the main power grid, making the coordinated power distribution among the various grid-connected inverters crucial. However, due to the dispersed installation locations of distributed power sources, there are significant differences in the line impedance from the output of each inverter to the point of common coupling (PCC), posing a severe challenge to traditional droop control in multi-inverter parallel systems. This line impedance mismatch can lead to inconsistent output voltage amplitudes, resulting in severely uneven reactive power distribution. This uneven reactive power distribution not only causes some inverters to operate under overload for extended periods, reducing equipment lifespan and system reliability, but also generates circulating currents among parallel units, increasing system losses and potentially causing power oscillations and voltage instability, seriously affecting the safe and stable operation of the islanded system.

[0004] Currently, research on the uneven reactive power distribution in islanded operation mainly focuses on two methods: improved droop control and virtual impedance compensation. Improved droop control schemes typically rely on accurate measurement of the point of common coupling voltage or real-time communication between inverters. However, communication networks in islanded systems are costly to build and unreliable, and voltage measurement accuracy is significantly affected by line parameters, limiting the practical application of such methods. While virtual impedance methods can improve power distribution by introducing impedance compensation, traditional schemes require precise acquisition of line impedance parameters, which is difficult to achieve in islanded systems. Furthermore, the reliance on a central controller for coordination contradicts the "plug-and-play, autonomous and collaborative" design philosophy of grid-connected inverters.

[0005] The unique characteristics of islanded operation further exacerbate the technical contradictions faced by existing methods: the contradiction between the system's requirements for communication reliability and the limitations of actual communication conditions, and the contradiction between the requirements for control precision and the difficulty of parameter acquisition. Especially in islanded systems with multiple grid-connected inverters connected in parallel, how to achieve autonomous, precise, and dynamic balanced distribution of reactive power without relying on communication and accurate line parameters has become a key technical bottleneck restricting the safe and stable operation of islanded systems.

[0006] Therefore, in response to the practical need for parallel operation of multiple grid-connected inverters in islanded operation mode, there is an urgent need to propose an intelligent control method that does not require communication, does not rely on precise impedance parameters, and has good engineering adaptability. Summary of the Invention

[0007] This application provides a power sharing control method and system for grid-connected multi-inverter inverters. Addressing the problem of uneven reactive power distribution caused by impedance mismatch between each inverter and the common coupling point (PCC) when multiple grid-connected inverters operate in parallel in an islanded microgrid, this method does not rely on precise line impedance parameters and can achieve reactive power sharing control through virtual impedance iterative adjustment based on changes in the inverter's reactive power.

[0008] To achieve the above objectives, this application provides the following technical solution: In a first aspect, this application provides a power-sharing control method for grid-connected multi-machine parallel inverters, used in a parallel inverter system where multiple grid-connected inverters are connected in parallel to a common coupling point (PCC). The method includes: When the inverter parallel system is in steady state, virtual impedance values ​​are added to each grid-connected inverter to break the original steady state of the system and redistribute the reactive power among the grid-connected inverters. After the system reaches a new steady state, each grid-connected inverter determines the direction of increase or decrease in the iterative virtual impedance by judging the magnitude of its own reactive power change. The virtual impedance step size L is set during the iteration process. v_per The virtual impedance step size L of the steady-state perturbation step v_add The reactive power Q of the i-th grid-type inverter is equal and both are δ. i When the reactive power Q of the i-th grid-type inverter decreases, the virtual impedance step size δ is increased. i When the value increases, the virtual impedance step size δ of the i-th grid-type inverter decreases. The iteratively adjusted virtual impedance is used to compensate for the virtual impedance voltage drop of the corresponding grid-type inverter, and the virtual impedance iteration is repeated until the reactive power iteration error between the k-th iteration and the (k-1)-th iteration is less than the preset threshold, so as to achieve the equal distribution of reactive power among each grid-type inverter.

[0009] As a further improvement to this application, before performing the steady-state disturbance step, the steady-state operating point of the system is determined, and the voltage outer loop controller parameter K is designed. pu and K iu Current inner loop proportionality coefficient K i droop coefficient K p and K q and the initial value of the virtual impedance L v .

[0010] As a further improvement of this application, the control system of the grid-type inverter adopts a dq coordinate system architecture, samples the voltage and current signals at the output terminal, and generates voltage amplitude and angular frequency reference values ​​through the power outer loop; The reference voltage corresponding to the voltage amplitude and angular frequency reference value is used as the inner loop input after being compensated by virtual impedance voltage drop, and is adjusted by a voltage and current dual closed-loop controller. The voltage loop of the voltage-current dual closed-loop controller uses a proportional-integral controller, and the current loop uses a proportional controller. The signal regulated by the voltage-current dual closed-loop controller is used to generate a switching transistor drive signal through the SPWM module.

[0011] As a further improvement to this application, the virtual impedance includes a virtual inductance L. v and virtual resistance R v ; As a further improvement to this application, the virtual resistance R v It is 0.

[0012] As a further improvement to this application, in the steady-state disturbance step, the virtual impedance value L is simultaneously added to each grid-connected inverter. v_add After (δ), the reactive power equalization error ΔQ1 after the steady-state disturbance step is obtained, and the reactive power equalization error ΔQ1 is less than the reactive power equalization error ΔQ0 in the initial state.

[0013] As a further improvement of this application, the multiple grid-connected inverters include a first inverter, a second inverter, and a third inverter with the same capacity. The equivalent output impedances of the first inverter, the second inverter, and the third inverter are X1, X2, and X3, respectively, and satisfy X1 < X2 < X3. The reactive power of the first inverter, the second inverter, and the third inverter are Q1, Q2, and Q3, respectively. As a further improvement of this application, after the steady-state disturbance step, the reactive power of the first inverter decreases, the reactive power of the third inverter increases, and the change in reactive power of the second inverter depends on the relationship between X2 and A, wherein... A =( X1 X 3( X 1+ X 3) d +2 X 1 X 3 d 2 ) / (( X 1 2 + X 3 2 ) d +( X 1+ X 3) d 2 ); In the first iteration step after the steady-state disturbance step, when X2=A, the virtual impedance Lv2 of the second inverter remains unchanged; when X2>A, the virtual impedance Lv2 of the second inverter decreases; when X2<A, the virtual impedance Lv2 of the second inverter increases; As a further improvement of the present application, in the first iteration step after the steady-state disturbance step, the virtual impedance of the first inverter changes from δ to 2δ, and the virtual impedance of the third inverter changes from δ to 0.

[0014] As a further improvement of the present application, in each iteration step, the corresponding virtual impedance is adjusted to increase or decrease based on the magnitude change of the reactive power of each grid-forming inverter, so that the reactive power sharing error of the parallel inverter system is gradually reduced.

[0015] As a further improvement of the present application, after one virtual impedance iteration process ends, if the i-th grid-forming inverter does not become the inverter with the minimum reactive power, or the j-th grid-forming inverter does not become the inverter with the maximum reactive power, the virtual impedance iteration process is repeated again until the reactive power of each grid-forming inverter is equally shared after the K-th iteration.

[0016] As a further improvement of the present application, the grid-forming inverter is a three-phase inverter, and the three-phase inverter includes a switching tube S1, a switching tube S2, a switching tube S3, a switching tube S4, a switching tube S5 and a switching tube S6, and the DC side of the parallel inverter system is connected to a constant DC voltage source V dc , and the output end of the three-phase inverter is connected to the point of common coupling PCC through the line inductance after the ripple is filtered out by the three-phase LC filter.

[0017] Secondly, this application provides a grid-type multi-machine parallel inverter power sharing control system, including multiple grid-type inverters connected in parallel to a common coupling point PCC. Each grid-type inverter is equipped with a local controller, which includes a sampling unit, a power outer loop unit, a virtual impedance voltage drop compensation unit, a voltage and current dual closed-loop control unit, and a virtual impedance iterative control unit. The sampling unit is used to sample the output voltage and current signals of the corresponding grid-type inverter. The power outer loop unit is used to generate voltage amplitude and angular frequency reference values ​​based on the output voltage and current signals. The virtual impedance voltage drop compensation unit is used to compensate the reference voltage for voltage drop based on the virtual impedance and output it to the voltage and current dual closed-loop control unit. The virtual impedance iterative control unit is used to simultaneously add a virtual impedance value L to each grid-connected inverter when the control system is in a steady state. v_add (δ) is used to disrupt the original system's steady state and redistribute reactive power among the grid-connected inverters. It is also used to determine the direction of increase or decrease of the iterative virtual impedance based on the magnitude of reactive power changes in the corresponding grid-connected inverter after the system reaches a new steady state. The virtual impedance step size Lv is set during the iteration process. _per The virtual impedance step size L of the steady-state perturbation step v_add Equal and all are δ, when the reactive power Qi of the i-th grid-type inverter decreases; The virtual impedance iteration control unit increases the virtual impedance step size δ of the i-th grid-type inverter when the reactive power Qi of the i-th grid-type inverter increases. The virtual impedance iterative control unit reduces the virtual impedance step size δ of the i-th grid-type inverter and provides the iteratively adjusted virtual impedance to the virtual impedance voltage drop compensation unit until the reactive power iteration error between the k-th iteration and the (k-1)-th iteration is less than a preset threshold. e i k This is to achieve an even distribution of reactive power among the various grid-connected inverters.

[0018] As a further improvement of this application, the voltage and current dual closed-loop control unit includes a voltage loop and a current loop, wherein the voltage loop adopts a proportional-integral controller and the current loop adopts a proportional controller; As a further improvement to this application, the virtual impedance of each grid-connected inverter includes virtual inductance Lv and virtual resistance Rv; As a further improvement of this application, the grid-type inverter is a three-phase inverter, which includes switching transistors S1, S2, S3, S4, S5 and S6. The DC side of the control system is connected to a constant DC voltage source Vdc. The output terminal of the three-phase inverter is connected to the common coupling point PCC through the line inductance after the ripple is filtered out by a three-phase LC filter.

[0019] Compared with the prior art, this application has at least the following beneficial effects: This application adds a virtual impedance value L to each grid-type inverter simultaneously under the steady-state condition of the system. v_add (δ) disrupts the original steady state and redistributes reactive power among the inverters, thus providing a basis for subsequently determining the adjustment direction of the virtual impedance of each inverter. After the system reaches a new steady state, each inverter determines the direction of its virtual impedance increase or decrease based on the magnitude of its own reactive power change. This allows for iterative correction of the virtual impedance using information about the change in its own reactive power, reducing reliance on precise line impedance parameters.

[0020] This application defines the virtual impedance step size L of the steady-state disturbance step. v_add With the virtual impedance step size L of the iterative process v_per Set them to be equal and all are δ, and according to the reactive power Q i When the value decreases, increase the virtual impedance step size δ and reactive power Q. i The rule of decreasing the virtual impedance step size δ when it increases is iteratively adjusted so that the equivalent output impedance of each grid-type inverter can be gradually corrected, thereby gradually reducing the reactive power distribution error, which is beneficial to improving the accuracy of reactive power distribution in multi-machine parallel systems.

[0021] This application uses the iteratively adjusted virtual impedance for virtual impedance drop compensation of the corresponding grid-type inverter, and ensures that the reactive power iteration error between the k-th iteration and the (k-1)-th iteration is less than a pre-set threshold ei. k As an iteration termination condition, the iteration can stop after the reactive power equalization requirement is met, which is conducive to forming a stable and feasible closed-loop control process. In this way, the risks of partial inverter overload, increased parallel circulating current and increased system losses caused by uneven reactive power distribution can be reduced, thereby improving the operational stability and power supply reliability of grid-type multi-machine parallel inverter systems in islanded microgrids. Attached Figure Description

[0022] Figure 1 This is a schematic diagram of an inverter control system using the virtual impedance iterative control method. Figure 2 This is a flowchart of the proposed virtual impedance iterative control method for multiple parallel inverters; Figure 3 The simulation waveforms of virtual impedance, reactive power, and active power of three parallel inverters before and after applying the proposed algorithm are shown. Figure 4 The simulated waveforms of the A-phase output current of the three parallel inverters before and after applying the proposed algorithm are shown. (a) A-phase output current waveform before applying the algorithm; (b) A-phase output current waveform after applying the algorithm. Figure 5 The diagram shows the relationship between reactive power change and X2; (a) the relationship between reactive power change and X2; (b) the relationship between reactive power change and δ.

[0023] Figure 6 For the change in reactive power distribution error during steady-state disturbance steps and d A diagram illustrating the relationship between sizes. Detailed Implementation

[0024] The present application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the embodiments described herein are for illustrative purposes only and are not intended to limit the scope of protection of the present application. Where there is no conflict, the technical features in the following embodiments can be combined with each other.

[0025] Example 1 In one embodiment of this application, a power-sharing control method for grid-connected multi-unit parallel inverters is provided. This method is used in a parallel inverter system where multiple grid-connected inverters are connected in parallel to a common coupling point (PCC). The PCC is the location where multiple grid-connected inverters are connected to a load or microgrid bus, and each grid-connected inverter supplies power to the PCC through its own output line. During the operation of an islanded microgrid, the reactive power output of each grid-connected inverter may differ due to potential differences in the line impedance between each inverter and the PCC. This embodiment introduces a virtual impedance disturbance in steady state and iteratively adjusts the virtual impedance according to the reactive power change direction of each inverter, gradually correcting the equivalent output impedance of each inverter and thus achieving reactive power sharing.

[0026] In this embodiment, "steady-state condition" refers to the state in which the inverter parallel system operates under the current load and control parameters until the output voltage, current, and reactive power changes tend to stabilize. After the system reaches steady-state condition, a virtual impedance value L is added to each grid-connected inverter. v_add (δ). Where, L v_add(δ) represents the virtual impedance value added in the steady-state disturbance step, and δ represents the virtual impedance disturbance step size. This step does not directly achieve a one-time equalization with large-amplitude virtual impedance compensation, but rather applies the same virtual impedance disturbance simultaneously on the basis of the original steady state, causing the system to transition from the original steady state to a new steady state. Through this disturbance, the reactive power among the grid-connected inverters is redistributed, providing a basis for subsequently determining the iterative adjustment direction of the virtual impedance of each grid-connected inverter. Using this processing method, the change in reactive power of the inverter before and after the disturbance can reflect the relationship between the inverter's equivalent output impedance and the overall system impedance distribution, which helps reduce the dependence on precise line impedance parameters.

[0027] After the system reaches a new steady state, each grid-connected inverter determines the magnitude of its own reactive power change and determines the direction of its iterative virtual impedance increase or decrease based on this change. Specifically, if the reactive power Qi of the i-th grid-connected inverter decreases compared to the reactive power after the previous steady state or the previous iteration, the i-th grid-connected inverter increases its virtual impedance step size δ; if the reactive power Qi of the i-th grid-connected inverter increases, the i-th grid-connected inverter decreases its virtual impedance step size δ. In this step, each grid-connected inverter makes its judgment based on the direction of its own reactive power change, ensuring that the virtual impedance adjustment corresponds to the local output state, thereby reducing the reactive power deviation between multiple inverters through a gradual iterative process.

[0028] In this embodiment, the virtual impedance step size L of the iteration process is set. v_per The virtual impedance step size L of the steady-state perturbation step v_add Equal, both are δ. L v_per L represents the virtual impedance step size that increases or decreases in each iteration step. v_add This represents the virtual impedance step size added during the steady-state disturbance step. Using the same step size for both ensures that the reactive power change generated by the steady-state disturbance has a consistent quantification scale with subsequent iterative adjustments, facilitating each grid-type inverter to perform corresponding increase / decrease operations based on the direction of reactive power change.

[0029] After completing one iteration of virtual impedance adjustment, the adjusted virtual impedance is used for virtual impedance voltage drop compensation of the corresponding grid-type inverter. Virtual impedance voltage drop compensation refers to the process of generating a corresponding voltage drop compensation amount based on the current virtual impedance and inverter output current during inverter control, and applying it to the reference voltage to change the equivalent output impedance of the grid-type inverter. By using the iterated virtual impedance for voltage drop compensation, the aforementioned iteration results can actually be applied to the output control loop of the grid-type inverter, thereby changing the reactive power sharing state of each grid-type inverter.

[0030] Subsequently, the determination of the direction of reactive power change and the iterative adjustment of virtual impedance are repeated until the reactive power iteration error between the k-th iteration and the (k-1)-th iteration is less than a preset threshold. e i k Threshold e i k This is used to determine whether the reactive power allocation status between two adjacent iterations has reached the expected accuracy. When the reactive power iteration error is less than a threshold... e i k At this point, it is assumed that the reactive power among the grid-connected inverters has been evenly distributed or meets the equal distribution requirements. This termination condition avoids meaningless continuous iteration and provides a clear convergence criterion for the control process.

[0031] Through the above implementation process, this application can utilize steady-state disturbances to generate observable reactive power changes when multiple grid-connected inverters have mismatched line impedances. Then, virtual impedance is iteratively adjusted based on the direction of the local reactive power change. Since the control process mainly relies on the reactive power changes of each inverter, it reduces the dependence on precise line impedance parameters and reduces reactive power distribution errors by gradually correcting the equivalent output impedance. This reduces the risks of overloaded inverters, increased parallel circulating current, and increased system losses caused by uneven reactive power distribution.

[0032] Example 2 In one specific embodiment of this application, such as Figure 1 As shown, the inverter parallel system includes multiple grid-connected inverters connected in parallel to a common coupling point (PCC). As one implementation, the grid-connected inverter can be a three-phase inverter, consisting of switches S1, S2, S3, S4, S5, and S6. The DC side of the inverter parallel system is connected to a constant DC voltage source Vdc. After the modulation signal of the three-phase inverter is driven, the output port voltage contains high-order harmonics. This output port voltage is filtered by a three-phase LC filter to remove ripple before being connected to the PCC through line inductance. Through this connection method, the three-phase inverter can convert DC-side energy into AC-side electrical energy and connect it to the PCC. The three-phase LC filter reduces the ripple component caused by switching modulation, and the line inductance constitutes part of the line impedance between the output terminals of each inverter and the PCC.

[0033] In some embodiments of this application, before performing the steady-state disturbance step, the steady-state operating point of the system is determined, and an LC filter is designed based on the inverter-side current ripple requirements and the reactive power absorption requirements of the filter capacitor. This step is used to ensure that the parallel inverter system has a stable operating foundation before performing virtual impedance iterative control. As a specific implementation, the equivalent output impedances X1, X2, and X3 of the three inverters can be set to 1mH, 4mH, and 7mH, respectively, to create an operating condition with inconsistent line impedances. These specific values ​​are used to illustrate the reactive power sharing control process when the line impedance is mismatched, and do not limit the implementation under other impedance values.

[0034] In some embodiments of this application, the voltage outer loop controller parameter K can also be designed. pu and K iu The parameters include the current inner loop proportional coefficient Ki, droop coefficients Kp and Kq, and the initial value of the virtual impedance Lv. As one implementation method, the virtual impedance can include a virtual inductance Lv and a virtual resistance Rv; furthermore, the virtual resistance Rv can be set to 0. By setting the voltage outer loop, current inner loop, droop coefficient, and initial value of the virtual impedance, the inverter can establish basic control parameters before executing iterative control. The initial value of the virtual impedance Lv is used to form the initial impedance compensation basis. When the virtual resistance Rv is 0, the virtual impedance mainly manifests as virtual inductance compensation, which is beneficial for impedance characteristic adjustment in scenarios where reactive power distribution is the main control object.

[0035] In some embodiments of this application, the control system of the grid-connected inverter adopts a dq coordinate system architecture. The control system first samples the output voltage and current signals and generates voltage amplitude and angular frequency reference values ​​via the power outer loop. The reference voltage corresponding to the voltage amplitude and angular frequency reference values ​​is compensated for by virtual impedance voltage drop and used as the inner loop input, and is regulated by a voltage-current dual-loop controller. The voltage loop in the voltage-current dual-loop controller can use a proportional-integral controller, and the current loop can use a proportional controller. The signal regulated by the voltage-current dual-loop controller generates the switching transistor drive signal through the SPWM module. Through this control architecture, the output voltage and current sampling results can enter the power outer loop and form reference quantities. The reference voltage, after virtual impedance voltage drop compensation, participates in the inner loop regulation, and finally, the SPWM module controls the on / off states of switching transistors S1 to S6, enabling the virtual impedance iteration results to be implemented in the inverter output control.

[0036] In one embodiment of this application, a virtual impedance iterative control strategy for multiple inverters is illustrated using three inverters as an example. Assume the three inverters have the same capacity, and the equivalent output impedance of each inverter satisfies X1 < X2 < X3. The reactive power of the first inverter is Q1, the second inverter is Q2, the third inverter is Q3, and the total rated reactive power of the load is Q0. The reactive power after the k-th iteration is Q1, Q2, Q3, Q4, Q5, Q6, Q7, Q8, Q9, Q1, Q1, Q2, Q3, Q1, Q2, Q3, Q1, Q2, Q3, Q4, Q5, Q6, Q7, Q8, Q9, Q1, Q1, Q1, Q2, Q1, Q2, Q3, Q1, Q1, Q2, Q3, Q1, Q1, Q2, Q3, Q1, Q2, Q3, Q1, Q2, Q3, Q1, Q2, Q3, Q1, Q2, Q3, Q1, Q2, Q3, Q1, Q2, Q3, Q1, Q2, Q3, Q1, Q2, Q3, Q4 ... 1k Q 2k Q 3k Q0 is only used as a variable in the overall analysis and can be an unknown quantity in actual operating conditions. The relationship between the reactive power of each inverter and the total rated reactive power of the load under the initial state can be expressed by equation (1).

[0037] (1) A reactive power averaging error coefficient ΔQ is defined to indicate the percentage difference between the reactive power of each inverter and the average value of the total rated reactive power of the load. The smaller the value of ΔQ, the more accurate the reactive power averaging. The reactive power averaging error after the kth iteration is denoted as ΔQk, which can be expressed by equation (2); the reactive power averaging error ΔQ0 in the initial state can be expressed by equation (3). By setting the reactive power averaging error coefficient, the reactive power deviation between each inverter can be transformed into a quantifiable error index, thereby providing a basis for judging the convergence of the iteration process.

[0038] (2) (3) In some embodiments of this application, the overall iterative strategy may include a steady-state perturbation step and an iterative step.

[0039] In the steady-state disturbance step, while the system is in steady state, a virtual impedance value L is simultaneously added to the three inverters. v_add (δ) disrupts the steady state of the original system, causing a redistribution of reactive power among the three inverters. The reactive power sharing error ΔQ1 after the steady-state disturbance step can be obtained, and ΔQ1 < ΔQ0. The reactive power output of each inverter gradually approaches the desired level after the steady-state disturbance step. Specifically, when X1, X2, and X3 are set to 1mH, 4mH, and 7mH respectively, as δ increases, the reduction in reactive power sharing error ΔQ1 after the steady-state disturbance step compared to the initial reactive power sharing error ΔQ0 gradually increases. This step does not require introducing excessive virtual impedance to reduce the reactive power sharing error all at once, thus helping to avoid excessive voltage drops at the PCC point.

[0040] After the steady-state perturbation step, the system reaches a new steady state. At this time, the reactive power of the first inverter decreases, and the reactive power of the third inverter increases, i.e., Q 10 >Q 11 , Q 30 <Q 31 ; the magnitude relationship between the reactive powers Q of the second inverter 20 and Q 21 depends on the specific relationship among X1, X2 and X3, which can be expressed by Equation (4). By observing the changes of the reactive power before and after the steady-state perturbation, the virtual impedance adjustment direction of each inverter in the subsequent iteration steps can be determined.

[0041] (4) In the iteration step, each inverter determines the increasing or decreasing direction of the iterative virtual impedance by judging the magnitude change of its own reactive power. The virtual impedance step size L in the iteration process v_per is set to be equal to the virtual impedance step size L in the steady-state perturbation step v_add , both of which are δ. When Q i decreases, the i-th inverter increases the virtual impedance step size δ during iteration; when Qi increases, the i-th inverter decreases the virtual impedance step size δ during iteration. According to the power change after the steady-state perturbation step, the virtual impedance of the first inverter changes from δ to 2δ, and the virtual impedance of the third inverter changes from δ to 0. The reactive power of the second inverter is between those of the three inverters, and the increase or decrease of its virtual impedance L v2 depends on the magnitude relationship between X2 and A, where: A=(X1X3(X1+X3)×δ+2X1X3×δ²) / ((X1²+X3²)×δ+(X1+X3)×δ²).

[0042] In the first iteration step after the steady-state perturbation step, Lv2 has three change situations according to the magnitude relationship between X2 and A. Situation 1: When X2=A, the power in the first step does not change, then Lv2 in the second step remains unchanged; Situation 2: When X2>A, the power in the first step increases, then Lv2 in the second step decreases; Situation 3: When X2<A, the power in the first step decreases, then Lv2 in the second step increases. This judgment process enables the virtual impedance adjustment direction of the second inverter to be determined according to its reactive power change state, avoiding new distribution deviations caused by simply adjusting in a fixed direction.

[0043] After determining the direction of the virtual impedance change of the second inverter, the reactive power expressions of each inverter after completing the steady-state disturbance and the first iteration can be obtained. The reactive power expressions of the three inverters in case 1 can be expressed by equation (5), the reactive power expressions of the three inverters in case 2 can be expressed by equation (6), and the reactive power expressions of the three inverters in case 3 can be expressed by equation (7). Regardless of the case, the overall system reactive power sharing error ΔQ decreases, Q1 always decreases, and Q3 always increases. The reactive power sharing error of the system can be reduced through iterative steps. The above three cases are applicable to each iteration step and include three cases with the relationship between the magnitudes of X1, X2, and X3. Therefore, they can be extended to subsequent iteration steps. The sharing error of subsequent steps gradually decreases, and their relationship can be expressed by equation (8).

[0044] (5) (6) (7) (8) In some embodiments of this application, the final iteration error and iteration rate are related to the selected iteration step size. A threshold ei is set. k For reactive power iteration error, determine whether the final iteration satisfies the condition that the iteration error between the k-th and (k-1)-th iterations is less than the set threshold ei. k If this condition is met, the reactive power is considered to be evenly distributed among the inverters. This threshold judgment provides a clear termination criterion for the iterative process, which is beneficial for balancing the accuracy of reactive power distribution and the stability of the control process.

[0045] In some embodiments of this application, since the control method is designed for multiple inverters, the entire iteration process can be repeated after the above iteration process ends. This prevents the i-th and j-th inverters, which initially had the smallest and largest reactive power respectively, from becoming inverters with relatively moderate reactive power in previous iterations. In other words, when a non-i-th inverter becomes the inverter with the smallest reactive power, or a non-j-th inverter becomes the inverter with the largest reactive power, the entire iteration process can be repeated. After the K-th iteration, the reactive power of each inverter can be considered to be evenly distributed. This repeated iteration mechanism can adapt to changes in the power ranking of multiple inverters, making the control process applicable not only to the example with three inverters but also to the reactive power distribution control of multiple grid-connected inverters.

[0046] Example 3 Specifically, this application proposes a virtual impedance adaptive control strategy based on local measurement and iterative adjustment. By progressively correcting the equivalent output impedance of each inverter, it achieves autonomous and balanced distribution of reactive power among multiple grid-connected inverters in an islanded system, thereby improving the operational stability and power supply reliability of the islanded microgrid and realizing precise power distribution in the inverter parallel system.

[0047] The selected three-phase inverter consists of switching transistors S1, S2, S3, S4, S5, and S6. A constant DC voltage source is connected to the DC side of the inverter parallel system. V dc After the modulation signal of the three-phase inverter is driven, the output port voltage contains high-order harmonics. After ripple is filtered out by a three-phase LC filter, it is connected to the common coupling point (PCC) through the line inductance. The inverter control system adopts a dq coordinate system architecture. First, the output voltage and current signals are sampled, and reference values ​​for voltage amplitude and angular frequency are generated via the power outer loop. This reference voltage, after virtual impedance voltage drop compensation, serves as the inner loop input and is regulated by a dual-loop voltage and current controller. The voltage loop uses a proportional-integral (PI) controller, and the current loop uses a proportional-coefficient (P) controller. The signal after dual-loop regulation generates the switching transistor drive signal through an SPWM module. The virtual impedance set by the system includes the virtual inductance L. v and virtual resistance R v It is used to achieve impedance characteristic compensation.

[0048] Taking three inverters as an example, this illustrates the virtual impedance iterative control strategy for multiple inverters, assuming the equivalent output impedance of each inverter... X 1< X 2< X 3, of which the reactive power of the first inverter is Q 1. The reactive power of the second inverter is Q 2. The reactive power of the third inverter is Q 3. The total reactive power of the load is Q 0, no. k The reactive power after the next iteration is respectively Q 1k , Q 2k , Q 3k (in Q 0 is only used as a variable for overall analysis and is an unknown quantity in actual operating conditions. The relationship between the reactive power of each inverter and the total rated reactive power of the load under the initial state is shown in equation (1).

[0049] (1) Define the reactive power distribution error coefficient Δ QΔ represents the percentage difference between the reactive power of each inverter and the average of the total rated reactive power of the load. The smaller this value, the more accurate the reactive power distribution, as shown in equation (2). Q k Indicates the first k The reactive power sharing error after the second iteration. Equation (3) gives the reactive power sharing error Δ in the initial state. Q 0.

[0050] (2) (3) The overall iteration strategy also consists of the following two steps: Step 1: Steady-state perturbation steps; First, under steady-state conditions, a virtual impedance value is simultaneously added to all three inverters. L v_add ( d This disrupts the steady state of the original system, causing a redistribution of reactive power among the three inverters. The reactive power sharing error Δ after the steady-state disturbance step can then be obtained. Q 1<Δ Q 0, the reactive power output of each inverter gradually approaches after the steady-state disturbance step.

[0051] Figure 6 Examples X 1. X 2 and X When 3 is set to 1, 4 and 7 mH respectively, the steady-state disturbance steps are as follows: L v_add ( d The reactive power distribution error Δ Q The relationship between them. With d Increase, reactive power distribution error Δ Q 1 compared to Δ Q The rate of decrease from 0 also gradually increases. This step does not require the introduction of excessive virtual impedance to reduce reactive power sharing error, which will avoid excessive voltage drop at the PCC point.

[0052] After the steady-state disturbance step, the system reaches a new steady state. Q 10 > Q 11 , Q 30 < Q 31 As shown in equation (4), Q 20 and Q 21 The size relationship between them depends on X 1.X 2 and X 3. The specific relationship.

[0053] (4) Step 2: Iteration steps; The second step involves each inverter determining the direction of increase or decrease in the iterative virtual impedance by assessing changes in its own reactive power. The virtual impedance step size for the iterative process is then set. L v_per Virtual impedance step size of steady-state perturbation steps L v_add Equal, both are d .when Q i As it gets smaller, during the iteration... i Each inverter increases the virtual impedance step size. d ;when Q i Increases, during iteration i Each inverter reduces the virtual impedance step size. d .

[0054] Based on the power change after the steady-state disturbance step, the virtual impedance of the first inverter will be changed from... d Become 2 d The virtual impedance of the third inverter will be determined by... d The virtual impedance becomes 0; the power of the second inverter is between that of the three, and its virtual impedance is... L v2 The size increases or decreases depends on X 2 and A =( X 1 X 3( X 1+ X 3) d +2 X 1 X 3 d 2 ) / (( X 1 2 + X 3 2 ) d +( X 1+ X 3) d 2 The magnitude relationship of ). The first iteration step after the steady-state perturbation step is based on X 2 and A Size relationship, L v2Three possible changes will occur, as listed in Table 1, namely: (1) Case 1: X 2= A If the power remains unchanged in the first step, then the power in the second step... L v2 Remain unchanged; (2) Case 2: X 2> A If the power is increased in the first step, then the power in the second step... L v2 Decrease; (3) Case 3: X 2< A If the power decreases in the first step, then the power in the second step... L v2 Increase.

[0055] Table 1 X 2 and L v2 Relationship table of changes

[0056] Based on the above analysis, after determining the direction of the virtual impedance change of the second inverter, the reactive power expressions of each inverter after completing the steady-state disturbance and the first step of iteration can be obtained. The reactive power expressions of the three inverters in case 1 are Equation (5), the reactive power expressions of the three inverters in case 2 are Equation (6), and the reactive power expressions of the three inverters in case 3 are Equation (7).

[0057] (5) (6) (7) Regardless of the situation, the overall system reactive power distribution error Δ Q Always decreasing, Q 1. Always keep decreasing. Q 3. By consistently increasing the value, the reactive power sharing error of the system can be reduced through iterative steps. The above three cases apply to every iteration step and include... X 1, X 2, X The three cases of size relationship can be generalized to subsequent iteration steps. The average error of subsequent steps will gradually decrease, as shown in equation (8).

[0058] (8) Furthermore, the final iteration error and iteration rate of this method are related to the selected iteration step size, and a threshold is set. e ik For reactive power iteration error, determine whether the final iteration satisfies the first... k Next and first k The iteration error of -1 is less than the set threshold. e i k If this is achieved, then it is assumed that reactive power is evenly distributed among all inverters. Furthermore, since this involves multiple inverters, after the above iterative process is completed, the entire iterative process is repeated to prevent the reactive power in the initial state from being at its minimum and maximum, respectively. i Taiwan and the j The inverter, in its previous iterations, became an inverter with relatively moderate reactive power. That is, when it is not the first... i Taiwan inverter becomes the one with the least reactive power or not the first j When the inverter reaches its maximum reactive power, the entire iterative process can be repeated. K After the second iteration, it can be assumed that the reactive power of each inverter is evenly distributed.

[0059] Example 4 The present application will now be described in detail with reference to the accompanying drawings and specific embodiments.

[0060] This embodiment of a virtual impedance iterative control method for multiple inverters connected in parallel includes the following steps: Step 1: Determine the system's steady-state operating point. Based on the inverter-side current ripple requirements and the reactive power requirements absorbed by the filter capacitor, design the LC filter. X 1. X 2 and X 3 is set to 1, 4 and 7mH respectively.

[0061] Step 2, Design the voltage outer loop controller parameters K pu and K iu Current inner loop proportionality coefficient K i droop coefficient K p and K q and the initial value of the virtual impedance L v (virtual resistance R) v =0).

[0062] Step 3: Steady-state disturbance step. Inverter 1, Inverter 2, and Inverter 3 have the same capacity. A virtual impedance value is then added to all three inverters. L v_add ( d This disrupts the original system's steady state, causing a redistribution of reactive power among the three inverters. The reactive power of the first inverter decreases, the reactive power of the third inverter increases, and the change in reactive power of the second inverter depends on... X 2 and A =(X 1 X 3( X 1+ X 3) d +2 X 1 X 3 d 2 ) / (( X 1 2 + X 3 2 ) d +( X 1+ X 3) d 2 The size relationship of ).

[0063] (9) Figure 5 The reactive power variation of the three inverters is given, in order to... X 1 = 1mH, X 3=7mH and d Taking 0.5mH as an example, at this time A =1.17mH. Therefore, based on the above analysis, when X When 2 = 1.17mH, L v2 Unchanged; when X When 2>1.17mH, L v2 Decrease; when X When 2 < 1.17 mH, L v2 Increase Figure 5 (a) shows the reactive power changes of the three inverters under three different scenarios. X The relationship between the two sizes can be seen from the diagram. Q 1 decreases, Q 3 increases, when X When 2 = 1.17mH Q 2 remains unchanged; when X When 2 < 1.17 mH Q 2 decreases; when X When 2>1.17mH Q 2. Increase. Figure 5 (b) shows the reactive power changes of the three inverters under three different conditions. d The relationship between size, when d =0.5mH Q 2 remains unchanged; when d <0.5mH Q2 increases; when d >0.5mH Q 2 decreases.

[0064] For case 1, after the first iteration (with... X 1 = 1mH, X 2 = 1.17 mH, X (Taking 3=7mH as an example), Q 1 decreases, Q 3. Increase Q 2 increases, overall Δ Q Decrease. For case 2, after one iteration (with... X 1 = 1mH, X 2=4mH, X (Taking 3=7mH as an example), Q 1 decreases, Q 3. Increase Q 2 increases, overall Δ Q Decrease. For case 3, after one iteration (with... X 1 = 1mH, X 2 = 1.1mH, X (Taking 3=7mH as an example), Q 1 decreases, Q 3. Increase Q 2 decreases, overall Δ Q The subsequent iterations are similar to the first iteration. By continuously iterating, the power sharing error can be gradually reduced, thus achieving power sharing among multiple inverters.

[0065] When the k The iteration and the k The error of -1 iteration is less than a pre-set threshold. e i k When the iteration process terminates, the 1st iteration... k After the first iteration, the reactive power of each inverter can be considered to be evenly distributed. Since this control method is designed for multiple inverters, after the above iteration process is completed, the entire iteration process is repeated to prevent the reactive power in the initial state from being at its minimum and maximum, respectively. i Taiwan and the j The inverter, in its previous iterations, became an inverter with relatively moderate reactive power. That is, when it is not the first... i Taiwan inverter becomes the one with the least reactive power or not the first j When the inverter reaches its maximum reactive power, the entire iterative process can be repeated. K After the second iteration, it can be assumed that the reactive power of each inverter is evenly distributed.

[0066] Figure 4The figure shows the simulated waveforms of the A-phase output current of the three inverters before and after the introduction of the proposed algorithm. It can be seen that uneven distribution of reactive power will cause differences in the inverter output current, leading to the risk of output overcurrent and potential uneven heat dissipation. After adopting the proposed method, the inverter output currents are essentially identical, avoiding potential risks of device overcurrent and overheating.

[0067] Example 5 In this application example, inverters 1, 2, and 3 have the same capacity. First, the system's steady-state operating point is determined, and an LC filter is designed based on the inverter-side current ripple requirements and the reactive power absorption requirements of the filter capacitor. Specifically, X1, X2, and X3 are set to 1mH, 4mH, and 7mH, respectively. Subsequently, the voltage outer loop controller parameters Kpu and Kiu, and the current inner loop proportional coefficient K are designed. i droop coefficient K p and K q and the initial value of the virtual impedance L v , where the virtual resistance Rv = 0.

[0068] During the steady-state disturbance step, a virtual impedance value L is simultaneously added to all three inverters. v_add (δ) disrupts the original system's steady state, causing a redistribution of reactive power among the three inverters. The reactive power of the first inverter decreases, the reactive power of the third inverter increases, and the change in reactive power of the second inverter depends on the relationship between X2 and A, where: A =( X 1 X 3( X 1+ X 3) d +2 X 1 X 3 d 2 ) / (( X 1 2 + X 3 2 ) d +( X 1+ X 3) d 2 ); exist Figure 5In the reactive power variation of the three inverters shown, taking X1=1mH, X3=7mH and δ=0.5mH as examples, A=1.17mH. Therefore, when X2=1.17mH, Lv2 remains unchanged; when X2>1.17mH, Lv2 decreases; and when X2<1.17mH, Lv2 increases. Figure 5 (a) The graph shows the relationship between the reactive power change of the three inverters and the magnitude of X2 under three conditions. It can be seen from the graph that Q1 decreases and Q3 increases. When X2 = 1.17mH, Q2 remains unchanged. When X2 < 1.17mH, Q2 decreases. When X2 > 1.17mH, Q2 increases. Figure 5 (b) Shows the relationship between the reactive power change of the three inverters and the magnitude of δ under three conditions; when δ=0.5mH, Q2 remains unchanged; when δ<0.5mH, Q2 increases; when δ>0.5mH, Q2 decreases.

[0069] For case 1, after the first iteration, taking X1=1mH, X2=1.17mH, and X3=7mH as an example, Q1 decreases, Q3 increases, Q2 increases, and the overall ΔQ decreases. For case 2, after one iteration, taking X1=1mH, X2=4mH, and X3=7mH as an example, the overall ΔQ decreases. For another specific case, after one iteration, taking X1=1mH, X2=1.1mH, and X3=7mH as an example, Q1 decreases, Q3 increases, Q2 decreases, and the overall ΔQ decreases. Subsequent iterations are similar to the first iteration; through continuous iteration, the power sharing error can be gradually reduced, achieving reactive power sharing among multiple inverters.

[0070] When the error between the k-th iteration and the (k-1)-th iteration is less than the pre-set threshold ei ^ When k equals 0, the iteration process terminates. After the kth iteration, the reactive power of each inverter can be considered to be evenly distributed. Since this control method is designed for multiple inverters, the entire iteration process can be repeated after the above iteration process ends. This prevents the i-th and j-th inverters, which initially had the minimum and maximum reactive power respectively, from becoming inverters with relatively moderate reactive power in previous iterations. In other words, when a non-i-th inverter becomes the inverter with the minimum reactive power or a non-j-th inverter becomes the inverter with the maximum reactive power, the entire iteration process can be repeated again. After the kth iteration, the reactive power of each inverter can be considered to be evenly distributed.

[0071] Figure 3 The simulation waveforms of virtual impedance, reactive power, and active power of the three parallel inverters before and after the algorithm are shown. Figure 4Simulated waveforms of the A-phase output currents of the three inverters before and after the introduction of the algorithm are shown. The simulation waveforms show that uneven reactive power distribution causes differences in inverter output currents, exposing the system to the risk of output overcurrent and potential uneven heat dissipation. After adopting the control method of this application, the inverter output currents essentially overlap, avoiding potential overcurrent and overheating risks, thereby improving the operational stability and reliability of the parallel system of multiple grid-connected inverters.

[0072] Example 6 In one system embodiment of this application, a power-sharing control system for a grid-connected multi-unit parallel inverter is provided. This control system includes multiple grid-connected inverters connected in parallel to a common coupling point (PCC), and each grid-connected inverter is equipped with a local controller. The local controller includes a sampling unit, a power outer loop unit, a virtual impedance voltage drop compensation unit, a voltage and current dual closed-loop control unit, and a virtual impedance iterative control unit.

[0073] The sampling unit samples the output voltage and current signals of the corresponding grid-connected inverter. The voltage and current signals obtained by the sampling unit serve as input to the power outer loop unit, enabling each grid-connected inverter to generate control reference values ​​based on its local state. The power outer loop unit generates voltage amplitude and angular frequency reference values ​​based on the output voltage and current signals. The virtual impedance voltage drop compensation unit compensates for the voltage drop of the reference voltage based on the virtual impedance and outputs the compensation to the voltage-current dual-loop control unit. The voltage-current dual-loop control unit performs voltage and current closed-loop regulation based on the compensated reference voltage; as one implementation, the voltage-current dual-loop control unit includes a voltage loop and a current loop, with the voltage loop using a proportional-integral controller and the current loop using a proportional controller. The virtual impedance of each grid-connected inverter includes a virtual inductance Lv and a virtual resistance Rv.

[0074] The virtual impedance iterative control unit is used to simultaneously add virtual impedance values ​​L to each grid-connected inverter when the control system is in steady state. v_add (δ) is used to disrupt the original system's steady state and redistribute reactive power among the grid-connected inverters. The virtual impedance iteration control unit is also used to determine the direction of increase or decrease in the iterative virtual impedance based on the magnitude of the reactive power change of the corresponding grid-connected inverter after the system reaches a new steady state. Specifically, the virtual impedance step size Lv is set during the iteration process. _per The virtual impedance step size Lv of the steady-state perturbation step _addWhen the reactive power Qi of the i-th grid-type inverter decreases, the virtual impedance iteration control unit increases the virtual impedance step size δ for the i-th grid-type inverter; when the reactive power Qi of the i-th grid-type inverter increases, the virtual impedance iteration control unit decreases the virtual impedance step size δ for the i-th grid-type inverter and provides the iteratively adjusted virtual impedance to the virtual impedance voltage drop compensation unit, until the reactive power iteration error between the k-th iteration and the (k-1)-th iteration is less than a preset threshold. e i k This is to achieve an even distribution of reactive power among the various grid-connected inverters.

[0075] In some embodiments of this application, the grid-connected inverter is a three-phase inverter, which includes switches S1, S2, S3, S4, S5, and S6. The DC side of the control system is connected to a constant DC voltage source Vdc. The output of the three-phase inverter, after ripple removal by a three-phase LC filter, is connected to the common coupling point PCC via line inductance. During operation, the local controller obtains the output voltage and current signals through a sampling unit, the power outer loop unit generates voltage amplitude and angular frequency reference values, the virtual impedance voltage drop compensation unit corrects the reference voltage based on the virtual impedance, the voltage and current dual closed-loop control unit outputs adjustment signals, and the SPWM module generates drive signals for switches S1 to S6. The virtual impedance iterative control unit continuously updates the virtual impedance during steady-state disturbances and iterations, enabling the virtual impedance voltage drop compensation unit to obtain updated compensation parameters, thereby achieving the same reactive power sharing effect as in the method embodiments.

[0076] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application and not to limit them. Although this application has been described in detail with reference to the above embodiments, those skilled in the art should understand that modifications or equivalent substitutions can still be made to the specific implementation methods of this application. Any modifications or equivalent substitutions that do not depart from the spirit and scope of this application should be covered within the protection scope of this application.

Claims

1. A power-sharing control method for grid-connected multi-machine parallel inverters, used in a parallel inverter system where multiple grid-connected inverters are connected in parallel to a common coupling point (PCC), characterized in that, The method comprises: when the parallel inverter system is in a steady state, simultaneously adding a virtual impedance value to each grid-forming inverter to break the original steady state of the system and reallocate the reactive power between the respective grid-forming inverters; After the system reaches a new steady state, each grid-connected inverter determines the direction of increase or decrease in the iterative virtual impedance by judging the magnitude of its own reactive power change. The virtual impedance step size L is set during the iteration process. v_per The virtual impedance step size L of the steady-state perturbation step v_add The reactive power Q of the i-th grid-type inverter is equal and both are δ. i When the reactive power Q of the i-th grid-type inverter decreases, the virtual impedance step size δ is increased. i When the value increases, the virtual impedance step size δ of the i-th grid-type inverter decreases. applying the iteratively adjusted virtual impedance to the virtual impedance voltage drop compensation of the corresponding grid-forming inverter, and repeating the virtual impedance iteration until the reactive power iteration error between the k-th iteration and the (k-1)-th iteration is less than a preset threshold, so as to realize equal sharing of reactive power between the respective grid-forming inverters.

2. The power sharing control method for grid-connected multi-machine parallel inverters according to claim 1, characterized in that, Before performing the steady-state disturbance step, the steady-state operating point of the system is determined, and the voltage outer loop controller parameters K are designed. pu and K iu Current inner loop proportionality coefficient K i droop coefficient K p and K q and the initial value of the virtual impedance L v .

3. The power sharing control method for grid-connected multi-machine parallel inverters according to claim 1, characterized in that, The control system of the grid-forming inverter adopts a dq coordinate system architecture, samples output voltage and current signals, and generates reference values of voltage amplitude and angular frequency through a power outer loop; The reference voltage corresponding to the reference values of voltage amplitude and angular frequency is used as the inner loop input after being compensated by the virtual impedance voltage drop, and is regulated by a voltage-current double closed-loop controller; The voltage loop in the voltage-current double closed-loop controller adopts a proportional-integral controller, and the current loop adopts a proportional controller, and the signal regulated by the voltage-current double closed-loop controller generates a switching tube driving signal through an SPWM module.

4. The power sharing control method for grid-connected multi-machine parallel inverters according to claim 1, characterized in that, The virtual impedance includes the virtual inductance L. v and virtual resistance R v ; During the steady-state disturbance step, the virtual impedance value L is simultaneously added to each grid-connected inverter. v_add After (δ), the reactive power equalization error ΔQ1 after the steady-state disturbance step is obtained, and the reactive power equalization error ΔQ1 is less than the reactive power equalization error ΔQ0 in the initial state.

5. The power sharing control method for grid-connected multi-machine parallel inverters according to claim 1, characterized in that, The plurality of grid-forming inverters include a first inverter, a second inverter and a third inverter with the same capacity, equivalent output impedances of the first inverter, the second inverter and the third inverter are respectively X1, X2 and X3, and satisfy X1<X2<X3, and reactive powers of the first inverter, the second inverter and the third inverter are respectively Q1, Q2 and Q3; After the steady state disturbance step, the reactive power of the first inverter decreases, the reactive power of the third inverter increases, and the change situation of the reactive power of the second inverter depends on the magnitude relationship between X2 and A, wherein, A =( X 1 X 3( X 1+ X 3) δ +2 X 1 X 3 δ 2 ) / (( X 1 2 + X 3 2 ) δ +( X 1+ X 3) δ 2 )； In the first iteration step after the steady state disturbance step, when X2=A, the virtual impedance Lv2 of the second inverter remains unchanged; when X2>A, the virtual impedance Lv2 of the second inverter decreases; when X2<A, the virtual impedance Lv2 of the second inverter increases; In the first iteration step after the steady state disturbance step, the virtual impedance of the first inverter changes from δ to 2δ, and the virtual impedance of the third inverter changes from δ to 0.

6. The power sharing control method for grid-connected multi-machine parallel inverters according to claim 1, characterized in that, In each iteration step, the corresponding virtual impedance is adjusted to increase or decrease based on the change in the magnitude of the reactive power of each grid-forming inverter itself, so that the reactive power equal sharing error of the parallel inverter system is gradually reduced.

7. The power sharing control method for grid-connected multi-machine parallel inverters according to claim 1, characterized in that, After one virtual impedance iteration process is finished, if the non-i-th grid-forming inverter does not become the inverter with the minimum reactive power, or the non-j-th grid-forming inverter does not become the inverter with the maximum reactive power, the virtual impedance iteration process is repeated again until the reactive power of each grid-forming inverter is equally shared after the K-th iteration.

8. The power sharing control method for grid-connected multi-machine parallel inverters according to claim 1, characterized in that, The grid-type inverter is a three-phase inverter, which includes switching transistors S1, S2, S3, S4, S5, and S6. The DC side of the inverter parallel system is connected to a constant DC voltage source V. dc The output of the three-phase inverter is connected to the common coupling point PCC via line inductance after the ripple is filtered out by a three-phase LC filter.

9. A power-sharing control system for grid-connected multi-machine parallel inverters, characterized in that, Comprising a plurality of grid-forming inverters connected in parallel to a point of common coupling PCC, each grid-forming inverter is provided with a local controller, and the local controller comprises a sampling unit, a power outer loop unit, a virtual impedance voltage drop compensation unit, a voltage-current double closed-loop control unit and a virtual impedance iteration control unit; The sampling unit is used to sample the output voltage and current signals of the corresponding grid-type inverter. The power outer loop unit is used to generate voltage amplitude and angular frequency reference values ​​based on the output voltage and current signals. The virtual impedance voltage drop compensation unit is used to compensate the reference voltage for voltage drop based on the virtual impedance and output it to the voltage and current dual closed-loop control unit. The virtual impedance iterative control unit is used to simultaneously add a virtual impedance value L to each grid-connected inverter when the control system is in a steady state. v_add (δ) is used to disrupt the original system's steady state and redistribute reactive power among the grid-connected inverters. It is also used to determine the direction of increase or decrease of the iterative virtual impedance based on the magnitude of reactive power changes in the corresponding grid-connected inverter after the system reaches a new steady state. The virtual impedance step size Lv is set during the iteration process. _per The virtual impedance step size L of the steady-state perturbation step v_add Equal and all are δ, when the reactive power Qi of the i-th grid-type inverter decreases; The virtual impedance iteration control unit increases the virtual impedance step size δ of the i-th grid-type inverter when the reactive power Qi of the i-th grid-type inverter increases. The virtual impedance iterative control unit reduces the virtual impedance step size δ of the i-th grid-type inverter and provides the iteratively adjusted virtual impedance to the virtual impedance voltage drop compensation unit until the reactive power iteration error between the k-th iteration and the (k-1)-th iteration is less than the preset threshold ei. k This is to achieve an even distribution of reactive power among the various grid-connected inverters.

10. The grid-type multi-machine parallel inverter power sharing control system according to claim 9, characterized in that, The voltage and current dual closed-loop control unit includes a voltage loop and a current loop. The voltage loop uses a proportional-integral controller, and the current loop uses a proportional controller. The virtual impedance of each grid-connected inverter includes virtual inductance Lv and virtual resistance Rv; The grid-type inverter is a three-phase inverter, which includes switching transistors S1, S2, S3, S4, S5, and S6. The DC side of the control system is connected to a constant DC voltage source Vdc. The output of the three-phase inverter is filtered for ripple by a three-phase LC filter and then connected to the common coupling point PCC through line inductance.

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