Substation electrical signal redundant transmission system based on remote IO

Abstract

The application discloses a transformer substation electrical signal redundant transmission system based on remote IO, comprising: a double-ring redundant optical fiber transmission network composed of a working ring and a protection ring, both of which adopt bidirectional optical fiber links; a data acquisition and on-site conversion module installed in a transformer substation IO cabinet, used for converting electrical signals into digital signals on site and packaging into frame structures with time stamps; a frame synchronization and verification module used for time stamp alignment and cyclic redundancy check and generating a frame sequence after verification; a redundant path selection module used for transmitting duplicate frames to the two rings in parallel according to the reception quality indication of each frame and selecting a main path based on returned confirmation frames; and a protocol conversion and output module used for converting the frame sequence on the main path into standard industrial protocol data packets and outputting to a main control system.

Description

Technical Field

[0001] This invention relates to the field of electrical signal transmission technology in substations, specifically to a redundant electrical signal transmission system for substations based on remote I / O. Background Technology

[0002] The acquisition and transmission of electrical signals within substations is a fundamental aspect of automation systems. With the advancement of smart substation construction, a large number of analog and digital signals from primary equipment such as instrument transformers, circuit breakers, and disconnectors need to be collected from local I / O cabinets and transmitted over long distances to the main control system at the substation control level. Current technologies generally employ single-path fiber optic networks or redundant networks based on a primary / backup switching mechanism for signal transmission. In a single-path fiber optic network, if a fiber breaks, transceiver fails, or a node fails, the entire transmission link is interrupted, causing the main control system to lose its real-time awareness of the primary equipment's status, posing a direct threat to substation operational safety. Redundant schemes based on a primary / backup switching mechanism activate the backup link after detecting a primary link failure. During the switching process, there is a recovery time window ranging from milliseconds to tens of milliseconds, during which all electrical signal data will be lost. For applications with stringent data continuity requirements, such as relay protection and fault recording, data loss during the switching interval can lead to serious consequences such as protection device lockout and failure to trace faults. Furthermore, existing redundancy schemes often rely solely on the connectivity status of a single link, failing to comprehensively consider dynamic quality indicators such as bit error rate and latency jitter. This leads to the continued use of unreliable paths even when links are in critical deterioration, while better-quality backup paths remain idle. Simultaneously, the lack of a unified time synchronization benchmark among local acquisition units results in significant timestamp discrepancies after signal aggregation from different I / O cabinets. This makes it difficult for the main control system to accurately reconstruct the timing relationships between various electrical quantities in the primary system, affecting the accuracy of synchronization phasor measurements and event sequence recording. Substation electrical signal transmission needs to address how to make path decisions based on real-time bit error rate and latency jitter, among other multi-dimensional reception quality indicators, within a dual-ring network architecture, and how to prevent frequent invalid switching using a locking mechanism. It also requires solving the problem of how to perform timestamp continuity verification and redundancy cyclic verification on frame data at the signal acquisition end to improve frame sequence integrity. Summary of the Invention

[0003] This invention provides a redundant transmission system for electrical signals in substations based on remote I / O. The system aims to achieve redundant transmission without switching gaps at the physical link level by injecting the verified frame sequence into both loops in parallel and dynamically selecting the primary path based on reception quality indicators such as bit error rate statistics and delay jitter statistics, as well as an acknowledgment frame timeout mechanism. Simultaneously, a path locking counter is introduced to prevent switching after reaching a locking threshold, maintaining transmission stability. Another objective is to improve the temporal continuity and integrity of the frame sequence at the data source by using a timestamp difference comparator to threshold the timestamp difference between adjacent frames after the data acquisition and local conversion module completes local signal digitization and timestamp injection, discarding abnormal frames, and combining sliding window buffering and cyclic redundancy check to generate a verified frame sequence.

[0004] To achieve the above objectives, this invention provides the following technical solution: This invention provides a redundant transmission system for substation electrical signals based on remote I / O. It employs a collaborative architecture of a dual-ring redundant fiber optic transmission network, a data acquisition and local conversion module, a frame synchronization and verification module, a redundant path selection module, and a protocol conversion and output module to achieve highly reliable transmission of substation electrical signals. The dual-ring redundant fiber optic transmission network consists of a working ring and a protection ring, both rings using bidirectional fiber optic links to provide a physical layer redundant channel for signal transmission. The data acquisition and local conversion module is installed in the substation I / O cabinet, converting various electrical signals locally into digital signals and encapsulating them into timestamped frame structures. This assigns each sampling point a precise time stamp and cabinet / channel identifier at the source, facilitating subsequent data association, location, and synchronization. The frame synchronization and verification module performs timestamp alignment and cyclic redundancy check on the timestamped frame structures, generating a verified frame sequence. By removing frames with abnormal timing and attaching robust check codes, it ensures that frames entering the transmission stage are complete and error-free in both timing and content. The redundant path selection module sends duplicate frames in parallel to the working and protection rings based on the received quality indications of each frame in the verified frame sequence. It then autonomously selects the primary path based on the acknowledgment frames returned from both rings. This allows the system to dynamically optimize the transmission quality of the ring based on the actual link status, effectively avoiding link degradation caused by momentary outages or bit errors. The protocol conversion and output module converts the frame sequence received on the primary path into data packets conforming to standard industrial protocols, such as IEC61850 sampled value messages or general object-oriented substation event messages, and outputs them to the substation main control system. This enables the redundant transmission system to be seamlessly integrated into the existing substation automation information system.

[0005] As a preferred embodiment of the present invention, the data acquisition and local conversion module includes an analog signal conditioning circuit, an analog-to-digital converter, and a timestamp injection unit. The analog signal conditioning circuit filters and isolates electrical signals to suppress on-site interference; the analog-to-digital converter converts the conditioned analog signal into a discrete digital value; the timestamp injection unit appends a local clock count value to this discrete digital value, and the resulting timestamped frame structure explicitly includes the rack identifier and channel number of the IO rack in its preamble. Therefore, when the main control system receives data, it can directly parse the signal source and precise sampling time, providing a data foundation for cross-interval synchronous analysis.

[0006] As a further preferred embodiment of the present invention, the frame synchronization and verification module includes a timestamp difference comparator, a sliding window buffer, and a cyclic redundancy check (CRC) generator. The timestamp difference comparator calculates the difference between the timestamp of the current frame and the timestamp of the previous frame. When the difference exceeds a preset threshold, the frame is discarded to prevent erroneous data from being mixed in due to timing anomalies. The sliding window buffer stores multiple consecutive frames that have passed the difference comparison to maintain the continuity of the frame order and the alignment window. The CRC generator calculates a checksum for each frame payload in the buffer and appends it to the end of the frame, thereby generating a verified frame sequence to ensure that the data integrity of each frame is confirmed before transmission.

[0007] In terms of redundant path selection, preferably, the redundant path selection module includes a copy distributor, a receive quality register, an acknowledgment frame timeout timer, and a path switching controller. The copy distributor copies the verified frame sequence frame by frame into two identical copies, injecting them into the working ring and the guard ring respectively, achieving dual-path concurrent redundant transmission. The receive quality register records the bit error rate statistics and delay jitter statistics of the working ring and the guard ring respectively, serving as the basis for path quality evaluation. The acknowledgment frame timeout timer starts counting after each copy transmission. If no acknowledgment frame is received from the corresponding ring within a preset timeout period, the bit error rate statistics in the receive quality register of that ring are increased by one unit, thus quickly responding to link packet loss. The path switching controller compares the receive quality register values ​​of the two rings and selects the ring with the smaller value as the primary path, ensuring that data is always transmitted along the healthier ring.

[0008] Furthermore, the path switching controller is internally equipped with a path locking counter. After the primary path is established, this counter accumulates the number of consecutively received valid frames. When the count reaches a preset locking threshold, path switching is temporarily prohibited to avoid frequent switching during network fluctuations. The lock is only released and a new path selection is performed when both the working ring and the protection ring continuously lose frames exceeding the frame loss threshold, thus balancing transmission stability and rapid self-rescue capability.

[0009] For the node structure of a dual-ring redundant optical fiber transmission network, this invention provides a self-healing implementation: each node includes two optical fiber transceivers, connected to adjacent nodes in the working ring and protection ring respectively; and a node status register is set to store the node's ring network role identifier and the neighbor node liveness detection results. The self-healing control logic uses this information to short-circuit the transmitting port of the faulty optical fiber transceiver to the receiving port when it detects no response from an adjacent node in the working or protection ring, achieving a nearby loopback at the fault point and quickly forming a new usable ring network, significantly shortening service interruption time.

[0010] Preferably, the self-healing control logic includes a fault detection timer, a port bypass relay, and a topology update message generator. The fault detection timer periodically sends handshake frames and counts whether a response frame from a neighboring node is received within the timeout period. Once a link failure is detected, the port bypass relay activates, bypassing the data stream of the corresponding fiber optic transceiver to an idle port on another loop, completing millisecond-level self-healing protection. The topology update message generator then generates a new ring network topology identifier and broadcasts it to all nodes, enabling the entire network to synchronously learn the latest topology and avoid routing errors in subsequent forwarding.

[0011] Regarding protocol conversion and output, the protocol conversion and output module specifically includes a frame unpacker, a protocol encapsulator, and an output buffer. The frame unpacker extracts payload data and timestamps from the frame sequence received from the primary path, reconstructing the original electrical measurement information. The protocol encapsulator embeds this payload data into IEC61850 standard sampled value messages or general object-oriented substation event message bodies, ensuring that the external interface complies with the substation communication protocol. The output buffer buffers multiple encapsulated output messages and sends them to the substation main control system in priority order, ensuring that high real-time protection-related information is sent first, avoiding delays caused by buffer congestion.

[0012] As a preferred solution to improve the overall network synchronization performance, the system also includes a clock synchronization module. This module receives the second pulse signal from GPS or BeiDou satellites as a global time reference and distributes synchronization clock phase adjustment commands to the timestamp injection units of all I / O cabinets through a dual-ring redundant fiber optic transmission network. This mechanism ensures that the deviation of the local clock count values ​​of all I / O cabinets from the second pulse is controlled within one sampling period, thereby achieving precise synchronization of data acquired across multiple cabinets and meeting the stringent time alignment requirements of applications such as differential protection and synchronous phasor measurement.

[0013] In the specific construction of the clock synchronization module, a phase detector, a digital loop filter, and a command broadcast channel are preferably included. The phase detector compares the phase difference between the local clock phase and the rising edge of the second pulse signal; the digital loop filter performs proportional-integral filtering on this phase difference to generate a smooth synchronization clock phase adjustment command, eliminating random jitter; the command broadcast channel encapsulates the adjustment command into a dedicated management frame and simultaneously sends it to the timestamp injection units of all racks through the working loop and the protection loop. Even if a single loop fails, the synchronization command can still be reliably delivered, ensuring that the global synchronization system is not interrupted.

[0014] The technical effects and advantages provided by the present invention in the above technical solution are as follows: The dual-ring redundant fiber optic transmission network consists of a working ring and a guard ring, both using bidirectional fiber optic links, physically providing two independent paths for signal transmission simultaneously. The redundant path selection module includes a copy distributor that copies the verified frame sequence generated by the frame synchronization and verification module frame by frame into two identical copies, injecting one into the working ring and the other into the guard ring. The same data frames are transmitted simultaneously on both rings. The receive quality register records the bit error rate (BER) and jitter statistics for both the working and guard rings. An acknowledgment frame timeout timer starts after the copy is sent; if no acknowledgment frame is received from the corresponding ring within a preset timeout period, the BER of that ring is incremented by one unit. The path switching controller compares the BER values ​​of the two rings and selects the ring with the smaller value as the primary path. This parallel transmission mechanism allows both loops to carry valid data simultaneously. When one loop fails or degrades in quality, the path switching controller switches the primary path to the other loop based on accumulated quality statistics. The receiving end can then retrieve the data frames already in transmission from the other loop without undergoing a link reconstruction process, avoiding the data loss window that occurs during the re-establishment of the backup link after a primary link interruption in traditional primary / backup switching schemes. The path switching controller also includes a path locking counter, which counts the number of consecutively received valid frames after the primary path is established. When the count reaches the locking threshold, switching is prohibited until both the working and protection loops experience consecutive frame drops exceeding the frame drop threshold, at which point the counter is unlocked. This locking mechanism prevents the path selection module from frequently switching between the two loops when short-term fluctuations in network quality cause acknowledgment timeouts or instantaneous changes in the bit error rate for individual frames. This maintains the established high-quality transmission path for a sustained and stable transmission period, ensuring that the order and continuity of the frame sequence are not disrupted by unnecessary path jumps. Furthermore, the unlocking condition of consecutive frame drops on both sides ensures that path re-evaluation can still be triggered even when both paths have actually failed. After the data acquisition and local conversion module converts the electrical signal into a digital signal locally, the timestamp injection unit appends a local clock count value to the discrete digital value, forming a timestamped frame structure. The preamble of the frame structure includes the rack identifier and channel number. The timestamp difference comparator in the frame synchronization and verification module calculates the difference between the timestamp of the current frame and the timestamp of the previous frame. When the difference exceeds a preset threshold, the current frame is discarded to prevent timing error frames caused by clock jitter or abnormal jumps at the acquisition end from entering the subsequent transmission link. The sliding window buffer stores multiple consecutive frames that have passed through the timestamp difference comparator. The cyclic redundancy check generator calculates a check code for each frame payload in the sliding window buffer and appends it to the end of the frame to generate a verified frame sequence.This combined verification mechanism implemented at the data source filters out frames with abnormal sampling timing by thresholding the continuity of timestamps, and then uses the load check code within a sliding window to ensure the correctness of the frame content. It blocks the transmission of abnormal frames from the initial stage of signal digitization, preventing abnormal frames from occupying the bandwidth and resources of subsequent transmission and processing. This ensures that the frame sequence that finally arrives at the protocol conversion and output module is verified in both the time and content dimensions, thereby improving the reliability of the data received by the substation main control system. Attached Figure Description

[0015] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this invention. For those skilled in the art, other drawings can be obtained based on these drawings.

[0016] Figure 1 This is a schematic diagram of a substation electrical signal redundancy transmission system based on remote I / O. Figure 2 This is a schematic diagram of the data acquisition and on-site conversion module. Figure 3 This is a diagram illustrating the discarding of frames with abnormal timestamps; Figure 4 This is the fault bypass delay variation curve of a dual-ring redundant optical fiber transmission network; Figure 5 This is a timing diagram of data packet transmission at different priorities for the output buffer based on the IEC61850 protocol. Detailed Implementation

[0017] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0018] See Figure 1This invention provides a redundant transmission system for electrical signals in a substation based on remote I / O, comprising a dual-ring redundant fiber optic transmission network, a data acquisition and local conversion module, a frame synchronization and verification module, a redundant path selection module, and a protocol conversion and output module. The dual-ring redundant fiber optic transmission network consists of a working ring and a protection ring, both using bidirectional fiber optic links. The data acquisition and local conversion module, installed in the substation I / O cabinet, converts electrical signals locally into digital signals and encapsulates them into timestamped frame structures. The frame synchronization and verification module performs timestamp alignment and cyclic redundancy check on the timestamped frame structures, generating a verified frame sequence. The redundant path selection module sends duplicate frames in parallel to the working and protection rings based on the received quality indication of each frame in the verified frame sequence, and selects the primary path based on the acknowledgment frames returned by the working and protection rings. The protocol conversion and output module converts the frame sequence received on the primary path into standard industrial protocol data packets and outputs them to the substation main control system.

[0019] Example 1: In specific implementation, please refer to Figure 2 The data acquisition and local conversion module is installed in the substation's I / O cabinet. It is used to convert electrical signals within the substation into digital signals locally and encapsulate them into a timestamped frame structure. The data acquisition and local conversion module includes an analog signal conditioning circuit, an analog-to-digital converter, and a timestamping injection unit.

[0020] Analog signal conditioning circuits are used to filter and isolate electrical signals. In practice, an analog signal conditioning circuit includes a low-pass filter and an isolation amplifier. The low-pass filter attenuates high-frequency noise in the electrical signal, and its cutoff frequency is determined based on the highest frequency component of the electrical signal. The isolation amplifier uses transformer isolation or optocoupler isolation to electrically isolate the input electrical signal from the downstream circuitry, suppressing common-mode interference and preventing high voltage from the primary side of the substation from entering the secondary side equipment.

[0021] An analog-to-digital converter (ADC) is used to convert a conditioned analog signal into discrete digital values. In practice, successive approximation or Σ-Δ ADCs are selected. The sampling rate of the ADC is set based on the highest frequency component of the substation electrical signal and the Nyquist sampling theorem, and is set to at least 2.5 times the highest frequency component of the electrical signal. The resolution of the ADC is selected according to the measurement accuracy requirements, and 16-bit resolution can be selected. The discrete digital values ​​output by the ADC are integer values ​​in two's complement format, and are transmitted to the timestamp injection unit via parallel or serial bus.

[0022] The timestamp injection unit appends a local clock count to discrete digital values, forming a timestamped frame structure. In specific implementations, the timestamp injection unit includes a local clock counter, a frame assembler, and a preamble inserter. The local clock counter is driven by a highly stable crystal oscillator whose frequency is an integer multiple of the analog-to-digital converter's sampling rate, and the local clock count increments in each sampling period. The frame assembler acquires the discrete digital values ​​output by the analog-to-digital converter, places these values ​​as payload data in the payload field of the frame structure, and appends the local clock count corresponding to the current sampling time to the payload field to form the timestamp field. The preamble inserter adds a preamble at the beginning of the frame structure. The preamble contains the rack identifier and channel number of the I / O rack. The rack identifier is a unique code pre-assigned to each I / O rack, and the channel number is the number of the corresponding input channel of the analog-to-digital converter. The timestamped frame structure is formed by sequentially concatenating the preamble field, payload field, and timestamp field.

[0023] In some embodiments, the timestamped frame structure further includes a frame delimiter, located before the preamble field, to indicate the start boundary of the frame. The frame delimiter uses a fixed word sequence. The local clock count is a multi-bit binary number, with its bit width related to the crystal oscillator frequency and the maximum system operating time. The local clock count records the number of clock cycles elapsed since system startup. The frame assembler combines the discrete digital value and the local clock count and passes it to the preamble inserter via a parallel interface. After the preamble inserter adds the preamble, it outputs the complete timestamped frame structure to the subsequent frame synchronization and verification module.

[0024] In practical implementation, multiple electrical signal inputs can be configured within a single I / O rack. Each electrical signal corresponds to an analog signal conditioning circuit and an analog-to-digital converter (ADC) channel. Multiple ADCs can be integrated into a single ADC chip. The timestamp injection unit generates an independent timestamped frame structure for each conversion result and outputs it using time-division multiplexing. The rack identifier is written to the timestamp injection unit's register during system configuration via a DIP switch or software configuration. The channel number is obtained by decoding the ADC's channel address lines.

[0025] Example 2: The frame synchronization and verification module is used to perform timestamp alignment and cyclic redundancy check on the timestamped frame structure, generating a verified frame sequence. The module includes a timestamp difference comparator, a sliding window buffer, and a cyclic redundancy check generator.

[0026] In practical implementation, the timestamp difference comparator receives a timestamped frame structure from the data acquisition and local conversion module, extracts the timestamp field from the timestamped frame structure, and obtains the timestamp of the current frame. Internally, the timestamp difference comparator contains a timestamp register to store the timestamp of the previous frame. The comparator calculates the difference between the timestamp of the current frame and the timestamp of the previous frame. This difference calculation is implemented using a subtractor, with one input receiving the timestamp of the current frame and the other input receiving the timestamp of the previous frame output from the timestamp register. The comparator then compares the calculated difference with a preset threshold, performed by a digital comparator. The preset threshold is set based on the sampling period of the analog-to-digital converter and the maximum allowable time deviation of the system. The preset threshold is stored in a configuration register, which is written by the controller during system initialization. When the difference exceeds the preset threshold, the timestamp difference comparator determines that the timestamp of the current frame is abnormal, discards the current frame, and keeps the timestamp of the previous frame in the timestamp register unchanged; when the difference does not exceed the preset threshold, the timestamp difference comparator determines that the timestamp of the current frame is valid, sends the current frame into the sliding window buffer, and updates the value stored in the timestamp register with the timestamp of the current frame.

[0027] A sliding window buffer is used to store multiple consecutive frames that have passed through a timestamp difference comparator. In practice, the sliding window buffer is implemented using a first-in, first-out (FIFO) buffer, the depth of which corresponds to the size of the sliding window. The depth of the sliding window buffer is set according to the minimum number of frames that the cyclic redundancy check (CRC) generator needs to process. Whenever a new valid frame passes through the timestamp difference comparator, this valid frame is written to the input of the sliding window buffer, and the oldest frame stored in the buffer is removed from the output. The sliding window buffer always maintains the most recently received valid frame, and all frames stored in the buffer are shifted one frame position towards the output as a whole when each new valid frame arrives. The output of the sliding window buffer provides the stored consecutive frames in parallel to the CRC generator.

[0028] The Cyclic Redundancy Check (CRC) generator calculates a checksum for each frame payload in the sliding window buffer and appends it to the end of the frame, generating a checked frame sequence. In practice, the CRC generator reads frames one by one from the sliding window buffer and performs CRC calculations on the payload field of each frame. The CRC generator uses polynomial division to calculate the checksum; the polynomial generator used is:

[0029] in, For variables in polynomial quantifiers, express The 16th power term, express The 12th power term, express The term is a 5th power, and the constant term is 1. The cyclic redundancy check generator uses the binary sequence of the load field as the coefficients of the polynomial, and uses the polynomial generator formula... Modulo-2 division is performed, and the remainder is the checksum, which is 16 bits wide. The Cyclic Redundancy Check (CRBC) generator appends the calculated checksum to the payload field and before the timestamp field of the corresponding frame to form the checked frame. Each frame in the sliding window buffer is processed by the CRBC generator and output sequentially to form the checked frame sequence. In some embodiments, after calculating the checksum for a frame, the CRBC generator recombines the checksum and payload to ensure the boundary alignment of the checked frames. Each frame in the checked frame sequence contains a preamble field, a payload field, a checksum field, and a timestamp field. The preamble field and timestamp field are consistent with the corresponding fields in the input timestamped frame structure, the payload field is the original payload data, and the checksum field is the checksum appended by the CRBC generator.

[0030] See Figure 3 In the figure, the horizontal axis represents the frame number, and the vertical axis represents the timestamp difference, in microseconds (μs). The solid curve represents the frame timestamp difference calculated by the timestamp difference comparator in Example 2, and the dashed line represents the preset timestamp difference threshold, which is fixed at 11000 μs. The points marked with red crosses in the figure represent frames that were judged to have abnormal timestamps and were discarded.

[0031] Specifically, the timestamp difference curve remains within a stable fluctuation range of approximately 8000 μs, not exceeding the preset threshold, indicating that the timestamps of most frames are continuous and valid. At frame numbers approximately 80, 180, 280, 380, and 460, sudden spikes appear in the timestamp difference, exceeding the set threshold of 11000 μs, triggering the timestamp difference comparator to identify them as abnormal frames. These abnormal frames are discarded, clearly marked with a red cross in the figure, consistent with the functional description in Example 2 regarding discarding abnormal frames when the threshold is exceeded.

[0032] Example 3: In practical implementation, the redundant path selection module includes a replication distributor, a receive quality register, an acknowledgment frame timeout timer, and a path switching controller. The redundant path selection module receives the verified frame sequence output by the frame synchronization and verification module, and performs redundant transmission and path selection on this verified frame sequence.

[0033] The replication distributor is used to copy each frame of the verified frame sequence into two identical copies, which are then injected into the working ring and the guard ring, respectively. In practice, the replication distributor internally includes a frame buffer and two output queues. The frame buffer receives each verified frame from the verified frame sequence, parses the frame, and extracts all its fields. The replication distributor then copies the extracted frame fields exactly as they are, creating a first copy and a second copy, both containing identical frame content. The replication distributor writes the first copy to the output queue of the corresponding working ring and the second copy to the output queue of the corresponding guard ring. The output queue of the working ring is connected to the transmit interface of the fiber optic transceiver in the dual-ring redundant fiber optic transmission network, and the output queue of the guard ring is connected to the transmit interface of the fiber optic transceiver in the guard ring. After both output queues have completed writing a copy of a verified frame, the replication distributor simultaneously triggers the corresponding fiber optic transceiver to transmit the frame, ensuring that the time difference between the injection of the two copy frames into the working ring and the guard ring does not exceed one frame transmission clock cycle.

[0034] The Receive Quality Register (RQR) records the bit error rate (BER) and jitter statistics for both the working and guard loops. In practice, the RQR comprises four register units: the working loop BER register, the working loop jitter register, the guard loop BER register, and the guard loop jitter register. The working loop BER register stores the BER statistics for the working loop, the working loop jitter register stores the jitter statistics for the working loop, the guard loop BER register stores the BER statistics for the guard loop, and the guard loop jitter register stores the jitter statistics for the guard loop. The BER statistics are updated as follows: whenever the acknowledgment frame timeout timer determines that the working or guard loop has not returned an acknowledgment frame within the preset timeout period, the value in the corresponding loop's BER register is incremented by one unit; whenever the acknowledgment frame returned by the corresponding loop passes the cyclic redundancy check (CRC), the value in the corresponding loop's BER register is halved, achieved through a right shift operation. The update method for the latency jitter statistics is as follows: when the redundant path selection module receives an acknowledgment frame for a corresponding loop, it records the difference between the sending timestamp carried in the acknowledgment frame and the local receiving time as the single latency value; the latency jitter statistics are obtained by calculating the variance of multiple consecutive single latency values. This variance is calculated using a moving average algorithm, and the moving average window length is set to 16.

[0035] The acknowledgment frame timeout timer starts timing after a copy is sent. If no acknowledgment frame is received from the corresponding loop within the preset timeout period, the bit error rate (BER) statistic in the corresponding loop's receive quality register is incremented by one unit. In practice, the acknowledgment frame timeout timer includes two independent timers: a working loop timeout timer and a guard loop timeout timer. The working loop timeout timer starts timing after the replication distributor injects the first copy into the working loop; the guard loop timeout timer starts timing after the replication distributor injects the second copy into the guard loop. The preset timeout period is determined by the sum of the one-way propagation delay of the fiber optic link between the working and guard loops, the node processing delay, and the acknowledgment frame return delay. The preset timeout period is stored in the timeout configuration register, and its value is written during system initialization. If the working loop timeout timer receives an acknowledgment frame from the working loop within the preset timeout period, the working loop timeout timer resets and clears the current timeout state. If the working loop timeout timer reaches the preset timeout period without receiving an acknowledgment frame from the working loop, the working loop timeout timer outputs a timeout indication signal, which triggers the bit error rate (BER) statistics in the working loop bit error rate register to increase by one unit. The protection loop timeout timer operates in the same way as the working loop timeout timer.

[0036] The path switching controller compares the receive quality register values ​​of the operating loop and the guard loop, selecting the loop with the smaller value as the primary path. In practice, the path switching controller reads the operating loop bit error rate (BER) statistics stored in the operating loop bit error rate register, the operating loop delay jitter statistics stored in the operating loop delay jitter register, the guard loop BER statistics stored in the guard loop bit error rate register, and the guard loop delay jitter statistics stored in the guard loop delay jitter register from the receive quality register. The path switching controller then calculates the overall operating loop quality value based on the overall quality evaluation function. Comprehensive value of protective ring quality The overall quality evaluation function is expressed as:

[0037] in, This represents the overall quality value of the loop. For loop identification, the possible values ​​are: or These correspond to the working ring and the protection ring, respectively. This is the bit error rate weighting coefficient. The value is set to 0.7, which is based on the fact that the impact of bit error rate on the correctness of frame data is greater than the impact of latency jitter on data transmission, and is determined by table lookup method. This represents the bit error rate statistics for the corresponding loop. This is the latency jitter weighting coefficient. The value is set to 0.3, which satisfies... ; This represents the latency jitter statistics for the corresponding loop. Calculated by the path switching controller. and Then, compare the sizes of the two and choose. The loop with the smaller value is designated as the primary path. The selected primary path identifier is written to the primary path indicator register.

[0038] The path switching controller also includes a path locking counter. This counter counts the number of consecutively received valid frames after the primary path is established. When the count reaches a locking threshold, switching is prohibited until both the working loop and the protection loop experience consecutive frame drops exceeding the frame drop threshold, at which point the counter is unlocked. In specific implementations, the path locking counter includes a locking count register, a locking threshold register, and frame drop triggering logic. When the path switching controller selects the primary path and writes the primary path identifier into the primary path indicator register, the path locking counter clears the locking count register and begins counting consecutively received valid frames on the primary path. A valid frame is defined as a frame that passes cyclic redundancy check and has consecutive timestamps. The locking count register increments by one for each valid frame received. When the value of the locking count register reaches the stored value in the locking threshold register, the path locking counter outputs a locking signal. When the locking signal is valid, the path selection logic of the path switching controller is forced to maintain the current primary path unchanged, even if... Path switching is not performed even if the relative value changes. The lock threshold register is set to 100, based on the assumption that the link status has sufficient statistical stability within 100 valid frame reception periods, and short-term quality fluctuations should not trigger path switching. The frame loss triggering logic monitors consecutive frame losses in both the working loop and the protection loop. The continuous frame loss counters for the working loop and the protection loop count independently. When the continuous frame loss counter values ​​for both the working loop and the protection loop exceed the frame loss threshold, the frame loss triggering logic outputs an unlock signal, clears the lock signal, and resets the lock count register, allowing the path switching controller to re-evaluate and switch the primary path. The frame loss threshold is set to 10, based on the assumption that if both loops lose more than 10 consecutive frames, it indicates that both the primary and backup paths have severely deteriorated, requiring unlocking to select a new available path. The continuous frame loss counter for the working loop increments by one for each lost acknowledgment frame and resets to zero when a valid acknowledgment frame is received; the same applies to the continuous frame loss counter for the protection loop.

[0039] Example 4: In practical implementation, the dual-ring redundant fiber optic transmission network consists of a working ring and a protection ring, both of which use bidirectional fiber optic links. Each node in the dual-ring redundant fiber optic transmission network includes two fiber optic transceivers, a node status register, and self-healing control logic.

[0040] Two fiber optic transceivers are connected to adjacent nodes of the working ring and the guard ring, respectively. In this implementation, each fiber optic transceiver includes one optical transmit port and one optical receive port. The optical transmit port of the working ring fiber optic transceiver is connected to the optical receive port of the working ring fiber optic transceiver of the downstream adjacent node via a working ring fiber optic link, and the optical receive port of the working ring fiber optic transceiver is connected to the optical transmit port of the working ring fiber optic transceiver of the upstream adjacent node via a working ring fiber optic link. The optical transmit port of the guard ring fiber optic transceiver is connected to the optical receive port of the guard ring fiber optic transceiver of the downstream adjacent node via a guard ring fiber optic link, and the optical receive port of the guard ring fiber optic transceiver is connected to the optical transmit port of the guard ring fiber optic transceiver of the upstream adjacent node via a guard ring fiber optic link. The fiber optic links of the working ring and the guard ring are physically separated by separate optical cable routes. The working ring fiber optic link closes along a first direction, and the guard ring fiber optic link closes along a second direction opposite to the first direction. Each fiber optic transceiver internally includes a photoelectric conversion module and a clock data recovery module. The photoelectric conversion module converts the optical signal transmitted in the optical fiber into an electrical signal, and the clock data recovery module extracts the clock from the serial data stream and recovers the bit-synchronized data.

[0041] The node status register stores the node's ring network role identifier and neighbor node liveness detection results. In specific implementations, the node status register includes a ring network role identifier register, a working ring neighbor liveness register, a protection ring neighbor liveness register, and a local node status word. The ring network role identifier register stores the node's ring network role identifier, which includes three types: root node, intermediate node, and leaf node. The ring network role identifier is determined by network planning and written into the ring network role identifier register during initial system configuration. The working ring neighbor liveness register stores the upstream and downstream neighbor node liveness detection results in the working ring direction. Each upstream and downstream neighbor node liveness detection result occupies one flag bit. A logical "1" value indicates that the corresponding neighbor node is alive, and a logical "0" value indicates that the corresponding neighbor node has not responded. The protection ring neighbor liveness register stores the upstream and downstream neighbor node liveness detection results in the protection ring direction, using the same storage method as the working ring neighbor liveness register. The local node status word is used to record the current state of the node's self-healing control logic, including normal state, fault detection state, bypass execution state, and topology update state.

[0042] The self-healing control logic is used to short-circuit the transmit port of the fiber optic transceiver on the faulty side to the receive port when the node status register detects no response from an adjacent node on the working or protection ring, thus forming a ring network self-healing mechanism. In specific implementations, the self-healing control logic includes a fault detection timer, a port bypass relay, and a topology update message generator.

[0043] The fault detection timer is used to periodically send handshake frames and count whether a response frame is received from a neighbor node within the timeout period. In specific implementations, the fault detection timer includes a working ring fault detection timer and a protection ring fault detection timer. The working ring fault detection timer maintains independent detection periods and timeout counters for the upstream and downstream neighbor nodes connected to the working ring fiber optic transceiver. The working ring fault detection timer uses a fault detection period... At regular intervals, handshake frames are sent to upstream and downstream neighbor nodes in the working ring. The handshake frame structure includes a local node identifier field, a target neighbor node identifier field, a transmission sequence number, and a verification field. Simultaneously with sending the handshake frames, the working ring fault detection timer starts the timeout counter of the corresponding neighbor node. The timeout threshold of the timeout counter is set to [value missing]. If the working loop fault detection timer receives a response frame from the corresponding neighbor node within a fault detection cycle, it clears the timeout counter and sets the flag bit of the corresponding neighbor node in the working loop neighbor live register of the node status register to logic "1"; if the timeout counter reaches a certain value... If no response frame is received by the specified time, the fault detection timer determines that the corresponding neighbor node is faulty and sets the flag bit of the corresponding neighbor node in the working ring neighbor live register of the node status register to logic "0". The protection ring fault detection timer operates in the same way as the working ring fault detection timer. The protection ring fault detection timer performs handshake frame transmission and response detection for the upstream and downstream neighbor nodes connected to the protection ring fiber optic transceiver, respectively. The timeout threshold value for the protection ring is also set to [value missing]. Fault detection cycle The value is set to ,in, This refers to the length of the fiber optic link between adjacent nodes. The speed at which light travels in an optical fiber. This refers to the processing time for handshake frames and response frames within the node. The value is obtained by measuring the fiber optic link length during construction. The value is taken as meters per second, The value is set to 50 microseconds.

[0044] A port bypass relay is used to bypass the data stream of the corresponding fiber optic transceiver to an idle port in another loop when a fault detection timer determines a fault. In practice, the port bypass relay includes a high-speed switching matrix. The inputs of the high-speed switching matrix are connected to the receive and transmit data paths of the working loop fiber optic transceiver and the protection loop fiber optic transceiver. The output of the high-speed switching matrix is ​​connected to the frame processing data path inside the node. When the fault detection timer determines that the upstream neighbor node of the working loop is faulty, the port bypass relay disconnects the receive port data path of the working loop fiber optic transceiver and copies the frame extracted from the transmit port data path of the protection loop fiber optic transceiver, bypassing it to the frame processing data path that would originally enter the node through the working loop's receive port. This achieves data stream bypass on the faulty side of the working loop. When performing the bypass action, the port bypass relay completes the switching within one frame period using the control signal of the high-speed switching matrix. The port bypass relay supports bidirectional bypass. When both upstream and downstream neighboring nodes of the working ring are determined to be faulty, the port bypass relay will simultaneously bypass the receive port and transmit port of the working ring fiber optic transceiver to the corresponding port of the protection ring.

[0045] The topology update message generator broadcasts the updated ring network topology identifier to all nodes after a bypass action. In specific implementations, the topology update message generator immediately generates a topology update message frame after detecting that the port bypass relay has performed a bypass action. The frame structure of the topology update message frame includes a message type field, a source node identifier field, a change type field, a new topology identifier field, and a checksum field. The message type field takes a fixed code indicating the type of topology update. The source node identifier field contains the node identifier of the node that performed the bypass action. The change type field indicates the type of change that occurred, including working ring disconnect bypass and protection ring disconnect bypass. The new topology identifier field contains the updated ring network topology identifier, which uses a spanning tree identifier to arrange all nodes in the ring network topology according to their order on the new ring. The topology update message generator simultaneously sends the generated topology update message frame through available ports on the working ring and protection ring, filling in the broadcast address in the destination address field of the topology update message frame during transmission. Upon receiving a topology update message frame, the node extracts the value of the new topology identifier field, updates the ring network role identifier register in the node's status register, and reconfigures the data forwarding path based on the new topology identifier. The topology update message generator starts an acknowledgment waiting timer after sending the topology update message frame. If no topology acknowledgment frames are received from all adjacent nodes within the acknowledgment waiting time, the topology update message generator retransmits the topology update message frame. The number of retransmissions cannot exceed the preset maximum number of retransmissions, which is set to 3.

[0046] See Figure 4In the graph, the horizontal axis represents time in seconds, and the vertical axis represents one-way transmission delay in microseconds. The solid curve represents the one-way transmission delay of the working ring fiber optic link, and the dashed curve represents the one-way transmission delay of the protection ring fiber optic link. The graph also uses a combination of solid and dashed vertical lines to indicate the moment when the port bypass relay operates, and the horizontal dashed line represents the preset timeout threshold.

[0047] Between 0 and 2.5 seconds, the one-way transmission delays of the working ring and the protection ring remained stable at approximately 10 microseconds and 12 microseconds, respectively, both significantly lower than the set timeout threshold of approximately 50 microseconds. This indicates that both the working ring and the protection ring of the dual-ring redundant optical fiber transmission network are in normal and stable working condition.

[0048] At approximately 2.5 seconds, the port bypass relay activated, causing a sudden change in the one-way transmission delay of the operating ring. The transmission delay rapidly jumped from approximately 10 microseconds to approximately 100 microseconds, and remained at this high level with minimal fluctuations for the subsequent time, significantly exceeding the timeout threshold. The one-way transmission delay of the protection ring link remained stable, hovering around 12 microseconds, and was unaffected.

[0049] This trend reflects how, in a dual-ring redundant fiber optic transmission network, when the working ring fails, the self-healing control logic drives the port bypass relay to quickly switch the data stream on the faulty side, short-circuiting the receiving port of the working ring to the transmitting port of the protection ring, thus ensuring the isolation of the faulty link. After the port bypass relay activates, the transmission delay of the working ring increases significantly. At this time, data transmission is completed through the bypass logic path, resulting in a substantial increase in delay. However, the protection ring link remains intact and continues to handle data transmission as a backup path.

[0050] Example 5: In practical implementation, the protocol conversion and output module includes a frame unpacker, a protocol encapsulator, and an output buffer. The protocol conversion and output module obtains the frame sequence received on the primary path from the redundancy path selection module, and each frame in the frame sequence is a verified frame.

[0051] The frame unpacker is used to extract payload data and timestamps from the frame sequence received on the primary path. In specific implementations, the frame unpacker internally includes a frame boundary detection circuit and a field extraction circuit. The frame boundary detection circuit identifies the start position of each frame through the frame delimiter sequence in the preamble. The frame delimiter sequence is a fixed 16-bit binary sequence, defined and embedded in the frame boundary detection circuit during system design. After the frame boundary detection circuit detects the frame delimiter, it triggers the field extraction circuit to start working. The field extraction circuit extracts the preamble field, payload data field, checksum field, and timestamp field sequentially from the frame sequence according to a predefined frame structure mapping relationship. The payload data field is obtained by offsetting a fixed number of bytes from the frame structure; the length of the payload data field is determined by the number of channels configured in the rack. The timestamp field is obtained by offsetting a fixed number of bytes forward from the end of the frame; the timestamp field is the local clock count value carried by the frame. The frame unpacker outputs the extracted payload data and timestamp to the subsequent processing unit. The payload data is sent to the protocol encapsulator, and the timestamp is sent to the output buffer for subsequent time stamp processing.

[0052] The protocol encapsulator is used to embed payload data into the sampled value message body of the IEC 61850 protocol or the message body of a general object-oriented substation event. In specific implementations, the protocol encapsulator includes a sampled value message encapsulation unit and a general object-oriented substation event message encapsulation unit. The sampled value message encapsulation unit constructs the sampled value message according to the frame format defined in the IEC 61850-9-2 standard. The sampled value message encapsulation unit maps the payload data output by the frame unpacker to the sampled value data sequence in the application service data unit of the sampled value message. The payload data of each channel is filled into the application service data unit in channel order, and a sampling counter, synchronization identifier, and sampling rate parameter are added to the header of the application protocol data unit. The general-purpose object-oriented substation event message encapsulation unit constructs messages according to the general-purpose object-oriented substation event message format defined in the IEC 61850-8-1 standard. This unit matches the load data with a preset substation event type mapping table. Switch quantity changes in the load data correspond to the generated state change event entries, which include a state sequence number, state value, and time stamp. The protocol encapsulator generates a corresponding IEC 61850 protocol data packet for each frame unpacker's output load data, and this IEC 61850 protocol data packet is sent to the output buffer.

[0053] The output buffer is used to buffer the output messages of multiple protocol encapsulators and send them to the substation main control system in priority order. In specific implementations, the output buffer includes a priority queue buffer and a scheduler. The priority queue buffer stores IEC61850 protocol data packets to be sent. Each protocol data packet in the priority queue buffer is accompanied by a priority tag. The priority tag is attached by the protocol encapsulator according to the message type when generating the IEC61850 protocol data packet. Sampled value messages are assigned the first priority, protection action events in general object-oriented substation event messages are assigned the second priority, and alarm events in general object-oriented substation event messages are assigned the third priority, with the first priority being the highest. The scheduler reads the protocol data packets in the priority queue buffer, retrieves the protocol data packets in descending order of priority tag, and sends them to the communication interface of the substation main control system. When multiple protocol data packets with the same priority exist in the priority queue buffer, the scheduler sends them in a first-in, first-out order. The communication interface between the dispatcher and the substation main control system uses an Ethernet interface. The physical layer uses fiber optic or twisted-pair cable, and the link layer uses the standard Ethernet Media Access Control protocol. After sending each protocol data packet, the output buffer clears the corresponding protocol data packet entry from the priority queue buffer.

[0054] In practical implementation, the system also includes a clock synchronization module. This module receives second pulse signals from GPS or BeiDou satellites and distributes synchronization clock phase adjustment commands to the timestamp injection units of all I / O cabinets via a dual-ring redundant fiber optic transmission network. This ensures that the deviation of the local clock count value of all cabinets from the second pulse does not exceed one sampling period. The clock synchronization module is installed in the master node cabinet within the substation that has satellite signal reception capabilities.

[0055] The clock synchronization module includes a phase detector, a digital loop filter, and a command broadcast channel. The phase detector compares the phase difference between the local clock phase and the rising edge of the second pulse signal. In specific implementations, the phase detector receives the second pulse signal from a satellite receiver. The rising edge of the satellite receiver's second pulse signal is aligned with the whole second in Coordinated Universal Time (UTC), and the pulse width of the second pulse signal is 1 millisecond. Internally, the phase detector contains a local high-frequency clock counter. The clock source for this local high-frequency clock counter is a 100 MHz cryogenic crystal oscillator, and the clock signal output by the cryogenic crystal has a period of 10 nanoseconds. The phase detector uses the rising edge of the second pulse signal as the sampling trigger signal. At each rising edge of the second pulse, it latches the current count value of the local high-frequency clock counter. The latched count value is subtracted from the count value latched at the previous rising edge of the second pulse, and the difference represents the count value of the local clock within one whole second cycle. The phase detector compares the latched count value with the theoretical integer second count value, which is the product of the local high-frequency clock counter frequency and 1 second, i.e., 100,000,000. The phase detector calculates the difference between the latched count value and the theoretical integer second count value; this difference is the phase difference between the local clock phase and the second pulse signal, with the unit being the number of local high-frequency clock cycles. The phase detector outputs the phase difference value to the digital loop filter.

[0056] A digital loop filter is used to perform proportional-integral filtering on the phase difference to generate a synchronous clock phase adjustment command. In specific implementations, the digital loop filter receives a phase difference value sequence output by a phase detector, where each element of the phase difference value sequence corresponds to a phase difference value of one second pulse period. The digital loop filter calculates the synchronous clock phase adjustment command value according to the following formula:

[0057] in, Indicates the first Synchronous clock phase adjustment command value generated per second pulse cycle This is the sequence number of the second pulse period. Starting from 0 and incrementing; This is the proportionality coefficient. The value is set to That is, 0.125. The basis for choosing this value is that, under typical crystal oscillator drift rates, the adjustment amount of the proportional branch output does not exceed one-eighth of the clock deviation of a single sampling period, ensuring smooth adjustment; Indicates the first The phase difference value output by the phase detector in one-second pulse cycles; The integral coefficient is... The value is set to That is, 0.0078125. The basis for this value is that the adjustment amount generated by the cumulative phase error of the integral branch over 100 consecutive second pulse cycles is on the same order of magnitude as the adjustment amount of the proportional branch in a single cycle. This indicates the period from the 0th second pulse cycle to the 1st second pulse cycle. The sum of all phase differences between each second pulse cycle This is for accumulating index variables. The digital loop filter performs the above calculation once per second pulse period, generating the synchronous clock phase adjustment command value. Represented in two's complement form, a positive number indicates the number of steps required to adjust the local clock phase in the positive direction, and a negative number indicates the number of steps required to adjust the local clock phase in the negative direction. The synchronous clock phase adjustment command value is sent to the command broadcast channel.

[0058] The command broadcast channel encapsulates the synchronization clock phase adjustment command into a dedicated management frame and simultaneously distributes it to the timestamp injection units of all racks via the working loop and protection loop. In specific implementation, the command broadcast channel receives the synchronization clock phase adjustment command value output by the digital loop filter and encapsulates it as a payload into the dedicated management frame. The frame structure of the dedicated management frame includes a frame start delimiter, management frame type identifier, destination address, source address, payload length, synchronization clock phase adjustment command value, and frame check sequence. The management frame type identifier is 0x01, indicating that the frame is a clock synchronization type management frame. The destination address is filled with the broadcast address 0xFFFF, and the source address is filled with the node identifier of the master node rack where the clock synchronization module is located. The synchronization clock phase adjustment command value field is filled with the value calculated by the digital loop filter. The frame check sequence is calculated according to the Ethernet standard cyclic redundancy check algorithm. The command broadcast channel simultaneously writes the encapsulated dedicated management frame into the working ring transmission queue and the protection ring transmission queue. The two transmission queues drive the two fiber optic transceivers of the corresponding rings to send out the dedicated management frame. The dedicated management frame is forwarded node by node to all IO racks through the dual-ring redundant fiber optic transmission network. After receiving the dedicated management frame, the timestamp injection unit of each IO rack parses out the synchronization clock phase adjustment command value and adjusts the counting rate or counting offset of the local clock counter in the timestamp injection unit according to the value of the synchronization clock phase adjustment command value. The adjustment operation includes increasing or decreasing the local clock count value by a specified number of steps in the next sampling period. The command broadcast channel performs the encapsulation and broadcast of the dedicated management frame once in each second pulse period to ensure that the deviation of the local clock count value of all racks relative to the second pulse converges to within a range of no more than one sampling period.

[0059] See Figure 5The horizontal axis of the graph represents time in milliseconds (ms), and the vertical axis represents the number of messages in the queue, illustrating the transmission status of different types of IEC61850 protocol data packets by the output buffer in the protocol conversion and output module. The legend identifies the queues for three types of protocol data packets: the sampled value message queue (solid blue line), the protection action event queue (dashed orange line), and the alarm event queue (dotted green line).

[0060] As can be seen from the figure, the message transmission of the sampled value message queue exhibits intermittent and evenly distributed low message number fluctuations, with the maximum number of messages in the queue not exceeding 2. This reflects that the sampled value messages, as the first priority data packets, continuously and stably enter the output buffer, and the scheduler sends them in an orderly manner according to the first-in-first-out order, ensuring the real-time performance and continuity of the sampled value messages.

[0061] The number of messages in the protection action event queue showed several obvious spikes, with the highest peak reaching 9 messages. Peaks occurred multiple times during this period, and the intervals between the peaks were roughly evenly distributed throughout the 500ms time range. This indicates that this type of event message, as a second-priority data packet, has a bursty nature. The scheduler prioritizes sending such messages during the intervals between sampled value messages according to the priority rules to ensure timely response to protection action events.

[0062] The number of alarm event queue messages generally fluctuates at a low level, with a peak of no more than 1, and the distribution is relatively scattered. This indicates that alarm events are queued in the output buffer as third-priority data packets, waiting to be sent, and are only sent when there are no higher-priority messages.

[0063] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application.

Claims

1. A substation electrical signal redundancy transmission system based on remote I / O, characterized in that, The system includes: A dual-ring redundant optical fiber transmission network consists of a working ring and a protection ring, both of which use bidirectional optical fiber links. The data acquisition and local conversion module is installed in the substation's I / O cabinet and is used to convert electrical signals into digital signals locally and encapsulate them into a frame structure with timestamps. The frame synchronization and verification module is used to perform timestamp alignment and cyclic redundancy check on the timestamped frame structure and generate a verified frame sequence. The redundant path selection module is used to send duplicate frames in parallel to the working ring and the protection ring according to the reception quality indication of each frame in the verified frame sequence, and select the primary path based on the acknowledgment frames returned by the working ring and the protection ring. The protocol conversion and output module is used to convert the frame sequence received on the main path into standard industrial protocol data packets and output them to the substation main control system.

2. The substation electrical signal redundancy transmission system based on remote I / O as described in claim 1, characterized in that, The data acquisition and on-site conversion module includes: Analog signal conditioning circuitry is used for filtering and isolating the electrical signals; An analog-to-digital converter is used to convert conditioned analog signals into discrete digital values. A timestamp injection unit is used to append a local clock count value to the discrete digital value to form the timestamped frame structure. The preamble of the timestamped frame structure contains the rack identifier and channel number of the IO rack.

3. The substation electrical signal redundancy transmission system based on remote I / O as described in claim 1, characterized in that, The frame synchronization and verification module includes: A timestamp difference comparator is used to calculate the difference between the timestamp of the current frame and the timestamp of the previous frame in the timestamped frame structure. When the difference exceeds a preset threshold, the current frame is discarded. A sliding window buffer is used to store multiple consecutive frames that pass through the timestamp difference comparator; A cyclic redundancy check generator is used to calculate a check code for each frame payload in the sliding window buffer and append it to the end of the frame to generate the checked frame sequence.

4. The substation electrical signal redundancy transmission system based on remote I / O as described in claim 1, characterized in that, The redundant path selection module includes: A copy distributor is used to copy the verified frame sequence frame by frame into two identical copies, which are then injected into the working ring and the protection ring, respectively. A receive quality register is used to record the bit error rate statistics and delay jitter statistics of the working ring and the guard ring, respectively. The acknowledgment frame timeout timer is used to start timing after sending a copy. If no acknowledgment frame is received from the corresponding loop within the preset timeout period, the bit error rate statistics in the receive quality register of that loop will be increased by one unit. A path switching controller is used to compare the receive quality register values ​​of the working loop and the protection loop, and select the loop with the smaller value as the primary path.

5. The substation electrical signal redundancy transmission system based on remote I / O as described in claim 4, characterized in that, The path switching controller also includes: The path lock counter is used to count the number of consecutively received valid frames after the primary path is established. When the count reaches the lock threshold, switching is prohibited until both the working ring and the protection ring experience consecutive frame loss exceeding the frame loss threshold, at which point the lock is unlocked.

6. The substation electrical signal redundancy transmission system based on remote I / O as described in claim 1, characterized in that, Each node of the dual-ring redundant optical fiber transmission network includes: Two fiber optic transceivers are respectively connected to adjacent nodes of the working ring and the protection ring; The node status register is used to store the ring network role identifier of this node and the results of neighbor node liveness detection; The self-healing control logic is used to short-circuit the transmitting port of the fiber optic transceiver on the fault side to the receiving port when the node status register detects that there is no response from the adjacent node on the working ring or the protection ring, thereby forming a ring network self-healing mechanism.

7. The substation electrical signal redundancy transmission system based on remote I / O as described in claim 6, characterized in that, The self-healing control logic includes: The fault detection timer is used to periodically send handshake frames and count whether a response frame is received from a neighboring node within the timeout period. A port bypass relay is used to bypass the data stream of the corresponding fiber optic transceiver to an idle port of another loop when the fault detection timer determines a fault. The topology update message generator is used to broadcast the updated ring topology identifier to all nodes after a bypass action.

8. The substation electrical signal redundancy transmission system based on remote I / O as described in claim 1, characterized in that, The protocol conversion and output module includes: A frame unpacker is used to extract payload data and timestamps from the frame sequence received on the primary path; A protocol encapsulator is used to embed the payload data into the sampled value message of the IEC61850 protocol or the message body of a general object-oriented substation event; An output buffer is used to buffer the output messages of multiple protocol encapsulators and send them to the substation main control system in order of priority.

9. The substation electrical signal redundancy transmission system based on remote I / O as described in claim 2, characterized in that, The system also includes: The clock synchronization module is used to receive the second pulse signal from GPS or Beidou satellites and distribute the synchronization clock phase adjustment command to the timestamp injection unit of all IO cabinets through the dual-ring redundant optical fiber transmission network, so that the deviation of the local clock count value of all cabinets relative to the second pulse does not exceed one sampling period.

10. The substation electrical signal redundancy transmission system based on remote I / O as described in claim 9, characterized in that, The clock synchronization module includes: A phase detector is used to compare the phase difference between the local clock phase and the rising edge of the second pulse signal; A digital loop filter is used to perform proportional-integral filtering on the phase difference to generate the synchronous clock phase adjustment command. The instruction broadcast channel is used to encapsulate the synchronization clock phase adjustment instruction into a dedicated management frame and simultaneously send it to the timestamp injection unit of all racks through the working ring and the protection ring.

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