drive unit, drive circuit, motor, motor control system, electric device

Abstract

The application discloses a driving unit, a driving circuit, a motor, a motor control system and a power consumption equipment, and relates to the technical field of driving circuits.The driving unit comprises a signal receiving end configured to receive a control signal, wherein the control signal is used for on-off control of a power device; and a driving resistor, a first end of the driving resistor being connected with the signal receiving end, and a second end of the driving resistor being adapted to be connected with a gate of the power device.

Description

Technical Field

[0001] This invention relates to the field of drive circuit technology, and in particular to a drive unit, drive circuit, motor, motor control system, and electrical equipment. Background Technology

[0002] To address the climate crisis caused by rising global temperatures, global automotive technology is trending towards "low-carbon, information-based, and intelligent" development. As a core component of the cooling system in new energy vehicles, the electronic water pump will gradually replace traditional mechanical water pumps during the transformation and upgrading of the automotive industry. The electronic water pump controller is a crucial part of the electronic water pump, providing power for the operation of the vehicle's cooling system.

[0003] However, the controller in the related technology generates a high spike current when the MOS is turned on / off, which leads to noise signal. Summary of the Invention

[0004] The present invention aims to at least partially solve one of the technical problems in the related art. To this end, a first objective of the present invention is to provide a drive unit that reduces noise caused by current spikes.

[0005] The second objective of this invention is to provide a driving circuit.

[0006] The third objective of this invention is to provide an electric motor.

[0007] The fourth objective of this invention is to provide a motor control system.

[0008] The fifth objective of this invention is to provide an electrical device.

[0009] To achieve the above objectives, a first aspect of the present invention provides a driving unit, the driving unit comprising: a signal receiving terminal for receiving a control signal, wherein the control signal is used for on / off control of a power device; and a driving resistor, wherein a first terminal of the driving resistor is connected to the signal receiving terminal, and a second terminal of the driving resistor is adapted to be connected to the gate of the power device, the resistance value of the driving resistor satisfying the following condition:

[0010]

[0011] Among them, R g C represents the resistance value of the driving resistor. gs L represents the parasitic capacitance between the gate and source of the power device. K The inductive reactance of the drive circuit containing the power device is represented by dV / dt, and the voltage change rate is represented by C. gd V represents the parasitic capacitance between the gate and drain of the power device. thThis represents the threshold voltage of the power device.

[0012] In addition, the driving unit according to embodiments of the present invention may also have the following additional technical features:

[0013] According to one embodiment of the present invention, the driving unit further includes: a bleed subunit, a first end of the bleed subunit being connected to a first end of the driving resistor, a second end of the bleed subunit being connected to a second end of the driving resistor, and a third end of the bleed subunit being adapted to connect the source of the power device and ground.

[0014] According to one embodiment of the present invention, the driving unit further includes: a buffer subunit, a first end of the buffer subunit being adapted to connect to the drain of the power device, and a second end of the buffer subunit being adapted to connect to the source of the power device.

[0015] According to one embodiment of the present invention, the discharge subunit includes: a first discharge resistor, a second discharge resistor, and a transistor; wherein, a first end of the second discharge resistor is connected to a first end of the first discharge resistor and serves as a first end of the discharge subunit, a second end of the first discharge resistor is connected to the base of the transistor, the collector of the transistor serves as a second end of the discharge subunit, and a second end of the second discharge resistor is connected to the emitter of the transistor and serves as a third end of the discharge subunit.

[0016] According to one embodiment of the present invention, the buffer subunit includes a buffer capacitor and a buffer resistor; wherein the buffer capacitor and the buffer resistor are connected in series, and one end of the series connection serves as the first end of the buffer subunit, and the other end of the series connection serves as the second end of the buffer subunit.

[0017] According to one embodiment of the present invention, the capacitance value of the buffer capacitor ranges as follows:

[0018] 100nF≥C1≥3C0,

[0019] Wherein, C1 represents the capacitance value of the buffer capacitor; This represents the total parasitic capacitance value of the drive unit; f0 represents the frequency change rate; f1 represents the ringing frequency between the drain and source of the power device when no buffer sub-unit is connected between the drain and source; f1 represents the capacitance C between the drain and source of the power device. T The ringing frequency between the drain and source of the capacitor during testing, C T This indicates the capacitance value of the test capacitor.

[0020] According to one embodiment of the present invention, the resistance value of the buffer resistor is in the following range:

[0021]

[0022] Wherein, R3 represents the resistance value of the buffer resistor. This represents the total parasitic inductance of the drive unit.

[0023] To achieve the above objectives, a second aspect of the present invention provides a driving circuit comprising: at least one bridge arm, the bridge arm comprising the driving unit described above.

[0024] In addition, the driving circuit according to embodiments of the present invention may also have the following additional technical features:

[0025] According to one embodiment of the present invention, the number of bridge arms is three, and the three bridge arms form a three-phase bridge structure. The AC terminal of the three-phase bridge structure is adapted to connect a three-phase AC load, the positive terminal of the DC terminal of the three-phase bridge structure is adapted to connect a controller power supply, and the negative terminal of the DC terminal of the three-phase bridge structure is adapted to ground.

[0026] According to one embodiment of the present invention, the driving circuit further includes: a sampling circuit, the sampling circuit being connected between the negative DC terminal of the three-phase bridge structure and ground, for sampling the negative DC bus current of the three-phase bridge structure, wherein the negative DC bus current is used to generate a sampling signal.

[0027] According to one embodiment of the present invention, the driving circuit further includes a control circuit, which is connected to the sampling circuit and the gate of the power device in each of the bridge arms, and the control circuit is used to control the on / off state of the power device in each of the bridge arms according to the negative DC bus current.

[0028] To achieve the above objectives, a third aspect of the present invention provides a motor connected to the aforementioned drive circuit; wherein the drive circuit includes three bridge arms forming a three-phase bridge structure, the AC terminal of the three-phase bridge structure is connected to the motor, the positive DC terminal of the three-phase bridge structure is adapted to be connected to a controller power supply, and the negative DC terminal of the three-phase bridge structure is adapted to be grounded.

[0029] To achieve the above objectives, a fourth aspect of the present invention provides a motor control system, the motor control system comprising: a motor and the aforementioned drive circuit.

[0030] To achieve the above objectives, a fifth aspect of the present invention provides an electrical device, comprising: the motor described above, or the motor control system described above.

[0031] According to embodiments of the present invention, a drive unit, drive circuit, motor, motor control system, and electrical equipment are disclosed. The drive unit includes: a signal receiving terminal for receiving a control signal, wherein the control signal is used for on / off control of a power device; and a drive resistor, wherein a first end of the drive resistor is connected to the signal receiving terminal, and a second end of the drive resistor is adapted to be connected to the gate of the power device, wherein the resistance value of the drive resistor is determined based on at least one of the parasitic capacitance between the gate and source of the power device, the parasitic capacitance between the gate and drain, and a threshold voltage. By setting the above-mentioned drive resistor and setting the resistance value of the drive resistor to be determined based on at least one of the parasitic capacitance between the gate and source of the power device, the parasitic capacitance between the gate and drain, and the threshold voltage, fast switching of the power device can be achieved, and noise caused by current spikes can be reduced.

[0032] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description

[0033] Figure 1 This is a structural block diagram of the driving unit according to an embodiment of the present invention;

[0034] Figure 2 This is a circuit diagram of a driving unit according to a specific embodiment of the present invention;

[0035] Figure 3 This is a structural block diagram of the driving circuit according to an embodiment of the present invention;

[0036] Figure 4 This is a circuit diagram of a driving circuit according to a specific embodiment of the present invention;

[0037] Figure 5 This is a structural block diagram of the motor according to an embodiment of the present invention;

[0038] Figure 6 This is a structural block diagram of the motor control system according to an embodiment of the present invention;

[0039] Figure 7 This is a structural block diagram of an electrical device according to an embodiment of the present invention;

[0040] Figure 8 This is a structural block diagram of an electrical device according to another embodiment of the present invention. Detailed Implementation

[0041] The following description, with reference to the accompanying drawings, describes the drive unit, drive circuit, motor, motor control system, and electrical equipment according to embodiments of the present invention, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described with reference to the accompanying drawings are exemplary and should not be construed as limiting the present invention.

[0042] Figure 1 This is a structural block diagram of the driving unit according to an embodiment of the present invention.

[0043] like Figure 1 As shown, the driving unit 100 includes: a signal receiving terminal 101 for receiving control signals, wherein the control signals are used to control the on / off state of the power device 103; and a driving resistor 102, the first end of which is connected to the signal receiving terminal 101, and the second end of which is adapted to be connected to the gate of the power device 103. The resistance value of the driving resistor satisfies the following condition:

[0044]

[0045] Among them, R g C represents the resistance value of the driving resistor 102. gs L represents the parasitic capacitance between the gate and source of the power device 103. K dV / dt represents the inductive reactance of the drive circuit where the power device 103 is located, and C represents the voltage change rate. gd V represents the parasitic capacitance between the gate and drain of the power device 103. th This represents the threshold voltage of the power device 103.

[0046] Specifically, a driving resistor 102 is provided, the first end of which is connected to the signal receiving end 101. The resistance value of the driving resistor 102 is determined based on at least one of the parasitic capacitance between the gate and source, the parasitic capacitance between the gate and drain, and the threshold voltage in the power range.

[0047] Since the driving resistor 102 is located between the signal receiving end 101 and the gate of the power device 103, the resistance value of the driving resistor 102 can limit the magnitude of the gate driving current of the power device 103, directly affecting the rise and fall speed of the gate voltage, thereby regulating the charging and discharging speed of the gate capacitor in the power device 103. Therefore, by selecting an appropriate value for the driving resistor 102, the charging and discharging speed of the gate capacitor can be effectively regulated, thereby enabling the power device 103 to switch quickly and avoiding large current spikes di / dt caused by excessively fast charging and discharging of the gate capacitor, which could lead to oscillations and reduce the impact of current spikes.

[0048] Therefore, by setting the aforementioned drive resistor 102 and determining the value of the drive resistor 102 based on the parasitic capacitance between the gate and source, the parasitic capacitance between the gate and drain, and the threshold voltage of the power device 103, the power device 103 can be switched quickly, and noise caused by current spikes can be reduced.

[0049] Furthermore, regarding the value of the driving resistor, it is necessary to ensure that the driving resistor can provide sufficient resistance to prevent oscillation of the driving current, and the smaller the driving resistor, the better.

[0050] In some embodiments of the present invention, the driving unit 100 further includes: a discharge subunit, the first end of which is connected to the first end of the driving resistor 102, the second end of which is connected to the second end of the driving resistor 102, and the third end of which is adapted to connect to the source of the power device 103 and ground.

[0051] Specifically, the drive unit 100 also includes a discharge subunit, and the second end of the discharge subunit is connected to the second end of the drive resistor 102, that is, connected to the gate of the power device 103, and the third end of the discharge subunit is grounded, so as to provide a turn-off discharge circuit for the power device 103, and the gate turn-off current of the power device 103 can be grounded through the discharge subunit.

[0052] This allows the voltage generated by the Miller effect in the power device 103 to be discharged, improving the reliability of the system. It also reduces the turn-off spikes of the power device 103, thus improving the electromagnetic compatibility performance of the circuit.

[0053] In some embodiments of the present invention, the driving unit 100 further includes a buffer subunit, the first end of which is adapted to be connected to the drain of the power device 103, and the second end of which is adapted to be connected to the source of the power device 103.

[0054] Specifically, besides affecting the electromagnetic compatibility of the drive unit 100, another important factor of the Miller effect is that ringing may occur during the switching process of the power device 103, leading to electromagnetic interference and circuit jitter. Ringing is usually caused by parasitic inductance and capacitance in the PCB, which resonate during switching events.

[0055] Therefore, in order to solve the ringing problem, a buffer sub-unit is set up. The first end of the buffer sub-unit is adapted to connect to the drain of the power device 103, and the second end of the buffer sub-unit is adapted to connect to the source of the power device 103. The buffer sub-unit is used to buffer and suppress the oscillation, thereby eliminating the oscillation, reducing electromagnetic interference, and increasing the lifespan of the power device 103 by reducing voltage overstress.

[0056] Therefore, the ringing problem can be solved by setting up a buffer sub-unit.

[0057] In some embodiments of the present invention, the discharge subunit includes: a first discharge resistor, a second discharge resistor, and a transistor; wherein, a first end of the second discharge resistor is connected to a first end of the first discharge resistor and serves as a first end of the discharge subunit, a second end of the first discharge resistor is connected to the base of the transistor, the collector of the transistor serves as a second end of the discharge subunit, and a second end of the second discharge resistor is connected to the emitter of the transistor and serves as a third end of the discharge subunit.

[0058] Specifically, the discharge subunit includes the second discharge resistor, the first discharge resistor, and the transistor as described above. Since the base of the transistor is connected to the second end of the first discharge resistor, the first end of the first discharge resistor serves as the first end of the discharge subunit. The first end of the discharge subunit is connected to the signal receiving end 101. In other words, the control signal received by the signal receiving end 101 will act on the transistor while acting on the power device 103, so that the transistor is turned on while the power device 103 is turned off, providing a turn-off discharge circuit for the power device 103. This allows the gate turn-off current of the power device 103 to flow from the emitter to the collector of the transistor and finally to ground, thus discharging the voltage generated by the Miller effect.

[0059] Therefore, a single control signal can be used to simultaneously control the power device 103 and the transistor. This simultaneous control enables accurate control of the transistor's conduction, discharges the voltage generated by the Miller effect, and saves costs.

[0060] In some embodiments of the present invention, the buffer subunit includes a buffer capacitor and a buffer resistor; wherein the buffer capacitor and the buffer resistor are connected in series, and one end of the series connection serves as the first end of the buffer subunit, and the other end of the series connection serves as the second end of the buffer subunit.

[0061] Specifically, in order to reduce ringing at the phase output at low cost, a buffer subunit is provided, which includes a buffer capacitor and a buffer resistor. The buffer capacitor absorbs voltage surges, and the buffer resistor limits the current.

[0062] This allows for cost-effective reduction of ringing.

[0063] In some embodiments of the present invention, the capacitance value of the buffer capacitor is within the following range:

[0064] 100nF≥C1≥3C0,

[0065] Where C1 represents the capacitance value of the buffer capacitor; This represents the total parasitic capacitance value of the drive unit 100 and the power device 103; f0 represents the frequency change rate; f1 represents the ringing frequency between the drain and source of power device 103 when no buffer subunit is connected between the drain and source; f1 represents the capacitance C between the drain and source of power device 103. T The ringing frequency between the drain and source of the capacitor during testing, C T This indicates the capacitance value of the capacitor being tested.

[0066] In some embodiments of the present invention, the resistance value of the buffer resistor is obtained by the following formula:

[0067]

[0068] Where R3 represents the resistance value of the buffer resistor. This represents the total parasitic inductance value of the drive unit 100 and the power device 103.

[0069] The following is combined with Figure 2 The specific embodiments shown will be described in detail.

[0070] In this specific embodiment, the power device 103 is an N-channel MOSFET, which is turned on at a high level; R1 is the second bleeder resistor; and R2 is the first bleeder resistor. 301 is a motor.

[0071] 104 is the aforementioned driving resistor, and its resistance value R g Satisfy the above

[0072] 105 is the buffer resistor mentioned above, and its resistance value R3 is calculated as follows:

[0073] 106 is the buffer capacitor mentioned above, and its capacitance value C1 is calculated as follows: 100nF ≥ C1 ≥ 3C0.

[0074] 107 is the second bleeder resistor mentioned above, 108 is the first bleeder resistor mentioned above, and 109 is the transistor mentioned above. The transistor 109 is a PNP type transistor, and the transistor 109 is turned on by controlling the base current of the transistor 109.

[0075] IC is a chip whose control terminal is connected to the signal receiver 101. The IC chip is used to send the control signal.

[0076] The control signal issued by the IC chip is either high or low level. This control signal controls the on / off state of the power device 103 and also controls the on / off state of the transistor 109. When the IC emits a high level, the power device 103 is turned on and the transistor 109 is not working; when the IC emits a low level, the power device 103 is not turned on and the transistor 109 is working.

[0077] By setting the driving resistor 102, and by adjusting the resistance value R of the driving resistor 102... g By taking the specified values, an ideal RC snubber circuit is formed, which can effectively reduce the oscillation during the switching process of the power device 103 and improve electromagnetic compatibility.

[0078] On the other hand, to address the potential for secondary conduction of power device 103 during turn-off, which could burn it out, and the issue of interference with the electromagnetic compatibility (EMC) of the IC due to an improperly designed discharge circuit, this patent employs a first discharge resistor 108 paired with a transistor 109. Through IC control, the base voltage of transistor 109 is lower than its collector voltage, ensuring normal operation of transistor 109 and providing a turn-off discharge path for power device 103. This allows the gate turn-off current to flow from the emitter to the collector of transistor 109, ultimately reaching the drain of power device 103 and flowing to ground. This reduces the current spikes during power device 103 turn-off, and since the discharge current does not flow through the IC, interference to the IC is avoided. The EMC performance of the circuit is thus improved.

[0079] Furthermore, an RC buffer consisting of a buffer resistor 105 and a buffer capacitor 106 connected in parallel with the source and drain of the power device 103 is added. The resistor limits the current, and the capacitor absorbs voltage surges. By providing reasonable resistance and capacitance values, the switching speed of the power device 103 can be adjusted, thus improving the electromagnetic compatibility of the drive unit 100.

[0080] When the power device 103 is in the switching state, the electromagnetic compatibility of the circuit can be effectively improved by adjusting the value of the drive resistor 102 and by using a buffer circuit consisting of a buffer resistor 105 and a buffer capacitor 106 designed to address the ringing problem of the power device 103. During the MOS turn-off process, the current generated by the Miller effect is discharged to the drain of the power device 103 through the transistor 109 and the first discharge resistor 108, avoiding current spikes. Furthermore, the discharge current does not flow through the IC chip, thus improving the electromagnetic compatibility of the drive unit 100.

[0081] In summary, the driving unit of this invention includes: a signal receiving terminal for receiving control signals, wherein the control signals are used for on / off control of the power device; and a driving resistor, the first end of which is connected to the signal receiving terminal, and the second end of which is adapted to be connected to the gate of the power device. By setting the above-mentioned driving resistor and reasonably determining its resistance value, the power device can be switched quickly, and noise caused by current spikes can be reduced. Moreover, by setting a discharge subunit, voltage oscillations can be quickly discharged, and the discharge circuit does not flow through the control chip, thus improving the overall electromagnetic compatibility of the driving unit. Furthermore, to address the ringing and voltage spike problems during the switching process of the power device, a buffer subunit is proposed to be added to the drain and source of the power device, which can suppress high-frequency noise and slow down voltage changes, thereby improving the electromagnetic compatibility of the driving unit. Moreover, the buffer subunit consists of a buffer resistor and a buffer capacitor. By setting the resistance values ​​of the buffer resistor and the buffer capacitor, the ringing and voltage spike problems can be solved, which can greatly improve the electromagnetic interference problem in the driving unit and accelerate the mass production of the product, making it highly practical.

[0082] Furthermore, the present invention proposes a driving circuit.

[0083] Figure 3 This is a structural block diagram of the driving circuit according to an embodiment of the present invention.

[0084] like Figure 3 As shown, the drive circuit 200 includes at least one bridge arm 201, which includes the drive unit 100 described above.

[0085] In some embodiments of the present invention, the number of bridge arms 201 is three, and the three bridge arms 201 form a three-phase bridge structure. The AC terminal of the three-phase bridge structure is suitable for connecting a three-phase AC load, the positive terminal of the DC terminal of the three-phase bridge structure is suitable for connecting a controller power supply, and the negative terminal of the DC terminal of the three-phase bridge structure is suitable for grounding.

[0086] In some embodiments of the present invention, the driving circuit 200 further includes a sampling circuit, which is connected between the negative DC terminal of the three-phase bridge structure and ground, for sampling the negative DC bus current of the three-phase bridge structure, wherein the negative DC bus current is used to generate a sampling signal.

[0087] In some embodiments of the present invention, the driving circuit 200 further includes a control circuit, which is connected to the sampling circuit and the gate of the power device 103 in each bridge arm 201 respectively. The control circuit is used to control the on / off state of the power device 103 in each bridge arm 201 according to the negative DC bus current.

[0088] The following is combined with Figure 4 The specific embodiments shown will be described in detail.

[0089] Specifically, in this embodiment, there are six bridge arms 201, which form a three-phase bridge structure, including U phase, V phase and W phase, namely the first upper bridge arm unit, the first lower bridge arm unit, the second upper bridge arm unit, the second lower bridge arm unit, the third upper bridge arm unit and the third lower bridge arm unit, respectively. Each bridge arm unit includes one of the aforementioned power devices 103 and the aforementioned drive unit 100.

[0090] The number of the aforementioned power devices 103 is 6, namely M8, M9, M10, M11, M12 and M13, and all of them are N-channel MOSFETs.

[0091] The number of driving resistors 102 is 6, namely R13, R17, R21, R25, R29 and R33.

[0092] The number of buffer resistors 105 mentioned above is 6, namely R16, R20, R24, R28, R32, and R36.

[0093] The number of the aforementioned buffer capacitors 106 is 6, namely C1, C2, C3, C4, C5, and C6.

[0094] The number of the aforementioned second bleeder resistors 107 is 6, namely R15, R19, R22, R26, R30, and R34.

[0095] The number of the first bleeder resistors 108 mentioned above is 6, namely R14, R18, R22, R26, R30, and R34.

[0096] The number of transistors 109 mentioned above is 6, namely Q3, Q4, Q5, Q6, Q7, and Q8.

[0097] The number of signal receivers 101 is 6, namely GH1, GL1, GH2, GL2, GH3, and GL3.

[0098] R37 is the sampling resistor in the above sampling circuit, used to obtain the output sampling signal + and the output sampling signal -.

[0099] The driving circuit of this invention, through the driving unit of the above embodiments, sets a driving resistor and reasonably determines the resistance value of the driving resistor, which can realize fast switching of power devices and reduce oscillations caused by current spikes. Furthermore, by setting a discharge subunit, voltage oscillations can be quickly discharged, and the discharge circuit does not flow through the control chip, thus improving the overall electromagnetic compatibility of the driving unit. Moreover, to address the ringing and voltage spike problems during the switching process of power devices, a buffer subunit is proposed to be added to the drain and source terminals of the power devices, which can suppress high-frequency noise and slow down voltage changes, thereby improving the electromagnetic compatibility of the driving unit. Furthermore, the buffer subunit consists of a buffer resistor and a buffer capacitor; by setting the resistance values ​​of the buffer resistor and buffer capacitor, the ringing and voltage spike problems are solved, which can greatly improve the electromagnetic interference problem in the driving unit and accelerate the mass production of the product, making it highly practical.

[0100] Furthermore, the present invention proposes an electric motor.

[0101] Figure 5 This is a structural block diagram of the motor according to an embodiment of the present invention.

[0102] like Figure 5 As shown, the motor 301 is connected to the aforementioned drive circuit 200; wherein the drive circuit 200 includes three bridge arms 201, the three bridge arms 201 form a three-phase bridge structure, the AC terminal of the three-phase bridge structure is connected to the motor 301, the positive terminal of the DC terminal of the three-phase bridge structure is suitable for connecting to the controller power supply, and the negative terminal of the DC terminal of the three-phase bridge structure is suitable for grounding.

[0103] According to the embodiments of the present invention, the motor is controlled by the drive circuit of the above embodiments, which reduces the abnormal operation of the motor caused by current spikes and realizes high-efficiency operation of the motor.

[0104] Furthermore, the present invention proposes a motor control system.

[0105] Figure 6 This is a structural block diagram of the motor control system according to an embodiment of the present invention.

[0106] like Figure 6 As shown, the motor control system 300 includes: a motor 301 and a drive circuit 200 according to any one of claims 10-13.

[0107] According to the motor control system of the present invention, by setting a drive resistor and reasonably determining its resistance value through the drive circuit of the above embodiment, rapid switching of power devices can be achieved, and noise caused by current spikes can be reduced. Furthermore, by setting a discharge subunit, voltage oscillations can be quickly discharged, and the discharge circuit does not flow through the control chip, thus improving the overall electromagnetic compatibility of the drive unit. Moreover, to address the ringing and voltage spike problems during the switching process of power devices, a buffer subunit is proposed to be added to the drain and source terminals of the power devices. This can suppress high-frequency noise and slow down voltage changes, thereby improving the electromagnetic compatibility of the drive unit. Furthermore, the buffer subunit consists of a buffer resistor and a buffer capacitor. By setting the resistance values ​​of the buffer resistor and the buffer capacitor, the ringing and voltage spike problems can be solved, greatly improving the electromagnetic interference problem in the drive unit and accelerating mass production, demonstrating strong practicality.

[0108] Furthermore, the present invention proposes an electrical device.

[0109] like Figure 7 As shown, electrical equipment 400 includes the aforementioned motor 301.

[0110] Or, such as Figure 8 As shown, the electrical equipment 400 includes the aforementioned motor control system 300.

[0111] Among them, the aforementioned electrical equipment 400 can be vehicles, water pumps, oil pumps, etc.

[0112] The electrical equipment of this invention, through the motor of the above embodiment or the motor control system of the above embodiment, sets a drive resistor, and sets the resistance value of the drive resistor to be determined according to at least one of the parasitic capacitance between the gate and source of the power device, the parasitic capacitance between the gate and drain, and the threshold voltage. This enables rapid switching of the power device and reduces noise caused by current spikes. Moreover, by setting a discharge subunit, voltage oscillations can be quickly discharged, and the discharge circuit does not flow through the control chip, thus improving the overall electromagnetic compatibility of the drive unit. Furthermore, to address the ringing and voltage spike problems in the circuit during the switching process of the power device, a buffer subunit is proposed to be added to the drain and source of the power device. This can suppress high-frequency noise and slow down voltage changes, thereby improving the electromagnetic compatibility of the drive unit. Moreover, the buffer subunit consists of a buffer resistor and a buffer capacitor. By setting the resistance values ​​of the buffer resistor and the buffer capacitor, the ringing and voltage spike problems can be solved, which can greatly improve the electromagnetic interference problem in the drive unit and accelerate the mass production of the product, making it highly practical.

[0113] It should be noted that the logic and / or steps represented in the flowchart or otherwise described herein can be considered as a ordered list of executable instructions for implementing logical functions, and can be specifically implemented in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (such as a computer-based system, a processor-included system, or other system that can fetch and execute instructions from, an instruction execution system, apparatus, or device). For the purposes of this specification, "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transmit programs for use by, or in conjunction with, an instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of computer-readable media include: an electrical connection having one or more wires (electronic device), a portable computer disk drive (magnetic device), random access memory (RAM), read-only memory (ROM), erasable and editable read-only memory (EPROM or flash memory), fiber optic devices, and portable optical disc read-only memory (CDROM). Alternatively, the computer-readable medium may be paper or other suitable media on which the program can be printed, since the program can be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, interpreting, or otherwise processing as necessary, and then stored in a computer memory.

[0114] It should be understood that various parts of the present invention can be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. If implemented in hardware, as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.

[0115] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0116] In the description of this specification, the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and should not be construed as limiting the present invention.

[0117] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0118] In this specification, unless otherwise stated, the terms "installation," "connection," "joining," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise explicitly defined. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0119] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can mean that the first feature is in direct contact with the second feature, or that the first feature is in indirect contact with the second feature through an intermediate medium. Furthermore, "above," "over," and "on top" of the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0120] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention.

Claims

1. A driving unit, characterized in that, The driving unit includes: The signal receiving end is used to receive control signals, wherein the control signals are used to control the on / off state of the power devices; A driving resistor, wherein a first end of the driving resistor is connected to the signal receiving end, and a second end of the driving resistor is adapted to be connected to the gate of the power device, and the resistance value of the driving resistor satisfies the following condition: Among them, R g C represents the resistance value of the driving resistor. gs L represents the parasitic capacitance between the gate and source of the power device. K The inductive reactance of the drive circuit containing the power device is represented by dV / dt, and the voltage change rate is represented by C. gd V represents the parasitic capacitance between the gate and drain of the power device. th This represents the threshold voltage of the power device.

2. The driving unit according to claim 1, characterized in that, The drive unit further includes: A bleeder subunit, wherein a first terminal of the bleeder subunit is connected to a first terminal of the driving resistor, a second terminal of the bleeder subunit is connected to a second terminal of the driving resistor, and a third terminal of the bleeder subunit is adapted to connect the source of the power device and ground.

3. The driving unit according to claim 1 or 2, characterized in that, The drive unit further includes: A buffer subunit, wherein a first end of the buffer subunit is adapted to be connected to the drain of the power device, and a second end of the buffer subunit is adapted to be connected to the source of the power device.

4. The driving unit according to claim 2, characterized in that, The discharge subunit includes: a first discharge resistor, a second discharge resistor, and a transistor; Wherein, the first end of the second bleeder resistor is connected to the first end of the first bleeder resistor and serves as the first end of the bleeder subunit; the second end of the first bleeder resistor is connected to the base of the transistor; the collector of the transistor serves as the second end of the bleeder subunit; and the second end of the second bleeder resistor is connected to the emitter of the transistor and serves as the third end of the bleeder subunit.

5. The driving unit according to claim 3, characterized in that, The buffer subunit includes: a buffer capacitor and a buffer resistor; The buffer capacitor and the buffer resistor are connected in series, with one end of the series connection serving as the first end of the buffer subunit and the other end serving as the second end of the buffer subunit.

6. The driving unit according to claim 5, characterized in that, The capacitance value of the buffer capacitor is within the following range: 100nF≥C1≥3C0, Wherein, C1 represents the capacitance value of the buffer capacitor; This represents the total parasitic capacitance value of the drive unit; f0 represents the frequency change rate; f1 represents the ringing frequency between the drain and source of the power device when no buffer sub-unit is connected between the drain and source; f1 represents the capacitance C between the drain and source of the power device. T The ringing frequency between the drain and source of the capacitor during testing, C T This indicates the capacitance value of the test capacitor.

7. The driving unit according to claim 6, characterized in that, The resistance value of the buffer resistor is within the following range: Wherein, R3 represents the resistance value of the buffer resistor. This represents the total parasitic inductance of the drive unit.

8. A driving circuit, characterized in that, The driving circuit includes: At least one bridge arm, the bridge arm comprising the drive unit according to any one of claims 1-7.

9. The driving circuit according to claim 8, characterized in that, The bridge arm consists of three arms, which together form a three-phase bridge structure. The AC terminal of the three-phase bridge structure is suitable for connecting a three-phase AC load, the positive terminal of the DC terminal of the three-phase bridge structure is suitable for connecting a controller power supply, and the negative terminal of the DC terminal of the three-phase bridge structure is suitable for grounding.

10. The driving circuit according to claim 9, characterized in that, The driving circuit also includes: A sampling circuit is connected between the negative DC terminal of the three-phase bridge structure and ground to sample the negative DC bus current of the three-phase bridge structure, wherein the negative DC bus current is used to generate a sampling signal.

11. The driving circuit according to claim 10, characterized in that, The driving circuit also includes: A control circuit is provided, which is connected to the sampling circuit and the gate of the power device in each of the bridge arms. The control circuit is used to control the on / off state of the power device in each of the bridge arms according to the negative DC bus current.

12. An electric motor, characterized in that, The motor is connected to the drive circuit according to any one of claims 8-11; The drive circuit includes three bridge arms, which form a three-phase bridge structure. The AC terminal of the three-phase bridge structure is connected to the motor, the positive terminal of the DC terminal of the three-phase bridge structure is suitable for connecting to the controller power supply, and the negative terminal of the DC terminal of the three-phase bridge structure is suitable for grounding.

13. A motor control system, characterized in that, The motor control system includes: the motor as described in claim 12 and the drive circuit as described in any one of claims 8-11.

14. An electrical appliance, characterized in that, include: The motor of claim 12, or the motor control system of claim 13.

Images