power supply circuit

Abstract

The present application relates to a power supply circuit. The power supply circuit includes a DC / DC converter configured to generate different kinds of power supply voltages from an input first power supply voltage and output the generated power supply voltages, and a control circuit configured to control the DC / DC converter. The control circuit is configured to turn on a discharge transistor connected to an output line of the DC / DC converter to discharge a residual charge in the output line in response to an input of a source voltage from outside, and stop the DC / DC converter from outputting the power supply voltage for a period in which the discharge transistor remains on.

Description

Technical Field

[0001] This invention relates to the control of DC / DC converters. Background Technology

[0002] A DC / DC converter circuit mounted on a circuit board for various devices, including display devices, generates multiple output voltages based on the input source voltage VIN. To reduce output voltage fluctuations, a smoothing capacitor is placed between the output voltage line and the ground terminal (GND).

[0003] Certain types of devices require reduced time from power-off to subsequent power-on for availability. For example, automotive LCD displays require time from power-off to subsequent power-on to availability of no more than 300ms. Summary of the Invention

[0004] When the power is turned off and then on again, residual charge (if any) in the smoothing capacitors and DC / DC converter can cause malfunctions. It can take hundreds of milliseconds or longer for the smoothing capacitors and DC / DC converter to discharge naturally until each output voltage of the DC / DC converter reaches ground potential; natural discharge is not sufficient for performance requirements. Circuits that discharge when the power is off are difficult to operate stably because they operate with an inaccurate supply voltage.

[0005] One aspect of the present invention is a power supply circuit comprising: a DC / DC converter configured to generate different types of power supply voltages from an input first power supply voltage and output the generated power supply voltages; and a control circuit configured to control the DC / DC converter. The control circuit is configured to, in response to an input source voltage from an external source, turn on a discharge transistor connected to an output line of the DC / DC converter to release residual charge in the output line, and stop the DC / DC converter from outputting the power supply voltage during a period in which the discharge transistor remains on.

[0006] One aspect of the present invention is capable of effectively releasing residual charge.

[0007] It should be understood that the above general description and the following detailed description are exemplary and explanatory, and do not limit the invention. Attached Figure Description

[0008] Figure 1 This is a circuit block diagram of one embodiment of the present invention, including a power supply circuit and a driver circuit that supplies various power supply voltages from the power supply circuit.

[0009] Figure 2It is a timing diagram illustrating the concept of how the input and output voltages of a DC / DC converter change over time.

[0010] Figure 3 An example of the circuit configuration for the discharge control circuit and the discharge period setting circuit is shown.

[0011] Figure 4 The time variations of various voltages in the power supply circuit are shown.

[0012] Figure 5 The circuit configuration of the discharge control circuit and the discharge period setting circuit according to another embodiment of the present invention is shown.

[0013] Figure 6 A circuit configuration according to yet another embodiment of the present invention is shown.

[0014] Figure 7 It shows Figure 6 The time-varying changes of various voltages in the power supply circuit.

[0015] Figure 8 This is a block diagram schematically illustrating an example configuration of a liquid crystal display device, which serves as an example of a device that may include the power supply circuitry described in the embodiments.

[0016] Figure 9 A circuit configuration according to yet another embodiment of the present invention is shown.

[0017] Figure 10 It shows including Figure 9 Example of a configuration for a liquid crystal display device with a power supply circuit.

[0018] Figure 11 It shows Figure 9 An example of the circuit configuration for the discharge control circuit and the discharge period setting circuit.

[0019] Figure 12 It shows Figure 11 The time-varying potentials in the power supply circuit. Detailed Implementation

[0020] In the following description, embodiments will be illustrated with reference to the accompanying drawings. These embodiments are merely examples of implementing the invention and do not limit the scope of the invention. Some elements in the drawings may be enlarged in size or shape for clearer understanding of the specification. In the description of this specification, two elements depicted as connected in the drawings without any intervening element are directly connected. Directly connected elements in the drawings may be indirectly connected by another element. Unless otherwise stated, connected elements may be directly or indirectly connected.

[0021] Implementation Method 1

[0022] In-vehicle displays and other types of devices require reduced time between power-off and power-on. For example, when a display shuts down due to a momentary drop or stop in the supplied power voltage, it must be able to restart immediately. Taking in-vehicle LCD displays as an example, there is a requirement that the time from power-off to subsequent power-on and availability should not exceed 300 ms.

[0023] In the case of in-vehicle display devices, the output lines of the DC / DC converter are connected to circuitry such as video signal processing circuitry for processing input video signals, data driver ICs, and scan driver ICs. The video signal processing circuitry includes a video signal processing IC and a memory IC.

[0024] When the power is turned on after being turned off, any remaining charge (if any) in the DC / DC converter and the smoothing capacitors connected to the output lines of the DC / DC converter can cause the ICs connected to the output lines to malfunction. It can take hundreds of milliseconds or longer for the charge remaining in the smoothing capacitors and the DC / DC converter to dissipate naturally when the power is turned off, until each output voltage of the DC / DC converter reaches ground potential (also known as ground).

[0025] Furthermore, circuits that discharge when the power is off are difficult to operate stably because they operate with inaccurate power supply voltages.

[0026] In one embodiment of the present invention, the power supply circuit includes a DC / DC converter and a control circuit for controlling the DC / DC converter. A discharge transistor is connected to the output line of the DC / DC converter. Before the DC / DC converter, which receives the source voltage, begins to output a power supply voltage, the control circuit controls the discharge transistor to release any remaining charge in the output line. Simultaneously with or after the discharge stops, the control circuit causes the DC / DC converter to begin outputting a power supply voltage.

[0027] This configuration enables the rapid and stable release of residual charge, thereby reducing the time required for the power to turn on again after the power is turned off.

[0028] Figure 1 This is a circuit block diagram of one embodiment of the present invention, including a power supply circuit 10 and a driver circuit 21 that supplies various power supply voltages from the power supply circuit 10. Figure 1 The circuitry to be included in a display device, such as a liquid crystal display device, is illustrated by way of example; the features of the power supply circuit 10 of the present invention are applicable to devices of a different kind than the display device.

[0029] The power supply circuit 10 includes a power input circuit 11, a discharge period setting circuit 12, a discharge control circuit 13, and a DC / DC converter (DDC) 14. The discharge period setting circuit 12 and the discharge control circuit 13 are located on the power input side of the DC / DC converter 14. The power input circuit 11, the discharge period setting circuit 12, and the discharge control circuit 13 are included in the control circuit of the DC / DC converter 14.

[0030] Multiple output lines 31 extend from the DC / DC converter 14 to supply predetermined voltages to the driver circuit 21. Figure 1 In the figure, one of the multiple output lines is provided with reference numeral 31.

[0031] A smoothing capacitor 32 and a discharge transistor 33 are connected to each output line 31 of the DC / DC converter 14. Figure 1 In the figure, one of the smoothing capacitors is provided with reference numeral 32, and one of the discharge transistors is provided with reference numeral 33. The smoothing capacitor 32 is optional.

[0032] In each smoothing capacitor 32, one electrode is connected to the output line 31, and the other electrode is connected to ground. The smoothing capacitor 32 stabilizes the output of the DC / DC converter 14. Figure 1 In the example, discharge transistor 33 is a field-effect transistor. Discharge transistor 33 can also be a bipolar transistor. In each discharge transistor 33, either the source or the drain is connected to the output line 31, and the other is connected to ground. The gate of discharge transistor 33 is supplied with a discharge control signal from discharge control circuit 13.

[0033] The number of discharge transistors 33 to be connected to an output line 31 can be determined as needed, and discharge transistors 33 of different sizes can be connected to the same output line 31 or different output lines 31. Some output lines 31 may or may not have discharge transistors 33. The type and structure of the discharge transistors 33 can be determined as needed; transistors of a different type than field-effect transistors can be used. A resistor may be included between the discharge transistor 33 and the ground terminal.

[0034] The discharge control circuit 13 outputs a discharge control signal synchronously with the input source voltage VIN generated by the power-on of the display device. The discharge control signal activates the discharge transistor 33 to release the charge in the output of the DC / DC converter 14. When the display device is powered on, the discharge period setting circuit 12 immediately suspends the output operation of the DC / DC converter 14. During this output operation suspension period, residual charge is released.

[0035] The power input circuit 11 begins outputting the input source voltage VIN in response to the power-on (activation) of the display device. The power input circuit 11 generates the input source voltage VIN based on the externally supplied voltage and outputs it. The discharge period setting circuit 12 generates the power supply voltage VCC (first power supply voltage) based on the input source voltage VIN and supplies it to the DC / DC converter 14 and the driver circuit 21. The maximum values ​​(constant values) of the input source voltage VIN and the power supply voltage VCC can be the same.

[0036] DC / DC converter 14 generates different types of power supply voltages based on the supplied power supply voltage VCC and outputs them to output line 31. Discharge period setting circuit 12 controls whether to supply power supply voltage VCC to DC / DC converter 14 and driver circuit 21.

[0037] exist Figure 1 In the configuration example, DC / DC converter 14 generates power supply voltages VGH, AVDD, AVEE, and VGL and outputs them to output line 31. The power supply voltages output from DC / DC converter 14 are supplied to driver circuit 21 via output line 31.

[0038] The discharge control circuit 13 is supplied with an input source voltage VIN by the power input circuit 11 to operate using the input source voltage VIN. In response to the input of the input source voltage VIN, the discharge control circuit 13 begins to send a discharge control signal to turn on the discharge transistor 33. The discharge control signal is supplied to the gate of the discharge transistor 33 to turn on the discharge transistor (switching transistor) 33.

[0039] Each output line 31 is connected to ground via a discharge transistor 33 that is in the ON state. Therefore, the charge held in the smoothing capacitor 32 and the DC / DC converter 14 is released to ground through the discharge transistor 33. The discharge control circuit 13 keeps the discharge transistor 33 ON until a discharge termination trigger signal is received from the discharge period setting circuit 12.

[0040] The discharge period setting circuit 12 is supplied with the input source voltage VIN from the power input circuit 11 to operate using the input source voltage VIN. The discharge period setting circuit 12 outputs a discharge termination trigger signal to the discharge control circuit 13 and further controls whether the input source voltage VIN is input to the DC / DC converter 14 and the power supply voltage VCC is input to the driver circuit 21.

[0041] The discharge period setting circuit 12 counts the predetermined discharge periods. The discharge period setting circuit 12 starts counting the discharge periods in response to the input source voltage VIN, and outputs a discharge termination trigger signal to the discharge control circuit 13 after the discharge period has elapsed.

[0042] The discharge control circuit 13 disconnects all discharge transistors 33 in response to the discharge termination trigger signal. That is, the discharge control circuit 13 changes the discharge control signal from a level that keeps the discharge transistors 33 on to a level that disconnects them. When the discharge transistors 33 are disconnected, the connection between the output line 31 and the ground terminal is broken to terminate the discharge to the ground terminal. The discharge period is appropriately determined according to the design of the equipment.

[0043] The discharge period setting circuit 12 suspends the supply of power voltage VCC to the DC / DC converter 14 and driver circuit 21 until the discharge period ends. After the discharge period has elapsed since the display device was powered on, the discharge period setting circuit 12 resumes the supply of power voltage VCC to the DC / DC converter 14 and driver circuit 21. The supply of power voltage VCC can begin simultaneously with or after the output of the discharge termination trigger signal. Delaying the start time of the supply of power voltage VCC until after the discharge transistor 33 is turned off reduces the occurrence of malfunctions and saves power consumption.

[0044] As described above, before supplying the power supply voltage VCC to the DC / DC converter 14 to begin outputting various power supply voltages, the discharge control circuit 13 turns on the discharge transistor 33 to release the charge held in the DC / DC converter 14 and the output line 31. The discharge period setting circuit 12 controls the discharge control circuit 13 using a discharge termination trigger signal and stops the discharge by turning off the discharge transistor 33 after a predetermined discharge period has elapsed. After the discharge stops (including simultaneously with the discharge stopping), the discharge period setting circuit 12 supplies the power supply voltage VCC to the DC / DC converter 14 to activate it.

[0045] In one embodiment of the invention, discharge is performed via circuit operation after power is applied. Therefore, the interval between power-off and subsequent power-on of the device can be shortened. Since one embodiment of the invention uses a transistor for discharge, discharge can be performed quickly, thus shortening the time from power-off to subsequent power-on resumption of operation. Furthermore, disconnecting the transistor after discharge stops the current from output line 31 to ground; this reduces the increase in power consumption and the occurrence of malfunctions in the discharge circuit.

[0046] One embodiment of the present invention utilizes a circuit that operates with a stable input source voltage VIN, using the supply of the input source voltage VIN as a trigger to reliably release residual voltage in the DC / DC converter 14 before supplying power voltage to the DC / DC converter 14. This configuration ensures that the DC / DC converter 14 does not violate the output sequence and does not malfunction or latch up due to residual voltage.

[0047] Figure 2This is a timing diagram illustrating the concept of how the input and output voltages of the DC / DC converter 14 change over time. Figure 2 The time variations of power supply voltages VGH, AVDD, VIN, AVEE, and VGL are schematically illustrated. For example, power supply voltage VGH can be 10V; power supply voltage AVDD can be 6V; power supply voltages VIN and VCC can be 3.3V; power supply voltage AVEE can be -6V; and power supply voltage VGL can be -7V.

[0048] At time T0, the display device is powered off, thus ceasing the supply of the input source voltage VIN. In other words, the input source voltage VIN drops from a predetermined constant voltage to ground potential. As the supply of the input source voltage VIN ceases, other power supply voltages also drop. However, in this case, the input source voltage VIN may not sometimes drop to ground potential during the interval between the device being powered off and subsequently powered on. In that case, the time it takes for the input source voltage VIN to drop to 10% of the predetermined constant voltage can be defined as time T0.

[0049] At time T1, the display device is powered on again; the input source voltage VIN increases from ground potential to a constant voltage. The time interval P1 from time T0 to time T1 is the interval between the device being powered off and subsequently powered on (VIN interval), and is required, for example, to not exceed 300 ms. For example, the power-on / power-off of the display device can be performed by another system used to control the display device. Generally, in many cases, a voltage variation of approximately ±10% of the input source voltage VIN is permissible. Therefore, time T1 can be defined as the time when the input source voltage VIN reaches 90% of the predetermined constant voltage.

[0050] The time period P2 from time T1 to time T2 is the aforementioned discharge period. As described above, during the discharge period, the power supply circuit 10 keeps the discharge transistor 33 connected to the output line 31 of the DC / DC converter 14 in the on state to release residual charge in the output line 31 (including residual charge in the DC / DC converter 14, the smoothing capacitor 32, and the driver circuit 21). Furthermore, during the discharge period, the power supply circuit 10 suspends the supply of input source voltage to the DC / DC converter 14 and its output destination, namely the driver circuit 21.

[0051] At time T2, when discharge period P2 ends, power supply circuit 10 begins supplying input source voltage to DC / DC converter 14 and its output destination (or driver circuit 21). After the input power supply voltage VCC is supplied to DC / DC converter 14, and after a certain delay, the output power supply voltage of DC / DC converter 14 reaches the predetermined voltage. Figure 2 During this process, all output power supply voltages reach their predetermined voltages at time T3.

[0052] As described above, one embodiment of the present invention achieves a shorter recovery period from the cessation of the input source voltage VIN to its subsequent activation. Furthermore, this embodiment reliably performs discharge within a short time, preventing malfunctions caused by residual charge (residual voltage) and enabling the DC / DC converter 14 to be activated in the appropriate sequence during the period P3 after the discharge ends. Discharge performed while the input source voltage is supplied ensures that the DC / DC converter 14 does not operate with unstable and uncontrollable voltages when the power is off.

[0053] Figure 3 An example of the circuit configuration of the discharge control circuit 13 and the discharge period setting circuit 12 is shown. Figure 3 The configuration examples of these circuits 12 and 13 are used to illustrate the configuration of these circuits 12 and 13, but the configuration of these circuits 12 and 13 is not limited to... Figure 3 Example in the diagram. The discharge control circuit 13 and the discharge period setting circuit 12 can be configured as part of the circuitry of the DC / DC converter 14.

[0054] The discharge control circuit 13 outputs a discharge control signal to the discharge transistor 33 synchronously with the input source voltage VIN caused by the power-on of the display device. The discharge control signal turns on the discharge transistor 33 to release the charge in the output of the DC / DC converter 14. The discharge period setting circuit 12 immediately suspends the output operation of the DC / DC converter 14 after the display device is powered on. During this output operation suspension period, residual charge is released.

[0055] exist Figure 3 In the configuration example, the discharge period setting circuit 12 includes a load switch 121, a diode 122, resistors R1 and R2, and a capacitor C1. For example, the resistances of resistors R1 and R2 are 10 kΩ and 100 kΩ, respectively, and the capacitance of capacitor C1 is 4.7 μF.

[0056] although Figure 3 In the configuration example, the load switch 121 is a p-type field-effect transistor, but the type of switch is not limited, as long as the desired switching characteristics are obtained. The discharge period setting circuit 12 may additionally include other circuit elements.

[0057] Resistors R2 and R1 are connected in series between power line 125, which is used to transfer the input source voltage VIN from power input circuit 11, and ground. Resistor R2 is connected to power line 125, and resistor R1 is connected to ground. Capacitor C1 and diode 122 are connected in series between power line 125 and ground. Capacitor C1 is connected to power line 125, and the anode of diode 122 is connected to ground. The intermediate node between resistors R1 and R2 and the intermediate node A between capacitor C1 and diode 122 are connected, and they are at equal voltages. Diode 122 is configured to stabilize the voltage at node A so that it does not drop towards ground potential.

[0058] The source and drain of load switch 121 are connected to power line 125 and the output power line 126 of discharge period setting circuit 12. Either the source or drain is an input terminal, and the other is an output terminal. In this example, the source is connected to power line 125 to receive the input source voltage VIN. The drain is connected to power line 126 to output the power supply voltage VCC. Load switch 121 toggles the conduction / deconduction between power lines 125 and 126. The gate (control terminal) of load switch 121 is connected to node A. Discharge period setting circuit 12 sends the voltage at node A as a discharge termination trigger signal to discharge control circuit 13.

[0059] The discharge control circuit 13 includes resistors R3, R4, R5, R6, and R7, transistor Tf0 (first transistor), and transistor Tf1 (second transistor). For example, the resistances of resistors R3, R4, R5, R6, and R7 are 300 kΩ, 100 kΩ, 100 kΩ, 100 kΩ, and 20 kΩ, respectively. Figure 3 In the configuration example, transistors Tf0 and Tf1 are NPN bipolar transistors. The channels of transistors Tf0 and Tf1 have a different conductivity type than the channel of load switch 121. Note that the types of transistors Tf0 and Tf1 are not limited, as long as the desired operating characteristics are obtained.

[0060] Resistors R3 and R4 are connected in series between the input line of the discharge termination trigger signal and the ground terminal. Resistor R4 is connected to the ground terminal. The intermediate node B between resistors R3 and R4 is connected to the base of transistor Tf0 to supply the voltage of intermediate node B to the base of transistor Tf0.

[0061] Resistor R5 and transistor Tf0 are connected in series between power supply line 125 and ground. One end of resistor R5 is connected to power supply line 125, and the emitter of transistor Tf0 is connected to ground. Resistor R6 is connected to ground and the intermediate node between resistor R5 and transistor Tf0. The intermediate node between resistor R5 and transistor Tf0 is connected to the base of transistor Tf1 to supply the voltage of the intermediate node to the base of transistor Tf1.

[0062] Resistor R7 and transistor Tf1 are connected in series between power supply line 125 and ground. One end of resistor R7 is connected to power supply line 125, and the emitter of transistor Tf1 is connected to ground. The discharge control signal of discharge transistor 33 is output from the intermediate node between resistor R7 and transistor Tf1. In other words, the voltage at this intermediate node is the voltage of the discharge control signal. Discharge control circuit 13 may additionally include other circuit elements.

[0063] The discharge period setting circuit 12 includes a load switch 121 on the path for supplying the power supply voltage to the DC / DC converter 14. The time period from the start of the supply of the input source voltage VIN to the turn-on time of the load switch 121 is determined by the CR time constant (R1 × C1), which is determined by the capacitor C1 and the resistor R1. The turn-on time of the load switch 121 is delayed from the start of the supply of the input source voltage VIN by the time determined by the CR time constant. Figure 3 In the configuration example, the delay time is determined by the relationship between the time variation of the gate voltage of the load switch 121 based on a CR time constant of 4.7 μF × 10 kΩ = 47 ms and the threshold voltage of the load switch 121. The discharge period is also determined by the CR time constant. For example, the CR time constant is determined to not exceed the desired discharge period.

[0064] Reference Figure 3 and Figure 4 Describe the operation of the discharge control circuit 13 and the discharge period setting circuit 12. Figure 4 The time variations of various voltages in power supply circuit 10 are shown. For example... Figure 3 As shown, the voltages at nodes A and B are the gate voltage of load switch 121 and the base voltage of transistor Tf0, respectively. The voltage at node A is the voltage of the discharge termination trigger signal.

[0065] The input source voltage VIN stops at time T0 and is input again at a subsequent time T1. The voltage at node A or the gate voltage of load switch 121 is at a high level (H level (maximum voltage here)) to keep load switch 121 off.

[0066] In response to the supply of input source voltage VIN, the discharge termination trigger signal becomes H level to turn on transistor Tf0. Then, the base voltage of transistor Tf1 becomes low level (L level) to turn off transistor Tf1. In response to transistor Tf1 turning off, the discharge control signal becomes H level. Discharge transistor T33 turns on to release the charge in the output of DC / DC converter 14.

[0067] After the input source voltage VIN is input, the voltage at node A in the discharge period setting circuit 12 (the control voltage of the load switch 121) decreases according to the time constant (delay time) determined by the resistance of the resistive element R1 and the capacitance of the capacitor C1. That is, the voltage from the discharge period setting circuit 12 to the discharge termination trigger signal of the discharge control circuit 13 decreases monotonically (gradually). If the transistor has other polarities, the control voltage of the load switch 121 and the voltage of the discharge termination trigger signal increase monotonically. In either case, these are monotonically changing signals.

[0068] If the voltage at node B is only a division of the voltage at node A, then the voltage change at node B is proportional to the voltage change at node A, such as... Figure 4 As shown by the dashed line. However, since node B is connected to the base of transistor Tf0, the voltage at node B is clamped to level H, as shown by the dashed line. Figure 4 As shown by the solid line in the diagram. At time T11, the voltage at node B begins to drop from level H, that is, at time T11, the voltage at node B drops to the predetermined off-state voltage (first predetermined value) of transistor Tf0. At this time, transistor Tf0 is turned off. In response, the base voltage of transistor Tf1 becomes level H, and transistor Tf1 is turned on. Therefore, the discharge control signal becomes level L to turn off discharge transistor 33, and the discharge operation is terminated.

[0069] At the subsequent time T12, the difference between the voltage at node A in the discharge period setting circuit 12 or the gate voltage of the load switch 121 and the input source voltage VIN decreases to the threshold voltage (second predetermined value) of the load switch 121. The load switch 121 turns on, and the discharge period setting circuit 12 begins to supply the power supply voltage VCC. In response to the supply of the power supply voltage VCC, the DC / DC converter 14 begins to supply various power supply voltages to the driver circuit 21. Figure 4 The example demonstrates the variation of the power supply voltage AVDD.

[0070] Implementation Method 2

[0071] Figure 5 The circuit configuration of the discharge control circuit and discharge period setting circuit according to another embodiment of the present invention is shown. The following is a primary description and reference. Figure 3 and Figure 4The circuit configuration described differs. Unless otherwise stated, the description of Embodiment 1 applies. The circuit elements constituting the discharge period setting circuit 42 are the same as those in the discharge period setting circuit 12 of Embodiment 1. The difference is that the discharge period setting circuit 42 outputs a discharge termination trigger signal from the stage following the load switch 121. That is, the voltage of the discharge termination trigger signal becomes H level when the load switch 121 is turned on.

[0072] The discharge control circuit 43 in this embodiment includes resistors R13 and R14 and transistor Tf2 (the third transistor). For example, the resistances of resistors R13 and R14 are 20 kΩ and 100 kΩ, respectively. Resistor R13 and transistor Tf2 are connected in series between the power supply line 125 and the ground terminal.

[0073] The discharge control signal is output from the intermediate node between resistor R13 and transistor Tf2. Resistor R14 is connected between the transmission line of the discharge termination trigger signal and the base of transistor Tf2. As can be seen from this description, the number of circuit elements in the discharge control circuit 43 is less than the number of circuit elements in the discharge control circuit 13 of embodiment 1. In the discharge control circuit 43, one or more circuit elements, such as resistor R14, may be omitted, and other additional circuit elements may be included.

[0074] After the input source voltage VIN is supplied, the voltage at node A in the discharge period setting circuit 42 or the gate voltage of the load switch 121 remains at level H (maximum voltage), and the load switch 121 remains open. Therefore, the discharge termination trigger signal remains at level L. Transistor Tf2 in the discharge control circuit 43 remains open.

[0075] When the input source voltage VIN is input to the discharge control circuit 43, the discharge control signal becomes H level because transistor Tf2 is turned off. Discharge transistor 33 turns on to release the charge in the output of DC / DC converter 14.

[0076] After the input source voltage VIN is input, the voltage at node A in the discharge period setting circuit 42 decreases according to the time constant (delay time) determined by the resistance of the resistive element R1 and the capacitance of the capacitor C1. When the voltage at node A or the difference between the gate voltage of the load switch 121 and the input source voltage VIN decreases to the threshold voltage of the load switch 121, the load switch 121 is turned on.

[0077] The discharge period setting circuit 42 begins supplying the power supply voltage VCC and also changes the discharge termination trigger signal to level H. In response to the change in the discharge termination trigger signal, transistor Tf2 in the discharge control circuit 43 is turned on. Then, the discharge control signal changes from level H to level L. Discharge transistor 33 is turned off to stop the discharge operation.

[0078] In response to the supply of power supply voltage VCC from the discharge period setting circuit 42, the DC / DC converter 14 begins to supply various power supply voltages to the driver circuit 21.

[0079] Implementation Method 3

[0080] Figure 6 A circuit configuration according to another embodiment of the present invention is shown. The following description primarily focuses on the differences from Embodiments 1 and 2. Unless otherwise stated, the descriptions of Embodiments 1 and 2 apply to this embodiment.

[0081] This embodiment uses an enable signal from an external system to replace the discharge period setting circuit 12 or 42 described in Embodiment 1 or Embodiment 2. This enable signal controls the output of the DC / DC converter and further controls the time when the discharge control circuit disconnects the discharge transistor. This configuration simplifies the power supply circuit configuration. Furthermore, it eliminates the need for... Figure 3 The resistors R1 and R2 shown are used to generate the discharge termination trigger signal, thus achieving less current consumption.

[0082] The power supply circuit 50 includes a power input circuit 51, a discharge control circuit 53, and a DC / DC converter 54. The power input circuit 51 not only supplies the input source voltage VIN to the discharge control circuit 53 and the DC / DC converter 54, but also sends an enable signal received from an external source to the discharge control circuit 53 and the DC / DC converter 54. The enable signal for the discharge control circuit 53 corresponds to the discharge termination trigger signal described in Embodiments 1 and 2.

[0083] The discharge control circuit 53 may have the same characteristics as those referenced in embodiment 2. Figure 5 The discharge control circuit 43 described has the same configuration. An enable signal, instead of a discharge termination trigger signal, is input to the discharge control circuit 53.

[0084] DC / DC converter 54 converts the input source voltage VIN into various power supply voltages and outputs them to driver circuit 21. DC / DC converter 54 outputs power supply voltages VGH, AVDD, AVEE, and VGL. These power supply voltages are the same as those described in Embodiments 1 and 2. The power supply voltage VCC is the same as the input source voltage VIN.

[0085] DC / DC converter 54 includes circuitry for switching between outputting a power supply voltage and not outputting a power supply voltage based on an enable signal. For example, DC / DC converter 54 turns the power supply voltage output on / off depending on whether the enable signal is at level H or level L.

[0086] Figure 7 It shows Figure 6 The time-varying voltages in the power supply circuit 50. Specifically, Figure 7 It provides the time variations of the input source voltage VIN, enable signal, power supply voltage VCC, discharge control signal, and power supply voltage AVDD. See below for reference. Figure 6 and Figure 7 Describe the operation of the discharge control circuit 53 and the DC / DC converter 54.

[0087] The input source voltage VIN stops at time T50, and then resumes supplying the input source voltage VIN at time T51. The enable signal remains at level L, and transistor Tf2 in the discharge control circuit 53 remains off.

[0088] When the input source voltage VIN is input to the discharge control circuit 53, the discharge control signal becomes H level because transistor Tf2 is turned off. Discharge transistor 33 turns on to release the charge in the output of DC / DC converter 54.

[0089] After the input source voltage VIN is input, time T52, the enable signal changes from L level to H level. In response to the change in the enable signal, transistor Tf2 in the discharge control circuit 53 is turned on. Therefore, the discharge control signal changes from H level to L level. Discharge transistor 33 is turned off to terminate the discharge operation. In response to the change in the enable signal, the DC / DC converter 54 begins supplying various power supply voltages to the driver circuit 21.

[0090] Implementation Method 4

[0091] Other embodiments are described below. The discharge period setting circuit 12 or 42 described in Embodiment 1 or Embodiment 2, and the discharge control circuits 13, 43 or 53 described in Embodiment 1, Embodiment 2 or Embodiment 3, can be integrated with the DC / DC converter 14 or 54 into a single IC chip. When the DC / DC converter is integrated into a data driver IC chip, the discharge period setting circuit and the discharge control circuit can also be integrated into that data driver IC chip. Therefore, a smaller circuit area is achieved.

[0092] Figure 8 This is a block diagram schematically illustrating an example configuration of a liquid crystal display device, which serves as an example of a device that may include the power supply circuitry described in the embodiments. Figure 8An example configuration of a liquid crystal display device 7 including the power supply circuit 10 of embodiment 1 is shown. Power supply circuits in other embodiments are also applicable.

[0093] The liquid crystal display device 7 includes a signal processing board 70, a liquid crystal display panel 80, a data driver 81, and a scan driver 82. The liquid crystal display device 7 also includes a backlight 90 and a backlight driver board 91. The signal processing board 70 includes a power supply circuit 10 and a video signal processing circuit 72. As described in other embodiments, the signal processing board 70 also includes a discharge transistor 33 and a smoothing capacitor 32 connected to the output line of the power supply circuit 10.

[0094] The liquid crystal display device 7 displays images based on video data input from an external source. The video data includes video frames to be displayed continuously. The liquid crystal display panel 80 is positioned in front of the backlight 90 (viewer side) and controls the amount of light transmitted from the backlight 90 to continuously display the input video frames (images).

[0095] The power supply circuit 10 has the features described in Embodiment 1. Figure 1 The configuration is described. The video signal processing circuit 72 performs the processing involved in displaying the image, such as generating signals for displaying images on the liquid crystal display panel 80 and signals for controlling the backlight 90. The power supply 73 supplies the input source voltage VIN to the power supply circuit 10. The video signal source 74 supplies video signals to the video signal processing circuit 72.

[0096] The power supply circuit 10 generates power to drive ICs such as the data driver 81 and the scan driver 82. The data driver 81 and the scan driver 82 are configured to operate using the power supply voltage supplied from the power supply circuit 10 to perform their processing.

[0097] The data driver 81 generates a data signal based on the video signal sent from the video signal processing circuit 72 and supplies the data signal to the liquid crystal display panel 80. The scan driver 82 selects the scan lines of the liquid crystal display panel 80 one by one according to the timing signal sent from the video signal processing circuit 72. The video signal processing circuit 72 also sends a timing signal to the data driver 81, which generates a data signal based on the received video signal and supplies the data signal to the liquid crystal display panel 80 according to the timing signal.

[0098] The video signal processing circuit 72 converts the data arrangement of the video signal input from the outside to send it to the data driver 81, and generates and sends timing signals for the operation of the data driver 81 and the scan driver 82.

[0099] The backlight 90 is a surface light source device disposed behind the liquid crystal display panel 80, used to emit light required for the liquid crystal display panel 80 to display images. The backlight driver board 91 includes a backlight driving circuit and controls the amount of light emitted (brightness) of the backlight 90. The backlight driver board 91 operates using a power supply voltage supplied from the backlight power supply 92.

[0100] The backlight 90 can be a direct-lit backlight, which includes a light source array disposed in the backlight plane opposite to the liquid crystal display panel 80 and a diffuser plate disposed between the light source array and the liquid crystal display panel 80. A typical example of a light source is an LED. Instead of the direct-lit type described above, the backlight 90 can be a side-lit type, which includes a light guide plate and a light source disposed on the side.

[0101] The video signal processing circuit 72 generates timing signals for the data driver 81 and the scan driver 82 based on the timing signals of the input video signal, and also continuously sends the signal of each video frame (frame signal) in the video signal to the data driver 81. The frame signal can specify the grayscale level of each pixel in the video frame. In full-color display, each pixel specifies the grayscale level of red (R), green (G), or blue (B); in monochrome display, each pixel specifies the grayscale level of white.

[0102] Implementation Method 5

[0103] Figure 9 A circuit configuration according to another embodiment of the present invention is shown. The following description primarily focuses on the differences from Embodiments 1 and 2. Unless otherwise stated, the descriptions of Embodiments 1 and 2 apply to this embodiment.

[0104] This embodiment monitors the output power supply voltage pre-selected from the output power supply voltage of the DC / DC converter 14, and begins supplying the input source voltage VIN to the DC / DC converter 14 after the monitored power supply voltage level drops below a predetermined value. For example, in response to an event that the monitored power supply voltage level drops below a predetermined value, the power supply circuit turns on a load switch to power on the DC / DC converter 14. It should be noted that the power-on / power-off of the DC / DC converter 14 can be controlled by a different circuit configuration than that of the load switch.

[0105] The output power supply voltage to be monitored can be the power supply voltage of the last power line to complete discharge in the power supply voltage output line of the DC / DC converter 14. It can also be the voltage of another output line. Monitoring the voltage drop during discharge to detect when the voltage reaches a predetermined level allows the DC / DC converter 14 (VCC) to activate more quickly.

[0106] The output that finally completes its discharge can be determined based on the time constant estimated from the capacitive and resistive elements applied to the output of the DC / DC converter 14. That is, the output whose output voltage level takes the longest to drop to GND, according to the time constant, is the output to be monitored. Alternatively, the output voltage to be monitored can be determined based on actual measurements of the discharge time.

[0107] Reference Figure 9 The power supply circuit 100 includes a discharge period setting circuit 220 and a discharge control circuit 230. There is no control signal from the discharge period setting circuit 220 to the discharge control circuit 230. The discharge period setting circuit 220 monitors the pre-selected output power supply voltage from the output of the DC / DC converter 14 via a voltage monitoring line 227. Figure 9 In the example, voltage monitoring line 227 connects to the power supply voltage VGH line and the discharge period setting circuit 220. The remaining configuration is the same as... Figure 1 The configuration is the same as in [the previous section].

[0108] Figure 10 It shows including Figure 9 Example of a configuration of a liquid crystal display device with power supply circuit 100. (Compared to...) Figure 8 Compared to the configuration example in the previous example, power supply circuit 100 has replaced power supply circuit 10. Other components are the same as... Figure 8 The components in the configuration example are the same. As described above, the discharge period setting circuit 220 monitors the output power supply voltage of the DC / DC converter 14 via the voltage monitoring line 227.

[0109] Figure 11 An example circuit configuration of discharge control circuit 230 and discharge period setting circuit 220 is shown. Discharge period setting circuit 220 includes voltage monitoring circuit 221, latch circuit 222, and signal inverter circuit 223. Discharge period setting circuit 220 also includes a load switch LS2 on the power supply voltage input path to DC / DC converter 14. Line 226 transmits the power supply voltage from discharge period setting circuit 220 to DC / DC converter 14 and driver circuit 21. Load switch LS2 is activated when the monitored power supply voltage (e.g., VGH) level drops below a predetermined value. This predetermined value is preset for the circuit.

[0110] The discharge control circuit 230 includes resistors R31, R32, and R33, capacitor C31, and NPN transistor Tf31. Resistors R31 and R32 are connected in series between the power supply line for the input source voltage VIN and ground. One end of resistor R31 is connected to the power supply line for the input source voltage VIN, and one end of resistor R32 is connected to ground. Resistors R31 and R32 have high resistance, such as 50 kΩ to 300 kΩ, to allow only a small amount of current to flow when the DC / DC converter 14 is operating stably with the supplied input source voltage VIN.

[0111] Resistor R33 and transistor Tf31 are connected in series between the power supply line for the input source voltage VIN and the ground terminal. One end of resistor R33 is connected to the power supply line for the input source voltage VIN, and the emitter of transistor Tf31 is connected to the ground terminal. Capacitor C31 is configured between the ground terminal and the intermediate node N5 between resistors R31 and R32. The potential at node N5 is supplied to the base of transistor Tf31. A control signal for discharging transistor Tf33 is output from the intermediate node between resistor R33 and transistor Tf31.

[0112] The voltage monitoring circuit 221 in the discharge period setting circuit 220 includes resistors R41, R42, and R43, capacitor C41, and NPN transistor Tf41. Resistors R41 and R42 are connected in series between the voltage monitoring line 227 and ground. One end of resistor R41 is connected to the voltage monitoring line 227, and one end of resistor R42 is connected to ground. Resistors R41 and R42 have high resistance, such as 50 kΩ to 300 kΩ, to allow only a small amount of current to flow when the DC / DC converter 14 is operating stably.

[0113] Resistor R43 and transistor Tf41 are connected in series between the power supply line for the input source voltage VIN and the ground terminal. One end of resistor R43 is connected to the power supply line for the input source voltage VIN, and the emitter of transistor Tf41 is connected to the ground terminal. Capacitor C41 is configured between the ground terminal and the intermediate node N1 between resistors R41 and R42. The potential at node N1 is supplied to the base of transistor Tf41. The intermediate node N2 between resistor R43 and transistor Tf41 is the output node of the signal of latch circuit 222. Resistor R43 also has a high resistance to allow only a small amount of current to flow when transistor Tf41 is turned on.

[0114] The latch circuit 222 includes resistors R45, R46, R47, and R48, a PNP transistor Tf42, and an NPN transistor Tf43. Resistors R46 and R47 and transistor Tf43 are connected in series between the power supply line for the input source voltage VIN and ground. One end of resistor R46 is connected to the power supply line for the input source voltage VIN, and the emitter of transistor Tf43 is connected to ground. Resistor R47 is connected between resistor R46 and transistor Tf43.

[0115] The base of transistor Tf42 is connected to the node between resistor R47 and transistor Tf43; its emitter is connected to the node between resistors R46 and R47; and its collector is connected to the base of transistor Tf43. Resistor R48 connects the base and emitter of transistor Tf43. Resistor R45 is connected between the output node N2 of voltage monitoring circuit 221 and the base of transistor Tf43. Node N3 between transistor Tf43 and resistor R45 is the output node of signal inverter circuit 223. The potential at node N3 is the base potential of transistor Tf43.

[0116] The signal inverter circuit 223 includes resistors R51 and R52 and an NPN transistor Tf44. Resistors R51, Tf44, and R52 are connected in series between the power supply line for the input source voltage VIN and ground. One end of resistor R51 is connected to the power supply line for the input source voltage VIN, and one end of resistor R52 is connected to ground. The collector and emitter of transistor Tf44 are connected to the remaining terminals of resistors R51 and R52, respectively. The base of transistor Tf44 is supplied with a signal from latch circuit 222.

[0117] Node N4 between resistor R51 and the collector of transistor Tf44 is the output node for the control signal of load switch LS2. The gate of load switch LS2 is connected to ground via resistor R53. Node N4 is connected to the intermediate node between the gate of load switch LS2 and resistor R53. The source and drain of load switch LS2 are connected to transmission line 225 for the input source voltage VIN and output power line 226 for the discharge period setting circuit 220, respectively.

[0118] Figure 12 It shows Figure 11 The time-varying changes of various voltages (potentials) in the power supply circuit 100. Specifically, Figure 12 This provides the power supply voltage VGH, the input source voltage VIN, the voltages at nodes N1, N2, N3, and N4, and the time variation of the power supply voltage VCC. See below for reference. Figure 11 and Figure 12Describe the operation of power supply circuit 100.

[0119] After the input source voltage VIN is stopped at time T70, the output power supply voltage VGH (the voltage to be monitored) of the DC / DC converter 14 slowly decreases due to natural discharge during the period from time T70 to time T71.

[0120] During the time interval from time T70 to time T71, node N1 in voltage monitoring circuit 221 maintains a high potential (H), and transistor Tf41 remains on. Therefore, the potentials at nodes N2 and N3 are at a low potential (L). The potential at node N4 is also at a low potential (L).

[0121] The base of transistor Tf31 in discharge control circuit 230 is connected to intermediate node N5, which is between resistors R31 and R32 connected in series between the power supply line for input source voltage VIN and ground. Capacitor C31 is connected between intermediate node N5 and ground.

[0122] When the supply of the input source voltage VIN is restarted at time T71, a transient current flows through resistors R31 and R32 and capacitor C31. Therefore, transistor Tf31 turns on to activate discharge transistor 33. However, after the transient ends, only a very small current flows through resistors R31 and R32, so transistor Tf31 turns off to terminate the discharge operation.

[0123] In response to the resumption of the input source voltage VIN supply at time T71, voltage monitoring circuit 221 begins operation. The potential of voltage monitoring line 227, connected to the power supply voltage VGH, drops rapidly, and in response, the potential at node N1 also drops. At time T72, NPN transistor Tf41 turns off. Afterward, the potential at node N1 continues to decrease slowly due to capacitor C41 connected to the base of transistor Tf41. The resumption of the input source voltage VIN supply at time T71 further raises the potential at node N4 to level H.

[0124] Since transistor Tf41 is turned off at time T72, the potential at nodes N2 and N3, which are connected to the power supply lines used for the input source voltage VIN, becomes level H.

[0125] In response to node N3 becoming H level at time T72, latch circuit 222 starts operating, and the potential at node N3 is latched at H level. Latch circuit 222 includes transistors Tf42 and Tf43 to hold node N3 at H level until the input source voltage VIN is turned off.

[0126] In response to node N3 becoming high (H), transistor Tf44 in signal inverter circuit 223 turns on, and node N4 becomes low (L). Therefore, load switch LS2 turns on to restart the supply of power voltage VCC.

[0127] During the time period from time T71 to time T72, the potential change at node N4 is used to prevent the load switch LS2 from turning on during the discharge period. During the time period from time T71 to time T72, when the potential at node N1 changes instantaneously, the potential at node N4 can be controlled.

[0128] At time T73, the VGH output of DC / DC converter 14 is turned on, and its potential begins to rise. In response, the potential of voltage monitoring line 227 also rises.

[0129] As the potential of voltage monitoring line 227 rises, the potential at node N1 also rises. In response to the rise in potential at node N1, transistor Tf41 turns on again; the potential at node N2 becomes low at time T74.

[0130] because Figure 3 and Figure 4 as well as Figure 6 and Figure 7 The implementation in this paper does not monitor the voltage (discharge state) output from the DC / DC converter 14, therefore the supply of the input source voltage VIN must be restarted after the discharge is reliably completed. Therefore, sufficient time margin is required before restarting. However, in Figure 10 , Figure 11 and Figure 12 In the disclosed embodiment, the discharge period setting circuit 220 has the function of monitoring the voltage (discharge state) output from the DC / DC converter 14, so a time margin is not necessary. Therefore, the time before the DC / DC converter 14 is reactivated can be further shortened.

[0131] As described above, embodiments of the present invention have been presented; however, the present invention is not limited to the embodiments described above. Those skilled in the art can readily modify, add to, or transform each element in the above embodiments within the scope of the present invention. A portion of the configuration of one embodiment can be replaced by the configuration of another embodiment, or the configuration of one embodiment can be incorporated into the configuration of another embodiment.

Claims

1. A power supply circuit, comprising: A DC / DC converter configured to generate different types of power supply voltages from an input first power supply voltage and output the generated power supply voltage; as well as Control circuitry, configured to control the DC / DC converter. The control circuit is configured as follows: In response to an input source voltage from an external source, a discharge transistor connected to the output line of the DC / DC converter is turned on to release residual charge in the output line; as well as The DC / DC converter stops outputting the power supply voltage during the period during which the discharge transistor remains on.

2. The power supply circuit according to claim 1, wherein, The control circuit is configured to cause the DC / DC converter to start outputting the power supply voltage after the discharge transistor is disconnected.

3. The power supply circuit according to claim 1, wherein, The control circuit is configured to cause the DC / DC converter to start outputting the power supply voltage while simultaneously disconnecting the discharge transistor.

4. The power supply circuit according to claim 1 further includes: A discharge period setting circuit is configured to receive an input source voltage and output the first power supply voltage to the DC / DC converter. as well as A discharge control circuit, configured to receive the input source voltage and output a discharge control signal to the discharge transistor. The discharge period setting circuit includes a load switching transistor configured to switch between being on and off between a power supply line for the input source voltage and a power supply line for the first power supply voltage. The discharge period setting circuit is configured to send a monotonically varying trigger signal to the discharge control circuit, which is shared with the control voltage used for the load switching transistor. The discharge control circuit is configured to disconnect the discharge transistor when the monotonically changing trigger signal reaches a first predetermined value. The load switching transistor is configured to be turned on by the control voltage reaching a second predetermined value after the discharge transistor is turned off.

5. The power supply circuit according to claim 4, in, The discharge period setting circuit includes a capacitor and a resistor connected in series between the power supply line for the input source voltage and the ground terminal, and The control terminal of the load switching transistor is connected to the intermediate node between the capacitor and the resistor.

6. The power supply circuit according to claim 5, in, The discharge control circuit includes a first transistor and a second transistor. The first transistor and the second transistor are connected in parallel between the power supply line for the input source voltage and the ground terminal. The discharge control signal is output from the node between the second transistor and the power supply line for the input source voltage. The output terminal of the first transistor is supplied with ground potential. The trigger signal is supplied to the control terminal of the first transistor. Wherein, the input terminal of the first transistor is connected to the control terminal of the second transistor, and The second transistor is turned on in response to the first transistor being turned off by the trigger signal.

7. The power supply circuit according to claim 1, further comprising: A discharge period setting circuit is configured to receive an input source voltage and output the first power supply voltage to the DC / DC converter. as well as A discharge control circuit, configured to receive the input source voltage and output a discharge control signal to the discharge transistor. The discharge period setting circuit includes a load switching transistor configured to switch between being on and off between a power supply line for the input source voltage and a power supply line for the first power supply voltage. The discharge period setting circuit is configured to send a trigger signal from the power line used for the first power supply voltage to the discharge control circuit, and The discharge control circuit is configured to disconnect the discharge transistor by changing the level of the discharge control signal in response to a change in the level of the trigger signal.

8. The power supply circuit according to claim 7, in, The discharge control circuit includes a third transistor controlled by the trigger signal. The third transistor is located between the power supply line for the input source voltage and the ground terminal. The discharge control signal is output from the node between the third transistor and the power supply line for the input source voltage.

9. The power supply circuit according to claim 1, wherein, The control circuit is configured as follows: The output of the DC / DC converter is controlled to be turned on / off using an enable signal from outside the power supply circuit; and The discharge transistor is turned on / off according to the enable signal.

10. The power supply circuit according to claim 1, wherein, The control circuit is configured as follows: Monitor the voltage of the output line; and After the voltage on the output line drops below a predetermined voltage, the first power supply voltage is input to the DC / DC converter, which has been paused.

11. The power supply circuit according to claim 10, in, The DC / DC converter is configured to output different types of power supply voltages to multiple output lines. The control circuit is configured to release residual charge in the plurality of output lines by turning on discharge transistors connected to the plurality of output lines one-to-one. Among them, the output line whose voltage is to be monitored is the last output line among the multiple output lines to complete the release of residual charge.

12. A method for controlling a DC / DC converter, the method comprising: In response to an input source voltage from an external source, a discharge transistor connected to the output line of the DC / DC converter is turned on to release residual charge in the output line; as well as The output of the DC / DC converter is stopped during the period when the discharge transistor remains on.

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