converter
Patent Information
- Application Number
- CN202510498808.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-18
- Publication Date
- 2026-10-23
AI Technical Summary
[0003]因变流器连接至交流电网侧的线缆长度不定等原因,交流电网侧的阻抗变化范围通常较大,并且通常呈感性;而变流器的交流侧端口通常为电感(L)和电容(C)组成的网络(即LC网络),从而使得变流器的交流侧端口呈现负特性(如与高频谐振有关的负特性),进而造成变流器的系统失稳,不利于变流器的应用
[0019]根据本公开实施例,其中,所述发送单元和所述接收单元被集成在一起。
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Figure CN122969398A_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of power conversion, and more specifically, to a converter. Background Technology
[0002] Converters have wide applications in DC microgrid systems. Converters can convert direct current (DC) into alternating current (AC) in a DC microgrid system, and then transmit it to the AC power grid via cables. Converters can also convert AC power from the AC power grid back into DC power for transmission to the DC microgrid system.
[0003] Because of the variable length of the cable connecting the converter to the AC grid, the impedance of the AC grid side usually varies over a large range and is typically inductive. The AC side port of the converter is usually a network composed of inductance (L) and capacitance (C) (i.e., an LC network), which causes the AC side port of the converter to exhibit negative characteristics (such as negative characteristics related to high-frequency resonance). This leads to system instability of the converter and is detrimental to the application of the converter.
[0004] Therefore, a new type of converter is needed. Summary of the Invention
[0005] To address the aforementioned problems, this disclosure provides a novel converter. According to the converter provided by this disclosure, the duty cycle of the pulse signals used to open and close the switches in the converter can be controlled based on the acquired voltage at the second terminal of the converter, the acquired current flowing through the inductor, and a predetermined voltage. This ensures that the real part of the port impedance at the second terminal of the converter is greater than zero, thereby making the AC side port of the converter exhibit a positive characteristic and ensuring stable system operation of the converter.
[0006] This disclosure provides a converter, including: a switch, an inductor, a capacitor, and a control unit. A first terminal of the switch is connected to a first terminal of the converter for connection to a DC bus, and a second terminal of the switch is connected to a first terminal of the inductor. The second terminal of the inductor is connected to a first terminal of the capacitor, and the second terminal of the capacitor is grounded. The second terminal of the inductor is also connected to a second terminal of the converter for connection to an AC power grid. The control unit is configured to control the duty cycle of a pulse signal used to open and close the switch based on a collected voltage at the second terminal of the converter, a collected current flowing through the inductor, and a predetermined voltage, such that the real part of the port impedance at the second terminal of the converter is greater than zero.
[0007] According to an embodiment of this disclosure, the voltage at the second terminal of the converter, the current flowing through the inductor, the predetermined voltage, and the duty cycle collected satisfy the following equation:
[0008] M=((V ref-V s )*G a –I L )*G i +V s *k*sC*G lpf *G b
[0009] Where M represents the duty cycle, V ref V represents the predetermined voltage. s G represents the voltage at the second terminal of the converter that has been collected. a G represents the voltage loop control factor. i I represents the current loop control factor. L The current flowing through the inductor is represented by k, which represents a first predetermined value, and sC represents the admittance of the capacitor. lpf Let G represent the transfer function of a low-pass filter. b This represents a second predetermined value related to the frequency of opening and closing of the switch.
[0010] According to embodiments of this disclosure, wherein the G b The following equations must be satisfied:
[0011]
[0012] Where s represents the Laplace operator, a represents the third predetermined value, b represents the fourth predetermined value, and ω a ω represents the first angular frequency coefficient determined based on the frequency of the switch being turned on and off. b This represents the second angular frequency coefficient determined based on the frequency at which the switch is turned on and off.
[0013] According to embodiments of this disclosure, where a = 0.8, b = 0.3, ω a =π*f s / 3, ω b =2π*f s / 3, where f s This indicates the frequency at which the switch is turned on and off.
[0014] According to an embodiment of this disclosure, the converter further includes a current acquisition unit configured to acquire the current flowing through the inductor.
[0015] According to an embodiment of this disclosure, the converter further includes a voltage acquisition unit configured to acquire the voltage at a second terminal of the converter.
[0016] According to an embodiment of this disclosure, the converter further includes a storage unit configured to store at least one of the following: the value of the frequency at which the switch is turned on and off, the first predetermined value, the second predetermined value, the third predetermined value, the fourth predetermined value, the first angular frequency coefficient, and the second angular frequency coefficient.
[0017] According to an embodiment of this disclosure, the converter further includes a transmitting unit configured to transmit a request to obtain at least one of the following: the values of the frequencies at which the switch is turned on and off, the first predetermined value, the second predetermined value, the third predetermined value, the fourth predetermined value, the first angular frequency coefficient, and the second angular frequency coefficient.
[0018] According to an embodiment of this disclosure, the converter further includes a receiving unit configured to receive an instruction for at least one of the following: the value of the frequency at which the switch is turned on and off, the first predetermined value, the second predetermined value, the third predetermined value, the fourth predetermined value, the first angular frequency coefficient, and the second angular frequency coefficient.
[0019] According to an embodiment of this disclosure, the transmitting unit and the receiving unit are integrated together.
[0020] This disclosure provides a converter. The converter provided by this disclosure can control the duty cycle of pulse signals used to open and close the switches in the converter based on the acquired voltage at the second terminal of the converter, the acquired current flowing through the inductor, and a predetermined voltage. This ensures that the real part of the port impedance at the second terminal of the converter is greater than zero, thereby making the AC side port of the converter exhibit a positive characteristic and stabilizing the system operation. Furthermore, the converter provided by this disclosure also includes a storage unit, enabling it to store relevant necessary parameters locally for timely retrieval, facilitating rapid control of the pulse signal duty cycle. In addition, the converter provided by this disclosure includes a transmitting unit and a receiving unit, allowing it to store relevant parameters in an external device, saving storage capacity and reducing cost. Moreover, when the transmitting unit and receiving unit are wireless transmitting and receiving units respectively, the converter can expand its application scenarios while saving storage capacity and reducing cost. Attached Figure Description
[0021] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are merely some exemplary embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without any creative effort.
[0022] Figure 1 A schematic diagram of a DC microgrid system according to an embodiment of the present disclosure is shown.
[0023] Figure 2 A schematic internal circuit diagram of a converter 100 according to an embodiment of the present disclosure is shown.
[0024] Figure 3 The following diagram illustrates the relationship between the present disclosure and embodiments thereof. Figure 2 The corresponding equivalent circuit diagram.
[0025] Figure 4 The following diagram illustrates G when the SCR is 1.2 and 20 according to embodiments of the present disclosure. h A schematic diagram of (s).
[0026] Figure 5 A circuit diagram of a converter 500 according to an embodiment of the present disclosure is shown.
[0027] Figure 6 This illustrates how an embodiment of the present disclosure solves the above combination by increasing the actual resistance. Figures 1 to 4 A circuit diagram illustrating the problem described.
[0028] Figure 7 The following diagram illustrates the G value of a predetermined SCR when the actual resistance described above, connected in parallel with the capacitor, is increased according to an embodiment of this disclosure. h A schematic diagram of (s).
[0029] Figure 8A This illustrates how active damping can solve the above-mentioned combination according to embodiments of the present disclosure. Figures 1 to 4 A schematic diagram of a capacitor-based voltage feedback control structure for the problem described.
[0030] Figure 8B It shows the relationship with Figure 8A The corresponding equivalent circuit diagram.
[0031] Figure 9 It shows the frequency from 0 to f s During / 2, R eq and X eq A schematic diagram.
[0032] Figure 10A schematic diagram of molecular compensation applied according to an embodiment of this disclosure is shown.
[0033] Figure 11 A schematic diagram of molecular compensation applied, taking into account the effects of a low-pass filter, is shown according to an embodiment of this disclosure.
[0034] Figure 12 A schematic diagram showing the application of denominator compensation according to an embodiment of the present disclosure is provided.
[0035] Figure 13 An equivalent circuit diagram of a converter provided by the present disclosure according to an embodiment of the present disclosure is shown.
[0036] Figure 14 The real part R of the virtual impedance is shown. eq A schematic diagram.
[0037] Figure 15 A schematic diagram of the control structure after applying the above Gb is shown.
[0038] Figure 16 A schematic diagram of the output impedance of the AC side output port of a converter according to an embodiment of the present disclosure is shown.
[0039] Figure 17 A zero-pole diagram of a converter provided by the present disclosure according to an embodiment of the present disclosure is shown.
[0040] Figure 18A and Figure 18B The verification diagrams for SCR equal to 20 and SCR equal to 1.2 are shown respectively. Detailed Implementation
[0041] To make the objectives, technical solutions, and advantages of this disclosure more apparent, exemplary embodiments according to this disclosure will now be described in detail with reference to the accompanying drawings. Obviously, the described embodiments are merely some embodiments of this disclosure, and not all embodiments of this disclosure. It should be understood that this disclosure is not limited to the exemplary embodiments described herein.
[0042] In this specification and accompanying drawings, substantially the same or similar steps and elements are indicated by the same or similar reference numerals, and repeated descriptions of these steps and elements will be omitted. Furthermore, in the description of this disclosure, the terms "first," "second," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance or order.
[0043] In this specification and accompanying drawings, elements are described in singular or plural forms according to embodiments. However, the singular and plural forms have been suitably chosen for the presented cases merely for ease of explanation and are not intended to limit this disclosure. Thus, a singular form may include a plural form, and a plural form may include a singular form, unless the context clearly indicates otherwise.
[0044] In this disclosure, the term "converter" may also be referred to as a converter or inverter. The term "phase angle" may also be referred to as phase, phase angle, angle, etc.
[0045] Figure 1 A schematic diagram of a DC microgrid system according to an embodiment of the present disclosure is shown.
[0046] Reference Figure 1 In a DC microgrid system, there exists a DC bus. The voltage of this DC bus can be 750V as shown in the diagram; alternatively, the voltage of the DC bus can be any other suitable value. Photovoltaic (PV), battery energy storage systems (BESS), DC consumers, DC prosumers, and other devices or systems can transmit DC power via the DC bus to an inverter (the Active Front End (AFE) inverter shown in the diagram) through corresponding DC-to-DC (DC / DC) or AC-to-DC (AC / DC) converters. Then, after the inverter's DC-to-AC (AC / DC) conversion, the power is output to the AC grid (AC 380V as shown in the diagram). This process is also called the discharge process. Alternatively, AC power from the AC grid can also be converted to DC power by the inverter's AC-to-DC (AC / DC) conversion, and then output to PV, BESS, DC consumers, DC prosumers, and other devices or systems via the DC bus. This process is also called the charging process. Figure 1 As shown, DC consumers are typically general loads, such as air conditioners; while DC power producers are typically bidirectional loads, such as new energy vehicles that can both charge and supply power to the AC grid. Figure 1 As shown, the DC microgrid system is controlled by a microgrid controller.
[0047] The following explanation will use the discharge process as an example. It should be noted that the charging process is similar to the discharging process.
[0048] Figure 2 A schematic internal circuit diagram of a converter 100 according to an embodiment of the present disclosure is shown. Figure 3 The following diagram illustrates the relationship between the present disclosure and embodiments thereof. Figure 2 The corresponding equivalent circuit diagram.
[0049] Reference Figure 2 The converter 100 may include a switch 110, an inductor L1 120, and a capacitor C1 140. The inductor L1 120 has a corresponding equivalent resistance R. L1 130, and capacitor C1 140 have a corresponding equivalent resistance R. C1 150. The cable connecting converter 100 to the power grid has an equivalent inductance Lg 170 and resistance R. Lg 160. V sabc V abc and V gabc These are the sampled voltages at the corresponding locations. V dc This represents the voltage of the DC bus. abc It represents electric current.
[0050] It should be noted that the AC power grid is three-phase. Figure 2 The diagram only shows a schematic for one phase. That is, the circuit structure for the other two phases of the converter also includes the same switch 110, inductor L1120, capacitor C1140, and equivalent resistance R. L1 130 and equivalent resistance R C1 150. The corresponding cable connected to the power grid also has an equivalent inductance Lg 170 and resistance R. Lg 160. The converter provided in this disclosure performs the following processing on any one of the three phases. Further details are omitted.
[0051] refer to Figure 3 At this point, the transfer function of the entire impedance network, consisting of the impedance of the capacitor, the impedance of the inductor, and the impedance of the AC mains, is shown in the following formula (1):
[0052]
[0053] Among them, G h (s) represents the transfer function of the impedance network, s is the Laplace operator, and Z is the transfer function of the impedance network. L1 Z represents the impedance of an inductor. C1 Z represents the impedance of the capacitor. LG This indicates the impedance on the AC power grid side.
[0054] Figure 4 The following diagram illustrates G when the SCR is 1.2 and 20 according to embodiments of the present disclosure. h A schematic diagram of (s).
[0055] refer to Figure 4 SCR represents the short-circuit ratio; when the cable connected to the AC power grid is long, the SCR is small, which is called a weak network; when the cable connected to the AC power grid is short, the SCR is large, which is called a strong network. Figure 4It can be seen that when the SCR is 1.2, at frequency f h =1.17e 3 A high-frequency spike appeared at kHz. With an SCR of 20, at frequency f... h =3.72e 3 A high-frequency spike appeared at kHz. That is, as described in the background section, the AC side port of the existing converter 100 exhibits a certain degree of negative characteristics (such as negative characteristics related to high-frequency resonance), which in turn causes system instability and is detrimental to the application of the converter. It should be noted that this disclosure uses SCR values of 1.2 and 20 as examples only to illustrate that the converter provided in this disclosure can adapt to both strong grids (e.g., SCR equals 20 or other suitable values) and weak grids (e.g., SCR equals 1.2 or other suitable values), and that the system of the converter provided in this disclosure can operate stably.
[0056] To address the aforementioned problems, this disclosure provides a novel converter. According to the converter provided by this disclosure, the duty cycle of the pulse signals used to open and close the switches in the converter can be controlled based on the acquired voltage at the second terminal of the converter, the acquired current flowing through the inductor, and a predetermined voltage. This ensures that the real part of the port impedance at the second terminal of the converter is greater than zero, thereby making the AC side port of the converter exhibit a positive characteristic and ensuring stable system operation of the converter.
[0057] The converter provided in this disclosure will now be described in detail with reference to the accompanying drawings.
[0058] Figure 5 A circuit diagram of a converter 500 according to an embodiment of the present disclosure is shown.
[0059] Reference Figure 5 The converter 500 may include a switch 510, an inductor 520, a capacitor 530, and a control unit.
[0060] According to an embodiment of this disclosure, the first terminal S_1 of the switch 510 is connected to the first terminal I_1 of the converter 500 for connection to the DC bus, and the second terminal S_2 of the switch 510 is connected to the first terminal L_1 of the inductor 520. The second terminal L_2 of the inductor 520 is connected to the first terminal C_1 of the capacitor 530, and the second terminal C_2 of the capacitor 530 is grounded. The second terminal L_2 of the inductor 520 is also connected to the second terminal I_2 of the converter 500 for connection to the AC power grid. It should be noted that, as mentioned above, the AC power grid is three-phase. Figure 5The diagram shows only the internal layout of the converter for any one phase. That is, the circuit structure for the other two phases also uses the same switches, inductors, and capacitors. The converter provided in this disclosure performs the processing described below for any one of the three phases. Further details are omitted.
[0061] As an example, the switch 510 can be any switch suitable for switching between AC and DC. The inductor 520 can be any inductor suitable for switching between AC and DC. The capacitor 530 can be any capacitor suitable for switching between AC and DC.
[0062] According to an embodiment of this disclosure, the control unit can be configured to control the duty cycle of a pulse signal used to open and close the switch 510 based on the acquired voltage at the second terminal I_2 of the converter 500, the acquired current flowing through the inductor 520, and a predetermined voltage, so that the real part of the port impedance at the second terminal I_2 of the converter is greater than zero.
[0063] As an example, in order to acquire the voltage at the second terminal I_2 of the converter 500, the converter 500 may further include a voltage acquisition unit configured to acquire the voltage at the second terminal I_2 of the converter. For example, the voltage at point P as shown in the figure can be acquired as the voltage at the second terminal I_2 of the converter 500.
[0064] As an example, in order to acquire the current flowing through the inductor 520, the converter 500 may also include a current acquisition unit configured to acquire the current flowing through the inductor.
[0065] As an example, the predetermined voltage can be any suitable, pre-determined voltage. The predetermined voltage can indicate the voltage value of the electrical energy that the converter 500 is expected to transmit to the AC power grid.
[0066] According to an embodiment of this disclosure, the voltage at the second terminal of the converter, the current flowing through the inductor, the predetermined voltage, and the duty cycle collected satisfy the following equation (2):
[0067] M = ((V) ref - V s )*G a – I L )*G i + V s *k*sC*G lpf *G b (2)
[0068] In equation (2), M represents the duty cycle, and V ref V represents the predetermined voltage. sG represents the voltage at the second terminal of the converter that has been collected. a G represents the voltage loop control factor. i I represents the current loop control factor. L The current flowing through the inductor is represented by k, a first predetermined value is represented by sC, and the admittance of the capacitor is represented by G. lpf Let G represent the transfer function of a low-pass filter. b This represents a second predetermined value related to the frequency of opening and closing of the switch.
[0069] It should be noted that the voltage loop control factor mentioned above can also be called a voltage loop controller. It is an important component of a commonly used closed-loop control system in converters, used to regulate the converter's output voltage and stabilize it at a set target value. The current loop control factor mentioned above can also be called a current loop controller. It is a very important control link in a commonly used closed-loop control system in converters, primarily responsible for precisely controlling the converter's output current to meet load demands and ensure stable system operation. The current loop controller is usually used in conjunction with the voltage loop controller to form a dual closed-loop control system, thereby achieving a more precise control effect. The first predetermined value is a pre-determined value. The low-pass filter allows signals of a preset specific frequency (such as a 50Hz frequency signal) to pass through. This low-pass filter is related to the characteristics of the converter's capacitance and inductance and is a pre-determined, suitable empirical value. It can be determined using existing common methods and will not be elaborated further here.
[0070] According to embodiments of this disclosure, the G b The following equation (3) can be satisfied:
[0071]
[0072] In equation (3), s represents the Laplace operator, a represents the third predetermined value, b represents the fourth predetermined value, and ω a ω represents the first angular frequency coefficient determined based on the frequency at which the switch is turned on and off. b This represents the second angular frequency coefficient determined based on the frequency of the switch opening and closing. It should be noted that the third predetermined value is a pre-determined suitable value, such as a = 0.8; the fourth predetermined value is a pre-determined suitable value, such as b = 0.3; the first angular frequency coefficient can be ω. a =π*f s / 3, the second angular frequency coefficient can be ω b =2π*f s / 3, where f s This indicates the frequency at which the switch is turned on and off.
[0073] According to an embodiment of this disclosure, the converter 500 may further include a storage unit configured to store at least one of the following: the frequency f of the switching on and off. s The value of the first predetermined value k, the second predetermined value G b The third predetermined value a, the fourth predetermined value b, and the first angular frequency coefficient ω a and the second angular frequency coefficient ω b .
[0074] As an example, the memory cell can be a non-volatile memory cell or a volatile memory cell. A non-volatile memory cell can be any of the following: read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), flash memory, ferroelectric memory (FRAM), etc. A volatile memory cell can be any of the following: random access memory (RAM), such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous linked dynamic random access memory (SLDRAM), and direct memory bus random access memory (DR RAM).
[0075] According to an embodiment of this disclosure, the converter 500 further includes a transmitting unit configured to transmit a request for acquiring at least one of the following: the frequency f of the switching on and off. s The value of the first predetermined value k, the second predetermined value G b The third predetermined value a, the fourth predetermined value b, and the first angular frequency coefficient ω a and the second angular frequency coefficient ω b .
[0076] As an example, the frequency f of the switch opening and closing s The value of the first predetermined value k, the second predetermined value G b The third predetermined value a, the fourth predetermined value b, and the first angular frequency coefficient ω a and the second angular frequency coefficient ω b At least one of these can be stored in a device that communicates with the converter 500. In this case, when the converter 500 requires the frequency f of opening and closing the switch... s The value of the first predetermined value k, the second predetermined value G b The third predetermined value a, the fourth predetermined value b, and the first angular frequency coefficient ωa and the second angular frequency coefficient ω b When at least one of the following conditions is met, a request for obtaining at least one of the above conditions can be sent to the device through the transmitting unit of the converter 500. Upon receiving the request, the device can send an indication of at least one of the above conditions to the converter 500. In this case, the converter 500 may further include a receiving unit configured to receive the indication of at least one of the above conditions, namely, an indication of at least one of the following: the frequency f of opening and closing the switch. s The value of the first predetermined value k, the second predetermined value G b The third predetermined value a, the fourth predetermined value b, and the first angular frequency coefficient ω a and the second angular frequency coefficient ω b .
[0077] The inverter 500 and the aforementioned device can communicate via any suitable communication protocol to send or receive the aforementioned information. As an example, when the transmitting unit and receiving unit are respectively a wireless transmitting unit and a wireless receiving unit, the inverter 500 and the aforementioned device can communicate via any suitable wireless communication protocol supporting high data transmission rates. As another example, when the transmitting unit and receiving unit are respectively a wired transmitting unit and a wired receiving unit, the inverter 500 and the aforementioned device can communicate via any suitable wired communication protocol supporting high data transmission rates.
[0078] According to embodiments of this disclosure, the transmitting unit and the receiving unit can be integrated together, for example, as a transceiver unit or transceiver.
[0079] The above combined with the appendix Figure 5 The converter provided in this disclosure is described in detail. As described above, the converter provided in this disclosure can control the duty cycle of the pulse signal used to open and close the switch in the converter based on the acquired voltage at the second terminal of the converter, the acquired current flowing through the inductor, and a predetermined voltage. This ensures that the real part of the port impedance at the second terminal of the converter is greater than zero, thereby making the AC side port of the converter exhibit a positive characteristic and stabilizing the system operation. Furthermore, the converter provided in this disclosure also includes a storage unit, enabling it to store relevant necessary parameters locally for timely retrieval, facilitating rapid control of the pulse signal duty cycle. In addition, the converter provided in this disclosure includes a transmitting unit and a receiving unit, allowing it to store relevant parameters in an external device, saving storage capacity and reducing cost. Moreover, when the transmitting unit and receiving unit are wireless transmitting and receiving units respectively, the converter can expand its application scenarios while saving storage capacity and reducing cost.
[0080] To facilitate understanding, the above content will be explained with examples below.
[0081] Figure 6 This illustrates how an embodiment of the present disclosure solves the above combination by increasing the actual resistance. Figures 1 to 4 A circuit diagram illustrating the described problem. (Refer to...) Figure 6 This method involves adding an actual physical resistor R to the converter. p The resistor is connected in parallel or in series with the inductor 120 or in parallel or in series with the capacitor 140.
[0082] Figure 7 The following diagram illustrates the G value of a predetermined SCR when the actual resistance described above, connected in parallel with the capacitor, is increased according to an embodiment of this disclosure. h A schematic diagram of (s). See reference. Figure 7 The graph shows the result without the added actual resistance, where the solid line represents the graph with the added actual resistance. Adding the added actual resistance can be described as a passive damping method. Figure 7 As shown in the graph, this passive damping method can also avoid the occurrence of high-frequency spikes, thus preventing a certain degree of negative characteristics from appearing on the AC side of the converter. However, the disadvantage of this passive damping method is also obvious: it requires an additional physical resistor in the converter, which not only increases the cost of the converter but also leads to an increase in the heat generated by the converter. At this time, additional cooling measures are needed to deal with the increased heat generation, which further increases the cost of the converter.
[0083] Figure 8A This illustrates how active damping can solve the above-mentioned combination according to embodiments of the present disclosure. Figures 1 to 4 A schematic diagram of a capacitor-based voltage feedback control structure for the problem described. Figure 8B It shows the relationship with Figure 8A The corresponding equivalent circuit diagram.
[0084] Reference Figure 8A V ref This refers to the aforementioned predetermined voltage, also known as the voltage reference. G a G represents the voltage loop control factor. i G represents the current loop control factor. d This represents the control delay element, a commonly used component in converter control systems. It primarily describes the time delay between the generation of the control signal and its actual execution. L1 represents the inductance. C1 represents the capacitance. K ad This refers to the aforementioned k, i.e., the first predetermined value. g This represents the current on the AC mains side. cThis represents the current flowing through the capacitor near the AC mains side. (V) s This represents the voltage at the second terminal of the converter, which is also the voltage across the capacitor. G lpf This represents the transfer function of the low-pass filter. sC1 represents the admittance of the capacitor. sL1 represents the admittance of the inductor. I L This represents the current flowing through the inductor.
[0085] refer to Figure 8B ,at this time Figure 8A The active damping method shown essentially creates a virtual impedance Z in parallel with capacitor C1. eq It should be noted that the above describes a voltage-based active damping method. The converter provided in this disclosure can also use a current-based active damping method, where a virtual impedance is virtually connected in series with the inductor. The processing of this virtual impedance is similar to that of the voltage-based virtual impedance described below, and will not be repeated here.
[0086] The virtual impedance Z eq The following equation (4) must be satisfied:
[0087]
[0088] in,
[0089]
[0090] Where T s This indicates the cycle of opening and closing the switches in the converter.
[0091] The virtual impedance Z eq Another representation of it is shown in equation (5) below:
[0092]
[0093] in,
[0094]
[0095] Among them, R eq Z represents eq The real part, X eq Z represents eq The imaginary part of ω is 2πf, where f typically takes values from 0 to f. s / 2.
[0096] To avoid high-frequency oscillations, Z eq The real part R eq It should be a positive number. However, as... Figure 9 As shown, Figure 9 It shows the frequency from 0 to f sDuring / 2, R eq and X eq A schematic diagram. (From) Figure 9 As shown in the diagram, the frequency is between 0 and f. s When R is between / 6, eq It is a positive number; while at other frequencies, R is... eq It is a negative number. When R eq When R is positive, the above active damping method can avoid high-frequency oscillations, but when R is positive... eq When the value is negative, the above-mentioned active damping method will further aggravate or worsen high-frequency oscillations.
[0097] In other words, the above-mentioned active damping method needs further improvement. To this end, this disclosure provides a phase compensation factor (also referred to as a phase compensator), namely the aforementioned G. b It can control the phase angle θ in the above-mentioned active damping method. z Compensation is performed so that the compensated phase angle is between 0 and 90 degrees, or the sum of the angle between 0 and 90 degrees and 360*N (even if the real part is greater than 0), where N is a positive integer. As mentioned above, the Gb satisfies the following equation (6):
[0098]
[0099] Among them, molecule G bum equals s 2 +2aω a s+ω a 2 Therefore, the corresponding phase angle can be obtained as shown in equation (7):
[0100]
[0101] Without considering the effect of the low-pass filter, only the phase angle corresponding to the numerator shown in equation (7) is used to represent θ as shown in equation (5) above. z After compensation, the following equation (8) can be obtained:
[0102] θ z1 =1.5T s ω-∠G bnum (jω) (8)
[0103] At this time, as Figure 10 As shown, Figure 10 A schematic diagram of molecular compensation applied according to an embodiment of this disclosure is shown. Figure 10 It is carried out under the following conditions: ω a =ω s / 6=π*f s / 3. Reference Figure 10The marker S_1 indicates that the above combination has been applied. Figures 8A to 9 The diagram illustrates the active damping method described above. Mark S_2 indicates the diagram when the aforementioned molecular compensation is applied and a equals 0; Mark S_3 indicates the diagram when the aforementioned molecular compensation is applied and a equals 0.8. As can be seen from the diagrams above, in the diagrams marked S_1 and S_2, the angle is greater than 90 degrees, causing the real part to be less than 0. While the diagram marked S_3 also shows an angle greater than 90 degrees and a real part less than 0, it demonstrates that the influence of high-frequency components has been relatively reduced.
[0104] When the effect of the low-pass filter is taken into account, the effectiveness of molecular compensation will be reduced, such as... Figure 11 At this point, equation (8) becomes equation (9):
[0105] θ z1 =1.5T s ω-∠G bnum (jω)-∠G lpf (9)
[0106] Where, ω lpf =2×π×f s / 3
[0107] Figure 11 A schematic diagram is shown after applying molecular compensation, taking into account the effects of a low-pass filter, according to an embodiment of this disclosure. (Refer to...) Figure 11 The marker S_1 indicates that the above combination has been applied. Figures 8A to 9 The diagram illustrates the active damping method described above; label S_2 indicates the diagram after applying molecular compensation while considering the effect of the low-pass filter; label S_3 indicates the diagram after applying the above molecular compensation without considering the effect of the low-pass filter. As can be seen from the above diagrams, when considering the effect of the low-pass filter, when G... lpf The bandwidth is set to ω s At a value of / 3, the effect of molecular compensation will be reduced. Figure 11 In the text, the gray shaded area where -R is located indicates that the real part is negative at this time.
[0108] Furthermore, with the application of denominator compensation, the above equation (9) becomes the following equation (10):
[0109]
[0110] in,
[0111] At this point, for diagrams showing b equal to 0.1, 0.3, 0.5, or 0.7, as shown below. Figure 12 As shown. Figure 12 A schematic diagram showing the application of denominator compensation according to an embodiment of the present disclosure is provided. Figure 12 The following is a further schematic diagram under the following parameter conditions:
[0112] ω b =ω s / 3=2π*f s / 3
[0113] Reference Figure 12 Label S_1 indicates the diagram when b equals 0.1; label S_2 indicates the diagram when b equals 0.3; label S_3 indicates the diagram when b equals 0.5; label S_4 indicates the diagram when b equals 0.7; label S_5 indicates the diagram when denominator compensation is not applied. Figure 12 As shown, when numerator compensation is applied but denominator compensation is not, the phase angle will be between 90 and 200 degrees, in which case the real part is less than zero. When denominator compensation is further applied, as shown by labels S_1, S_2, S_3, and S_4, when w = w b At that time, G bden The angle is equal to -90 degrees; when w = w s / 3 o'clock θ z1 When the phase angle reaches 90 degrees, the phase angle in the above equation (5) is within 90 degrees, the real part is positive, and the effect is best when b = 0.3.
[0114] Figure 13 An equivalent circuit diagram of a converter provided by the present disclosure according to an embodiment of the present disclosure is shown. Figure 14 The real part R of the virtual impedance is shown. eq A schematic diagram.
[0115] Reference Figure 13 The converter provided in this disclosure, at the control level, virtually connects a virtual impedance Z in parallel across the capacitor. eq Then, further application of the above Gb; showed excellent results over a wide frequency range, such as... Figure 14 As shown. By Figure 14 It can be seen that, without the application of Gb (curve shown by label S_1), at frequencies greater than f... s In the case of / 6, the real part R eq When the value is less than 0, i.e., negative, the virtual impedance exhibits negative resistance characteristics, further contributing to the high-frequency resonance of the system; while when applying the above Gb (curve shown by label S_2), the real part R eqThe value is always greater than 0, and the virtual impedance always exhibits positive resistance characteristics, which allows the system to effectively avoid problems such as high-frequency resonance. This enables the converter provided in this disclosure to provide a wide range of resonance reduction capabilities.
[0116] Figure 15 A schematic diagram of the control structure after applying the above-described Gb is shown. Figure 15 As shown, the applied Gb ultimately affects the duty cycle of the pulse signals used to turn the switches in the converter on and off.
[0117] Figure 16 A schematic diagram of the output impedance of the AC side output port of a converter according to an embodiment of the present disclosure is shown. (Refer to...) Figure 16 When Gb is not applied (as shown by the solid line in the figure), there is a region where the output impedance has a negative characteristic, as shown by f in the figure. s / 6 to 10 4 Within the specified frequency range, the negative characteristic can cause system instability in the converter, such as high-frequency resonance. However, when applying Gb (as shown by the dashed line in the figure), the output impedance is always positive. It should be noted that the output impedance of the AC side output port is positive at this time, meaning that the real part of the port impedance at the second end of the converter mentioned above is greater than zero.
[0118] Figure 17 A zero-pole diagram of a converter provided in this disclosure according to an embodiment of this disclosure is shown. (Refer to...) Figure 17 Regardless of whether the SCR is 1.2 or 20, the zeros and poles are located to the left of the 0 value on the real axis, not to the right. In other words, the converter provided in this disclosure does not experience wide-range oscillations and can suppress a wide frequency range, regardless of the length of the AC grid cable (i.e., whether it is a strong or weak grid).
[0119] As can be seen from the above analysis, the converter provided in this disclosure requires no hardware changes, has no additional losses, and generates no heat.
[0120] Figure 18A and Figure 18B The verification diagrams for SCR equal to 20 and SCR equal to 1.2 are shown respectively. Figure 18A and Figure 18B In the diagram, the vertical axis pu represents the per-unit value. (Refer to...) Figure 18A With SCR=20, the active power is always 1 when the active damping (AD) applied to the converter provided in this disclosure is not disabled, but the active power oscillates when the AD is disabled. Similarly, with SCR=1.2, the active power is always 1 when the AD is not disabled, but the active power oscillates when the AD is disabled. It is evident that the converter with AD application provided in this disclosure can effectively avoid the generation of high-frequency oscillations.
[0121] In general, the various exemplary embodiments of this disclosure can be implemented in hardware or dedicated circuitry, software, firmware, logic, or any combination thereof. Some aspects can be implemented in hardware, while others can be implemented in firmware or software that can be executed by a controller, microprocessor, or other computing device. When aspects of embodiments of this disclosure are illustrated or described as block diagrams, flowcharts, or using some other graphical representation, it will be understood that the blocks, apparatuses, systems, techniques, or methods described herein can be implemented as non-limiting examples in hardware, software, firmware, dedicated circuitry or logic, general-purpose hardware or controllers or other computing devices, or some combination thereof.
[0122] The exemplary embodiments of the present invention described in detail above are merely illustrative and not restrictive. Those skilled in the art will understand that various modifications and combinations can be made to these embodiments or their features without departing from the principles and spirit of the invention, and such modifications should fall within the scope of the invention.
Claims
1. A converter, comprising: Switches, inductors, capacitors, and control units, among which, The first end of the switch is connected to the first end of the converter for connection to the DC bus, and the second end of the switch is connected to the first end of the inductor; The second terminal of the inductor is connected to the first terminal of the capacitor, the second terminal of the capacitor is grounded, and the second terminal of the inductor is also connected to the second terminal of the converter for connection to the AC power grid; and The control unit is configured to control the duty cycle of the pulse signal used to turn the switch on and off based on the acquired voltage at the second terminal of the converter, the acquired current flowing through the inductor, and a predetermined voltage, so that the real part of the port impedance at the second terminal of the converter is greater than zero.
2. The converter according to claim 1, wherein, The voltage at the second terminal of the converter, the current flowing through the inductor, the predetermined voltage, and the duty cycle collected satisfy the following equation: M=((V ref -V s )*G a –I L )*G i +V s *k*sC*G lpf *G b Where M represents the duty cycle, V ref V represents the predetermined voltage. s G represents the voltage at the second terminal of the converter that has been collected. a G represents the voltage loop control factor. i I represents the current loop control factor. L The current flowing through the inductor is represented by k, which represents a first predetermined value, and sC represents the admittance of the capacitor. lpf Let G represent the transfer function of a low-pass filter. b This represents a second predetermined value related to the frequency of opening and closing of the switch.
3. The converter according to claim 2, wherein, The G b The following equations must be satisfied: Where s represents the Laplace operator, a represents the third predetermined value, b represents the fourth predetermined value, and ω a ω represents the first angular frequency coefficient determined based on the frequency of the switch being turned on and off. b This represents the second angular frequency coefficient determined based on the frequency at which the switch is turned on and off.
4. The converter according to claim 3, wherein, a = 0.8, b = 0.3, ω a =π*f s / 3, ω b =2π*f s / 3, where f s This indicates the frequency at which the switch is turned on and off.
5. The converter according to any one of claims 1 to 4, wherein, The converter also includes a current acquisition unit configured to acquire the current flowing through the inductor.
6. The converter according to any one of claims 1 to 4, wherein, The converter also includes a voltage acquisition unit configured to acquire the voltage at the second terminal of the converter.
7. The converter according to claim 4, wherein, The converter further includes a storage unit configured to store at least one of the following: the value of the frequency at which the switch is turned on and off, the first predetermined value, the second predetermined value, the third predetermined value, the fourth predetermined value, the first angular frequency coefficient, and the second angular frequency coefficient.
8. The converter according to claim 4, wherein, The converter further includes a transmitting unit configured to transmit a request to obtain at least one of the following: the values of the opening and closing frequencies of the switch, the first predetermined value, the second predetermined value, the third predetermined value, the fourth predetermined value, the first angular frequency coefficient, and the second angular frequency coefficient.
9. The converter according to claim 8, wherein, The converter further includes a receiving unit configured to receive an instruction for at least one of the following: the value of the frequency at which the switch is turned on and off, the first predetermined value, the second predetermined value, the third predetermined value, the fourth predetermined value, the first angular frequency coefficient, and the second angular frequency coefficient.
10. The converter according to claim 9, wherein, The transmitting unit and the receiving unit are integrated together.