Composite processor and control system

Abstract

The present disclosure provides a composite processor and a control system. The composite processor includes a processing unit and at least one gate driving unit. The processing unit is configured to generate a control signal. The at least one gate driving unit is connected to the processing unit. The at least one gate driving unit outputs a driving signal according to the control signal and controls the on-off of at least one switch through the driving signal. The processing unit and the at least one gate driving unit are integrated in a wafer. Therefore, in the control system requiring driving the inverter, the number of circuit elements and the total area of the circuit board can be effectively reduced, and the signal interference caused by the parasitic inductance of the circuit board wiring can be avoided.

Description

Technical Field

[0001] This disclosure relates to a composite processor and a control system, and more particularly to a composite processor integrating a gate drive unit and a control system having the composite processor. Background Technology

[0002] Currently known technologies and specifications for microcontrollers and microprocessors limit their load-driving capabilities to low voltage and low current, thus making them unsuitable for driving inverter circuits independently. For example, to successfully drive an inverter circuit, a microcontroller must be paired with peripheral components and gate drivers. In existing vehicle control system architectures, the microcontroller and gate drivers are two separate, independent components. The microcontroller needs to electrically connect to multiple gate drivers via multiple traces on a circuit board to enable it to drive the inverter circuit through these gate drivers.

[0003] However, the number of gate drivers increases proportionally with the number of inverter controls, leading to a significant increase in the number of peripheral components required and a substantial increase in the total circuit board area, making it difficult to reduce product size. Furthermore, the parasitic inductance generated by multiple traces on the circuit board can interfere with the signals used to control the gate drivers. This noise in the signals causes the gate drivers to deliver suboptimal inverter output. Therefore, there is currently a lack of a composite processor and control system on the market that helps miniaturize product size and reduce signal interference between components in vehicle control systems; thus, relevant companies are actively seeking solutions. Summary of the Invention

[0004] Therefore, the purpose of this disclosure is to provide a composite processor and control system, which, through an architecture that integrates the processing unit and the gate driving unit on the same chip, can effectively reduce the number of circuit components between the existing processor and the gate driver and reduce the total board area requirement in the system, and can even avoid signal interference caused by parasitic inductance of the board traces.

[0005] According to one embodiment of this disclosure, a composite processor is provided, comprising a processing unit and at least one gate driving unit. The processing unit is used to generate a control signal. The at least one gate driving unit is connected to the processing unit. The at least one gate driving unit outputs a drive signal according to the control signal, and controls the opening and closing of at least one switch through the drive signal. The processing unit and the at least one gate driving unit are integrated into a single chip.

[0006] Other embodiments of the aforementioned implementation are as follows: the number of the aforementioned at least one gate driving unit is multiple, and the number of the aforementioned at least one switch is multiple.

[0007] Other embodiments of the aforementioned implementation are as follows: The aforementioned processing unit is electrically connected to the at least one gate driving unit through an electrical connection structure in the chip.

[0008] Other embodiments of the aforementioned implementation are as follows: The aforementioned processing unit is a micro control unit (MCU).

[0009] Other embodiments of the foregoing implementation are as follows: the foregoing at least one gate driving unit is a gate driver.

[0010] According to another embodiment of this disclosure, a control system is provided, comprising an analog front-end unit, a composite processor, and an inverter unit. The analog front-end unit generates a detection signal. The composite processor is connected to the analog front-end unit and includes a processing unit and at least one gate driving unit. The processing unit generates a control signal based on the detection signal. The at least one gate driving unit is connected to the processing unit. The at least one gate driving unit outputs a drive signal based on the control signal. The processing unit and the at least one gate driving unit are integrated into a single chip. The inverter unit is connected to the at least one gate driving unit and includes at least one switch, wherein the at least one switch is controlled by the drive signal.

[0011] Other embodiments of the aforementioned implementation are as follows: the number of the aforementioned at least one gate driving unit is multiple, and the number of the aforementioned at least one switch is multiple.

[0012] Other embodiments of the aforementioned implementation are as follows: The aforementioned processing unit is electrically connected to the at least one gate driving unit through an electrical connection structure in the chip.

[0013] Other embodiments of the aforementioned implementation are as follows: The aforementioned processing unit is a micro control unit (MCU).

[0014] Other embodiments of the foregoing implementation are as follows: the foregoing at least one gate driving unit is a gate driver. Attached Figure Description

[0015] Figure 1 This is a block diagram illustrating a composite processor according to a first embodiment of the present disclosure; and

[0016] Figure 2 This is a schematic diagram illustrating the control system of a second embodiment of the present disclosure.

[0017] [List of Labels in the Attached Image]

[0018] 20: Control System

[0019] 100, 200: Composite Processor

[0020] 110, 210: Processing Units

[0021] 111,211: Control signals

[0022] 120, 220: Gate drive unit

[0023] 121,221: Drive signals

[0024] 300: Simulated front-end unit

[0025] 310: Detection signal

[0026] 400: Inverter Unit Detailed Implementation

[0027] Several embodiments of this disclosure will be described below with reference to the accompanying drawings. For clarity, many practical details will be set forth in the following description. However, it should be understood that these practical details should not be used to limit the scope of this disclosure. That is, in some embodiments of this disclosure, these practical details are not essential. Furthermore, for the sake of simplicity, some conventional structures and elements will be illustrated in the drawings in a simple schematic manner; and repeated elements may be denoted by the same reference numerals.

[0028] Furthermore, in this document, when a component (or unit or module, etc.) is "connected" to another component, it can mean that the component is directly connected to the other component, or that the component is indirectly connected to the other component, meaning that there is another component between the component and the other component. Only when it is explicitly stated that a component is "directly connected" to another component does it indicate that there is no other component between the component and the other component. The terms "first," "second," and "third" are only used to describe different components and do not limit the components themselves; therefore, "first component" can also be referred to as "second component." Moreover, the combinations of components / units / circuits in this document are not combinations generally known, conventional, or existing in this art. Whether the component / unit / circuit itself is existing cannot be used to determine whether its combination relationship is easily accomplished by a person skilled in the art.

[0029] Please refer to the following: Figure 1 This is a block diagram illustrating a composite processor 100 according to a first embodiment of the present disclosure. Figure 1 As shown, the composite processor 100 includes a processing unit 110 and at least one gate driving unit 120. The processing unit 110 generates a control signal 111. The at least one gate driving unit 120 is connected to the processing unit 110. The at least one gate driving unit 120 outputs a driving signal 121 according to the control signal 111, and controls the opening and closing of at least one switch (not shown) through the driving signal 121. In the first embodiment, the number of gate driving units 120 may be, but is not limited to, one.

[0030] It is worth mentioning that the processing unit 110 and the gate driving unit 120 are integrated on the same chip. Specifically, the composite processor 100 may be a processor chip, and its internal processing unit 110 may be, for example, a field-programmable gate array (FPGA), an application-specific integrated circuit (ASIC), a digital signal processor (DSP), a microprocessor unit (MPU), a microprocessor, a microcontroller unit (MCU), or a microcontroller, or other electronic processor. The gate driving unit 120 may be, for example, a gate driver or an integrated circuit containing at least one gate driver, but this disclosure is not limited to the above.

[0031] In some embodiments, the composite processor 100 may be disposed on a printed circuit board (PCB) and connected to other integrated circuits or electronic components disposed on the PCB. Furthermore, the processing unit 110 may be electrically connected to the gate driving unit 120 via an electrical connection structure (not shown) within the chip. The electrical connection structure may be an internal interconnect structure within the chip and may be composed of at least one of vias, conductive pillars, connecting pads, and connecting wires. In some embodiments, the electrical connection structure may be formed in a dielectric layer on a semiconductor substrate and electrically connected between the processing unit 110 and the gate driving unit 120, thereby allowing the processing unit 110 to transmit control signals 111 to the gate driving unit 120 via the electrical connection structure.

[0032] Furthermore, the composite processor 100 of this disclosure can be applied to vehicle control systems or other electronic control systems, and can be used to replace existing controllers in vehicle control systems or other electronic control systems. Since existing controllers contain separate and independent processors and gate drivers, and the signal output by the processor to the gate driver is a control signal with a certain frequency (e.g., 10 kHz to 100 kHz), the length and width of the circuit board traces between the two devices will generate parasitic inductance. This parasitic inductance will affect the control signal and generate noise, causing the output provided by the existing gate driver to the downstream inverter circuit to be less than expected.

[0033] For example, the relationship between parasitic inductance, trace length, and trace width can be expressed by the following formula (1): (1).

[0034] In formula (1), For parasitic inductance, For the trace length, The trace width is given. Please refer to Table 1, which provides an example of the parasitic inductance calculated with a fixed trace width and copper foil thickness, but this disclosure is not limited thereto.

[0035] As can be seen from Equation (1) and Table 1, the calculation results show the influence of the trace length on the circuit board on the parasitic inductance. Therefore, based on the architecture of integrating the processing unit 110 and the gate driving unit 120 into the same chip and the negligible signal interference of the electrical connection structure in the chip, the composite processor 100 of this disclosure can effectively reduce the number of circuit components between the existing processor and the gate driver and reduce the total circuit board area requirement in the system, and avoid signal interference caused by the parasitic inductance of the circuit board traces.

[0036] Please refer to the following: Figure 2 This is a schematic diagram illustrating the control system 20 of a second embodiment of the present disclosure. Figure 2 As shown, the control system 20 includes a composite processor 200, an analog front-end unit 300, and an inverter unit 400.

[0037] Analog front-end unit 300 is electrically connected to a battery pack (not shown) and is used to detect the battery pack to generate a detection signal 310. Composite processor 200 is electrically connected between analog front-end unit 300 and inverter unit 400 and receives the detection signal 310. Composite processor 200 includes a processing unit 210 and at least one gate driving unit 220. Processing unit 210 generates a control signal 211 based on the detection signal 310. Furthermore, the processing unit 210 and gate driving unit 220 of the second embodiment are the same as their counterparts in the first embodiment, but the number of gate driving units 220 can be multiple. Processing unit 210 and the multiple gate driving units 220 are also integrated into a chip, and processing unit 210 can also be electrically connected to the multiple gate driving units 220 through electrical connection structures (not shown) in the chip. Each gate driving unit 220 outputs a drive signal 221 based on the control signal 211. Inverter unit 400 is electrically connected to the plurality of gate drive units 220 and may include a plurality of switches. The switches in inverter unit 400 are controlled by drive signal 221.

[0038] In some embodiments, the aforementioned battery pack may be, but is not limited to, a lithium-ion battery (LIB), the analog front-end unit 300 may be, but is not limited to, a sensor or other suitable measuring device for sensing properties of the battery such as current, voltage or temperature, and the inverter unit 400 may be, for example, an inverter or a circuit loop with an inverter.

[0039] Alternatively, the control system 20 can be a vehicle control system or other electronic control system. In the second embodiment, the control system 20 is a vehicle control system and may further include a power supply and an electric motor (not shown), with the inverter unit 400 electrically connected between the power supply and the electric motor. Each of the gate drive units 220 is electrically connected to the aforementioned power supply and outputs a drive signal 221 according to the control signal 211. Specifically, the drive signal 221 is a gate drive voltage of the switch in the inverter unit 400. The inverter unit 400 receives DC power from the aforementioned power supply. The switch in the inverter unit 400 is controlled by the drive signal 221, thereby converting the received DC power into AC power and outputting AC power to the electric motor to achieve the purpose of electronic control.

[0040] Therefore, the control system 20 of this disclosure, by integrating multiple gate drive units 220 and processing unit 210 together, not only achieves the architecture of driving the inverter, but also, by integrating the processing unit 210 and gate drive units 220 onto the same chip, effectively reduces the number of circuit components and the overall circuit board area required in the system, and avoids signal interference caused by parasitic inductance of circuit board traces. Compared to existing processors and gate drivers, the composite processor 200 effectively reduces product cost and shrinks product size.

[0041] In summary, the composite processor and control system disclosed herein have the following advantages.

[0042] Firstly, the architecture that integrates the processing unit and the gate driving unit into a single chip can effectively reduce the requirements for circuit components and board area. Therefore, the final product using the composite processor disclosed herein can reduce manufacturing costs.

[0043] Secondly, most current vehicle control or electronic control related products are developed with a focus on small and thin specifications. Compared with the existing controller system architecture, the control system using the composite processor disclosed herein can effectively reduce the requirements for circuit components and circuit board area, thereby reducing the product size.

[0044] Third, the more lines on a circuit board, the more parasitic inductance will be generated, leading to signal interference. However, the composite processor of this disclosure integrates the processing unit and the gate driving unit on a single chip, and the signal interference of its internal wiring is negligible. Therefore, it can avoid the signal interference caused by the parasitic inductance of the circuit board traces when the existing processor and gate driver are placed on the circuit board.

[0045] Although the present disclosure has been described above with reference to embodiments, it is not intended to limit the present disclosure. Any person skilled in the art may make various changes and modifications without departing from the concept and scope of the present disclosure. Therefore, the scope of protection of the present disclosure shall be determined by the appended claims.

Claims

1. A composite processor, characterized in that, Include: A processing unit for generating a control signal; and At least one gate driving unit is connected to the processing unit. The at least one gate driving unit outputs a driving signal according to the control signal and controls the opening and closing of at least one switch through the driving signal. The processing unit and the at least one gate driving unit are integrated into a single chip.

2. The composite processor as described in claim 1, characterized in that, The number of the at least one gate driving unit is multiple, and the number of the at least one switch is multiple.

3. The composite processor as described in claim 1, characterized in that, The processing unit is electrically connected to the at least one gate driving unit through an electrical connection structure in the chip.

4. The composite processor as described in claim 1, characterized in that, The processing unit is a microcontroller unit.

5. The composite processor as described in claim 1, characterized in that, The at least one gate driving unit is a gate driver.

6. A control system, characterized in that, Include: An analog front-end unit is used to generate a detection signal; A composite processor, connected to the analog front-end unit, and comprising: A processing unit generates a control signal based on the detected signal; and At least one gate driving unit is connected to the processing unit, the at least one gate driving unit outputs a driving signal according to the control signal, wherein the processing unit and the at least one gate driving unit are integrated in a chip; and An inverter unit is connected to the at least one gate drive unit and includes at least one switch, wherein the at least one switch is controlled by the drive signal.

7. The control system as described in claim 6, characterized in that, The number of the at least one gate driving unit is multiple, and the number of the at least one switch is multiple.

8. The control system as described in claim 6, characterized in that, The processing unit is electrically connected to the at least one gate driving unit through an electrical connection structure in the chip.

9. The control system as described in claim 6, characterized in that, The processing unit is a microcontroller unit.

10. The control system as described in claim 6, characterized in that, The at least one gate driving unit is a gate driver.

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