A sequence processing method, a communication node, a storage medium and a program product

Abstract

The application provides a sequence processing method, a communication node, a storage medium and a program product. The sequence processing method comprises the following steps: obtaining an information bit sequence; performing low-density parity check (LDPC) coding on the information bit sequence according to a parity check matrix to obtain a coded bit sequence; wherein the parity check matrix at least contains a first type of element and a second type of element, the first type of element indicates an element associated with one unit matrix cyclic shift, and the second type of element indicates an element associated with two unit matrix cyclic shifts.

Description

Technical Field

[0001] This application relates to the field of communication technology, such as a sequence processing method, a communication node, a storage medium, and a program product. Background Technology

[0002] With the rapid development of technologies such as big data, cloud computing, and latency-sensitive networks, the number of user devices in wireless communication networks is exploding. Wireless communication networks will carry diverse applications and massive amounts of data, which places high demands on data processing throughput, reliability, and latency.

[0003] In ultra-high throughput applications, the iterative decoding computation of low-density parity-check codes is computationally intensive. Summary of the Invention

[0004] This application provides a sequence processing method, a communication node, a storage medium, and a program product, which reduces the computational load for low-density parity check encoding iterative decoding.

[0005] In a first aspect, an embodiment of this application provides a sequence processing method, comprising:

[0006] Obtain the information bit sequence;

[0007] The information bit sequence is encoded by low-density parity-check (LDPC) encoding based on the parity check matrix to obtain the encoded bit sequence.

[0008] The parity check matrix contains at least two types of elements: a first type and a second type. The first type of elements indicates elements associated with a cyclic shift of one identity matrix, and the second type of elements indicates elements associated with a cyclic shift of two identity matrices.

[0009] Secondly, an embodiment of this application provides a sequence processing method, including:

[0010] Obtain the soft bit sequence to be decoded;

[0011] The soft bit sequence to be decoded is subjected to LDPC decoding based on the parity check matrix to obtain the information bit sequence.

[0012] The parity check matrix contains at least two types of elements: a first type and a second type. The first type of elements indicates elements associated with a cyclic shift of one identity matrix, and the second type of elements indicates elements associated with a cyclic shift of two identity matrices.

[0013] Thirdly, an embodiment of this application provides a communication node, comprising:

[0014] One or more processors;

[0015] Storage device for storing one or more programs;

[0016] When the one or more programs are executed by the one or more processors, the one or more processors implement the sequence processing method provided in the embodiments of this application.

[0017] Fourthly, embodiments of this application provide a storage medium, characterized in that the storage medium stores a computer program, which, when executed by a processor, implements the method provided in embodiments of this application.

[0018] Fifthly, embodiments of this application provide a computer program product, including a computer program that, when executed by a processor, implements the method provided according to embodiments of this application.

[0019] Further details regarding the above embodiments and other aspects of this application, as well as their implementations, are provided in the accompanying drawings, detailed description, and claims. Attached Figure Description

[0020] Figure 1 This is a schematic flowchart of a sequence processing method provided in an embodiment of this application;

[0021] Figure 2 This is a schematic diagram of the structure of a communication system provided in an embodiment of this application;

[0022] Figure 3 This is a flowchart illustrating another sequence processing method provided in an embodiment of this application;

[0023] Figure 4 This is a schematic diagram of the structure of a parity check matrix provided in an embodiment of this application;

[0024] Figure 5 This is a performance comparison chart of LDPC codes under different iteration numbers provided in an embodiment of this application;

[0025] Figure 6 This is a performance comparison chart of a confidence-transfer decoding method with a maximum of 4 iterations, provided in an embodiment of this application.

[0026] Figure 7 This is a performance comparison chart of another confidence-transfer decoding method with a maximum of 4 iterations provided in the embodiments of this application;

[0027] Figure 8 This is a performance comparison chart of another confidence-transfer decoding method with a maximum of 4 iterations provided in the embodiments of this application;

[0028] Figure 9 This is a performance comparison chart of another confidence-transfer decoding method with a maximum number of iterations of 4 provided in the embodiments of this application;

[0029] Figure 10 This is a performance comparison chart of another confidence-transfer decoding method with a maximum number of iterations of 4 provided in the embodiments of this application;

[0030] Figure 11 This is a performance comparison chart of another confidence-transfer decoding method with a maximum of 4 iterations provided in the embodiments of this application;

[0031] Figure 12 This is a performance comparison chart of another confidence-transfer decoding method with a maximum of 4 iterations provided in the embodiments of this application;

[0032] Figure 13 This is a performance comparison chart of another confidence-transfer decoding method with a maximum of 4 iterations provided in the embodiments of this application;

[0033] Figure 14 This is a performance comparison chart of another confidence-transfer decoding method with a maximum of 4 iterations provided in the embodiments of this application;

[0034] Figure 15 This is a performance comparison chart of another confidence-transfer decoding method with a maximum of 4 iterations provided in the embodiments of this application;

[0035] Figure 16 This is a performance comparison chart of another confidence-transfer decoding method with a maximum of 4 iterations provided in the embodiments of this application;

[0036] Figure 17 This is a performance comparison chart of another confidence-transfer decoding method with a maximum of 4 iterations provided in the embodiments of this application;

[0037] Figure 18 This is a performance comparison chart of another confidence-transfer decoding method with a maximum of 4 iterations provided in the embodiments of this application;

[0038] Figure 19 This is a schematic diagram of the structure of a sequence processing device provided in an embodiment of this application;

[0039] Figure 20 This is a schematic diagram of the structure of another sequence processing device provided in the embodiments of this application;

[0040] Figure 21 This is a schematic diagram of the structure of a communication node provided in an embodiment of this application. Detailed Implementation

[0041] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described in detail below with reference to the accompanying drawings. It should be noted that, unless otherwise specified, the embodiments and features described in these embodiments can be arbitrarily combined with each other.

[0042] The steps illustrated in the flowchart in the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions. Furthermore, although a logical order is shown in the flowchart, in some cases the steps shown or described may be performed in a different order than that presented here.

[0043] In this application, the terms "first," "second," etc., are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0044] In wireless communication systems, the transmitting end performs channel coding on the data to be transmitted to obtain a coded bit sequence, and then maps this coded bit sequence into constellation modulation symbols before sending it to the receiving end. During data processing, errors can occur due to factors such as multipath propagation, noise, and interference. Channel coding adds redundant information to the data to be transmitted, allowing the receiving end to recover the original data, thus eliminating distortion introduced during transmission. The receiving end needs to perform channel decoding on the received constellation modulation symbols to recover the transmitted data.

[0045] Currently, commonly used channel coding methods include low-density parity-check coding. Low-density parity-check coding is defined by a sparse (or low-density) binary parity-check matrix (or check matrix). Decoding performance can be improved through iterative decoding, such as using belief-transfer decoding.

[0046] Low-density parity check (LDPC) codes are a type of forward error correction coding. LDPC codes are linear block codes defined by a parity check matrix and a lifting size. Because the parity check matrix is ​​very sparse, encoding and decoding can be performed with low complexity. The parity check matrix H of an LDPC code is an mb×Z matrix with nb×Z columns, composed of mb×nb submatrices. Each submatrix is ​​a different power of a Z×Z standard permutation matrix (corresponding to a cyclic shift matrix of the identity matrix), a Z×Z all-zero square matrix, or a superposition of different powers of multiple Z×Z standard permutation matrices. This LDPC code can be called a structured LDPC code, a quasi-cyclic LDPC code, or a QC-LDPC code. The parity check matrix H has the following form:

[0047]

[0048] if have That is, a square matrix of size Z×Z containing all zeros; if It is an integer greater than or equal to 0, and the corresponding submatrix is ​​the standard permutation matrix P. The Z×Z standard permutation matrix P, which is the power of the power (i.e., the cyclic shift of the identity matrix), is shown below (the standard permutation matrix is ​​formed by cyclically shifting the identity matrix one bit to the right):

[0049]

[0050] so, This allows each submatrix to be uniquely identified. If a submatrix is ​​a square matrix consisting entirely of zeros, the corresponding... Using -1 (or null values ​​or other representations), if a submatrix is ​​obtained by cyclic shift 's' of the identity matrix, then... Equals s, therefore all It can form a basic matrix, a parity check matrix, a shift matrix, a coefficient matrix, an exponential matrix, or a basic graph parity check matrix. In some cases, the submatrices in the parity check matrix H are obtained by cyclically shifting and superimposing several identity matrices. In this case, the shift values ​​at corresponding positions in the parity check matrix (basic matrix) may include multiple shift values. The parity check matrix H contains only two elements: 0 and 1. Each row in the parity check matrix H corresponds to a parity check code. If an element in that row is equal to 1, it means that the bit at the index corresponding to that element participates in the parity check code of that row. For example, in the 0th row of the parity check matrix H, the index positions where the element is equal to 1 are {0, 10, 20, 40, 50, 70}. Then, in the codeword of the corresponding LDPC code, bits 0, 10, 20, 40, 50, and 70 constitute a parity check code, that is, their XOR result is equal to 0. Therefore, the parity check matrix H can also be called a binary parity check matrix. In LDPC code decoding, the rows of the parity check matrix H correspond to the updates of the parity check nodes, and the columns of the parity check matrix H correspond to the updates of the variable nodes. The continuous iterative updates of the parity check nodes and the variable nodes constitute the iterative decoding of the LDPC code.

[0051] In this disclosure, the parity check matrix (fundamental matrix) includes various elements: elements of type 0 indicate elements of a square matrix of all zeros (which may be called -1 elements, null elements, empty elements, or null value elements); elements of type 1 indicate elements of a cyclic shift of one unit matrix; elements of type 2 indicate elements of a cyclic shift of two unit matrices; and elements of type 3 indicate elements of a cyclic shift of three unit matrices. By changing the elements of the parity check matrix indicating a square matrix of all zeros (type 0 elements) to 0, the elements indicating a cyclic shift of one unit matrix (type 1 elements) to 1, the elements indicating a cyclic shift of two unit matrices (type 2 elements) to 2, and the elements indicating a cyclic shift of three unit matrices (type 3 elements) to 3, the fundamental graph matrix can be obtained. That is, the fundamental graph matrix may include at least one of the following elements: 0, 1, 2, or 3. The elements of type 0 (equal to 0) in the fundamental graph matrix correspond to the elements of type 0 in the parity check matrix (fundamental matrix), which can be -1, null, empty, or empty value elements; the elements of type 1 (equal to 1) in the fundamental graph matrix correspond to the elements of type 1 in the parity check matrix (fundamental matrix), which indicate one cyclic shift of the identity matrix; the elements of type 2 (equal to 2) in the fundamental graph matrix correspond to the elements of type 2 in the parity check matrix (fundamental matrix), which indicate two cyclic shifts of the identity matrix; and the elements of type 3 (equal to 3) in the fundamental graph matrix correspond to the elements of type 3 in the parity check matrix (fundamental matrix), which indicate three cyclic shifts of the identity matrix. That is, elements of type 0 can be considered to indicate elements associated with an all-zero square matrix, elements of type 1 can be considered to indicate elements associated with a cyclic shift of one identity matrix (containing one shift value), elements of type 2 indicate elements associated with a cyclic shift of two identity matrices (containing two shift values), and elements of type 3 indicate elements associated with a cyclic shift of three identity matrices (containing three shift values).

[0052] In a specific example, a parity check matrix H with 2 rows and 4 columns... PCMAs shown below, the element in row 0, column 0 of the parity check matrix is ​​a third-type element, including 3 shift values ​​{3,2,1}; the element in row 0, column 1 of the parity check matrix is ​​a second-type element, including 2 shift values ​​{3,7}; the element in row 0, column 2 of the parity check matrix is ​​a first-type element, including 1 shift value {0}; and the element in row 0, column 3 of the parity check matrix is ​​a third-type element, represented by -1 (or it can be represented as a null value). For elements of type 0, since they correspond to a square matrix of all zeros, their row and column weights are both equal to 0. For elements of type 1, since they correspond to a matrix obtained by cyclically shifting one identity matrix, their row and column weights are both equal to 1 (row weight equals the number of shift values). For elements of type 2, since they correspond to a matrix obtained by cyclically shifting and superimposing two identity matrices, their row and column weights are both equal to 2. For elements of type 3, since they correspond to a matrix obtained by cyclically shifting and superimposing three identity matrices, their row and column weights are both equal to 3. The row weights (i.e., the number of all shift values ​​in a row) of the parity check matrix are: row weight 6 for row 0 and row weight 6 for row 1. The column weights (i.e., the number of all shift values ​​in a column) of the parity check matrix are: column weight 5 for column 0, column weight 3 for column 1, column weight 3 for column 2, and column weight 1 for column 3.

[0053]

[0054] The basic graph matrix H corresponding to the parity check matrix BG As shown below, the element in row 0, column 0 of the basic graph matrix is ​​a third-class element, equal to 3, corresponding to an element associated with 3 cyclic shifts of the identity matrix; the element in row 0, column 1 of the basic graph matrix is ​​a second-class element, equal to 2, corresponding to an element associated with 2 cyclic shifts of the identity matrix; the element in row 0, column 2 of the basic graph matrix is ​​a first-class element, equal to 1, corresponding to an element associated with 1 cyclic shift of the identity matrix; and the element in row 0, column 3 of the basic graph matrix is ​​a zero-class element, equal to 0, corresponding to an element associated with an all-zero square matrix.

[0055]

[0056] Z is the dimension of the standard permutation matrix (submatrix), and can be called the lifting size. Using the parity check matrix described above for LDPC encoding, the corresponding code length is equal to 4×Z. For ease of description, only the non-zero elements of the parity check matrix and their row and column indices can be described, while the remaining row and column indices are assumed to be zero elements. Furthermore, elements indicating cyclic shifts of the identity matrix can be represented by their cyclic shift values, while elements indicating all-zero square matrices can be described using -1, null, or null values. Correspondingly, the parity check matrix H above...PCM The boost value Z equals 8, and the corresponding LDPC code parity check matrix H (or binary parity check matrix) is as follows:

[0057]

[0058] With the development of intelligent transportation, intelligent industrial control, and intelligent logistics, the demand for ultra-low latency and ultra-high reliability communication is becoming increasingly stringent, requiring the transmission and successful reception of large volumes of data within extremely short timeframes. However, in ultra-high throughput applications, the large number of coding blocks in low-density parity-check (LDPC) codes necessitates a massive amount of computational effort in iterative decoding, resulting in significant energy loss. This application proposes an LDPC encoding processing scheme that reduces the number of LDPC code iterations, thereby increasing the decoding convergence speed and reducing the computational load. This, in turn, reduces unnecessary energy consumption, improves the efficiency of terminal or base station equipment, and enhances the robustness of data communication.

[0059] In one exemplary implementation Figure 1 This is a flowchart illustrating a sequence processing method provided in an embodiment of this application. This method is applicable to situations where the computational load of iterative decoding of LDPC encoding is reduced. This method can be executed by the sequence processing apparatus provided in this application. This apparatus can be implemented in software and / or hardware and integrated on a first communication node. The first communication node encompasses any type of communication node that transmits information, such as user equipment (UE), including various types of terminal devices capable of accessing communication networks. Figure 2 This is a schematic diagram of a communication system provided in an embodiment of this application; the first communication node 1 can act as a transmitter to send data to be transmitted to the second communication node 2. The first communication node 1 and / or the second communication node can be various types of UEs. These UEs can also include, or be referred to by those skilled in the art, as mobile stations, user stations, mobile units, user units, radio units, remote units, mobile devices, radio devices, wireless communication devices, remote devices, mobile user stations, access terminals, mobile terminals, wireless terminals, remote terminals, handheld devices, user agents, mobile clients, clients, passive tags, or some other suitable term. Furthermore, these UEs can also be cellular phones, personal digital assistants (PDAs), wireless modems, wireless communication devices, handheld devices, tablet computers, laptop computers, cordless phones, wireless local loop (WLL) stations, etc. These UEs can communicate with various types of base stations and network devices (including macro eNBs, small cell eNBs, relay base stations, etc.). For example, the second communication node can also be a base station or network device.

[0060] The communication systems to which this disclosure applies may include 5G-Advanced (5G-A) wireless mobile communication systems, 6th Generation Mobile Communication Technology (6G) wireless mobile communication systems, 7th Generation Mobile Communication Technology (7G) wireless mobile communication systems, or other wireless communication systems.

[0061] like Figure 1 As shown, this application provides a sequence processing method, including the following operations:

[0062] S110, Obtain the information bit sequence.

[0063] The information bit sequence can be the data to be transmitted by the first communication node; the specific content of the data is not limited here. Let the acquired information bit sequence be a = a0, a1, a2, ..., a K-1 , where K is the number of bits in the information bit sequence, and K is a positive integer.

[0064] This operation can obtain the information bit sequence locally from the first communication node, or it can receive the information bit sequence transmitted by other communication nodes. The other communication nodes can be communication nodes in the communication system other than the first and second communication nodes.

[0065] S120. Perform low-density parity-check (LDPC) encoding on the information bit sequence according to the parity check matrix to obtain the encoded bit sequence.

[0066] The encoded bit sequence can be considered as the sequence generated after LDPC encoding of the information bit sequence. Let the obtained encoded bit sequence be b = b0, b1, b2, ..., b N-1 , where N is the number of bits in the encoded bit sequence, and N is a positive integer.

[0067] The parity check matrix includes at least two types of elements: Type 1 elements and Type 2 elements. Type 1 elements indicate elements associated with a cyclic shift of one identity matrix, and Type 2 elements indicate elements associated with a cyclic shift of two identity matrices. Each type of element can indicate the cyclic shift of two identity matrices. For example, if Type 2 elements include two elements, each element indicates the number of bits in the cyclic shift of its corresponding identity matrix. That is, Type 2 elements can include two shift values, each indicating the number of bits in the cyclic shift of a corresponding identity matrix. Type 1 elements are similar and will not be elaborated further. In this application, the parity check matrix may also include elements of a predetermined numerical value (which can be a non-negative integer other than 1 and 2), such as Type 0 elements and / or Type 3 elements.

[0068] In the process of encoding the information bit sequence based on the parity check matrix, the first type of elements in the parity check matrix can be replaced by a matrix obtained by cyclically shifting a Z×Z identity matrix, where Z is the boost value. The second type of elements in the parity check matrix can be replaced by a superposition matrix obtained by cyclically shifting two Z×Z identity matrices. Including the second type of elements in the parity check matrix increases the row or column weight. For example, if the element in the i-th row and j-th column of the parity check matrix is ​​a second type element, then the i-th row and j-th column can include two values, each corresponding to a different shift value. Compared to including only one value, this increases the row or column weight. Therefore, more information can be obtained during the iterative decoding process, and the decoding convergence speed is faster than that of only including the first type of elements, thus reducing the decoding computation.

[0069] In one example, this operation can determine the parity check matrix H based on the parity check matrix, and then perform LDPC encoding on the information bits using the parity check matrix to obtain the encoded bit sequence. The encoded bit sequence can include the information bit sequence and the parity bit sequence obtained by encoding the information bit sequence. The parity bit sequence can be a sequence generated after encoding the information bit sequence. The parity bit sequence, the information bit sequence, and the parity check matrix can satisfy a predetermined relationship, such as a predetermined equation.

[0070] The parity check matrix can be obtained by cyclically shifting an identity matrix, where the shift value can be represented by the parity check matrix. The shift value represents the number of bits in the cyclic shift. The dimension of the parity check matrix's submatrix can be a boost value. The determination of the boost value is not limited here; it can be determined based on the actual situation, or it can be predetermined or configured.

[0071] In one instance, this operation can encode the information bit sequence based on the parity check matrix and the boost value to obtain the parity bit sequence, and then combine the parity bit sequence with the information bit sequence to obtain the encoded bit sequence.

[0072] In one instance, this operation can encode the information bit sequence based on the parity check matrix, the basic graph matrix, and the boost value to obtain the parity bit sequence, and then combine the parity bit sequence with the information bit sequence to obtain the encoded bit sequence.

[0073] In one embodiment, the parity check matrix H of the LDPC encoding is determined based on the parity check matrix and the lift value, where the lift value is Z. The elements of type 0 in the parity check matrix are replaced with a Z×Z all-zero matrix; the elements of type 1 in the parity check matrix are replaced with a matrix obtained by cyclically shifting one Z×Z identity matrix; the elements of type 2 in the parity check matrix are replaced with a superimposed matrix obtained by cyclically shifting two Z×Z identity matrices; and the elements of type 3 in the parity check matrix are replaced with a superimposed matrix obtained by cyclically shifting three Z×Z identity matrices. The specific calculation process is as follows.

[0074] 1. Replace the elements of class 0 in the parity check matrix with a square matrix of size Z×Z containing all zeros.

[0075] 2. Replace the first type of elements in the parity check matrix with a cyclically shifted matrix I(P) of size Z×Z identity matrix. i,j ), i and j are the row and column indices of the parity check matrix, respectively, I(P i,j ) is a Z×Z identity matrix cyclically shifted to the right (or left) by P. i,j The matrix obtained by P. i,j =mod(V i,j ,Z),V i,j It is a shift value of the first-class element in the parity check matrix, corresponding to row index i and column index j. The first-class element consists of one element value (shift value), which is a non-negative integer.

[0076] 3. Replace the second type of element in the parity check matrix with a superposition matrix of two cyclically shifted identity matrices, such as... i and j are the row and column indices of the parity check matrix, respectively. and Each of the following is a Z×Z identity matrix cyclically shifted to the right (or left). and The matrix obtained by bit. Among them, and These are the two shift values ​​of the second-type element in the parity check matrix, corresponding to row index i and column index j, respectively. The second-type element consists of two element values ​​(shift values), both of which are non-negative integers.

[0077] 4. The parity check matrix is ​​formed by replacing the third type of element in the parity check matrix with the superposition of three cyclically shifted identity matrices. i and j are the row and column indices of the parity check matrix, respectively. and Each of the following is a Z×Z identity matrix cyclically shifted to the right (or left). and The matrix obtained by bit. Among them, and These are the three shift values ​​of the third type element in the parity check matrix, corresponding to row index i and column index j. The third type element consists of three element values ​​(shift values), all of which are non-negative integers.

[0078] After determining the parity check matrix, the information bit sequence can be encoded according to the LDPC-encoded parity check matrix H to generate the parity bit sequence w = [w0, w1, w2, ..., w M-1 ] T Its satisfaction Where a = [a0, a1, a2, ..., a K-1 ] T 0 is a column vector of all zeros. The value of M can be determined based on the number of bits N in the encoded bit sequence and the number of bits K in the information bit sequence. The calculation in the encoding process is performed using a second-order Galois field (GF(2)). The obtained encoded bit sequence is b = [a0, ..., a ... K-1 ,w0,…,w M-1 Since the parity check matrix H can be determined by the parity check matrix and the boost value, the LDPC encoding process can also directly encode the information bit sequence based on the parity check matrix and the boost value to generate the parity bit sequence.

[0079] After obtaining the encoded bit sequence in this step, it can be mapped into constellation modulation symbols and sent to the receiving end.

[0080] This application provides a sequence processing method that encodes an information bit sequence based on a parity check matrix containing at least two types of elements. Since the parity check matrix includes two types of elements, which can indicate elements associated with cyclic shifts of two identity matrices, the parity check matrix used for encoding can include more elements, accelerating the convergence speed of LDPC codes during the iteration process, reducing the number of decoding iterations, thereby reducing the amount of decoding computation and reducing the energy consumption of communication nodes such as user equipment or base stations.

[0081] Based on the above embodiments, modified embodiments of the above embodiments are proposed. It should be noted that, in order to keep the description brief, only the differences from the above embodiments are described in the modified embodiments.

[0082] In one embodiment, the parity check matrix includes a parity check core matrix, wherein the ratio of the number of second-type elements in the parity check core matrix to the total number of all elements in the parity check core matrix is ​​greater than or equal to X%, and X is a real number greater than or equal to 40 and less than 100.

[0083] The parity check core matrix can be the core matrix of the parity check matrix. During the encoding process, the parity check matrix can be pre-encoded based on the core matrix (parity check core matrix), and then encoded using the remaining elements of the parity check matrix. The proportion of the number of type 2 elements included in the core matrix (parity check core matrix) is greater than X%, that is, the ratio of the number of type 2 elements in the parity check core matrix to the total number of elements in the core matrix is ​​greater than or equal to X%, where X is a real number greater than or equal to 40 and less than 100.

[0084] In this embodiment, the parity check matrix has a polygonal structure, such as a large number of type 2 elements, which accelerates the iterative convergence speed of the LDPC code, reduces the number of decoding iterations, thereby reducing the amount of decoding computation and reducing the energy consumption of the communication node.

[0085] This embodiment does not limit the value of X. It can be a value greater than 50 and less than 100, such as 50, 55, 60, 65, 70, 75, 80, 85, 90 or 95.

[0086] In one embodiment, X equals one of the following: 50, 60, 70, 75, 80, 83, 85, 90, 91, 93, 94, 95. In one specific example, X equals 75. In one specific example, X equals 80. In one specific example, X equals 85. In one specific example, X equals 94. In one specific example, X equals 83. In one specific example, X equals 91. In one specific example, X equals 93.

[0087] In one embodiment, the parity check matrix includes a parity check core matrix, wherein the number of second-type elements in the parity check core matrix is ​​greater than the number of first-type elements in the parity check core matrix.

[0088] In this embodiment, the number of elements of type 2 in the parity check core matrix is ​​greater than the number of elements of type 1 in the parity check core matrix, which increases the row or column weight of the parity check core matrix and accelerates the iterative convergence speed of the LDPC code.

[0089] The parity check matrix here may include at least elements of type 1 and type 2, and may also include elements of a specified numerical type.

[0090] In one embodiment, the parity check core matrix further includes a third type of element, which indicates elements associated with cyclic shifts of the three identity matrices, wherein the number of the third type of element satisfies one or more of the following:

[0091] The number of elements in category 2 is greater than the number of elements in category 3;

[0092] The number of elements in the third category is greater than the number of elements in the first category;

[0093] The number of elements in the third class is greater than the number of elements in the zero class, where the zero class elements indicate the elements of the all-zero matrix.

[0094] In this embodiment, the core matrix may also include a third type of element. The third type of element can be a shift value that is cyclically shifted by three identity matrices. For example, the third type of element can be three shift values, each corresponding to a cyclic shift value of three identity matrices. The element indicating the all-zero square matrix (the 0th type of element) can be any value different from the first, second, and third type of elements, such as -1 or a null value (i.e., left blank).

[0095] In this embodiment, the number of elements of the third type can be related to the number of elements of the first type, the number of elements of the second type, and the number of elements of the zero type, respectively, so as to balance the row redistribution or column redistribution in the odd and even core matrix and weaken the low density advantage of LDPC code.

[0096] In one embodiment, the parity check matrix includes a parity check core matrix, wherein the number of elements of type 1 in the parity check core matrix is ​​greater than the number of elements of type 0 in the parity check core matrix.

[0097] In this embodiment, the number of elements of type 1 in the parity check core matrix is ​​greater than the number of elements of type 0, further determining that the parity check core matrix has a high row weight or column weight.

[0098] In one embodiment, all elements in column q of the parity check core matrix in the parity check matrix are elements of type 2, where q is a positive integer less than or equal to the number of system columns, and the number of system columns is equal to the difference between the number of columns and the number of rows of the parity check matrix.

[0099] In this embodiment, all elements in a predetermined number of columns of the parity check matrix are of type 2. This predetermined number can be represented by q or kb0. No restriction is placed on which columns of the parity check matrix contain all elements of type 2.

[0100] In this embodiment, the value of q can be less than or equal to the number of system columns. In one example, the value of q can be equal to the number of system columns, meaning that all elements in all system columns of the parity check core matrix are of type 2. This effectively increases the connectivity between different parity check nodes, thereby accelerating the convergence of iterative decoding. In other words, better decoding performance can be obtained with fewer iterations. In another example, the value of q can be less than the number of system columns. In this case, because the row or column weight of the parity check core matrix becomes lighter, the number of nodes (or girth) of the minimum shortest cycle in the parity check core matrix can be larger. Especially when the boost value is small, this can also improve the decoding performance of LDPC codes.

[0101] In one embodiment, q is greater than Y times the number of columns in the system, where Y is a real number greater than or equal to 0.5 and less than or equal to 1. In a specific example, Y can be equal to one of the following: 0.5, 0.6, 0.7, 0.8, 0.9, or 1.

[0102] In this embodiment, q can be greater than Y times the number of columns in the system, but less than the number of columns in the parity check matrix.

[0103] In one embodiment, all elements in the first q columns of the parity check core matrix are elements of type 2.

[0104] In this embodiment, column q can be the first q columns of the parity check matrix, and there is no limitation on the elements of the remaining columns of the parity check matrix.

[0105] In one embodiment, the number of second-class elements in the parity check core matrix of the parity check matrix is ​​greater than or equal to S times the number of first-class elements in the parity check core matrix, where S is a real number greater than 1.

[0106] In this embodiment, the number of elements of type 2 in the parity check core matrix is ​​greater than or equal to S times the number of elements of type 1, ensuring that the parity check core matrix has a large row or column weight, thereby accelerating the iteration convergence speed. The value of S can be related to the number of all elements in the parity check core matrix to avoid the number of elements of type 2 exceeding the total number of elements in the parity check core matrix. S can be a real number greater than 1, such as a real number greater than 1 and less than 20.

[0107] In some examples, S can be a real number greater than 1, for example, S is a real number greater than 2 and less than 20; or S is a real number greater than 2 and less than 6; or S is a real number greater than 3 and less than 7; or S is a real number greater than 3 and less than 8.33; or S is a real number greater than 3 and less than 9.67; or S is a real number greater than 3 and less than 11; or S is a real number greater than 3 and less than 12.34; or S is a real number greater than 3 and less than 13.67; or S is a real number greater than 3 and less than 15; or S is a real number greater than 3 and less than 16.34. In some examples, the parity check core matrix has 2 rows.

[0108] In one embodiment, S equals one of the following: 1.2, 1.5, 1.8, 2, 2.5, 2.8, 3.0, 3.5, 3.8, 4, 4.5, 5, 5.4, 5.6, 6, 7, 8, 8.3, 9.6, 11, 12, 12.3, 13.6, 15, 16.3. In some examples, the number of systematic columns of the parity check matrix is ​​less than or equal to 8, and S is a real number greater than 2 and less than 6; in one specific example, S equals 4 or 5.6. In some examples, the number of systematic columns of the parity check matrix is ​​less than or equal to 10, and S is a real number greater than 3 and less than 7; in one specific example, S equals 5 or 7. In some examples, the number of systematic columns of the parity check matrix is ​​less than or equal to 12, and S is a real number greater than 3 and less than 8.33; in one specific example, S equals 6 or 8.3. In some examples, the number of systematic columns of the parity check matrix is ​​less than or equal to 14, and S is a real number greater than 3 and less than 9.67; in one specific example, S equals 7 or 9.6. In some examples, the number of systematic columns of the parity check matrix is ​​less than or equal to 16, and S is a real number greater than 3 and less than 11; in one specific example, S equals 8 or 11. In some examples, the number of systematic columns of the parity check matrix is ​​less than or equal to 18, and S is a real number greater than 3 and less than 12.34; in one specific example, S equals 9 or 12.3. In some examples, the number of systematic columns of the parity check matrix is ​​less than or equal to 20, and S is a real number greater than 3 and less than 13.67; in one specific example, S equals 10 or 13.6. In some examples, the number of systematic columns of the parity check matrix is ​​less than or equal to 22, and S is a real number greater than 3 and less than 15; in one specific example, S equals 11 or 15. In some examples, the number of columns in the parity check matrix is ​​less than or equal to 24, and S is a real number greater than 3 and less than 16.34; in one specific example, S equals 12 or 16.3. In some examples, the number of rows in the parity check core matrix is ​​equal to 2.

[0109] In one embodiment, the number of second-class elements in the parity check matrix is ​​greater than or equal to U times the number of third-class elements in the parity check matrix, where U is a real number greater than 1.

[0110] In this embodiment, the number of elements of type 2 in the parity check core matrix is ​​greater than or equal to U times the number of elements of type 3, to avoid excessive row or column weighting in the parity check core matrix, which would weaken the low-density advantage of LDPC codes. The value of U can be the same as the value of S. The value of S can also be related to the number of all elements in the parity check core matrix, or it can be combined with the number of elements of type 1. The value of U can be a real number greater than 1 and less than 20.

[0111] In one embodiment, U is equal to one of the following: 1.2, 1.5, 1.8, 2, 2.5, 2.8, 3.0, 3.5, 3.8, 4, 4.5, 5, 5.4.

[0112] In one embodiment, the row weight of the i-th row of the parity check core matrix in the parity check matrix is ​​greater than or equal to T times the number of system columns, where T is a real number greater than 1, the number of system columns is equal to the difference between the number of columns and the number of rows of the parity check matrix, and the row weight indicates the total number of cyclic shift bits of the identity matrix indicated by all non-zero elements in the corresponding row.

[0113] Where i can be an integer from 0 to mb0-1. For example, i equals 0, 1, 2, or 3. mb0 (which can also be represented as p) can be the row number of the parity check matrix. Rows from 0 to mb0-1 can be the indices of the parity check matrix within the parity check matrix.

[0114] T can be a real number greater than 1 and less than 3. In this embodiment, the row weight of the i-th row in the parity check core matrix is ​​greater than T times the number of columns in the system, ensuring that the parity check core matrix has a certain range of row weight and accelerating the iterative convergence speed of the LDPC code.

[0115] In one embodiment, T is equal to one of the following: 1.2, 1.5, 1.6, 1.7, 1.8, 1.9, 2.0, 2.1.

[0116] In one embodiment, i equals one of the following: 0, 1, 2, 3.

[0117] In one embodiment, T can be a real number greater than 1.5 and less than 2.5. In some examples, the number of systematic columns of the parity check matrix is ​​less than or equal to 8, and T is a real number greater than or equal to 2 and less than or equal to 2.375. In some examples, the number of systematic columns of the parity check matrix is ​​less than or equal to 10, and T is a real number greater than or equal to 1.9 and less than or equal to 2.3. In some examples, the number of systematic columns of the parity check matrix is ​​less than or equal to 12, and T is a real number greater than or equal to 1.83 and less than or equal to 2.25. In some examples, the number of systematic columns of the parity check matrix is ​​less than or equal to 14, and T is a real number greater than or equal to 1.78 and less than or equal to 2.2143. In some examples, the number of systematic columns of the parity check matrix is ​​less than or equal to 16, and T is a real number greater than or equal to 1.75 and less than or equal to 2.1875. In some examples, the parity check matrix has 18 or fewer systematic columns, and T is a real number greater than or equal to 1.7222 and less than or equal to 2.1667. In some examples, the parity check matrix has 20 or fewer systematic columns, and T is a real number greater than or equal to 1.7 and less than or equal to 2.15. In some examples, the parity check matrix has 22 or fewer systematic columns, and T is a real number greater than or equal to 1.6818 and less than or equal to 2.1364. In some examples, the parity check matrix has 24 or fewer systematic columns, and T is a real number greater than or equal to 1.6667 and less than or equal to 2.125. In some examples, the parity check core matrix has 2 or 3 rows.

[0118] In one embodiment, the number of system columns containing only type 2 elements within the parity check core matrix of the parity check matrix is ​​greater than or equal to the difference between the number of system columns and a set integer. The setting of the set integer is not limited here.

[0119] In one embodiment, the number of system columns containing only type 2 elements in the parity check core matrix of the parity check matrix is ​​greater than or equal to the difference between the number of system columns and A, wherein the number of system columns is equal to the difference between the number of columns and the number of rows of the parity check matrix, and the system columns include the number of system columns in the parity check core matrix, wherein A is equal to 0, 1, 2, 3, 4 or 5.

[0120] In this embodiment, the number of system columns in the parity check core matrix that contain only type 2 elements is greater than or equal to the difference between the number of system columns and 3, and can also be less than the number of columns in the parity check core matrix, so as to ensure that the parity check core matrix has a good column redistribution.

[0121] In one embodiment, the number of systematic columns containing only type 2 elements in the parity check core matrix of the parity check matrix is ​​equal to the number of systematic columns, where the number of systematic columns is equal to the difference between the number of columns and the number of rows of the parity check matrix. Having only type 2 elements in the systematic columns of the parity check core matrix allows for the use of a unified module in the computational units for variable node updates and check node updates during LDPC code decoding. This reduces waiting and selection time for data computation, improves decoding efficiency, and accelerates the convergence speed of iterative decoding.

[0122] In one embodiment, the parity check matrix contains only elements of type 0 and type 1 from row p to the last row, wherein the elements of type 0 are used to indicate the elements of the all-zero square matrix, and p is equal to 2, 3, 4, 5, 6, 7, 8, 9 or 10.

[0123] p can be equal to the number of rows in the parity check matrix. The parity check matrix, from the first row after the parity check matrix to the last row, can contain only elements of type 1 and type 0 to avoid excessive row overlap in the parity check matrix.

[0124] In one embodiment, the parity check matrix includes only elements of class 0 or only elements of class 1 from row p to the last row.

[0125] In one embodiment, all columns of the parity check core matrix have a column weight greater than 1 to provide a parity check core matrix with a larger column weight, thereby accelerating the iteration convergence speed.

[0126] In one embodiment, the difference between the number of columns and the number of rows of the parity check matrix is ​​an integer greater than 6 and less than 36.

[0127] In this embodiment, the number of system columns can be an integer greater than 6 and less than 36.

[0128] In one embodiment, the difference between the number of columns and the number of rows of the parity check matrix is ​​equal to 24, 23, 22, 21, 20, 18, 16, 14, 12, 10, or 8.

[0129] In one embodiment, the parity check matrix includes five sub-matrix blocks. The first and second sub-matrix blocks constitute the parity check core matrix. The first, second, and third sub-matrix blocks have the same number of rows. The third and fifth sub-matrix blocks have the same number of columns. The fourth sub-matrix block and the parity check core matrix have the same number of columns. The fourth and fifth sub-matrix blocks have the same number of rows.

[0130] In one embodiment, the parity check matrix includes five sub-matrix blocks. The first and second sub-matrix blocks constitute the parity check core matrix. The first, second, and third sub-matrix blocks have the same number of rows. The third and fifth sub-matrix blocks have the same number of columns. The fourth sub-matrix block has the same number of columns as the parity check core matrix. The fourth and fifth sub-matrix blocks have the same number of rows. The first sub-matrix block is located at the top left corner of the parity check matrix. The second sub-matrix block is located adjacent to and to the right of the first sub-matrix block. The third sub-matrix block is located adjacent to and to the right of the second sub-matrix block. The fourth sub-matrix block is located at the bottom left corner of the parity check matrix. The fifth sub-matrix block is located at the bottom right corner of the parity check matrix.

[0131] The parity check matrix includes five sub-matrix blocks, which can be the first sub-matrix block, the second sub-matrix block, the third sub-matrix block, the fourth sub-matrix block, and the fifth sub-matrix block.

[0132] The parity check core matrix is ​​a matrix composed of a first sub-matrix block and a second sub-matrix block. The parity check core matrix can be the matrix located in the top-left corner of the parity check matrix. The first, second, and third sub-matrix blocks can be located in the same row, and the fourth and fifth sub-matrix blocks can also be located in the same row. The third and fifth sub-matrix blocks can be located in the same column.

[0133] The third submatrix block can be adjacent to the second submatrix block and located to the right of the second submatrix block. That is, the first, second, and third submatrix blocks can be arranged sequentially along the row direction. The fourth submatrix block can be located to the left of the fifth submatrix block, meaning the fourth and fifth submatrix blocks are arranged sequentially along the column direction. The fifth submatrix block can be located below the third submatrix block, meaning the third and fifth submatrix blocks are arranged sequentially along the column direction, such that the row number following the largest row number in the third submatrix block is the starting row number of the fifth submatrix.

[0134] In this embodiment, the top left corner includes the starting position of the parity check matrix, that is, the position with the smallest row index and the smallest column index. That is, the first element in the first sub-matrix block is located in the 1st row and 1st column of the parity check matrix (for indices starting from 1) or the 0th row and 0th column (for indices starting from 0). It can also be said that the top left corner of the first sub-matrix block is aligned with the top left corner of the parity check matrix.

[0135] The bottom left corner of the parity check matrix includes the position of the last row index and the first column index. The bottom right corner of the parity check matrix includes the position of the last row index and the last column index. In this embodiment, "left" can refer to the side of the parity check matrix with the smaller column index, and "right" can refer to the side of the parity check matrix with the larger column index.

[0136] In one embodiment, the number of rows in the first submatrix block is equal to 2, 3, 4, 5, 6, 7, or 8.

[0137] In this embodiment, the first sub-matrix block is located in the upper left corner of the parity check matrix. The columns of the first sub-matrix block in the parity check matrix are called systematic columns, that is, the number of columns of the first sub-matrix block is equal to the number of systematic columns of the parity check matrix (i.e., equal to the difference between the number of columns and the number of rows of the parity check matrix). The first sub-matrix block (or parity check core matrix) is the most core sub-matrix block in the parity check matrix, and it is included in all coding rates of LDPC encoding.

[0138] In one embodiment, the minimum column weight of the first submatrix block is equal to 2, 3, 4, 5, or 6. The minimum column weight can be the smallest among all the column weights of the first submatrix block. In some examples, all elements of the first submatrix block are of type 2, then the minimum column weight of the first submatrix block is equal to 2 * mb0, where mb0 equals the number of rows in the first submatrix block. In one example, mb0 equals 2, then the minimum column weight of the first submatrix block is equal to 4.

[0139] In one embodiment, the second sub-matrix block includes at least one type 2 element, which comprises two shift values ​​equal to 1 and 2, respectively. In one embodiment, all type 1 elements in the second sub-matrix block have a shift value equal to 0. In one embodiment, the second sub-matrix block includes three type 1 elements and one type 2 element. In a specific example, the shift values ​​corresponding to the three type 1 elements are all equal to 0. In a specific example, the two shift values ​​of the one type 2 element are equal to 1 and 2, respectively.

[0140] The second sub-matrix block is located to the right of the first sub-matrix block. The first and second sub-matrix blocks have the same number of rows. The combination of the first and second sub-matrix blocks constitutes the parity check core matrix. The first sub-matrix block corresponds to the matrix formed by all systematic columns (such as the column containing the information bits) in the parity check core matrix, and the second sub-matrix block corresponds to the matrix formed by all parity columns in the parity check core matrix. The parity columns include the column containing the parity bits in the parity check core matrix.

[0141] In one embodiment, the minimum row weight of the first sub-matrix block is greater than or equal to kb + e, where e is a non-negative integer less than or equal to 12, and kb equals the number of columns in the first sub-matrix block (also equal to the difference between the number of columns and rows in the parity check matrix). In some examples, the systematic number of columns in the parity check matrix is ​​less than or equal to 8, and e is an integer greater than or equal to 3. In some examples, the systematic number of columns in the parity check matrix is ​​less than or equal to 10, and e is an integer greater than or equal to 4. In some examples, the systematic number of columns in the parity check matrix is ​​less than or equal to 12, and e is an integer greater than or equal to 5. In some examples, the systematic number of columns in the parity check matrix is ​​less than or equal to 14, and e is an integer greater than or equal to 6. In some examples, the systematic number of columns in the parity check matrix is ​​less than or equal to 16, and e is an integer greater than or equal to 6. In some examples, the systematic number of columns in the parity check matrix is ​​less than or equal to 18, and e is an integer greater than or equal to 7. In some examples, the systematic number of columns in the parity check matrix is ​​less than or equal to 20, and e is an integer greater than or equal to 8. In some examples, the number of systematic columns in the parity check matrix is ​​less than or equal to 22, and e is an integer greater than or equal to 9. In some examples, the number of systematic columns in the parity check matrix is ​​less than or equal to 24, and e is an integer greater than or equal to 10. In some examples, the number of rows in the parity check core matrix is ​​2 or 3.

[0142] In one embodiment, all elements in the h columns of the first submatrix block are elements of type 2, where h is an integer greater than 0 and less than or equal to kb, and kb is equal to the number of columns in the first submatrix block. In some examples, h is an integer greater than kb-6 and less than or equal to kb. In some examples, kb is less than or equal to 8, and h is an integer greater than or equal to 5 and less than or equal to kb. In some examples, kb is less than or equal to 10, and h is an integer greater than or equal to 6 and less than or equal to kb. In some examples, kb is less than or equal to 12, and h is an integer greater than or equal to 7 and less than or equal to kb. In some examples, kb is less than or equal to 14, and h is an integer greater than or equal to 8 and less than or equal to kb. In some examples, kb is less than or equal to 16, and h is an integer greater than or equal to 9 and less than or equal to kb. In some examples, kb is less than or equal to 18, and h is an integer greater than or equal to 10 and less than or equal to kb. In some examples, kb is less than or equal to 20, and h is an integer greater than or equal to 12 and less than or equal to kb. In some examples, kb is less than or equal to 22, and h is an integer greater than or equal to 14 and less than or equal to kb. In some examples, kb is less than or equal to 24, and h is an integer greater than or equal to 16 and less than or equal to kb. In some examples, the parity check core matrix has 2 or 3 rows. In one example, all elements in the h columns of the first sub-matrix block are of type 2, and only the h columns containing type 2 elements have h0 columns located in the first h0 columns of the first sub-matrix block, where h0 is an integer greater than h / 2 and less than or equal to h.

[0143] In one embodiment, all elements in the h columns of the first sub-matrix block are elements of type 2, where h is an integer equal to kb, and kb is equal to the number of columns in the first sub-matrix block (equal to the difference between the number of columns and rows in the parity check matrix).

[0144] In one embodiment, the minimum column weight of the fourth sub-matrix block is equal to 4, 5, 6, 7, 8, 9, 10, or 11. The minimum column weight can be the smallest column weight among all columns of the fourth sub-matrix block.

[0145] In one embodiment, the maximum column weight of the fourth sub-matrix block is equal to 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22 or 24.

[0146] The maximum column weight of the fourth submatrix block can be the column weight with the largest value among all the column weights of the fourth submatrix block.

[0147] In one embodiment, the row weight of the j-th row of the first submatrix block is greater than or equal to R times the number of columns in the system, where R is a real number greater than 1, and the number of columns in the system is equal to the difference between the number of columns and the number of rows in the parity check matrix.

[0148] This embodiment ensures that the parity check core matrix has a large row weight by using the row weight of the j-th row in the first sub-matrix block. The value of R can be the same as or different from the value of T. R can be equal to 1.2, 1.5, 1.6, 1.7, 1.8, 1.9, 2.0, or 2.1. j can be an integer from 0 to mb0-1, such as 0, 1, 2, or 3.

[0149] In one embodiment, the average row weight of the first submatrix block is greater than or equal to E times the number of columns in the system, where E is a real number greater than 1, and the number of columns in the system is equal to the difference between the number of columns and the number of rows in the parity check matrix.

[0150] The average row weight of the first sub-matrix block can be the average of the row weights of all rows in the first sub-matrix block. In this embodiment, the average row weight of the first matrix can be used to ensure that the parity check core matrix has a high row weight. The value of E can be the same as or different from the value of T. E can be equal to 1.2, 1.5, 1.6, 1.7, 1.8, 1.9, 2.0, or 2.1.

[0151] In one embodiment, the average row weight of the parity check core matrix in the parity check matrix is ​​greater than or equal to W times the number of system columns, where W is a real number greater than 1, and the number of system columns is equal to the difference between the number of columns and the number of rows of the parity check matrix.

[0152] This embodiment ensures that the parity check core matrix has a high row weight by using the average row weight of the parity check core matrix. The average row weight of the parity check core matrix can be the average of the row weights of all rows in the parity check core matrix.

[0153] The value of W can be the same as or different from T. W can be equal to 1.2, 1.5, 1.6, 1.7, 1.8, 1.9, 2.0, or 2.1.

[0154] In one embodiment, the row weight of all rows in the second submatrix block is greater than or equal to a set value, and / or the column weight of all columns in the second submatrix block is greater than or equal to a set value. The value of the set value is not limited.

[0155] In one embodiment, the second sub-matrix block satisfies one of the following:

[0156] The row weight of all rows in the second sub-matrix block is greater than or equal to 2;

[0157] In the second submatrix block, the column weight of all columns is greater than or equal to 2.

[0158] In this embodiment, the column weight of the parity check core matrix can be guaranteed to be large by the row weight of all rows and / or the column weight of all columns in the second sub-matrix block.

[0159] The row weight of a parity check matrix refers to the total number of cyclic shifts of the identity matrix indicated by all non-zero elements in a given row. For example, elements of type 1 include 1 cyclic shift, elements of type 2 include 2 cyclic shifts, and elements of type 3 include 3 cyclic shifts. Similarly, the column weight of a parity check matrix refers to the total number of cyclic shifts of the identity matrix indicated by all non-zero elements in a given column.

[0160] In one embodiment, the parity check core matrix of the parity check matrix is ​​composed of rows 0 to p-1 and columns 0 to g-1 of the parity check matrix, where p is equal to 2, 3, 4, 5, or 6, and g is equal to the sum of p and the number of systematic columns of the parity check matrix, where the number of systematic columns is equal to the difference between the number of columns and the number of rows of the parity check matrix.

[0161] The core matrix of the fundamental graph matrix, also known as the fundamental graph core matrix, is composed of rows 0 to mb0-1 and columns 0 to nb0-1 of the fundamental graph matrix. Here, nb0 can be represented as g, and mb0 as p.

[0162] p can be the number of rows in the parity check core matrix, which is equal to the number of rows in the first sub-matrix block and equal to the number of rows in the second (or third) sub-matrix block.

[0163] In one embodiment, the column weight of all columns in the parity check core matrix of the parity check matrix is ​​greater than 1, so as to ensure that the parity check core matrix has a large column weight.

[0164] In one embodiment, the parity check matrix includes at least three of the first-type elements in the parity check core matrix to avoid excessive column weighting in the parity check core matrix.

[0165] In one embodiment, the information bit sequence is one of C subsequences obtained by dividing a transport block (with a bit count equal to the transport block size (TBS)) into code blocks, where C is an integer greater than 0. In a specific example, C is an integer greater than 1. In a specific example, the TBS is an integer greater than or equal to one of the following: 6144, 8424, 16848, or 16384. In a specific example, the TBS is greater than or equal to a first threshold, where the first threshold is an integer greater than or equal to 8192. In one example, the first threshold is equal to 8424 * v, where v is an integer greater than 1. In one example, v is equal to 1, 2, 3, 4, 5, 6, 7, 8, 9, or 10.

[0166] In one embodiment, in the first sub-matrix block of the parity check matrix, row 0 includes kb elements of type 2, and the set of column indices corresponding to these kb elements is equal to the set {1 to kb-1} consisting of 0 to kb-1. In another embodiment, in the first sub-matrix block of the parity check matrix, row 0 includes kb-1 elements of type 2, and the set of column indices corresponding to these kb-1 elements is equal to the set {1 to kb-2} consisting of 0 to kb-2, or equal to {1 to kb-3, kb-1}. In yet another embodiment, in the first sub-matrix block of the parity check matrix, row 0 includes kb-2 elements of type 2, and the set of column indices corresponding to these kb-2 elements is equal to the set {1 to kb-3} consisting of 0 to kb-3, or equal to {1 to kb-4, kb-2}, or equal to {1 to kb-4, kb-1}. In another embodiment, in the first sub-matrix block of the parity check matrix, the 0th row includes kb-3 second-class elements. The set of column indices corresponding to these kb-3 second-class elements is equal to the set {1~kb-4} consisting of 0 to kb-4, or equal to {1~kb-5, kb-3}, or equal to {1~kb-5, kb-2}, or equal to {1~kb-5, kb-1}, or equal to {1~kb-6, kb-4, kb-2}, or equal to {1~kb-6, kb-3, kb-2}, or equal to {1~kb-6, kb-3, kb-1}.

[0167] In one embodiment, the first row of the first sub-matrix block of the parity check matrix includes kb elements of type 2, and the set of column indices corresponding to these kb elements is equal to the set {1 to kb-1} consisting of 0 to kb-1. In another embodiment, the first row of the first sub-matrix block of the parity check matrix includes kb-1 elements of type 2, and the set of column indices corresponding to these kb-1 elements is equal to the set {1 to kb-2} consisting of 0 to kb-2, or equal to {1 to kb-3, kb-1}. In yet another embodiment, the first row of the first sub-matrix block of the parity check matrix includes kb-2 elements of type 2, and the set of column indices corresponding to these kb-2 elements is equal to the set {1 to kb-3} consisting of 0 to kb-3, or equal to {1 to kb-4, kb-2}, or equal to {1 to kb-4, kb-1}. In another embodiment, in the first sub-matrix block of the parity check matrix, the first row includes kb-3 second-class elements. The set of column indices corresponding to these kb-3 second-class elements is equal to the set {1~kb-4} consisting of 0 to kb-4, or equal to {1~kb-5, kb-3}, or equal to {1~kb-5, kb-2}, or equal to {1~kb-5, kb-1}, or equal to {1~kb-6, kb-4, kb-2}, or equal to {1~kb-6, kb-3, kb-2}, or equal to {1~kb-6, kb-3, kb-1}.

[0168] In one embodiment, in the first sub-matrix block of the parity check matrix, the second row includes kb elements of type 2, and the set of column indices corresponding to these kb elements is equal to the set {1 to kb-1} consisting of 0 to kb-1. In another embodiment, in the first sub-matrix block of the parity check matrix, the second row includes kb-1 elements of type 2, and the set of column indices corresponding to these kb-1 elements is equal to the set {1 to kb-2} consisting of 0 to kb-2, or equal to {1 to kb-3, kb-1}. In yet another embodiment, in the first sub-matrix block of the parity check matrix, the second row includes kb-2 elements of type 2, and the set of column indices corresponding to these kb-2 elements is equal to the set {1 to kb-3} consisting of 0 to kb-3, or equal to {1 to kb-4, kb-2}, or equal to {1 to kb-4, kb-1}. In another embodiment, in the first sub-matrix block of the parity check matrix, the second row includes kb-3 second-class elements. The set of column indices corresponding to these kb-3 second-class elements is equal to the set {1~kb-4} consisting of 0 to kb-4, or equal to {1~kb-5, kb-3}, or equal to {1~kb-5, kb-2}, or equal to {1~kb-5, kb-1}, or equal to {1~kb-6, kb-4, kb-2}, or equal to {1~kb-6, kb-3, kb-2}, or equal to {1~kb-6, kb-3, kb-1}.

[0169] In one exemplary embodiment, this application also provides a sequence processing method. Figure 3 This is a schematic flowchart of another sequence processing method provided in this application embodiment. This method can be adapted to reduce the computational load of iterative decoding of LDPC encoding. The method can be executed by a sequence processing device, which can be implemented in software and / or hardware and integrated on a second communication node. The second communication node can be any type of communication node for receiving information. Details not covered in this embodiment can be found in the above embodiments and will not be elaborated upon here.

[0170] like Figure 3 As shown, this application provides a sequence processing method, including the following operations:

[0171] S310. Obtain the soft bit sequence to be decoded.

[0172] The soft bit sequence to be decoded can be any soft bit sequence to be decoded. This operation obtains the soft bit sequence to be decoded from the first communication node, and then decodes it to obtain the information bit sequence of the first communication node.

[0173] S320. Perform LDPC decoding on the soft bit sequence to be decoded according to the parity check matrix to obtain the information bit sequence.

[0174] The decoding methods in this embodiment can correspond to the encoding methods, which will not be elaborated here. For example, the parity check matrix determined by the parity check matrix can be used to decode the soft bit sequence to be decoded to obtain the information bit sequence. Alternatively, the parity check matrix and the boost value can be used to decode the soft bit sequence to be decoded to obtain the information bit sequence.

[0175] The parity check matrix contains at least two types of elements: a first type and a second type. The first type of elements indicates elements associated with a cyclic shift of one identity matrix, and the second type of elements indicates elements associated with a cyclic shift of E identity matrices, where E can be equal to 2.

[0176] This application provides a sequence processing method for decoding based on a parity check matrix containing at least first-class elements and second-class elements. Since the parity check matrix includes second-class elements, which can indicate elements associated with cyclic shifts of two identity matrices, the parity check matrix used for encoding can include more elements, reducing the amount of decoding computation.

[0177] Based on the above embodiments, modified embodiments of the above embodiments are proposed. It should be noted that, in order to keep the description brief, only the differences from the above embodiments are described in the modified embodiments.

[0178] In one embodiment, the parity check matrix includes a parity check core matrix, wherein the ratio of the number of second-type elements in the parity check core matrix to the total number of all elements in the parity check core matrix is ​​greater than or equal to X%, and X is a real number greater than or equal to 40 and less than 100.

[0179] In one embodiment, X equals one of the following: 50, 60, 70, 75, 80, 83, 85, 90, 91, 93, 94, 95. In one specific example, X equals 94. In one specific example, X equals 83. In one specific example, X equals 91. In one specific example, X equals 93.

[0180] In one embodiment, the parity check matrix includes a parity check core matrix, wherein the number of second-type elements in the parity check core matrix is ​​greater than the number of first-type elements in the parity check core matrix.

[0181] In one embodiment, the parity check core matrix further includes a third type of element, which indicates elements associated with cyclic shifts of the three identity matrices, wherein the number of the third type of element satisfies one or more of the following:

[0182] The number of elements in category 2 is greater than the number of elements in category 3;

[0183] The number of elements in the third category is greater than the number of elements in the first category;

[0184] The number of elements in the third class is greater than the number of elements in the zero class, where the zero class elements indicate the elements of the all-zero matrix.

[0185] In one embodiment, the parity check matrix includes a parity check core matrix, wherein the number of elements of type 1 in the parity check core matrix is ​​greater than the number of elements of type 0 in the parity check core matrix.

[0186] In one embodiment, all elements in column q of the parity check core matrix in the parity check matrix are elements of type 2, where q is a positive integer less than or equal to the number of system columns, and the number of system columns is equal to the difference between the number of columns and the number of rows of the parity check matrix.

[0187] In one embodiment, q is greater than Y times the number of columns in the system, where Y is a real number greater than or equal to 0.5 and less than or equal to 1. In a specific example, Y can be equal to one of the following: 0.5, 0.6, 0.7, 0.8, 0.9, or 1.

[0188] In one embodiment, all elements in the first q columns of the parity check core matrix are elements of type 2.

[0189] In one embodiment, the number of second-class elements in the parity check core matrix of the parity check matrix is ​​greater than or equal to S times the number of first-class elements in the parity check core matrix, where S is a real number greater than 1.

[0190] In one embodiment, S equals one of the following: 1.2, 1.5, 1.8, 2, 2.5, 2.8, 3.0, 3.5, 3.8, 4, 4.5, 5, 5.4, 5.6, 6, 7, 8, 8.3, 9.6, 11, 12, 12.3, 13.6, 15, 16.3. In some examples, the number of systematic columns of the parity check matrix is ​​less than or equal to 8, and S is a real number greater than 2 and less than 6; in one specific example, S equals 4 or 5.6. In some examples, the number of systematic columns of the parity check matrix is ​​less than or equal to 10, and S is a real number greater than 3 and less than 7; in one specific example, S equals 5 or 7. In some examples, the number of systematic columns of the parity check matrix is ​​less than or equal to 12, and S is a real number greater than 3 and less than 8.33; in one specific example, S equals 6 or 8.3. In some examples, the number of systematic columns of the parity check matrix is ​​less than or equal to 14, and S is a real number greater than 3 and less than 9.67; in one specific example, S equals 7 or 9.6. In some examples, the number of systematic columns of the parity check matrix is ​​less than or equal to 16, and S is a real number greater than 3 and less than 11; in one specific example, S equals 8 or 11. In some examples, the number of systematic columns of the parity check matrix is ​​less than or equal to 18, and S is a real number greater than 3 and less than 12.34; in one specific example, S equals 9 or 12.3. In some examples, the number of systematic columns of the parity check matrix is ​​less than or equal to 20, and S is a real number greater than 3 and less than 13.67; in one specific example, S equals 10 or 13.6. In some examples, the number of systematic columns of the parity check matrix is ​​less than or equal to 22, and S is a real number greater than 3 and less than 15; in one specific example, S equals 11 or 15. In some examples, the number of columns in the parity check matrix is ​​less than or equal to 24, and S is a real number greater than 3 and less than 16.34; in one specific example, S equals 12 or 16.3. In some examples, the number of rows in the parity check core matrix is ​​equal to 2.

[0191] In one embodiment, the number of second-class elements in the parity check matrix is ​​greater than or equal to U times the number of third-class elements in the parity check matrix, where U is a real number greater than 1.

[0192] In one embodiment, U is equal to one of the following: 1.2, 1.5, 1.8, 2, 2.5, 2.8, 3.0, 3.5, 3.8, 4, 4.5, 5, 5.4.

[0193] In one embodiment, the row weight of the i-th row of the parity check core matrix in the parity check matrix is ​​greater than or equal to T times the number of system columns, where T is a real number greater than 1, the number of system columns is equal to the difference between the number of columns and the number of rows of the parity check matrix, and the row weight indicates the total number of cyclic shift bits of the identity matrix indicated by all non-zero elements in the corresponding row.

[0194] In one embodiment, T is equal to one of the following: 1.2, 1.5, 1.6, 1.7, 1.8, 1.9, 2.0, 2.1.

[0195] In one embodiment, T can be a real number greater than 1.5 and less than 2.5. In some examples, the number of systematic columns of the parity check matrix is ​​less than or equal to 8, and T is a real number greater than or equal to 2 and less than or equal to 2.375. In some examples, the number of systematic columns of the parity check matrix is ​​less than or equal to 10, and T is a real number greater than or equal to 1.9 and less than or equal to 2.3. In some examples, the number of systematic columns of the parity check matrix is ​​less than or equal to 12, and T is a real number greater than or equal to 1.83 and less than or equal to 2.25. In some examples, the number of systematic columns of the parity check matrix is ​​less than or equal to 14, and T is a real number greater than or equal to 1.78 and less than or equal to 2.2143. In some examples, the number of systematic columns of the parity check matrix is ​​less than or equal to 16, and T is a real number greater than or equal to 1.75 and less than or equal to 2.1875. In some examples, the parity check matrix has 18 or fewer systematic columns, and T is a real number greater than or equal to 1.7222 and less than or equal to 2.1667. In some examples, the parity check matrix has 20 or fewer systematic columns, and T is a real number greater than or equal to 1.7 and less than or equal to 2.15. In some examples, the parity check matrix has 22 or fewer systematic columns, and T is a real number greater than or equal to 1.6818 and less than or equal to 2.1364. In some examples, the parity check matrix has 24 or fewer systematic columns, and T is a real number greater than or equal to 1.6667 and less than or equal to 2.125. In some examples, the parity check core matrix has 2 or 3 rows.

[0196] In one embodiment, i equals one of the following: 0, 1, 2, 3.

[0197] In one embodiment, the number of system columns containing only type 2 elements in the parity check core matrix of the parity check matrix is ​​greater than or equal to the difference between the number of system columns and A, wherein the number of system columns is equal to the difference between the number of columns and the number of rows of the parity check matrix, and the system columns include the number of system columns in the parity check core matrix, wherein A is equal to 0, 1, 2, 3, 4 or 5.

[0198] In one embodiment, the parity check matrix contains only elements of type 0 and type 1 from row p to the last row, wherein the elements of type 0 are used to indicate the elements of the all-zero square matrix, and p is equal to 2, 3, 4, 5, 6, 7, 8, 9 or 10.

[0199] In one embodiment, the difference between the number of columns and the number of rows of the parity check matrix is ​​an integer greater than 6 and less than 36.

[0200] In one embodiment, the difference between the number of columns and the number of rows of the parity check matrix is ​​equal to 24, 23, 22, 21, 20, 18, 16, 14, 12, 10, or 8.

[0201] In one embodiment, the parity check matrix includes five sub-matrix blocks. The first and second sub-matrix blocks constitute the parity check core matrix. The first, second, and third sub-matrix blocks have the same number of rows. The third and fifth sub-matrix blocks have the same number of columns. The fourth sub-matrix block has the same number of columns as the parity check core matrix. The fourth and fifth sub-matrix blocks have the same number of rows. The first sub-matrix block is located at the top left corner of the parity check matrix. The second sub-matrix block is located adjacent to and to the right of the first sub-matrix block. The third sub-matrix block is located adjacent to and to the right of the second sub-matrix block. The fourth sub-matrix block is located at the bottom left corner of the parity check matrix. The fifth sub-matrix block is located at the bottom right corner of the parity check matrix.

[0202] In one embodiment, the number of rows in the first submatrix block is equal to 2, 3, 4, 5, 6, 7, or 8.

[0203] In one embodiment, the minimum column weight of the first submatrix block is equal to 2, 3, 4, 5, or 6.

[0204] In one embodiment, the second sub-matrix block includes at least one second-type element, which comprises two shift values ​​equal to 1 and 2, respectively. In another embodiment, all first-type elements in the second sub-matrix block have a shift value equal to 0.

[0205] In one embodiment, the minimum column weight of the fourth sub-matrix block is equal to 4, 5, 6, 7, 8, 9, 10, or 11.

[0206] In one embodiment, the maximum column weight of the fourth sub-matrix block is equal to 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22 or 24.

[0207] In one embodiment, the row weight of the j-th row of the first submatrix block is greater than or equal to R times the number of columns in the system, where R is a real number greater than 1, and the number of columns in the system is equal to the difference between the number of columns and the number of rows in the parity check matrix.

[0208] In one embodiment, the average row weight of the first submatrix block is greater than or equal to E times the number of columns in the system, where E is a real number greater than 1, and the number of columns in the system is equal to the difference between the number of columns and the number of rows in the parity check matrix.

[0209] In one embodiment, the average row weight of the parity check core matrix in the parity check matrix is ​​greater than or equal to W times the number of system columns, where W is a real number greater than 1, and the number of system columns is equal to the difference between the number of columns and the number of rows of the parity check matrix.

[0210] In one embodiment, the second sub-matrix block satisfies one of the following:

[0211] The row weight of all rows in the second sub-matrix block is greater than or equal to 2;

[0212] In the second submatrix block, the column weight of all columns is greater than or equal to 2.

[0213] In one embodiment, the parity check core matrix of the parity check matrix is ​​composed of rows 0 to p-1 and columns 0 to g-1 of the parity check matrix, where p is equal to 2, 3, 4, 5, or 6, and g is equal to the sum of p and the number of systematic columns of the parity check matrix, where the number of systematic columns is equal to the difference between the number of columns and the number of rows of the parity check matrix.

[0214] In one embodiment, the column weight of all columns in the parity check core matrix of the parity check matrix is ​​greater than 1.

[0215] In one embodiment, the parity check matrix includes at least three of the first-type elements in the parity check core matrix.

[0216] In one embodiment, the decoded output information bit sequence is a subsequence comprising a transport block (TBS) with a bit count equal to the TBS. In one specific example, the TBS is an integer greater than or equal to one of the following: 6144, 8424, 16848, or 16384. In another specific example, the TBS is greater than or equal to a first threshold, where the first threshold is an integer greater than or equal to 8192. In one example, the first threshold is equal to 8424 * v, where v is an integer greater than 1. In one example, v is equal to 1, 2, 3, 4, 5, 6, 7, 8, 9, or 10.

[0217] In one embodiment, the decoded output information bit sequence is one of C subsequences obtained by dividing a transport block (with a bit count equal to the transport block size (TBS)) into code blocks, where C is an integer greater than 0. In a specific example, C is an integer greater than 1.

[0218] The sequence processing method provided in this application can be considered as an LDPC encoding processing method. The following is an exemplary description of the sequence processing method:

[0219] In one example, LDPC encoding is performed on C information bit sequences to obtain C encoded bit sequences. Each information bit sequence contains K bits, and each encoded bit sequence contains N bits. Let the C information bit sequences be a... 0 ,a 1 ,a 2 ,...,a C-1 Each information bit sequence contains K bits, where K is a positive integer. The r-th information bit sequence a... r for r equals 0, 1, 2, ..., C-1, where C is an integer greater than 0. K equals the product of the systematic number of columns in the parity check matrix and the lift value, where the lift value is a positive integer.

[0220] The C bits of information are LDPC encoded to obtain C encoded bit sequences, where the C encoded bit sequences are b respectively. 0 ,b 1 ,b 2 ,...,b C-1 Among them, the r-th encoded bit sequence b r for r equals 0, 1, 2, ..., C-1. N equals the product of the number of columns in the parity check matrix and the lift value, where the lift value is a positive integer.

[0221] In this example, the lift value Z of the LDPC encoding is equal to 64. The parity check matrix of the LDPC encoding has 48 rows (row indices i = 0, 1, 2, ..., 47) and 72 columns (column indices j = 0, 1, 2, ..., 71). Figure 4 This is a schematic diagram of the structure of a parity check matrix provided in an embodiment of this application, such as... Figure 4 The example shown has a parity check matrix comprising five sub-matrix blocks: A, B, C, D, and E are referred to as the first, second, third, fourth, and fifth sub-matrix blocks, respectively. Sub-matrix blocks A (the first sub-matrix block) and B (the second sub-matrix block) constitute the core parity check matrix. The difference between the number of columns and rows in the parity check matrix equals the system column count kb. For example, in this example, the number of columns is 72 and the number of rows is 48, so the system column count kb = 24.

[0222] By representing elements of type 0 in the parity check matrix as 0, elements of type 1 as 1, elements of type 2 as 2, and elements of type 3 as 3, we can obtain the basic graph matrix corresponding to the parity check matrix. That is, the basic graph matrix contains at least one of the following elements: 0, 1, 2, and 3. Specifically, the '0' element in the basic graph matrix corresponds to the element of type 0 in the parity check matrix, the '1' element corresponds to the element of type 1, the '2' element corresponds to the element of type 2, and the '3' element corresponds to the element of type 3.

[0223] Similar to dividing the parity check matrix into 5 sub-matrix blocks, the basic graph matrix can be divided into 5 sub-matrix blocks: A, B, C, D, and E. Sub-matrix block A in the basic graph matrix corresponds to the result of replacing all elements in sub-matrix block A of the parity check matrix with corresponding values ​​(e.g., 0, 1, 2, or 3). Sub-matrix block B in the basic graph matrix corresponds to the result of replacing all elements in sub-matrix block B of the parity check matrix with corresponding values ​​(e.g., 0, 1, 2, or 3). Sub-matrix block C in the basic graph matrix corresponds to the result of replacing all elements in sub-matrix block C of the parity check matrix with corresponding values ​​(e.g., 0, 1, 2, or 3). Sub-matrix block D in the basic graph matrix corresponds to the result of replacing all elements in sub-matrix block D of the parity check matrix with corresponding values ​​(e.g., 0, 1, 2, or 3). In this context, submatrix block E in the fundamental graph matrix corresponds to the result of replacing all elements in submatrix block E of the parity check matrix with corresponding values ​​(e.g., 0, 1, 2, or 3). Similarly, the core matrix of the fundamental graph (i.e., the core matrix of the fundamental graph matrix) is also composed of submatrix blocks A and B of the fundamental graph matrix.

[0224] In this example, the size of the basic graph core matrix is ​​2 rows and 26 columns. Table 1 is a schematic table of a basic graph core matrix provided in an embodiment of this application. The specific basic graph core matrix is ​​shown in Table 1 below. The basic graph core matrix is ​​shown in tabular form here, and the form of the basic graph core matrix is ​​not limited. It can also be in matrix form:

[0225] Table 1. Schematic diagram of a basic graph core matrix provided in the embodiments of this application.

[0226] 2 2 3 2 2 2 2 2 3 1 2 2 1 2 2 2 3 2 2 3 2 2 2 3 1 1 2 2 1 2 2 3 2 2 1 3 2 2 3 2 2 2 2 2 2 2 2 2 2 1 2 1

[0227] In this example, the number of elements of type 0 in the core matrix of the basic graph is 0, the number of elements of type 1 (i.e., the number of elements with a value of 1) in the core matrix of the basic graph is 8, the number of elements of type 2 (i.e., the number of elements with a value of 2) in the core matrix of the basic graph is 36, and the number of elements of type 3 (i.e., the number of elements with a value of 3) in the core matrix of the basic graph is 8.

[0228] In this example, the corresponding parity check core matrix is ​​also 2 rows and 26 columns. Table 2 is a schematic table of a parity check core matrix provided in this application embodiment. As shown in Table 2, the row indices are row 0 and row 1, and the column indices are columns 0 to 25. The matrix formed by row indices 0 and 1 and column indices 0 to 23 is sub-matrix block A of the parity check matrix; and the matrix formed by row indices 0 and 1 and column indices 24 to 25 is sub-matrix block B of the parity check matrix. It can be seen that the element in row 0 and column 0 is of type 2, corresponding to the element value of row 0 and column 0 of the basic graph core matrix in Table 1, which is equal to 2; the element in row 0 and column 2 is of type 3, corresponding to the element value of row 0 and column 2 of the basic graph core matrix in Table 1, which is equal to 3.

[0229] Table 2. Schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0230]

[0231] Table 3 is a schematic table of a fourth sub-matrix block provided in an embodiment of this application. In this example, the corresponding sub-matrix block D of the parity check matrix, also known as the fourth sub-matrix block, as shown in Table 3, includes 46 rows and 26 columns. The sub-matrix block D of the parity check matrix includes only elements of type 0 and elements of type 1. Elements of type 0 are represented by null values, and elements of type 1 are non-negative integer values. Elements of type 0 can also be represented by null values ​​(i.e., empty values) or by -1.

[0232] Table 3. Schematic diagram of a fourth sub-matrix block provided in the embodiments of this application.

[0233]

[0234] In this example, all elements in the corresponding sub-matrix block C of the parity check matrix, also known as the third sub-matrix block, are elements of type 0. In the corresponding sub-matrix block E of the parity check matrix, also known as the fifth sub-matrix block, all elements on the diagonal are elements of type 1 with an element value (shift value) equal to 0, and all elements off the diagonal are elements of type 0.

[0235] In this example, the number of systematic columns in the LDPC encoding is kb = 24, and the lift value Z is 64. Therefore, the number of bits in the information bit sequence is equal to the product of the number of systematic columns and the lift value, i.e., K = 24 * 64 = 1536. Also, the number of columns in the parity check matrix of the LDPC encoding is nb = 72. Therefore, the number of bits in the encoded bit sequence is equal to the product of the number of columns in the parity check matrix and the lift value, i.e., N = 72 * 64 = 4608. That is, LDPC encoding an input information bit sequence of 1536 bits yields an encoded bit sequence of 4608 bits.

[0236] This application allows for the cyclic selection of a rate-matched bit sequence from an obtained encoded bit sequence. The starting position of this cyclic selection is the index of the first bit in the encoded bit sequence, i.e., the starting position is 0. For example, for a rate-matched bit sequence with 1600 bits, the corresponding rate-matched bit sequence can be obtained by sequentially selecting from bit 0 to bit 1599. This rate-matched bit sequence can then be transmitted.

[0237] The parity check core matrix contains a significant number of Type 2 elements, allowing for greater flexibility in the design of the LDPC code's parity check matrix. For example, a more compact matrix dimension can be used, with the core matrix supporting only two rows. Furthermore, this enables LDPC codes to support very high coding rates, resulting in superior performance. Additionally, it allows for better performance with fewer iterations during iterative confidence-pass decoding at the receiver, meaning that iterative confidence-pass decoding converges quickly.

[0238] Figure 5 This is a performance comparison chart of LDPC codes under different iteration numbers provided in an embodiment of this application. See also... Figure 5 To compare the decoding performance of LDPC codes under different iteration numbers, the dashed line represents the block error ratio (BLER) curve of the LDPC code for 5G, and the solid line represents the BLER curve of the LDPC code provided in this application. Figure 5 (1) shows the performance comparison of confidence transfer decoding with a maximum number of iterations (i.e., lter) of 2. It can be seen that the performance of the LDPC code provided in this application is better than that of the LDPC code of 5G. The performance gain can reach 1.5dB when BLER=0.01. Figure 5(2) shows the performance comparison of the confidence transfer decoding with a maximum number of iterations of 4. It can be seen that the performance of the LDPC code provided in this application is better than that of the LDPC code of 5G, with a performance gain of about 0.5dB.

[0239] In one example, the C-part information bit sequence is obtained by adding a first-level CRC check bit sequence to the transport block, followed by code block segmentation, adding a second-level CRC check bit sequence, and padding bits. The size of the transport block is greater than a first threshold H, where the first threshold H is equal to at least one of the following: 8424, 16384, or 8424*v, where v is an integer greater than 1. In a specific example, both the first-level CRC check bit sequence and the second-level CRC check bit sequence are 24 bits. The padding bits are equal to 0 or null, and these padding bits are known to both the sender and receiver; they are not included in the bit sequence sent to the receiver.

[0240] In another example, this embodiment provides a different parity check matrix. In this example, the parity check core matrix of the LDPC-encoded parity check matrix has the following characteristics: the parity check core matrix contains only type 1 elements and type 2 elements, wherein the number of type 2 elements is greater than or equal to S times the number of type 1 elements in the core matrix, where S is a real number greater than 1. For example, S equals 5.5.

[0241] In a specific example, Table 4 is a schematic table of another parity check core matrix provided in the embodiments of this application. The parity check core matrix is ​​shown in Table 4. In Table 4, the row index is 0 to 1, and the column index is 0 to 25. The number of elements containing the first type is 8, and the number of elements containing the first type is 44.

[0242] Table 4. Schematic diagram of another parity check core matrix provided in the embodiments of this application.

[0243]

[0244] In this example, Table 5 is a schematic table of another basic graph core matrix provided in the embodiments of this application. Referring to Table 5, the corresponding basic graph core matrix is ​​shown below:

[0245] Table 5. Schematic diagram of another basic graph core matrix provided in the embodiments of this application.

[0246] 2 2 2 2 2 2 2 2 2 1 2 2 1 2 2 2 2 2 2 2 2 2 2 2 1 1 2 2 1 2 2 2 2 2 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 1

[0247] In a specific example, the core matrix in the parity check matrix of LDPC encoding is the matrix shown in Table 4. In this example, the number of bits in the input information bit sequence for LDPC encoding is equal to 1536. That is, LDPC encoding is performed on the information bit sequence with an input of 1536 bits to obtain the encoded bit sequence.

[0248] In another example, the number of systematic columns in the parity check matrix is ​​24. In this example, the LDPC-encoded fundamental graph core matrix has the following characteristics: it contains only elements of type 1 and type 2, where the number of type 2 elements is greater than S times the number of type 1 elements in the core matrix, where S is a real number greater than 1. The number of columns in the LDPC-encoded fundamental graph core matrix containing only type 2 elements is 20. The number of systematic columns in the LDPC-encoded fundamental graph core matrix containing only type 2 elements is 22.

[0249] In a specific example, Table 6 is a schematic table of another basic graph core matrix provided in the embodiments of this application. The basic graph core matrix of LDPC encoding is shown in Table 6. In the basic graph core matrix, the number of elements containing type 1 is 5, and the number of elements containing type 2 is 47. In all systematic columns of the basic graph core matrix, the number of elements containing type 1 is 2, and the number of elements containing type 2 is 46. In this example, the boost value is equal to 352, so the length of the information bit sequence is equal to K = 24 * 352 = 8448.

[0250] Table 6. Schematic diagram of another basic graph core matrix provided in the embodiments of this application.

[0251] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 2 2 2 2 2 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1

[0252] In a specific example, Table 7 is a schematic table of another parity check core matrix provided in the embodiments of this application. The parity check core matrix of LDPC encoding is shown in Table 7. The encoded bit sequence is obtained by performing LDPC encoding on the input bit sequence containing the information bit sequence shown in Table 4.

[0253] Table 7. Schematic diagram of another parity check core matrix provided in the embodiments of this application.

[0254]

[0255] In another example, the number of systematic columns in the parity check matrix is ​​23. In this example, the LDPC-encoded fundamental graph core matrix has the following characteristics: the number of columns containing only type 2 elements in the LDPC-encoded fundamental graph core matrix is ​​19. The number of systematic columns containing only type 2 elements in the LDPC-encoded fundamental graph core matrix is ​​19. In this example, the boost value is 128, so the length of the information bit sequence is K = 23 * 128 = 2944.

[0256] In a specific example, Table 8 is a schematic table of another basic graph core matrix provided in the embodiments of this application. The LDPC-encoded basic graph core matrix is ​​shown in Table 8. In the basic graph core matrix, the number of elements containing type 1 is 7, and the number of elements containing type 2 is 43. In all systematic columns of the basic graph core matrix (corresponding to the first sub-matrix block of the basic graph matrix), the number of elements containing type 1 is 4, and the number of elements containing type 2 is 42.

[0257] Table 8. Schematic diagram of another basic graph core matrix provided in the embodiments of this application.

[0258] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 2 2 1 2 1 1 2 2 2 2 2 2 2 1 2 2 2 2 2 2 1 2 2 2 2 2 2 2 2 2 1

[0259] In a specific example, Table 9 is a schematic table of another parity check core matrix provided in the embodiments of this application. The parity check core matrix of LDPC encoding is shown in Table 9.

[0260] Table 9. Schematic diagram of another parity check core matrix provided in the embodiments of this application.

[0261]

[0262] In yet another example, the number of systematic columns in the parity check matrix is ​​22. In this example, the LDPC-encoded fundamental graph core matrix has the following characteristics: the number of columns containing only type 2 elements in the LDPC-encoded fundamental graph core matrix is ​​22. The number of systematic columns containing only type 2 elements in the LDPC-encoded fundamental graph core matrix is ​​22. In this example, the boost value is 96.

[0263] In a specific example, Table 10 is another schematic table of the basic graph core matrix provided in the embodiments of this application. The basic graph core matrix of LDPC encoding is shown in Table 10. In the basic graph core matrix, the number of elements containing type 1 is 3, and the number of elements containing type 2 is 45. In all system columns of the basic graph core matrix (except for the last two columns in Table 10), the number of elements containing type 1 is 0, and the number of elements containing type 2 is 44.

[0264] Table 10. Another schematic table of the basic core matrix provided in the embodiments of this application.

[0265] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1

[0266] In a specific example, Table 11 is a schematic table of a parity check core matrix provided in an embodiment of this application. The parity check core matrix encoded by LDPC is shown in Table 11.

[0267] Table 11 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0268]

[0269] In yet another example, the number of systematic columns in the parity check matrix is ​​20. In this example, the LDPC-encoded fundamental graph core matrix has the following characteristics: the number of columns containing only type 2 elements in the LDPC-encoded fundamental graph core matrix is ​​18. The number of systematic columns containing only type 2 elements in the LDPC-encoded fundamental graph core matrix is ​​18.

[0270] In a specific example, Table 12 is a schematic table of another basic graph core matrix provided in the embodiments of this application. The basic graph core matrix encoded by LDPC is shown in Table 12. In the basic graph core matrix, the number of elements containing type 1 is 5, and the number of elements containing type 2 is 39. In all the systematic columns of the basic graph core matrix, the number of elements containing type 1 is 2, and the number of elements containing type 2 is 38.

[0271] Table 12 is a schematic diagram of another basic graph core matrix provided in the embodiments of this application.

[0272] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1

[0273] In a specific example, Table 13 is a schematic table of another parity check core matrix provided in the embodiments of this application. The parity check core matrix of LDPC encoding is shown in Table 13.

[0274] Table 13 is a schematic diagram of another parity check core matrix provided in the embodiments of this application.

[0275]

[0276] In yet another example, the number of systematic columns in the parity check matrix is ​​16. In this example, the LDPC-encoded fundamental graph core matrix has the following characteristics: the number of columns containing only type 2 elements in the LDPC-encoded fundamental graph core matrix is ​​16. The number of systematic columns containing only type 2 elements in the LDPC-encoded fundamental graph core matrix is ​​16.

[0277] In a specific example, Table 14 is a schematic table of another basic graph core matrix provided in the embodiments of this application. The basic graph core matrix encoded by LDPC is shown in Table 14. In the basic graph core matrix, the number of elements containing type 1 is 3, and the number of elements containing type 2 is 33. In all system columns of the basic graph core matrix, the number of elements containing type 1 is 0, and the number of elements containing type 2 is 32.

[0278] Table 14 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0279] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1

[0280] In a specific example, Table 15 is a schematic table of another parity check core matrix provided in the embodiments of this application. The parity check core matrix of LDPC encoding is shown in Table 15.

[0281] Table 15 is a schematic diagram of another parity check core matrix provided in the embodiments of this application.

[0282]

[0283] In another example, the LDPC-encoded parity check matrix has 22 systematic columns. The first submatrix contains only elements of type 2. Tables 16 and 17 below show examples of the basic graph core matrix and parity check core matrix in this example. Figure 6 This is a performance comparison chart of a confidence-transfer decoding method with a maximum of 4 iterations, provided in an embodiment of this application. For example... Figure 6 The image shows a performance comparison of the confidence-passive decoding with a maximum of 4 iterations in this example.

[0284] Table 16 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0285] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1

[0286] Table 17 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0287]

[0288] In another example, the LDPC-encoded parity check matrix has a systematic column count of 22. The first submatrix contains only one element of type 1, with the rest being elements of type 2. Tables 18 and 19 below show examples of the basic graph core matrix and parity check core matrix in this example. Figure 7 This is a performance comparison chart of another confidence-transfer decoding method with a maximum iteration count of 4 provided in the embodiments of this application, as shown in the figure. Figure 7The image shows a performance comparison of the confidence-passive decoding with a maximum of 4 iterations in this example.

[0289] Table 18 is a schematic diagram of another basic graph core matrix provided in the embodiments of this application.

[0290] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 2 2 2 2 2 2 2 2 1

[0291] Table 19 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0292]

[0293] In another example, the LDPC-encoded parity matrix has a systematic column count of 22. The first submatrix of the parity core matrix contains only one element of type 1, while the rest are elements of type 2. Tables 20 and 21 below show examples of the basic graph core matrix and parity core matrix in this example. Figure 8 This is a performance comparison chart of another confidence-transfer decoding method with a maximum iteration count of 4 provided in the embodiments of this application, as shown in the figure. Figure 8 The image shows a performance comparison of the confidence-passive decoding with a maximum of 4 iterations in this example.

[0294] Table 20 is a schematic diagram of another basic graph core matrix provided in the embodiments of this application.

[0295] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 2 2 2 2 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1

[0296] Table 21 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0297]

[0298] Tables 22 and 23 below show examples of the basic graph core matrix and parity check core matrix in this example. The first submatrix of the parity check core matrix contains only two elements of type 1, and the rest are elements of type 2. Figure 9 This is a performance comparison chart of another confidence-transfer decoding method with a maximum of 4 iterations provided in the embodiments of this application, as shown in the figure. Figure 9 The image shows a performance comparison of the confidence-passive decoding with a maximum of 4 iterations in this example.

[0299] Table 22 is a schematic diagram of another basic graph core matrix provided in the embodiments of this application.

[0300] 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 2 2 2 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1

[0301] Table 23 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0302]

[0303] Tables 24 and 25 below show examples of the basic graph core matrix and parity check core matrix in this example. The first submatrix of the parity check core matrix contains only two elements of type 1, and the rest are elements of type 2. Figure 10 This is a performance comparison chart of another confidence-transfer decoding method with a maximum of 4 iterations provided in the embodiments of this application, as shown in the figure. Figure 10 The image shows a performance comparison of the confidence-passive decoding with a maximum of 4 iterations in this example.

[0304] Table 24 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0305] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1

[0306] Table 25 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0307]

[0308] Tables 26 and 27 below show examples of the basic graph core matrix and parity check core matrix in this example. The first submatrix of the parity check core matrix contains only two elements of type 1, and the rest are elements of type 2. Figure 11 This is a performance comparison chart of another confidence-transfer decoding method with a maximum of 4 iterations provided in the embodiments of this application, as shown in the figure. Figure 11 The image shows a performance comparison of the confidence-passive decoding with a maximum of 4 iterations in this example.

[0309] Table 26 is a schematic diagram of another basic graph core matrix provided in the embodiments of this application.

[0310] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1

[0311] Table 27 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0312]

[0313] Tables 28 and 29 below show examples of the basic graph core matrix and parity check core matrix in this example. The first submatrix of the parity check core matrix contains only 3 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 11 Similarly, I will not elaborate further.

[0314] Table 28 is a schematic diagram of another basic graph core matrix provided in the embodiments of this application.

[0315] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 2 2 1

[0316] Table 29. A schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0317]

[0318] Tables 30 and 31 below show examples of the basic graph core matrix and parity check core matrix in this example. The first submatrix of the parity check core matrix contains only 3 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 11 Similarly, I will not elaborate further.

[0319] Table 30 is a schematic diagram of another basic graph core matrix provided in the embodiments of this application.

[0320] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 2 2 1

[0321] Table 31 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0322]

[0323] Tables 32 and 33 below show examples of the basic graph core matrix and parity check core matrix in this example. The first submatrix of the parity check core matrix contains only 3 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 11 Similarly, I will not elaborate further.

[0324] Table 32 is a schematic diagram of another basic graph core matrix provided in the embodiments of this application.

[0325] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 2 2 1

[0326] Table 33 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0327]

[0328] Tables 34 and 35 below show examples of the basic graph core matrix and parity check core matrix in this example. The first submatrix of the parity check core matrix contains only 3 elements of type 1, and the rest are elements of type 2. Performance Comparison and Performance Figure 11 Similarly, I will not elaborate further.

[0329] Table 34 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0330] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 2 1 2 2 1

[0331] Table 35 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0332]

[0333] Tables 36 and 37 below show examples of the basic graph core matrix and parity check core matrix in this example. The first submatrix of the parity check core matrix contains only four elements of type 1, all in row 0; the rest are elements of type 2. Performance Comparison and Performance Figure 11 Similarly, I will not elaborate further.

[0334] Table 36 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0335] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1

[0336] Table 37 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0337]

[0338] Tables 38 and 39 below show examples of the basic graph core matrix and parity check core matrix in this example. The first submatrix of the parity check core matrix contains only 5 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 11 Similarly, I will not elaborate further.

[0339] Table 38 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0340] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 2 2 1

[0341] Table 39. A schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0342]

[0343]

[0344] Tables 40 and 41 below show examples of the basic graph core matrix and parity check core matrix in this example. The first submatrix of the parity check core matrix contains only 6 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 11 Similarly, I will not elaborate further.

[0345] Table 40 is a schematic diagram of another basic graph core matrix provided in the embodiments of this application.

[0346] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 1 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 2 2 2 1 2 1

[0347] Table 41 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0348]

[0349] Tables 42 and 43 below show examples of the basic graph core matrix and parity check core matrix in this example. The first submatrix of the parity check core matrix contains only 5 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 11 Similarly, I will not elaborate further.

[0350] Table 42 is a schematic diagram of another basic graph core matrix provided in the embodiments of this application.

[0351] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1

[0352] Table 43 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0353]

[0354] Tables 44 and 45 below show examples of the basic graph core matrix and parity check core matrix in this example. The first submatrix of the parity check core matrix contains only 6 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 11 Similarly, I will not elaborate further.

[0355] Table 44 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0356] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 2 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 2 2 1

[0357] Table 45 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0358]

[0359] Tables 46 and 47 below show examples of the basic graph core matrix and parity check core matrix in this example. The first submatrix of the parity check core matrix contains only 6 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 11 Similarly, I will not elaborate further.

[0360] Table 46 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0361] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1

[0362] Table 47 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0363]

[0364] Tables 48 and 49 below show examples of the basic graph core matrix and parity check core matrix in this example. The first submatrix of the parity check core matrix contains only 7 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 11 Similarly, I will not elaborate further.

[0365] Table 48 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0366] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 2 2 2 2 2 1

[0367] Table 49 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0368]

[0369] Tables 50 and 51 below show examples of the basic graph core matrix and parity check core matrix in this example. The first submatrix of the parity check core matrix contains only 11 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 11 Similarly, I will not elaborate further.

[0370] Table 50 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0371] 2 2 2 2 2 2 2 2 2 2 2 1 2 1 1 2 2 2 1 2 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 1 2 2 1 1 1 2 1 2 2 2 1

[0372] Table 51 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0373]

[0374] Tables 52 and 53 below show examples of the basic graph core matrix and parity check core matrix in this example. The first submatrix of the parity check core matrix contains only 7 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 11 Similarly, I will not elaborate further.

[0375] Table 52 is a schematic diagram of another basic graph core matrix provided in the embodiments of this application.

[0376] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1

[0377] Table 53 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0378]

[0379] Tables 54 and 55 below show examples of the basic graph core matrix and parity check core matrix in this example. The first submatrix of the parity check core matrix contains only 10 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 11 Similarly, I will not elaborate further.

[0380] Table 54 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0381] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 1 2 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 2 2 2 1 2 2 2 2 1

[0382] Table 55 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0383]

[0384] Tables 56 and 57 below show examples of the basic graph core matrix and parity check core matrix in this example. The first submatrix of the parity check core matrix contains only two elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 11 Similarly, I will not elaborate further.

[0385] Table 56 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0386] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 1

[0387] Table 57 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0388]

[0389] Tables 58 and 59 below show examples of the basic graph core matrix and parity check core matrix in this example. The first submatrix of the parity check core matrix contains only 3 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 11 Similarly, I will not elaborate further.

[0390] Table 58 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0391] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 1

[0392] Table 59 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0393]

[0394] Tables 60 and 61 below show examples of the basic graph core matrix and parity check core matrix in this example. The first submatrix of the parity check core matrix contains only 3 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 11 Similarly, I will not elaborate further.

[0395] Table 60 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0396] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 2 1

[0397] Table 61 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0398]

[0399] Tables 62 and 63 below show examples of the basic graph core matrix and parity check core matrix in this example. The first submatrix of the parity check core matrix contains only 5 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 11 Similarly, I will not elaborate further.

[0400] Table 62 is a schematic diagram of another basic graph core matrix provided in the embodiments of this application.

[0401] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 2 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 2 1

[0402] Table 63 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0403]

[0404] Tables 64 and 65 below show examples of the basic graph core matrix and parity check core matrix in this example. The first submatrix of the parity check core matrix contains only 8 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 11 Similarly, I will not elaborate further.

[0405] Table 64 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0406] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 1 2 2 1 2 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 1 1 2 1 2 2 1

[0407] Table 65 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0408]

[0409] Tables 66 and 67 below show examples of the basic graph core matrix and parity check core matrix in this example. The first submatrix of the parity check core matrix contains only 5 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 11 Similarly, I will not elaborate further.

[0410] Table 66 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0411] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 2 1

[0412] Table 67 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0413]

[0414] Tables 68 and 69 below show examples of the basic graph core matrix and parity check core matrix in this example. The first submatrix of the parity check core matrix contains only 6 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 11 Similarly, I will not elaborate further.

[0415] Table 68 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0416] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 2 2 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 1 1 1 1 2 1

[0417] Table 69 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0418] 28,29 25,14 28,19 43,7 22,37 41,34 54,5 18,44 50,67 60,12 60,32 48,23 63,68 21,58 28,42 30,14 49,30 3 41,10 37,10 14,27 55,5 0 0 0,54 4,31 66,48 31,41 4,11 3,25 58,27 30,54 64,28 45,59 35,27 42,53 11,9 51,39 20,0 65,37 6 69,18 50 60 35 62 1,2 0

[0419] Tables 70 and 71 below show examples of the basic graph core matrix and parity check core matrix in this example. The first submatrix of the parity check core matrix contains only 7 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 11 Similarly, I will not elaborate further.

[0420] Table 70 is a schematic diagram of another basic graph core matrix provided in the embodiments of this application.

[0421] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 2 1 2 2 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 1 1 1 2 1

[0422] Table 71 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0423] 61,62 29,5 17,34 8,4 53,5 13,22 22,3 52,18 67,46 34,48 49,6 7,66 27,15 51,14 30,28 36 39,45 63,31 7 22,6 14,39 38,12 0 0 21,7 52,32 51,6 48,39 60,63 18,50 12,42 36,64 54,1 45,67 47,12 59,18 63,58 13,34 9,17 50,57 58 55 33,57 67 9 6 1,2 0

[0424] Tables 72 and 73 below show examples of the basic graph core matrix and parity check core matrix in this example. The first submatrix of the parity check core matrix contains only 12 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 11 Similarly, I will not elaborate further.

[0425] Table 72 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0426] 2 2 2 2 2 2 2 2 2 2 2 1 2 2 2 2 2 2 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 1 2 1 1 1 1 1 1 2 2 2 2 2 1

[0427] Table 73 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0428] 18,17 10,3 49,12 17,36 47,50 40,57 13,51 56,47 37,1 46,33 14,60 43 18,3 38,49 67,39 11,61 6,47 11,6 24 66 50 66 0 0 52,49 20,14 62,36 57,22 66,13 66,33 9,40 46,59 19,15 18,2 68 49,3 47 17 34 58 28 26 18,67 58,3 25,33 54,64 1,2 0

[0429] In another example, the number of systematic columns in the LDPC-encoded parity check matrix is ​​equal to 20. The first submatrix in the parity check core matrix contains only elements of type 2. Table 74 is a schematic table of another basic graph core matrix provided in this application embodiment, and Table 75 is a schematic table of a parity check core matrix provided in this application embodiment. Tables 74 and 75 below show examples of the basic graph core matrix and parity check core matrix in this example. Figure 12 This is a performance comparison chart of another confidence-transfer decoding method with a maximum iteration count of 4 provided in the embodiments of this application, as shown in the figure. Figure 12 The figure shows a performance comparison of belief-passive decoding with a maximum of 4 iterations.

[0430] Table 74 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0431] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1

[0432] Table 75 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0433] 36,35 45,16 18,44 26,12 73,36 15,71 41,65 69,10 25,21 51,44 3,49 32,12 20,22 1,63 30,18 55,32 51,8 25,34 63,14 12,4 0 0 61,11 33,28 38,59 55,44 31,46 24,61 12,45 54,31 48,72 43,35 62,45 46,48 53,28 8,56 67,49 18,52 19,66 23,37 68,42 68,55 1,2 0

[0434] Tables 75 and 76 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 20). The first submatrix of the parity check core matrix contains only one element of type 1, and the rest are elements of type 2. Performance Comparison and Performance Figure 12 Similarly, I will not elaborate further.

[0435] Table 76 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0436]

[0437]

[0438] Table 77 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0439]

[0440] Tables 78 and 79 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 20). The first submatrix of the parity check core matrix contains only one element of type 1, and the rest are elements of type 2. Performance Comparison and Performance Figure 12 Similarly, I will not elaborate further.

[0441] Table 78 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0442] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1

[0443] Table 79 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0444]

[0445] Tables 80 and 81 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 20). The first submatrix of the parity check core matrix contains only two elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 12 Similarly, I will not elaborate further.

[0446] Table 80 is a schematic diagram of another basic graph core matrix provided in the embodiments of this application.

[0447] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 1

[0448] Table 81 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0449]

[0450] Tables 82 and 83 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 20). The first submatrix of the parity check core matrix contains only 3 elements of type 1, and the rest are elements of type 2. Performance Comparison and Performance Figure 12 Similarly, I will not elaborate further.

[0451] Table 82 is a schematic diagram of another basic graph core matrix provided in the embodiments of this application.

[0452] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 2 2 1

[0453] Table 83 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0454]

[0455] Tables 84 and 85 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 20). The first submatrix of the parity check core matrix contains only 5 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 12 Similarly, I will not elaborate further.

[0456] Table 84 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0457] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 2 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 2 1

[0458] Table 85 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0459]

[0460] Tables 86 and 87 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 20). The first submatrix of the parity check core matrix contains only 5 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 12 Similarly, I will not elaborate further.

[0461] Table 86 is a schematic diagram of another basic graph core matrix provided in the embodiments of this application.

[0462] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1

[0463] Table 87 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0464]

[0465] Tables 88 and 89 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 20). The first submatrix of the parity check core matrix contains only 9 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 12 Similarly, I will not elaborate further.

[0466] Table 88 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0467] 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 2 1 1 2 2 2 2 2 2 2 2 2 2 2 1 1 2 2 2 2 2 2 1 2 1

[0468] Table 89 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0469]

[0470] Tables 90 and 91 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 20). The first submatrix of the parity check core matrix contains only 10 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 12 Similarly, I will not elaborate further.

[0471] Table 90 is a schematic diagram of another basic graph core matrix provided in the embodiments of this application.

[0472] 2 2 2 2 2 2 2 2 2 2 1 1 1 2 2 1 1 2 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 2 1 2 2 2 1

[0473] Table 91 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0474]

[0475] Tables 92 and 93 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 20). The first submatrix of the parity check core matrix contains only two elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 12 Similarly, I will not elaborate further.

[0476] Table 92 is a schematic diagram of another basic graph core matrix provided in the embodiments of this application.

[0477] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 1

[0478] Table 93 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0479]

[0480] Tables 94 and 95 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 20). The first submatrix of the parity check core matrix contains only 5 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 12 Similarly, I will not elaborate further.

[0481] Table 94 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0482] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 2 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 1 1 1 2 1

[0483] Table 95 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0484]

[0485] Tables 96 and 97 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 20). The first submatrix of the parity check core matrix contains only 5 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 12 Similarly, I will not elaborate further.

[0486] Table 96 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0487] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 2 1

[0488] Table 97 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0489]

[0490] In another example, the LDPC-encoded parity matrix has 18 systematic columns. The first submatrix in the parity core matrix contains only elements of type 2. Tables 98 and 99 below show examples of the basic graph core matrix and parity core matrix in this example. Figure 13 This is a performance comparison chart of another confidence-transfer decoding method with a maximum iteration count of 4 provided in the embodiments of this application, as shown in the figure. Figure 13 The figure shows a performance comparison of belief-passive decoding with a maximum of 4 iterations.

[0491] Table 98 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0492] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1

[0493] Table 99 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0494]

[0495] Tables 100 and 101 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 18). The first submatrix of the parity check core matrix contains only one element of type 1, and the rest are elements of type 2. Performance Comparison and Performance Figure 13 Similarly, I will not elaborate further.

[0496] Table 100 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0497] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1

[0498] Table 101 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0499]

[0500] Tables 102 and 103 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 18). The first submatrix of the parity check core matrix contains only 22 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 13 Similarly, I will not elaborate further.

[0501] Table 102 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0502] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 2 1

[0503] Table 103 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0504]

[0505] Tables 104 and 105 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 18). The first submatrix of the parity check core matrix contains only 3 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 13 Similarly, I will not elaborate further.

[0506] Table 104 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0507] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 1

[0508] Table 105 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0509]

[0510] Tables 106 and 107 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 18). The first submatrix of the parity check core matrix contains only 3 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 13 Similarly, I will not elaborate further.

[0511] Table 106 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0512] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1

[0513] Table 107 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0514]

[0515] Tables 108 and 109 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 18). The first submatrix of the parity check core matrix contains only 5 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 13 Similarly, I will not elaborate further.

[0516] Table 108 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0517] 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 2 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 1

[0518] Table 109 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0519]

[0520] Tables 110 and 111 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 18). The first submatrix of the parity check core matrix contains only 7 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 13 Similarly, I will not elaborate further.

[0521] Table 110 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0522] 2 2 2 2 2 2 2 2 2 2 2 1 1 2 1 2 2 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 1 1 2 2 1

[0523] Table 111 Schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0524]

[0525] Tables 112 and 113 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 18). The first submatrix of the parity check core matrix contains only 5 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 13 Similarly, I will not elaborate further.

[0526] Table 112 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0527] 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1

[0528] Table 113 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0529]

[0530] Tables 114 and 115 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 18). The first submatrix of the parity check core matrix contains only 4 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 13 Similarly, I will not elaborate further.

[0531] Table 114 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0532] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 1 2 1

[0533] Table 115 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0534]

[0535] Tables 116 and 117 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 18). The first submatrix of the parity check core matrix contains only 5 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 13 Similarly, I will not elaborate further.

[0536] Table 116 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0537] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 1 1 2 1

[0538] Table 117 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0539]

[0540] Tables 118 and 119 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 18). The first submatrix of the parity check core matrix contains only 6 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 13 Similarly, I will not elaborate further.

[0541] Table 118 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0542] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 1 2 2 2 1

[0543] Table 119 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0544]

[0545] Tables 120 and 121 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 18). The first submatrix of the parity check core matrix contains only 7 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 13 Similarly, I will not elaborate further.

[0546] Table 120 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0547] 2 2 2 2 2 2 2 2 2 2 2 2 1 2 2 2 2 2 1 1 2 2 2 2 2 2 2 2 2 2 2 1 2 1 1 1 1 1 2 1

[0548] Table 121 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0549]

[0550] In another example, the LDPC-encoded parity matrix has 16 systematic columns. The first submatrix in the parity core matrix contains only elements of type 2. Tables 122 and 123 below show examples of the basic graph core matrix and parity core matrix in this example. Figure 14 This is a performance comparison chart of another confidence-transfer decoding method with a maximum iteration count of 4 provided in the embodiments of this application. For example... Figure 14 The figure shows a performance comparison of belief-passive decoding with a maximum of 4 iterations.

[0551] Table 122 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0552] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1

[0553] Table 123 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0554]

[0555] Tables 124 and 125 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 16). The first submatrix of the parity check core matrix contains only one element of type 1, and the rest are elements of type 2. Performance Comparison and Performance Figure 14 Similarly, I will not elaborate further.

[0556] Table 124 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0557] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 1

[0558] Table 125 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0559]

[0560] Tables 126 and 127 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 16). The first submatrix of the parity check core matrix contains only one element of type 1, and the rest are elements of type 2. Performance Comparison and Performance Figure 14 Similarly, I will not elaborate further.

[0561] Table 126 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0562] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1

[0563] Table 127 Schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0564]

[0565] Tables 128 and 129 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 16). The first submatrix of the parity check core matrix contains only two elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 14 Similarly, I will not elaborate further.

[0566] Table 128 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0567] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 1

[0568] Table 129 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0569]

[0570] Tables 130 and 131 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 16). The first submatrix of the parity check core matrix contains only two elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 14 Similarly, I will not elaborate further.

[0571] Table 130 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0572] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1

[0573] Table 131 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0574]

[0575] Tables 132 and 133 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 16). The first submatrix of the parity check core matrix contains only 3 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 14 Similarly, I will not elaborate further.

[0576] Table 132 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0577] 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 1

[0578] Table 133 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0579]

[0580]

[0581] Tables 134 and 135 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 16). The first submatrix of the parity check core matrix contains only 4 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 14 Similarly, I will not elaborate further.

[0582] Table 134 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0583] 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 2 1

[0584] Table 135 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0585]

[0586] Tables 136 and 137 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 16). The first submatrix of the parity check core matrix contains only 5 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 14 Similarly, I will not elaborate further.

[0587] Table 136 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0588] 2 2 2 2 2 2 2 2 2 2 2 1 1 2 2 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 2 1

[0589] Table 137 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0590]

[0591] Tables 138 and 139 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 16). The first submatrix of the parity check core matrix contains only one element of type 1, and the rest are elements of type 2. Performance Comparison and Performance Figure 14 Similarly, I will not elaborate further.

[0592] Table 138 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0593] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 1

[0594] Table 139 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0595]

[0596] Tables 140 and 141 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 16). The first submatrix of the parity check core matrix contains only 3 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 14 Similarly, I will not elaborate further.

[0597] Table 140 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0598] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 1 2 1

[0599] Table 141 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0600]

[0601] Tables 142 and 143 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 16). The first submatrix of the parity check core matrix contains only 5 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 14 Similarly, I will not elaborate further.

[0602] Table 142 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0603] 2 2 2 2 2 2 2 2 2 2 2 1 2 2 1 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 1 2 1

[0604] Table 143 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0605]

[0606] Tables 144 and 145 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 16). The first submatrix of the parity check core matrix contains only 5 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 14 Similarly, I will not elaborate further.

[0607] Table 144 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0608] 2 2 2 2 2 2 2 2 2 2 2 1 2 2 1 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 1 2 1

[0609] Table 145 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0610]

[0611] In another example, the LDPC-encoded parity matrix has 14 systematic columns. The first submatrix in the parity core matrix contains only elements of type 2. Tables 146 and 147 below show examples of the basic graph core matrix and parity core matrix in this example. Figure 15 This is a performance comparison chart of another confidence-transfer decoding method with a maximum iteration count of 4 provided in the embodiments of this application. For example... Figure 15 The image shows a performance comparison of the confidence-passive decoding with a maximum of 4 iterations in this example.

[0612] Table 146 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0613] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1

[0614] Table 147 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0615]

[0616] Tables 148 and 149 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 14). The first submatrix of the parity check core matrix contains only one element of type 1, and the rest are elements of type 2. Performance Comparison and Performance Figure 15 Similarly, I will not elaborate further.

[0617] Table 148 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0618] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 1

[0619] Table 149 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0620]

[0621] Tables 150 and 151 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 14). The first submatrix of the parity check core matrix contains only one element of type 1, and the rest are elements of type 2. Performance Comparison and Performance Figure 15 Similarly, I will not elaborate further.

[0622] Table 150 is a schematic diagram of another basic graph core matrix provided in the embodiments of this application.

[0623] 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1

[0624] Table 151 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0625]

[0626] Tables 152 and 153 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 14). The first submatrix of the parity check core matrix contains only two elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 15 Similarly, I will not elaborate further.

[0627] Table 152 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0628] 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 1 2 2 1

[0629] Table 153 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0630]

[0631] Tables 154 and 155 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 14). The first submatrix of the parity check core matrix contains only two elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 15 Similarly, I will not elaborate further.

[0632] Table 154 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0633] 2 2 2 2 2 2 2 2 2 2 2 2 1 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 1

[0634] Table 155 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0635]

[0636] Tables 156 and 157 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 14). The first submatrix of the parity check core matrix contains only two elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 15 Similarly, I will not elaborate further.

[0637] Table 156 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0638] 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1

[0639] Table 157 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0640]

[0641] Tables 158 and 159 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 14). The first submatrix of the parity check core matrix contains only 3 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 15 Similarly, I will not elaborate further.

[0642] Table 158 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0643] 2 2 2 2 2 2 2 2 2 2 2 1 1 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 1

[0644] Table 159 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0645]

[0646] Tables 160 and 161 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 14). The first submatrix of the parity check core matrix contains only 3 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 15 Similarly, I will not elaborate further.

[0647] Table 160 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0648] 2 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1

[0649] Table 161 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0650]

[0651] Tables 162 and 163 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 14). The first submatrix of the parity check core matrix contains only two elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 15 Similarly, I will not elaborate further.

[0652] Table 162 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0653] 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 1

[0654] Table 163 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0655]

[0656] Tables 164 and 165 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 14). The first submatrix of the parity check core matrix contains only 3 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 15 Similarly, I will not elaborate further.

[0657] Table 164 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0658] 2 2 2 2 2 2 2 2 2 2 2 2 1 2 1 1 2 2 2 2 2 2 2 2 2 2 2 1 2 1 2 1

[0659] Table 165 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0660]

[0661] Tables 166 and 167 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 14). The first submatrix of the parity check core matrix contains only 3 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 15 Similarly, I will not elaborate further.

[0662] Table 166 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0663] 2 2 2 2 2 2 2 2 2 2 2 2 1 2 1 1 2 2 2 2 2 2 2 2 2 2 2 1 2 1 2 1

[0664] Table 167 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0665]

[0666] In another example, the LDPC-encoded parity matrix has 12 systematic columns. The first submatrix in the parity core matrix contains only elements of type 2. Tables 168 and 169 below show examples of the basic graph core matrix and parity core matrix in this example. Figure 16 This is a performance comparison chart of another confidence-transfer decoding method with a maximum iteration count of 4 provided in the embodiments of this application. For example... Figure 16 The figure shows a performance comparison of belief-passive decoding with a maximum of 4 iterations.

[0667] Table 168 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0668] 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 1

[0669] Table 169 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0670]

[0671] Tables 170 and 171 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 12). The first submatrix of the parity check core matrix contains only one element of type 1, and the rest are elements of type 2. Performance Comparison and Performance Figure 16 Similarly, I will not elaborate further.

[0672] Table 170 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0673]

[0674]

[0675] Table 171 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0676]

[0677] Tables 172 and 173 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 12). The first submatrix of the parity check core matrix contains only one element of type 1, and the rest are elements of type 2. Performance Comparison and Performance Figure 16 Similarly, I will not elaborate further.

[0678] Table 172 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0679] 2 2 2 2 2 2 2 2 2 2 2 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 1

[0680] Table 173 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0681]

[0682] Tables 174 and 175 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 12). The first submatrix of the parity check core matrix contains only two elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 16 Similarly, I will not elaborate further.

[0683] Table 174 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0684] 2 2 2 2 2 2 2 2 2 2 1 2 1 1 2 2 2 2 2 2 2 2 2 2 2 1 2 1

[0685] Table 175 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0686]

[0687] Tables 176 and 177 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 12). The first submatrix of the parity check core matrix contains only two elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 16 Similarly, I will not elaborate further.

[0688] Table 176 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0689] 2 2 2 2 2 2 2 2 2 2 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 1

[0690] Table 177 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0691]

[0692] Tables 178 and 179 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 12). The first submatrix of the parity check core matrix contains only 3 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 16 Similarly, I will not elaborate further.

[0693] Table 178 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0694] 2 2 2 2 2 2 2 2 2 2 1 1 1 1 2 2 2 2 2 2 2 2 2 1 2 2 2 1

[0695] Table 179 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0696]

[0697] Tables 180 and 181 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 12). The first submatrix of the parity check core matrix contains only 3 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 16 Similarly, I will not elaborate further.

[0698] Table 180 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0699] 2 2 2 2 2 2 2 2 2 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 1

[0700] Table 181 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0701]

[0702] Tables 182 and 183 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 12). The first submatrix of the parity check core matrix contains only two elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 16 Similarly, I will not elaborate further.

[0703] Table 182 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0704] 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 2 2 2 2 2 2 2 2 2 1 1 2 1

[0705] Table 183 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0706]

[0707] Tables 184 and 185 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 12). The first submatrix of the parity check core matrix contains only 3 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 16 Similarly, I will not elaborate further.

[0708] Table 184 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0709] 2 2 2 2 2 2 2 2 2 2 2 1 1 1 2 2 2 2 2 2 2 2 2 1 1 2 2 1

[0710] Table 185 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0711]

[0712] Tables 186 and 187 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 12). The first submatrix of the parity check core matrix contains only 3 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 16 Similarly, I will not elaborate further.

[0713] Table 186 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0714] 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 2 2 2 2 2 2 2 2 1 1 1 2 1

[0715] Table 187 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0716]

[0717] In another example, the LDPC-encoded parity matrix has 10 systematic columns. The first submatrix in the parity core matrix contains only elements of type 2. Tables 188 and 189 below show examples of the basic graph core matrix and parity core matrix in this example. Figure 17 This is a performance comparison chart of another confidence-transfer decoding method with a maximum of 4 iterations provided in the embodiments of this application, as shown in the figure. Figure 17 The image shows a performance comparison of the confidence-passive decoding with a maximum of 4 iterations in this example.

[0718] Table 188 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0719] 2 2 2 2 2 2 2 2 2 2 1 1 2 2 2 2 2 2 2 2 2 2 2 1

[0720] Table 189 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0721]

[0722] Tables 190 and 191 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 10). The first submatrix of the parity check core matrix contains only one element of type 1, and the rest are elements of type 2. Performance Comparison and Performance Figure 17 Similarly, I will not elaborate further.

[0723] Table 190 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0724] 2 2 2 2 2 2 2 2 2 1 1 1 2 2 2 2 2 2 2 2 2 2 2 1

[0725] Table 191 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0726]

[0727] Tables 192 and 193 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 10). The first submatrix of the parity check core matrix contains only two elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 17 Similarly, I will not elaborate further.

[0728] Table 192 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0729] 2 2 2 2 2 2 2 2 2 1 1 1 2 2 2 2 2 2 2 2 1 2 2 1

[0730] Table 193 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0731]

[0732] Tables 194 and 195 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 10). The first submatrix of the parity check core matrix contains only two elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 17 Similarly, I will not elaborate further.

[0733] Table 194 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0734] 2 2 2 2 2 2 2 2 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 1

[0735] Table 195 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0736]

[0737] Tables 196 and 197 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 10). The first submatrix of the parity check core matrix contains only 3 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 17 Similarly, I will not elaborate further.

[0738] Table 196 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0739] 2 2 2 2 2 2 2 1 1 2 1 1 2 2 2 2 2 2 2 2 2 1 2 1

[0740] Table 197 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0741]

[0742] Tables 198 and 199 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 10). The first submatrix of the parity check core matrix contains only 3 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 17 Similarly, I will not elaborate further.

[0743] Table 198 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0744] 2 2 2 2 2 2 2 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 1

[0745] Table 199 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0746]

[0747] Tables 200 and 201 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 10). The first submatrix of the parity check core matrix contains only 4 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 17 Similarly, I will not elaborate further.

[0748] Table 200 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0749] 2 2 2 2 2 2 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 1

[0750] Table 201 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0751]

[0752] Tables 202 and 203 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 10). The first submatrix of the parity check core matrix contains only two elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 17 Similarly, I will not elaborate further.

[0753] Table 202 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0754] 2 2 2 2 2 2 2 2 2 1 1 1 2 2 2 2 2 2 2 2 1 2 2 1

[0755] Table 203 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0756]

[0757] Tables 204 and 205 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 10). The first submatrix of the parity check core matrix contains only two elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 17 Similarly, I will not elaborate further.

[0758] Table 204 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0759] 2 2 2 2 2 2 2 2 2 2 1 1 2 2 2 2 2 2 2 2 1 1 2 1

[0760] Table 205 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0761]

[0762] Tables 206 and 207 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 10). The first submatrix of the parity check core matrix contains only 3 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 17 Similarly, I will not elaborate further.

[0763] Table 206 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0764]

[0765]

[0766] Table 207 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0767]

[0768] In another example, the LDPC-encoded parity matrix has 8 systematic columns. The first submatrix in the parity core matrix contains only elements of type 2. Tables 208 and 209 below show examples of the basic graph core matrix and parity core matrix in this example. Figure 18 This is a performance comparison chart of another confidence-transfer decoding method with a maximum iteration count of 4 provided in the embodiments of this application, as shown in the figure. Figure 18 The figure shows a performance comparison of belief-passive decoding with a maximum of 4 iterations.

[0769] Table 208 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0770] 2 2 2 2 2 2 2 2 1 1 2 2 2 2 2 2 2 2 2 1

[0771] Table 209 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0772]

[0773] Tables 210 and 211 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 8). The first submatrix of the parity check core matrix contains only one element of type 1, and the rest are elements of type 2. Performance Comparison and Performance Figure 18 Similarly, I will not elaborate further.

[0774] Table 210 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0775] 2 2 2 2 2 2 2 1 1 1 2 2 2 2 2 2 2 2 2 1

[0776] Table 211 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0777]

[0778] Tables 212 and 213 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 8). The first submatrix of the parity check core matrix contains only two elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 18 Similarly, I will not elaborate further.

[0779] Table 212 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0780] 2 2 2 2 2 2 2 1 1 1 2 2 2 2 2 2 1 2 2 1

[0781] Table 213 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0782]

[0783] Tables 214 and 215 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 8). The first submatrix of the parity check core matrix contains only two elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 18 Similarly, I will not elaborate further.

[0784] Table 214 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0785] 2 2 2 2 2 2 1 1 1 1 2 2 2 2 2 2 2 2 2 1

[0786] Table 215 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0787]

[0788]

[0789] Tables 216 and 217 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 8). The first submatrix of the parity check core matrix contains only 3 elements of type 1, with the rest being elements of type 2. Performance Comparison and Performance Figure 18 Similarly, I will not elaborate further.

[0790] Table 216 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0791] 2 2 2 2 2 1 2 1 1 1 2 2 2 2 2 2 1 2 2 1

[0792] Table 217 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0793]

[0794] Tables 218 and 219 below show examples of the basic graph core matrix and parity check core matrix in this example (system column count equals 8). The first submatrix of the parity check core matrix contains only one element of type 1, and the rest are elements of type 2. Performance Comparison and Performance Figure 18 Similarly, I will not elaborate further.

[0795] Table 218 is a schematic table of another basic graph core matrix provided in the embodiments of this application.

[0796] 2 2 2 2 2 2 2 2 1 1 2 2 2 2 2 2 2 1 2 1

[0797] Table 219 is a schematic diagram of a parity check core matrix provided in the embodiments of this application.

[0798]

[0799] In one exemplary embodiment, this application provides a sequence processing apparatus that can be integrated into a first communication node. Figure 19 This is a schematic diagram of the structure of a sequence processing device provided in an embodiment of this application; as shown... Figure 19 The sequence processing apparatus includes:

[0800] The acquisition module 610 is configured to acquire information bit sequences;

[0801] The encoding module 620 is configured to perform low-density parity-check (LDPC) encoding on the information bit sequence according to the parity check matrix to obtain the encoded bit sequence; wherein the parity check matrix contains at least a first type of element and a second type of element, the first type of element indicating an element associated with a cyclic shift of one identity matrix, and the second type of element indicating an element associated with a cyclic shift of two identity matrices.

[0802] The sequence processing device provided in this embodiment is used to achieve, for example... Figure 1 The sequence processing method of the illustrated embodiment, and the sequence processing device provided in this embodiment, are implemented in the same principle and have the same technical effects. Figure 1 The sequence processing method in the illustrated embodiment is similar and will not be described again here.

[0803] Based on the above embodiments, modified embodiments of the above embodiments are proposed. It should be noted that, in order to keep the description brief, only the differences from the above embodiments are described in the modified embodiments.

[0804] In one embodiment, the parity check matrix includes a parity check core matrix, wherein the ratio of the number of second-type elements in the parity check core matrix to the total number of all elements in the parity check core matrix is ​​greater than or equal to X%, and X is a real number greater than or equal to 40 and less than 100.

[0805] In one embodiment, X equals one of the following: 50, 60, 70, 75, 80, 83, 85, 90, 91, 93, 94, 95.

[0806] In one embodiment, the parity check matrix includes a parity check core matrix, wherein the number of second-type elements in the parity check core matrix is ​​greater than the number of first-type elements in the parity check core matrix.

[0807] In one embodiment, the parity check core matrix further includes a third type of element, which indicates elements associated with cyclic shifts of the three identity matrices, wherein the number of the third type of element satisfies one or more of the following:

[0808] The number of elements in category 2 is greater than the number of elements in category 3;

[0809] The number of elements in the third category is greater than the number of elements in the first category;

[0810] The number of elements in the third class is greater than the number of elements in the zero class, where the zero class elements indicate the elements of the all-zero matrix.

[0811] In one embodiment, the parity check matrix includes a parity check core matrix, wherein the number of elements of type 1 in the parity check core matrix is ​​greater than the number of elements of type 0 in the parity check core matrix.

[0812] In one embodiment, all elements in column q of the parity check core matrix in the parity check matrix are elements of type 2, where q is a positive integer less than or equal to the number of system columns, and the number of system columns is equal to the difference between the number of columns and the number of rows of the parity check matrix.

[0813] In one embodiment, q is greater than Y times the number of columns in the system, where Y is a real number greater than or equal to 0.5 and less than or equal to 1. In a specific example, Y can be equal to one of the following: 0.5, 0.6, 0.7, 0.8, 0.9, or 1.

[0814] In one embodiment, all elements in the first q columns of the parity check core matrix are elements of type 2.

[0815] In one embodiment, the number of second-class elements in the parity check core matrix of the parity check matrix is ​​greater than or equal to S times the number of first-class elements in the parity check core matrix, where S is a real number greater than 1.

[0816] In one embodiment, S equals one of the following: 1.2, 1.5, 1.8, 2, 2.5, 2.8, 3.0, 3.5, 3.8, 4, 4.5, 5, 5.4, 5.6, 6, 7, 8, 8.3, 9.6, 11, 12, 12.3, 13.6, 15, 16.3.

[0817] In one embodiment, the number of second-class elements in the parity check matrix is ​​greater than or equal to U times the number of third-class elements in the parity check matrix, where U is a real number greater than 1.

[0818] In one embodiment, U is equal to one of the following: 1.2, 1.5, 1.8, 2, 2.5, 2.8, 3.0, 3.5, 3.8, 4, 4.5, 5, 5.4.

[0819] In one embodiment, the row weight of the i-th row of the parity check core matrix in the parity check matrix is ​​greater than or equal to T times the number of system columns, where T is a real number greater than 1, the number of system columns is equal to the difference between the number of columns and the number of rows of the parity check matrix, and the row weight indicates the total number of cyclic shift bits of the identity matrix indicated by all non-zero elements in the corresponding row.

[0820] In one embodiment, T is equal to one of the following: 1.2, 1.5, 1.6, 1.7, 1.8, 1.9, 2.0, 2.1.

[0821] In one embodiment, i equals one of the following: 0, 1, 2, 3.

[0822] In one embodiment, the number of system columns containing only type 2 elements in the parity check core matrix of the parity check matrix is ​​greater than or equal to the difference between the number of system columns and A, wherein the number of system columns is equal to the difference between the number of columns and the number of rows of the parity check matrix, and the system columns include the number of system columns in the parity check core matrix, wherein A is equal to 0, 1, 2, 3, 4 or 5.

[0823] In one embodiment, the parity check matrix contains only elements of type 0 and type 1 from row p to the last row, wherein the elements of type 0 are used to indicate elements of an all-zero square matrix, and the elements of type 1 are used to indicate elements of an identity matrix cyclically shifted, and p is equal to 2, 3, 4, 5, 6, 7, 8, 9 or 10.

[0824] In one embodiment, the difference between the number of columns and the number of rows of the parity check matrix is ​​an integer greater than 6 and less than 36.

[0825] In one embodiment, the difference between the number of columns and the number of rows of the parity check matrix is ​​equal to 24, 23, 22, 21, 20, 18, 16, 14, 12, 10, or 8.

[0826] In one embodiment, the parity check matrix includes five sub-matrix blocks. The first and second sub-matrix blocks constitute the parity check core matrix. The first, second, and third sub-matrix blocks have the same number of rows. The third and fifth sub-matrix blocks have the same number of columns. The fourth sub-matrix block has the same number of columns as the parity check core matrix. The fourth and fifth sub-matrix blocks have the same number of rows. The first sub-matrix block is located at the top left corner of the parity check matrix. The second sub-matrix block is located adjacent to and to the right of the first sub-matrix block. The third sub-matrix block is located adjacent to and to the right of the second sub-matrix block. The fourth sub-matrix block is located at the bottom left corner of the parity check matrix. The fifth sub-matrix block is located at the bottom right corner of the parity check matrix.

[0827] In one embodiment, the number of rows in the first submatrix block is equal to 2, 3, 4, 5, 6, 7, or 8.

[0828] In one embodiment, the minimum column weight of the first submatrix block is equal to 2, 3, 4, 5, or 6.

[0829] In one embodiment, the second sub-matrix block includes at least one second-type element, which comprises two shift values ​​equal to 1 and 2, respectively. In another embodiment, all first-type elements in the second sub-matrix block have a shift value equal to 0.

[0830] In one embodiment, the minimum column weight of the fourth sub-matrix block is equal to 4, 5, 6, 7, 8, 9, 10, or 11.

[0831] In one embodiment, the maximum column weight of the fourth sub-matrix block is equal to 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22 or 24.

[0832] In one embodiment, the row weight of the j-th row of the first submatrix block is greater than or equal to R times the number of columns in the system, where R is a real number greater than 1, and the number of columns in the system is equal to the difference between the number of columns and the number of rows in the parity check matrix.

[0833] In one embodiment, the average row weight of the first submatrix block is greater than or equal to E times the number of columns in the system, where E is a real number greater than 1, and the number of columns in the system is equal to the difference between the number of columns and the number of rows in the parity check matrix.

[0834] In one embodiment, the average row weight of the parity check core matrix in the parity check matrix is ​​greater than or equal to W times the number of system columns, where W is a real number greater than 1, and the number of system columns is equal to the difference between the number of columns and the number of rows of the parity check matrix.

[0835] In one embodiment, the second sub-matrix block satisfies one of the following:

[0836] The row weight of all rows in the second sub-matrix block is greater than or equal to 2;

[0837] In the second submatrix block, the column weight of all columns is greater than or equal to 2.

[0838] In one embodiment, the parity check core matrix of the parity check matrix is ​​composed of rows 0 to p-1 and columns 0 to g-1 of the parity check matrix, where p is equal to 2, 3, 4, 5, or 6, and g is equal to the sum of p and the number of systematic columns of the parity check matrix, where the number of systematic columns is equal to the difference between the number of columns and the number of rows of the parity check matrix.

[0839] In one embodiment, the column weight of all columns in the parity check core matrix of the parity check matrix is ​​greater than 1.

[0840] In one embodiment, the parity check matrix includes at least three of the first-type elements in the parity check core matrix.

[0841] In one exemplary embodiment, this application provides a sequence processing apparatus that can be integrated into a second communication node. Figure 20 This is a schematic diagram of another sequence processing device provided in the embodiments of this application; see also Figure 20 The device includes:

[0842] The acquisition module 710 is configured to acquire the soft bit sequence to be decoded;

[0843] The decoding module 720 is configured to perform LDPC decoding on the soft bit sequence to be decoded according to the parity check matrix to obtain an information bit sequence; wherein the parity check matrix contains at least a first type of element and a second type of element, the first type of element indicating an element associated with a cyclic shift of one identity matrix, and the second type of element indicating an element associated with a cyclic shift of two identity matrices.

[0844] The sequence processing device provided in this embodiment is used to achieve, for example... Figure 3 The sequence processing method of the illustrated embodiment, and the sequence processing device provided in this embodiment, are implemented in the same principle and have the same technical effects. Figure 3 The sequence processing method in the illustrated embodiment is similar and will not be described again here.

[0845] Based on the above embodiments, modified embodiments of the above embodiments are proposed. It should be noted that, in order to keep the description brief, only the differences from the above embodiments are described in the modified embodiments.

[0846] In one embodiment, the parity check matrix includes a parity check core matrix, wherein the ratio of the number of second-type elements in the parity check core matrix to the total number of all elements in the parity check core matrix is ​​greater than or equal to X%, and X is a real number greater than or equal to 40 and less than 100.

[0847] In one embodiment, X equals one of the following: 50, 60, 70, 75, 80, 83, 85, 90, 91, 93, 94, 95.

[0848] In one embodiment, the parity check matrix includes a parity check core matrix, wherein the number of second-type elements in the parity check core matrix is ​​greater than the number of first-type elements in the parity check core matrix.

[0849] In one embodiment, the parity check core matrix further includes a third type of element, which indicates elements associated with cyclic shifts of the three identity matrices, wherein the number of the third type of element satisfies one or more of the following:

[0850] The number of elements in category 2 is greater than the number of elements in category 3;

[0851] The number of elements in the third category is greater than the number of elements in the first category;

[0852] The number of elements in the third class is greater than the number of elements in the zero class, where the zero class elements indicate the elements of the all-zero matrix.

[0853] In one embodiment, the parity check matrix includes a parity check core matrix, wherein the number of elements of type 1 in the parity check core matrix is ​​greater than the number of elements of type 0 in the parity check core matrix.

[0854] In one embodiment, all elements in column q of the parity check core matrix in the parity check matrix are elements of type 2, where q is a positive integer less than or equal to the number of system columns, and the number of system columns is equal to the difference between the number of columns and the number of rows of the parity check matrix.

[0855] In one embodiment, q is greater than Y times the number of columns in the system, where Y is a real number greater than or equal to 0.5 and less than or equal to 1. In a specific example, Y can be equal to one of the following: 0.5, 0.6, 0.7, 0.8, 0.9, or 1.

[0856] In one embodiment, all elements in the first q columns of the parity check core matrix are elements of type 2.

[0857] In one embodiment, the number of second-class elements in the parity check core matrix of the parity check matrix is ​​greater than or equal to S times the number of first-class elements in the parity check core matrix, where S is a real number greater than 1.

[0858] In one embodiment, S equals one of the following: 1.2, 1.5, 1.8, 2, 2.5, 2.8, 3.0, 3.5, 3.8, 4, 4.5, 5, 5.4, 5.6, 6, 7, 8, 8.3, 9.6, 11, 12, 12.3, 13.6, 15, 16.3.

[0859] In one embodiment, the number of second-class elements in the parity check matrix is ​​greater than or equal to U times the number of third-class elements in the parity check matrix, where U is a real number greater than 1.

[0860] In one embodiment, U is equal to one of the following: 1.2, 1.5, 1.8, 2, 2.5, 2.8, 3.0, 3.5, 3.8, 4, 4.5, 5, 5.4.

[0861] In one embodiment, the row weight of the i-th row of the parity check core matrix in the parity check matrix is ​​greater than or equal to T times the number of system columns, where T is a real number greater than 1, the number of system columns is equal to the difference between the number of columns and the number of rows of the parity check matrix, and the row weight indicates the total number of cyclic shift bits of the identity matrix indicated by all non-zero elements in the corresponding row.

[0862] In one embodiment, T equals one of the following: 1.2, 1.5, 1.6, 1.7, 1.8, 1.9, 2.0, 2.1.

[0863] In one embodiment, i equals one of the following: 0, 1, 2, 3.

[0864] In one embodiment, the number of system columns containing only type 2 elements in the parity check core matrix of the parity check matrix is ​​greater than or equal to the difference between the number of system columns and A, wherein the number of system columns is equal to the difference between the number of columns and the number of rows of the parity check matrix, and the system columns include the number of system columns in the parity check core matrix, wherein A is equal to 0, 1, 2, 3, 4 or 5.

[0865] In one embodiment, the parity check matrix contains only elements of type 0 and type 1 from row p to the last row, wherein the elements of type 0 are used to indicate the elements of the all-zero square matrix, and p is equal to 2, 3, 4, 5, 6, 7, 8, 9 or 10.

[0866] In one embodiment, the difference between the number of columns and the number of rows of the parity check matrix is ​​an integer greater than 6 and less than 36.

[0867] In one embodiment, the difference between the number of columns and the number of rows of the parity check matrix is ​​equal to 24, 23, 22, 21, 20, 18, 16, 14, 12, 10, or 8.

[0868] In one embodiment, the parity check matrix includes five sub-matrix blocks. The first and second sub-matrix blocks constitute the parity check core matrix. The first, second, and third sub-matrix blocks have the same number of rows. The third and fifth sub-matrix blocks have the same number of columns. The fourth sub-matrix block has the same number of columns as the parity check core matrix. The fourth and fifth sub-matrix blocks have the same number of rows. The first sub-matrix block is located at the top left corner of the parity check matrix. The second sub-matrix block is located adjacent to and to the right of the first sub-matrix block. The third sub-matrix block is located adjacent to and to the right of the second sub-matrix block. The fourth sub-matrix block is located at the bottom left corner of the parity check matrix. The fifth sub-matrix block is located at the bottom right corner of the parity check matrix.

[0869] In one embodiment, the number of rows in the first submatrix block is equal to 2, 3, 4, 5, 6, 7, or 8.

[0870] In one embodiment, the minimum column weight of the first submatrix block is equal to 2, 3, 4, 5, or 6.

[0871] In one embodiment, the second sub-matrix block includes at least one second-type element, which comprises two shift values ​​equal to 1 and 2, respectively. In another embodiment, all first-type elements in the second sub-matrix block have a shift value equal to 0.

[0872] In one embodiment, the minimum column weight of the fourth sub-matrix block is equal to 4, 5, 6, 7, 8, 9, 10, or 11.

[0873] In one embodiment, the maximum column weight of the fourth sub-matrix block is equal to 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22 or 24.

[0874] In one embodiment, the row weight of the j-th row of the first submatrix block is greater than or equal to R times the number of columns in the system, where R is a real number greater than 1, and the number of columns in the system is equal to the difference between the number of columns and the number of rows in the parity check matrix.

[0875] In one embodiment, the average row weight of the first submatrix block is greater than or equal to E times the number of columns in the system, where E is a real number greater than 1, and the number of columns in the system is equal to the difference between the number of columns and the number of rows in the parity check matrix.

[0876] In one embodiment, the average row weight of the parity check core matrix in the parity check matrix is ​​greater than or equal to W times the number of system columns, where W is a real number greater than 1, and the number of system columns is equal to the difference between the number of columns and the number of rows of the parity check matrix.

[0877] In one embodiment, the second sub-matrix block satisfies one of the following:

[0878] The row weight of all rows in the second sub-matrix block is greater than or equal to 2;

[0879] In the second submatrix block, the column weight of all columns is greater than or equal to 2.

[0880] In one embodiment, the parity check core matrix of the parity check matrix is ​​composed of rows 0 to p-1 and columns 0 to g-1 of the parity check matrix, where p is equal to 2, 3, 4, 5, or 6, and g is equal to the sum of p and the number of systematic columns of the parity check matrix, where the number of systematic columns is equal to the difference between the number of columns and the number of rows of the parity check matrix.

[0881] In one embodiment, the column weight of all columns in the parity check core matrix of the parity check matrix is ​​greater than 1.

[0882] In one embodiment, the parity check matrix includes at least three of the first-type elements in the parity check core matrix.

[0883] In one exemplary embodiment, this application also provides a communication node, which can be a first communication node or a second communication node. Figure 21 This is a schematic diagram of the structure of a communication node provided in an embodiment of this application. Figure 21 As shown, the communication node provided in this application includes one or more processors 81 and a storage device 82; the processors 81 in the communication node can be one or more. Figure 21 Taking a processor 81 as an example; the storage device 82 is used to store one or more programs, which can store the information bit sequence and the encoded bit sequence in this application; the one or more programs are executed by the one or more processors 81, so that the one or more processors 81 implement the sequence processing method as described in the embodiments of this application, such as encoding the input information bit sequence to obtain the encoded bit sequence.

[0884] The communication node also includes: a communication device 83, an input device 84, and an output device 85.

[0885] The processor 81, storage device 82, communication device 83, input device 84, and output device 85 in the communication node can be connected via a bus or other means. Figure 21 Taking the example of a connection between China and Israel via a bus.

[0886] Input device 84 can be used to receive input digital or character information, and to generate key signal inputs related to user settings and function control of the communication node. Output device 85 may include display devices such as a display screen.

[0887] The communication device 83 may include a receiver and a transmitter. The communication device 83 is configured to perform information transmission and reception communication under the control of the processor 81. For example, encoded data may be transmitted sequentially. The communication device 83 may include a single antenna or multiple antennas. Components within the communication node can communicate with each other.

[0888] Storage device 82, as a computer-readable storage medium, can be configured to store software programs, computer-executable programs, and modules, such as program instructions / modules corresponding to the sequence processing method described in the embodiments of this application (e.g., acquisition module 610 and encoding module 620 in the sequence processing device, or acquisition module 710 and decoding module 720 in the sequence processing device). Storage device 82 may include a program storage area and a data storage area, wherein the program storage area may store the operating system and at least one application program required for a function; the data storage area may store data created according to the use of the communication node, etc. In addition, storage device 82 may include high-speed random access memory, and may also include non-volatile memory, such as at least one disk storage device, flash memory device, or other non-volatile solid-state storage device. In some instances, storage device 82 may further include memory remotely located relative to processor 81, and these remote memories can be connected to the communication node via a network. Examples of the above-mentioned networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.

[0889] In one exemplary embodiment, this application also provides a storage medium storing a computer program that, when executed by a processor, implements any of the methods described in this application. The storage medium stores a computer program that, when executed by a processor, implements any of the sequence processing methods described in the embodiments of this application. Examples include a sequence processing method applied to a first communication node and a sequence processing method applied to a second communication node. The sequence processing method applied to the first communication node includes: acquiring an information bit sequence;

[0890] The information bit sequence is encoded by low-density parity-check (LDPC) encoding based on the parity check matrix to obtain the encoded bit sequence.

[0891] The parity check matrix contains at least two types of elements: a first type and a second type. The first type of elements indicates elements associated with a cyclic shift of one identity matrix, and the second type of elements indicates elements associated with a cyclic shift of two identity matrices.

[0892] The sequence processing method applied to the second communication node includes: acquiring the soft bit sequence to be decoded;

[0893] The soft bit sequence to be decoded is subjected to LDPC decoding based on the parity check matrix to obtain the information bit sequence.

[0894] The parity check matrix contains at least two types of elements: a first type and a second type. The first type of elements indicates elements associated with a cyclic shift of one identity matrix, and the second type of elements indicates elements associated with a cyclic shift of two identity matrices.

[0895] The computer storage medium in this application embodiment can be any combination of one or more computer-readable media. The computer-readable medium can be a computer-readable signal medium or a computer-readable storage medium. For example, a computer-readable storage medium can be, but is not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of computer-readable storage media (a non-exhaustive list) include: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), flash memory, optical fiber, portable CD-ROM, optical storage device, magnetic storage device, or any suitable combination thereof. The computer-readable storage medium can be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, apparatus, or device.

[0896] Computer-readable signal media may include data signals propagated in baseband or as part of a carrier wave, carrying computer-readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. Computer-readable signal media may also be any computer-readable medium other than computer-readable storage media, which can send, propagate, or transmit programs for use by or in connection with an instruction execution system, apparatus, or device.

[0897] Program code contained on a computer-readable medium may be transmitted using any suitable medium, including but not limited to: wireless, wire, optical fiber, radio frequency (RF), etc., or any suitable combination thereof.

[0898] Computer program code for performing the operations of this application can be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, and C++, as well as conventional procedural programming languages ​​such as "C" or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0899] The above description is merely an exemplary embodiment of this application and is not intended to limit the scope of protection of this application.

[0900] Those skilled in the art will understand that the term terminal equipment covers any suitable type of wireless user equipment, such as mobile phones, portable data processing devices, portable web browsers, or vehicle-mounted mobile stations.

[0901] Generally, the various embodiments of this application can be implemented in hardware or dedicated circuitry, software, logic, or any combination thereof. For example, some aspects can be implemented in hardware, while others can be implemented in firmware or software that can be executed by a controller, microprocessor, or other computing device, although this application is not limited thereto.

[0902] Embodiments of this application can be implemented by executing computer program instructions through the data processor of a mobile device, for example, in a processor entity, or through hardware, or through a combination of software and hardware. The computer program instructions can be assembly instructions, Instruction Set Architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, status setting data, or source code or object code written in any combination of one or more programming languages.

[0903] Any block diagram of logical flow in the accompanying drawings of this application may represent program steps, or may represent interconnected logic circuits, modules, and functions, or may represent a combination of program steps and logic circuits, modules, and functions. The computer program may be stored on memory. Memory may be of any type suitable to the local technical environment and may be implemented using any suitable data storage technology, such as, but not limited to, read-only memory (ROM), random access memory (RAM), optical storage devices and systems (Digital Video Disc (DVD) or Compact Disk (CD)), etc. Computer-readable media may include non-transitory storage media. The data processor may be of any type suitable to the local technical environment, such as, but not limited to, general-purpose computers, special-purpose computers, microprocessors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), and processors based on multi-core processor architectures.

[0904] A detailed description of exemplary embodiments of this application has been provided above through exemplary and non-limiting examples. However, various modifications and adjustments to the above embodiments will be apparent to those skilled in the art when considered in conjunction with the accompanying drawings and claims, without departing from the scope of this disclosure.

Claims

1. A sequence processing method, characterized in that, include: Obtain the information bit sequence; The information bit sequence is encoded by low-density parity-check (LDPC) encoding based on the parity check matrix to obtain the encoded bit sequence. The parity check matrix contains at least two types of elements: a first type and a second type. The first type of elements indicates elements associated with a cyclic shift of one identity matrix, and the second type of elements indicates elements associated with a cyclic shift of two identity matrices.

2. The method according to claim 1, characterized in that, The parity check matrix includes a parity check core matrix, wherein the ratio of the number of second-class elements in the parity check core matrix to the total number of all elements in the parity check core matrix is ​​greater than or equal to X%, and X is a real number greater than or equal to 40 and less than 100.

3. The method according to claim 2, characterized in that, X equals one of the following: 50、60、70、75、80、83、85、90、91、93、94、95。 4. The method according to claim 1, characterized in that, The parity check matrix includes a parity check core matrix, wherein the number of elements of type 2 in the parity check core matrix is ​​greater than the number of elements of type 1 in the parity check core matrix.

5. The method according to claim 1, characterized in that, The parity check core matrix also includes a third type of element, which indicates the element associated with the cyclic shift of the three identity matrices, wherein the number of the third type of element satisfies one or more of the following: The number of elements in category 2 is greater than the number of elements in category 3; The number of elements in the third category is greater than the number of elements in the first category; The number of elements in the third class is greater than the number of elements in the zero class, where the zero class elements indicate the elements of the all-zero matrix.

6. The method according to claim 1, characterized in that, The parity check matrix includes a parity check core matrix, wherein the number of elements of type 1 in the parity check core matrix is ​​greater than the number of elements of type 0 in the parity check core matrix.

7. The method according to claim 1, characterized in that, All elements in column q of the parity check core matrix are of type 2, where q is a positive integer less than or equal to the number of columns in the system, and the number of columns in the system is equal to the difference between the number of columns and the number of rows in the parity check matrix.

8. The method according to claim 7, characterized in that, q is greater than Y times the number of columns in the system, where Y is a real number greater than or equal to 0.5 and less than or equal to 1.

9. The method according to claim 7, characterized in that, In the parity check core matrix, all elements in the first q columns are of type 2.

10. The method according to claim 1, characterized in that, The number of elements of type 2 in the parity check core matrix is ​​greater than or equal to S times the number of elements of type 1 in the parity check core matrix, where S is a real number greater than 1.

11. The method according to claim 10, characterized in that, S equals one of the following: 1.2、1.5、1.8、2、2.5、2.8、3.0、3.5、3.8、4、4.5、5、5.4、5.6、6、7、8、8.3、9.6、11、12、12.3、13.6、15、16.3。 12. The method according to claim 1, characterized in that, The number of elements of type 2 in the parity check matrix is ​​greater than or equal to U times the number of elements of type 3 in the parity check matrix, where U is a real number greater than 1.

13. The method according to claim 12, characterized in that, U equals one of the following: 1.2、1.5、1.8、2、2.5、2.8、3.0、3.5、3.8、4、4.5、5、5.4。 14. The method according to claim 1, characterized in that, The row weight of the i-th row of the parity check core matrix in the parity check matrix is ​​greater than or equal to T times the number of columns in the system, where T is a real number greater than 1, the number of columns in the system is equal to the difference between the number of columns and the number of rows in the parity check matrix, and the row weight indicates the total number of cyclic shift bits of the identity matrix indicated by all non-zero elements in the corresponding row.

15. The method according to claim 14, characterized in that, T equals one of the following: 1.2、1.5、1.6、1.7、1.8、1.9、2.0、2.1。 16. The method according to claim 14, characterized in that, i equals one of the following: 0、1、2、3。 17. The method according to claim 1, characterized in that, The number of system columns containing only type 2 elements in the parity check matrix is ​​greater than or equal to the difference between the number of system columns and A. The number of system columns is equal to the difference between the number of columns and the number of rows in the parity check matrix. The system columns include the number of system columns in the parity check matrix, where A is equal to 0, 1, 2, 3, 4 or 5.

18. The method according to claim 1, characterized in that, The parity check matrix contains only elements of type 0 and type 1 from row p to the last row. The elements of type 0 are used to indicate the elements of the all-zero square matrix. p is equal to 2, 3, 4, 5, 6, 7, 8, 9 or 10.

19. The method according to claim 1, characterized in that, The difference between the number of columns and the number of rows in the parity check matrix is ​​an integer greater than 6 and less than 36.

20. The method according to claim 19, characterized in that, The difference between the number of columns and the number of rows in the parity check matrix is ​​equal to 24, 23, 22, 21, 20, 18, 16, 14, 12, 10, or 8.

21. The method according to claim 1, characterized in that, The parity check matrix comprises five sub-matrix blocks. The first and second sub-matrix blocks constitute the parity check core matrix. The first, second, and third sub-matrix blocks have the same number of rows. The third and fifth sub-matrix blocks have the same number of columns. The fourth sub-matrix block has the same number of columns as the parity check core matrix. The fourth and fifth sub-matrix blocks have the same number of rows. The first sub-matrix block is located at the top left corner of the parity check matrix. The second sub-matrix block is located adjacent to and to the right of the first sub-matrix block. The third sub-matrix block is located adjacent to and to the right of the second sub-matrix block. The fourth sub-matrix block is located at the bottom left corner of the parity check matrix. The fifth sub-matrix block is located at the bottom right corner of the parity check matrix.

22. The method according to claim 21, characterized in that, The number of rows in the first submatrix block is 2, 3, 4, 5, 6, 7, or 8.

23. The method according to claim 21, characterized in that, The minimum column weight of the first submatrix block is equal to 2, 3, 4, 5 or 6.

24. The method according to claim 21, characterized in that, The second sub-matrix block includes at least one second-type element, which includes two shift values, the two shift values ​​being equal to 1 and 2 respectively.

25. The method according to claim 21, characterized in that, The minimum column weight of the fourth sub-matrix block is equal to 4, 5, 6, 7, 8, 9, 10 or 11.

26. The method according to claim 21, characterized in that, The maximum column weight of the fourth sub-matrix block is equal to 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22 or 24.

27. The method according to claim 21, characterized in that, The row weight of the j-th row of the first submatrix block is greater than or equal to R times the number of columns in the system, where R is a real number greater than 1, and the number of columns in the system is equal to the difference between the number of columns and the number of rows in the parity check matrix.

28. The method according to claim 21, characterized in that, The average row weight of the first submatrix block is greater than or equal to E times the number of columns in the system, where E is a real number greater than 1, and the number of columns in the system is equal to the difference between the number of columns and the number of rows in the parity check matrix.

29. The method according to claim 21, characterized in that, The average row weight of the parity check core matrix in the parity check matrix is ​​greater than or equal to W times the number of columns in the system, where W is a real number greater than 1, and the number of columns in the system is equal to the difference between the number of columns and the number of rows in the parity check matrix.

30. The method according to claim 21, characterized in that, The second sub-matrix block satisfies one of the following: The row weight of all rows in the second sub-matrix block is greater than or equal to 2; In the second submatrix block, the column weight of all columns is greater than or equal to 2.

31. The method according to claim 1, characterized in that, The parity check core matrix of the parity check matrix is ​​composed of rows 0 to p-1 and columns 0 to g-1 of the parity check matrix, where p is equal to 2, 3, 4, 5, or 6, and g is equal to the sum of p and the number of systematic columns of the parity check matrix, which is equal to the difference between the number of columns and the number of rows of the parity check matrix.

32. The method according to claim 1, characterized in that, In the parity check matrix, the column weight of all columns in the core parity check matrix is ​​greater than 1.

33. The method according to claim 1, characterized in that, The parity check matrix includes at least three of the first-type elements in its core parity check matrix.

34. A sequence processing method, characterized in that, include: Obtain the soft bit sequence to be decoded; The soft bit sequence to be decoded is subjected to LDPC decoding based on the parity check matrix to obtain the information bit sequence. The parity check matrix contains at least two types of elements: a first type and a second type. The first type of elements indicates elements associated with a cyclic shift of one identity matrix, and the second type of elements indicates elements associated with a cyclic shift of two identity matrices.

35. A communication node, characterized in that, include: One or more processors; Storage device for storing one or more programs; When the one or more programs are executed by the one or more processors, the one or more processors implement the method as described in any one of claims 1-34.

36. A storage medium, characterized in that, The storage medium stores a computer program that, when executed by a processor, implements the method described in any one of claims 1-34.

37. A computer program product comprising a computer program that, when executed by a processor, implements the method according to any one of claims 1-34.

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